JP2014107403A - Solar dell, method of manufacturing the same, and solar cell module - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a solar cell which can be improved in conversion efficiency and can be reduced in manufacturing cost.SOLUTION: A solar cell 100 has a photoelectric conversion part 50 and a collector electrode 70 on one surface of the photoelectric conversion part 50. The collector electrode 70 includes a first conductive layer 71 and a second conductive layer 72 in order from the photoelectric conversion part 50 side and includes an insulating layer 9 between the first conductive layer 71 and the second conductive layer 72. The first conductive layer 71 contains a low melting point material, and the thermal flow starting temperature T1 of the low melting point material is lower than the heat-resistant temperature of the photoelectric conversion part 50. Part of the second conductive layer 72 is electrically connected to the first conductive layer 71. The collector electrode 70 has a bus bar electrode extending in a first direction and a plurality of finger electrodes extending in a second direction substantially perpendicular to the first direction, and wide regions are formed at ends of the finger electrodes.

Description

  The present invention relates to a solar cell and a manufacturing method thereof. Furthermore, the present invention relates to a solar cell module.

  As energy problems and global environmental problems become more serious, solar cells are attracting attention as alternative energy alternatives to fossil fuels. In a solar cell, electric power is generated by taking out carriers (electrons and holes) generated by light irradiation to a photoelectric conversion unit made of a semiconductor junction or the like to an external circuit. In order to efficiently extract carriers generated in the photoelectric conversion unit to an external circuit, a collector electrode is provided on the photoelectric conversion unit of the solar cell.

For example, even in a heterojunction solar cell having an amorphous silicon layer and a transparent electrode layer on a crystalline silicon substrate, a collector electrode is provided on the transparent electrode layer.
In such a configuration, the transparent electrode layer can function as a collector electrode, but the conductive oxide such as indium tin oxide (ITO) or zinc oxide that constitutes the transparent electrode layer has a resistivity higher than that of metal. Therefore, there is a problem that the internal resistance of the solar battery cell becomes high. Therefore, a collector electrode (metal electrode as an auxiliary electrode) is provided on the surface of the transparent electrode layer to increase current extraction efficiency.

  The collector electrode of a solar cell is generally formed by pattern printing of a silver paste by a screen printing method. Although this method is simple in itself, there are problems that the material cost of silver is large and the silver paste material containing a resin is used, so that the resistivity of the collector electrode is increased. In order to reduce the resistivity of the collector electrode formed using the silver paste, it is necessary to print the silver paste thickly. However, in this case, since it is necessary to increase the line width of the electrode, it is difficult to make the electrode thin, and the light shielding loss due to the collecting electrode increases.

  As a technique for solving these problems, a method of forming a collecting electrode by a plating method that is excellent in terms of material cost and process cost is known. For example, Patent Documents 1 to 3 disclose solar cells in which a metal layer made of copper or the like is formed on a transparent electrode layer constituting a photoelectric conversion unit by a plating method. In this method, first, a resist material layer (insulating layer) having an opening corresponding to the shape of the collector electrode is formed on the transparent electrode layer of the photoelectric conversion portion, and electroplating is performed on the resist opening of the transparent electrode layer. As a result, a metal layer is formed. Thereafter, the resist is removed to form a collector electrode having a predetermined shape.

  Also, in Patent Document 4, a groove is formed by irradiating a light-transmitting insulating layer formed on the entire surface of the transparent electrode layer of the photoelectric conversion portion with a laser, and an underlying conductive layer (underlayer) is formed in the groove portion. It is described that a collector electrode is formed by forming a metal layer such as copper by plating, and that the collector electrode can be thinned by providing a space in the depth of the groove. In Patent Documents 2 to 4, a low resistance collector electrode is formed by forming a metal layer on a base conductive layer (base layer) by plating.

  In addition, as a technique related to a conductive paste, Patent Document 5 discloses fusion of conductive fillers by adding an acidic group to a conductive paste containing a conductive filler component such as silver fine particles and heating at 200 ° C. or lower. It is described that the formation of an oxide film that can occur on the surface of the fine particles can be suppressed, and that it can be suitably used for a circuit board such as an IC card or a flexible board.

  Another problem related to the collector electrode is peeling of the collector electrode from the substrate (photoelectric conversion unit). In order to satisfy both the light collection efficiency and the current collection efficiency, the collector electrode generally has a vertically and horizontally symmetrical comb shape, and collects electricity generated inside the solar cell element by light incidence. It is formed by a large number of fine finger electrodes and a relatively wide bus bar electrode that intersects the finger electrodes perpendicularly and takes out the electricity collected by the finger electrodes to the outside. In order to increase the light collection efficiency, a finger electrode having a narrow line width is preferably used, but the fine finger electrode has a small contact area with the substrate (photoelectric conversion unit) and a low contact strength. Peeling from the substrate is likely to occur.

  As a method for preventing peeling of the finger electrode from the substrate, a method of widening the end of the finger electrode is known (Patent Documents 6 and 7). In Patent Document 6, when a solar cell is modularized by forming a wide region at the end of the finger electrode to increase the adhesion strength between the end of the finger electrode and the semiconductor substrate, a solder layer is formed on the finger electrode. A method for suppressing the peeling of the finger electrode from the substrate, which may occur when immersed in a solder melt for a long time to form a film, is disclosed.

JP 60-66426 A JP 2000-58885 A JP 2010-98232 A JP 2011-199045 A JP 2009-123607 A JP 2005-136148 A JP 2009-295715 A

  In the methods of Patent Documents 1 to 3, a resist material is required to form a collector electrode having a fine line pattern. The resist material is expensive, and the man-hours for electrode formation such as a base layer forming step for performing plating and a resist removing step are complicated, and thus there is a problem that the manufacturing cost is remarkably increased. In addition, since the transparent electrode layer has high resistivity, when a pattern collecting electrode made of a metal electrode layer is formed on the transparent electrode layer by electroplating without providing the base electrode layer, the in-plane of the transparent electrode layer There is a problem that the film thickness of the collector electrode (metal electrode layer) becomes non-uniform due to the voltage drop. Moreover, when using the mask corresponding to a collector electrode pattern like patent document 3, the cost and man-hour for producing a mask are needed, and there exists a problem that it is not suitable for practical use.

  In Patent Document 4, since a light-transmitting insulating layer is used, it is not necessary to remove the insulating layer after forming the collector electrode, but it is necessary to form a groove with a laser or the like, which is a problem from the viewpoint of productivity and production cost. Remains. Further, it is considered that a groove reaching the semiconductor layer formed therebelow is formed so as to give a space to the insulating layer, which may cause an adverse effect on the photoelectric conversion portion.

  In Patent Documents 2 to 4, a plated metal layer is formed directly on the underlayer, and no consideration is given to the problem of adhesion to the substrate that can occur as the collector electrode is thinned. There was room for improvement in terms of adhesion of the plating layer. Patent Document 6 describes peeling from a substrate caused by shrinkage of solder at the time of solder formation, but does not disclose that a collecting electrode is formed by a plating method, and thus was exposed to a plating solution. In that case, the peeling of the collector electrode from the substrate and the peeling between the underlayer and the plating layer have not been studied.

  An object of the present invention is to solve the problems of the prior art relating to the formation of a collector electrode of a solar cell as described above, to improve the conversion efficiency of the solar cell, and to reduce the manufacturing cost of the solar cell.

  As a result of intensive studies in view of the above problems, the present inventors have found that the conversion efficiency of the crystalline silicon solar cell can be improved by using a predetermined collector electrode, and that the collector electrode can be formed at low cost. And found the present invention.

  That is, the present invention relates to the following.

  A solar cell having a photoelectric conversion unit and a collector electrode on one main surface of the photoelectric conversion unit, wherein the collector electrode includes a first conductive layer and a second conductive layer in order from the photoelectric conversion unit side. In addition, an insulating layer is included between the first conductive layer and the second conductive layer, the first conductive layer includes a low melting point material, and a heat flow start temperature T1 of the low melting point material is equal to that of the photoelectric conversion unit. The collector electrode has a bus bar electrode extending in a first direction and a plurality of finger electrodes extending in a second direction substantially perpendicular to the first direction, the collector electrode having a temperature lower than a heat-resistant temperature, A solar cell in which a wide region is formed at an end and a part of the second conductive layer is electrically connected to the first conductive layer.

  It is preferable that at least some of the wide regions of the plurality of finger electrodes are connected.

  The second conductive layer is preferably a plating layer.

  The second conductive layer preferably has copper.

  The photoelectric conversion unit has a silicon-based thin film and a transparent electrode layer in this order on one main surface of a one-conductivity-type crystalline silicon substrate, and has the collector electrode on the transparent electrode layer, The heat flow starting temperature T1 is preferably 250 ° C. or lower.

  The second conductive layer is preferably connected to the first conductive layer through the opening of the insulating layer.

  It is preferable that the insulating layer is also formed on the first conductive layer non-formation region of the photoelectric conversion portion.

  Moreover, it is preferable to use a solar cell module provided with the said solar cell.

  The method for manufacturing a solar cell includes: a first conductive layer forming step in which a first conductive layer containing a low melting point material is formed on the photoelectric conversion portion; an insulating layer in which an insulating layer is formed on the first conductive layer Forming the second conductive layer in this order, and in the insulating layer forming step or before the post plating step of the insulating layer forming step, the low melting point material It is preferable that the annealing process is performed at an annealing temperature Ta higher than the heat flow start temperature T1.

  The annealing temperature Ta is preferably lower than the heat resistant temperature of the photoelectric conversion part.

  The annealing temperature Ta is preferably 250 ° C. or lower.

  It is preferable that an opening is formed in the insulating layer by the annealing process at the annealing temperature Ta.

  In the insulating layer forming step, an insulating layer is preferably formed also on the first conductive layer non-formation region of the photoelectric conversion portion.

  It is preferable that the photoelectric conversion unit includes a silicon-based thin film and a transparent electrode layer in this order on one main surface of a one-conductivity-type crystalline silicon substrate, and the collector electrode is formed on the transparent electrode layer.

  According to the present invention, since the collector electrode can be formed by a plating method, the resistance of the collector electrode is reduced, and the conversion efficiency of the solar cell can be improved. In addition, in the case of having a transparent electrode layer on the surface, the conventional method for forming a collecting electrode by plating requires a patterning process of the insulating layer, but according to the present invention, a mask or resist for pattern formation is used. In addition, it is possible to form a pattern electrode by plating. Therefore, a highly efficient solar cell can be provided at low cost. Further, in the present invention, the first conductive layer is formed by using a collector electrode having an insulating layer between the first conductive layer and the second conductive layer forming the collector electrode, and the end portion of the finger electrode has a wide region. And peeling of the second conductive layer is prevented, and a solar cell can be provided with high yield.

It is typical sectional drawing which shows the solar cell of this invention. It is typical sectional drawing which shows the heterojunction solar cell concerning one Embodiment. It is typical sectional drawing of the solar cell by one Embodiment of this invention. It is a conceptual diagram of the manufacturing process of the solar cell by one Embodiment of this invention. It is a conceptual diagram which shows an example of the shape change at the time of the heating of low melting-point material. It is a conceptual diagram for demonstrating the shape change at the time of the heating of low melting point material powder, and necking. It is a SEM photograph of metal fine particles in which sintering necking has occurred. It is a structure schematic diagram of a plating apparatus. It is a figure which shows the optical characteristic of the insulating layer in an Example.

As schematically shown in FIG. 1, the solar cell 100 of the present invention includes a collector electrode 70 on one main surface of the photoelectric conversion unit 50. The collector electrode 70 includes a first conductive layer 71 and a second conductive layer 72 containing a low melting point material in order from the photoelectric conversion unit 50 side. An insulating layer 9 is formed between the first conductive layer 71 and the second conductive layer 72. A part of the second conductive layer 72 is electrically connected to the first conductive layer 71 through, for example, the opening 9 h of the insulating layer 9. The low melting point material of the first conductive layer 71 preferably has a heat flow start temperature T ₁ lower than the heat resistant temperature of the photoelectric conversion unit 50. Heat flow starting temperature _{T 1} of, for example is 250 ° C. or less.

  Hereinafter, the present invention will be described in more detail by taking, as an example, a heterojunction crystalline silicon solar cell (hereinafter sometimes referred to as a “heterojunction solar cell”) that is an embodiment of the present invention. A heterojunction solar cell is a crystalline silicon solar cell in which a diffusion potential is formed by having a silicon thin film having a band gap different from that of single crystal silicon on the surface of a single crystal silicon substrate of one conductivity type. The silicon-based thin film is preferably amorphous. Among them, a thin intrinsic amorphous silicon layer interposed between a conductive amorphous silicon thin film for forming a diffusion potential and a crystalline silicon substrate is a crystalline silicon solar cell having the highest conversion efficiency. It is known as one of the forms.

  FIG. 2 is a schematic cross-sectional view of a crystalline silicon solar cell according to an embodiment of the present invention. The crystalline silicon solar cell 101 includes, as the photoelectric conversion unit 50, the conductive silicon thin film 3 a and the light incident side transparent electrode layer 6 a on one surface (light incident side surface) of the one conductivity type single crystal silicon substrate 1. In this order. It is preferable that the other surface (surface opposite to the light incident side) of the one conductivity type single crystal silicon substrate 1 has the conductivity type silicon-based thin film 3b and the back surface side transparent electrode layer 6b in this order. A collecting electrode 70 including a first conductive layer 71 and a second conductive layer 72 is formed on the light incident side transparent electrode layer 6 a on the surface of the photoelectric conversion unit 50. An insulating layer 9 is formed between the first conductive layer 71 and the second conductive layer 72.

  It is preferable to have intrinsic silicon-based thin films 2a and 2b between the one-conductivity-type single crystal silicon substrate 1 and the conductive silicon-based thin films 3a and 3b. It is preferable to have the back metal electrode 8 on the back side transparent electrode layer 6b. FIG. 3: shows the figure when the solar cell which concerns on one Embodiment of this invention is seen from the light-incidence side. The collector electrode 7 has a large number of fine finger electrodes 7a in the first direction and a bus bar electrode 7b in the second direction substantially perpendicular to the finger electrodes 7a.

  First, the one conductivity type single crystal silicon substrate 1 in the crystalline silicon solar cell of the present invention will be described. In general, a single crystal silicon substrate contains an impurity that supplies electric charge to silicon in order to provide conductivity. Single crystal silicon substrates include an n-type in which atoms (for example, phosphorus) for introducing electrons into silicon atoms and a p-type in which atoms (for example, boron) for introducing holes into silicon atoms are contained. That is, “one conductivity type” in the present invention means either n-type or p-type.

  In heterojunction solar cells, electron / hole pairs are efficiently separated and recovered by providing a strong electric field with the heterojunction on the incident side where the most incident light is absorbed as the reverse junction. Can do. Therefore, the heterojunction on the light incident side is preferably a reverse junction. On the other hand, when holes and electrons are compared, electrons having smaller effective mass and scattering cross section generally have higher mobility. From the above viewpoint, the single crystal silicon substrate 1 used for the heterojunction solar cell is preferably an n-type single crystal silicon substrate. The single crystal silicon substrate 1 preferably has a texture structure on the surface from the viewpoint of light confinement.

A silicon-based thin film is formed on the surface of the one conductivity type single crystal silicon substrate 1 on which the texture is formed. As a method for forming a silicon-based thin film, a plasma CVD method is preferable. As conditions for forming a silicon-based thin film by plasma CVD, a substrate temperature of 100 to 300 ° C., a pressure of 20 to 2600 Pa, and a high frequency power density of 0.004 to 0.8 W / cm ² are preferably used. As a source gas used for forming a silicon-based thin film, a silicon-containing gas such as SiH ₄ or Si ₂ H ₆ or a mixed gas of a silicon-based gas and H ₂ is preferably used.

The conductive silicon thin film 3 is a one-conductivity type or reverse conductivity type silicon thin film. For example, when n-type is used as the one-conductivity-type single crystal silicon substrate 1, the one-conductivity-type silicon-based thin film and the reverse-conductivity-type silicon-based thin film are n-type and p-type, respectively. B ₂ H ₆ or PH ₃ is preferably used as the dopant gas for forming the p-type or n-type silicon-based thin film. Moreover, since the addition amount of impurities such as P and B may be small, it is preferable to use a mixed gas diluted with SiH ₄ or H ₂ in advance. When forming a conductive silicon thin film, a gas containing a different element such as CH ₄ , CO ₂ , NH ₃ , GeH ₄ is added to alloy the silicon thin film, thereby reducing the energy gap of the silicon thin film. It can also be changed.

  Examples of silicon-based thin films include amorphous silicon thin films, microcrystalline silicon (thin films containing amorphous silicon and crystalline silicon), and the like. Among these, it is preferable to use an amorphous silicon thin film. For example, as a preferable configuration of the photoelectric conversion unit 50 when an n-type single crystal silicon substrate is used as the one-conductivity-type single crystal silicon substrate 1, the transparent electrode layer 6a / p-type amorphous silicon thin film 3a / i type is used. Examples include a laminated structure in the order of amorphous silicon thin film 2a / n type single crystal silicon substrate 1 / i type amorphous silicon thin film 2b / n type amorphous silicon thin film 3b / transparent electrode layer 6b. In this case, for the reason described above, it is preferable that the p-layer side be the light incident surface.

  The intrinsic silicon thin films 2a and 2b are preferably i-type hydrogenated amorphous silicon composed of silicon and hydrogen. When i-type hydrogenated amorphous silicon is deposited on a single crystal silicon substrate by CVD, surface passivation can be effectively performed while suppressing impurity diffusion into the single crystal silicon substrate. Further, by changing the amount of hydrogen in the film, it is possible to give an effective profile to the carrier recovery in the energy gap.

  The p-type silicon thin film is preferably a p-type hydrogenated amorphous silicon layer, a p-type amorphous silicon carbide layer, or a p-type amorphous silicon oxide layer. A p-type hydrogenated amorphous silicon layer is preferable from the viewpoint of suppressing impurity diffusion and reducing the series resistance. On the other hand, the p-type amorphous silicon carbide layer and the p-type amorphous silicon oxide layer are wide gap low-refractive index layers, which are preferable in terms of reducing optical loss.

  The photoelectric conversion unit 50 of the heterojunction solar cell 101 preferably includes the transparent electrode layers 6a and 6b on the conductive silicon thin films 3a and 3b. The transparent electrode layer is formed by a transparent electrode layer forming step. The transparent electrode layers 6a and 6b are mainly composed of a conductive oxide. As the conductive oxide, for example, zinc oxide, indium oxide, or tin oxide can be used alone or in combination. From the viewpoints of conductivity, optical characteristics, and long-term reliability, an indium oxide containing indium oxide is preferable, and an indium tin oxide (ITO) as a main component is more preferably used. Here, “main component” means that the content is more than 50% by weight, preferably 70% by weight or more, and more preferably 90% by weight or more. The transparent electrode layer may be a single layer or a laminated structure composed of a plurality of layers.

  A doping agent can be added to the transparent electrode layer. For example, when zinc oxide is used as the transparent electrode layer, examples of the doping agent include aluminum, gallium, boron, silicon, and carbon. When indium oxide is used as the transparent electrode layer, examples of the doping agent include zinc, tin, titanium, tungsten, molybdenum, and silicon. When tin oxide is used as the transparent electrode layer, examples of the doping agent include fluorine.

  The doping agent can be added to one or both of the light incident side transparent electrode layer 6a and the back surface side transparent electrode layer 6b. In particular, it is preferable to add a doping agent to the light incident side transparent electrode layer 6a. By adding a doping agent to the light incident side transparent electrode layer 6a, the resistance of the transparent electrode layer itself can be reduced and resistance loss between the transparent electrode layer 6a and the collector electrode 7 can be suppressed.

  The film thickness of the light incident side transparent electrode layer 6a is preferably 10 nm or more and 140 nm or less from the viewpoints of transparency, conductivity, and light reflection reduction. The role of the transparent electrode layer 6a is to transport carriers to the collector electrode 7, and it is only necessary to have conductivity necessary for that purpose, and the film thickness is preferably 10 nm or more. By setting the film thickness to 140 nm or less, absorption loss in the transparent electrode layer 6a is small, and a decrease in photoelectric conversion efficiency accompanying a decrease in transmittance can be suppressed. Moreover, if the film thickness of the transparent electrode layer 6a is within the above range, an increase in carrier concentration in the transparent electrode layer can also be prevented, so that a decrease in photoelectric conversion efficiency due to a decrease in transmittance in the infrared region is also suppressed.

  The method for forming the transparent electrode layer is not particularly limited, but a physical vapor deposition method such as a sputtering method, a chemical vapor deposition (MOCVD) method using a reaction between an organometallic compound and oxygen or water is preferable. In any film forming method, energy by heat or plasma discharge can be used.

  The substrate temperature at the time of producing the transparent electrode layer is appropriately set. For example, when an amorphous silicon thin film is used as the silicon thin film, the temperature is preferably 200 ° C. or lower. By setting the substrate temperature to 200 ° C. or lower, desorption of hydrogen from the amorphous silicon layer and accompanying dangling bonds to silicon atoms can be suppressed, and as a result, conversion efficiency can be improved.

  It is preferable that the back surface metal electrode 8 is formed on the back surface side transparent electrode layer 6b. As the back surface metal electrode 8, it is desirable to use a material having high reflectivity from the near infrared to the infrared region and high conductivity and chemical stability. Examples of the material satisfying such characteristics include silver and aluminum. The method for forming the back surface metal electrode layer is not particularly limited, but a physical vapor deposition method such as a sputtering method or a vacuum evaporation method, a printing method such as screen printing, or the like is applicable.

A collecting electrode 7 is formed on the transparent electrode layer 6a. The collector electrode 7 includes a first conductive layer 71 and a second conductive layer 72. The first conductive layer 71 includes a low melting point material. The low melting point material preferably has a heat flow start temperature T ₁ lower than the heat resistant temperature of the photoelectric conversion part.

  As shown in FIG. 3, the collector electrode 7 includes a bus bar electrode 7 a extending in the first direction and a plurality of finger electrodes 7 b extending in a second direction substantially perpendicular to the first direction. The finger electrode 7a has a wide region at the end. Here, “substantially vertical” means that the angle formed by each finger electrode and the bus bar electrode is 85 degrees or more. That is, the angle between all the finger electrodes and the bus bar electrode is not necessarily 90 degrees, but from the viewpoint of reducing resistance, it is more preferable that each finger electrode is close to 90 degrees, and all the 90 degrees, Particularly preferred is vertical.

  An insulating layer 9 is formed between the first conductive layer 71 and the second conductive layer 72. In the collector electrode 7 of the present invention, a part of the second conductive layer 72 is electrically connected to the first conductive layer 71. Here, “partially conducting” means a state in which the insulating layer is typically formed with an opening and the opening is filled with the material of the second conductive layer. It is. In addition, when the film thickness of a part of the insulating layer 9 is very thin (about several nm) (that is, a region having a thin film thickness is locally formed), the second conductive layer 72 becomes the first conductive layer 71. Including those that are in conduction. For example, when the low-melting-point material of the first conductive layer 71 is a metal material such as aluminum, the first conductive layer 71 and the second conductive layer are interposed via an oxide film (corresponding to an insulating layer) formed on the surface thereof. A state in which the gap is conducted is exemplified. A structure in which an opening or a locally thin region is formed in the insulating layer so that the first conductive layer and the second conductive layer are electrically connected is also referred to as a “deformed portion”.

In the present invention, it is preferable that the second conductive layer 72 is electrically connected to the first conductive layer 71 through the opening 9 h of the insulating layer 9. The method of forming the opening is not particularly limited, in the present invention, after forming the insulating layer 9 on the first conductive layer 71, a method of heating the heat flow temperature above T ₁ of the low melting point material (annealing) is preferably Adopted. When the first conductive layer is heated, the low melting point material becomes a fluid state, and the surface shape of the first conductive layer is changed, and accordingly, the insulating layer 9 formed on the first conductive layer 71. An opening (crack) can be generated in

  Hereinafter, preferred embodiments of the method for producing a collector electrode in the present invention will be described with reference to the drawings. FIG. 4 is a process conceptual diagram showing an embodiment of a method for forming the collector electrode 70 on the photoelectric conversion unit 50 of the solar cell. In this embodiment, first, the photoelectric conversion unit 50 is prepared (photoelectric conversion unit preparation step, FIG. 4A). For example, in the case of a heterojunction solar cell, as described above, a photoelectric conversion unit including a silicon-based thin film and a transparent electrode layer is prepared on one conductivity type silicon substrate.

  A first conductive layer 71 including a low melting point material 711 is formed on one main surface of the photoelectric conversion portion (first conductive layer forming step, FIG. 4B). The insulating layer 9 is formed on the first conductive layer 71 (insulating layer forming step, FIG. 4C or (C ′)). The insulating layer 9 may be formed only on the first conductive layer 71, and is also formed on a region where the first conductive layer 71 of the photoelectric conversion unit 50 is not formed (first conductive layer non-formation region). It may be. In particular, when a transparent electrode layer is formed on the surface of the photoelectric conversion unit 50 as in a heterojunction solar cell, the insulating layer 9 is preferably formed also on the first conductive layer non-formation region.

  In the present invention, (1) in the insulating layer forming step, or (2) after the insulating layer is formed, annealing treatment (also referred to as heat treatment) is performed by heating. Due to the annealing treatment, the first conductive layer 71 is heated to the annealing temperature Ta, and the low melting point material is heat-fluidized to change the surface shape, and accordingly, the insulating layer 9 formed on the first conductive layer 71 is deformed. Occurs. The deformation of the insulating layer 9 is typically the formation of an opening 9h in the insulating layer. The opening 9h is formed in a crack shape, for example. Unless otherwise specified, “annealing process” means a process of forming a deformed portion in an insulating layer.

  (1) When annealing is performed in the insulating layer forming step, an opening is formed as shown in FIG. (2) When the annealing process is performed after the insulating layer forming step, the insulating layer is formed as shown in FIG. 4C, and then the annealing process is performed to form the opening as shown in FIG. be able to. Even when the annealing process is performed in the insulating layer forming process, a separate annealing process may be performed after the insulating layer forming process (FIG. 4C '-> D).

  (1) In the insulating layer forming step, the deformed portion is formed almost simultaneously with the formation of the insulating layer by forming the insulating layer while heating the substrate to the annealing temperature Ta. “Substantially simultaneously with the formation of the insulating layer” means a state during or immediately after the formation of the insulating layer, which does not have a new step other than the step of forming the insulating layer. For example, it includes a case where a deformed portion is generated after the film formation of the insulating layer is finished (after the heating is stopped) until the substrate surface temperature returns to room temperature or the like. Further, when a deformed portion is formed in an insulating layer on a certain low melting point material, the insulating layer around the low melting point material is formed even after the formation of the insulating layer on the low melting point material is finished. This includes the case where the insulating layer on the low melting point material is deformed following the above.

  The “annealing temperature Ta” in the present invention means a substrate surface temperature (substrate heating temperature) during annealing. In this case, (1) when performed in the insulating layer forming step, it means the temperature at the start of the formation of the insulating layer.

  (1) When annealing is performed in the insulating layer forming step, the average value of the substrate surface temperature during the formation of the insulating layer is usually equal to or higher than the substrate surface temperature at the start of film formation. Therefore, the deformed portion can be formed in the insulating layer by heating at T1 <Ta as in the present invention. For example, when the insulating layer 9 is formed by a dry method, the deformed portion can be formed by setting the substrate surface temperature during the formation of the insulating layer to be higher than the thermal flow start temperature T1 of the low melting point material. it can. Further, when the insulating layer 9 is formed by a wet method, the deformed portion can be formed by setting the substrate surface temperature when the solvent is dried to form the film to a temperature higher than the heat flow start temperature T1. it can. In the case where the insulating layer is formed by a wet method, the “film formation start point” means the start point of drying of the solvent.

  The substrate surface temperature can be measured, for example, by attaching a thermolabel or a thermocouple to the substrate surface. In addition, the temperature of the heating unit (such as a heater) can be appropriately adjusted so that the surface temperature of the substrate falls within a predetermined range.

  After the opening is formed in the insulating layer by annealing, the second conductive layer 72 is formed by a plating method (plating step, FIG. 4E). Although the first conductive layer 71 is covered with the insulating layer 9, the first conductive layer 71 is exposed at a portion where the opening 9 h is formed in the insulating layer 9. Therefore, the first conductive layer is exposed to the plating solution, and metal can be deposited starting from the opening 9h. According to such a method, the second conductive layer corresponding to the shape of the collector electrode can be formed by plating without providing a resist material layer having an opening corresponding to the shape of the collector electrode.

The first conductive layer 71 is a layer that functions as a conductive underlayer when the second conductive layer is formed by a plating method. Therefore, the first conductive layer only needs to have conductivity that can function as a base layer for electrolytic plating. In the present specification, it is defined as being conductive if the volume resistivity is 10 ⁻² Ω · cm or less. Further, if the volume resistivity is 10 ² Ω · cm or more, it is defined as insulating.

  The film thickness of the first conductive layer 71 is preferably 20 μm or less from the viewpoint of cost, and more preferably 10 μm or less. On the other hand, from the viewpoint of setting the line resistance of the first conductive layer 71 in a desired range, the film thickness is preferably 0.5 μm or more, and more preferably 1 μm or more.

The first conductive layer 71 includes a low melting point material of the heat flow temperature T _1. The heat flow start temperature is a temperature at which the material causes heat flow by heating and the surface shape of the layer containing the low melting point material changes, and is typically the melting point. In the case of a polymer material or glass, the material may soften at a temperature lower than the melting point to cause heat flow. In such a material, it can be defined that heat flow start temperature = softening point. The softening point is a temperature at which the viscosity becomes 4.5 × 10 ⁶ Pa · s (the same as the definition of the softening point of glass).

The low melting point material is preferably a material that causes heat flow in the annealing process and changes the surface shape of the first conductive layer 71. Therefore, the thermal flow temperature T ₁ of the low-melting material is preferred over the annealing temperature Ta is low. In the present invention, the annealing process is preferably performed at an annealing temperature Ta lower than the heat resistant temperature of the photoelectric conversion unit 50. Therefore, the heat flow temperature T ₁ of the low melting point material, it is preferred to heat the temperature of the photoelectric conversion unit is cold.

The heat-resistant temperature of the photoelectric conversion unit is irreversibly reduced in the characteristics of a solar cell including the photoelectric conversion unit (also referred to as “solar battery cell” or “cell”) or a solar battery module manufactured using the solar battery cell. Temperature. For example, in the heterojunction solar cell 101 shown in FIG. 2, the single crystal silicon substrate 1 constituting the photoelectric conversion unit 50 hardly changes its characteristics even when heated to a high temperature of 500 ° C. or higher. When the amorphous silicon-based thin films 2 and 3 are heated to about 250 ° C., thermal deterioration or diffusion of doped impurities may occur, resulting in irreversible deterioration of solar cell characteristics. Therefore, in the heterojunction solar cell, the first conductive layer 71 is preferably heat flow temperature T ₁ is comprises a low melting point material 250 ° C. or less.

The lower limit of the thermal flow temperature T ₁ of the low melting point material is not particularly limited. From the viewpoint of easily forming the opening 9h in the insulating layer 9 by increasing the amount of change in the surface shape of the first conductive layer during the annealing treatment, the low melting point material is thermally flowable in the first conductive layer forming step. It is preferable not to produce. For example, when the first conductive layer is formed by coating or printing, heating may be performed for drying. In this case, the heat flow temperature T ₁ of the low-melting material is preferred over the heating temperature for the drying of the first conductive layer is a high temperature. From this viewpoint, the heat flow temperature T ₁ of the low melting point materials is preferably at least 80 ° C., more preferably at least 100 ° C..

Low melting point material, if the heat flow temperature T ₁ is the above-mentioned range, be organic, it may be inorganic. The low melting point material may be electrically conductive or insulating, but is preferably a metal material having conductivity. If the low-melting-point material is a metal material, the resistance value of the first conductive layer can be reduced. Therefore, when the second conductive layer is formed by electroplating, the uniformity of the film thickness of the second conductive layer can be improved. it can. In addition, when the low melting point material is a metal material, the contact resistance between the photoelectric conversion unit 50 and the collector electrode 70 can be reduced.

  As the low melting point material, a simple substance or an alloy of a low melting point metal material or a mixture of a plurality of low melting point metal materials can be suitably used. Examples of the low melting point metal material include indium, bismuth, and gallium.

The first conductive layer 71, in addition to the above low melting point material preferably contains a refractory material having a thermal flow temperature T ₂ of the relatively high temperature than the low-melting-point material. Since the first conductive layer 71 includes the high melting point material, the first conductive layer and the second conductive layer can be efficiently conducted, and the conversion efficiency of the solar cell can be improved. For example, when a material having a large surface energy is used as the low melting point material, when the first conductive layer 71 is exposed to a high temperature by the annealing process and the low melting point material is in a liquid phase state, as conceptually shown in FIG. In some cases, the particles of the low-melting-point material are aggregated to become coarse particles, and the first conductive layer 71 may be disconnected. On the other hand, since the high melting point material does not enter a liquid phase state even when heated during the annealing process, the low melting point material as shown in FIG. 5 can be obtained by including the high melting point material in the first conductive layer forming material. Disconnection of the first conductive layer due to coarsening can be suppressed.

Heat flow temperature T ₂ of the high-melting material is preferably higher than the annealing temperature Ta. That is, when the first conductive layer 71 contains a low melting point material and a high melting point material, the heat flow starting temperature T _{1 of} the low melting point material, the heat flow starting temperature T _{2 of} the high melting point material, and the annealing temperature Ta in the annealing process are: , T ₁ <Ta <T ₂ is preferably satisfied. The high melting point material may be an insulating material or a conductive material, but a conductive material is preferable from the viewpoint of reducing the resistance of the first conductive layer. When the low melting point material has low conductivity, the resistance of the first conductive layer as a whole can be reduced by using a material having high conductivity as the high melting point material. As the conductive high melting point material, for example, a single metal material such as silver, aluminum, copper, or a plurality of metal materials can be preferably used.

  When the first conductive layer 71 contains a low-melting-point material and a high-melting-point material, the content ratio is to suppress disconnection due to the coarsening of the low-melting-point material as described above, to the conductivity of the first conductive layer, to the insulating layer. From the standpoint of easiness of forming the opening (increase in the number of starting points of metal deposition of the second conductive layer) and the like, it is appropriately adjusted. The optimum value varies depending on the material used and the combination of particle sizes. For example, the weight ratio of the low melting point material to the high melting point material (low melting point material: high melting point material) is 5:95 to 67:33. It is a range. The weight ratio of the low melting point material: the high melting point material is more preferably 10:90 to 50:50, and further preferably 15:85 to 35:65.

When a particulate low melting point material such as metal particles is used as the material of the first conductive layer 71, the particle diameter D _L of the low melting point material is from the viewpoint of facilitating the formation of an opening in the insulating layer by annealing. It is preferably 1/20 or more of the film thickness d of the first conductive layer, and more preferably 1/10 or more. Particle size _{D L} of the low-melting material, more preferably 0.25 [mu] m, more preferably not less than 0.5 [mu] m. When the first conductive layer 71 is formed by a printing method such as screen printing, the particle size of the particles can be set as appropriate according to the mesh size of the screen plate. For example, the particle size is preferably smaller than the mesh size, and more preferably ½ or less of the mesh size. When the particles are non-spherical, the particle size is defined by the diameter of a circle having the same area as the projected area of the particles (projected area circle equivalent diameter, Heywood diameter).

The shape of the particles of the low melting point material is not particularly limited, but a non-spherical shape such as a flat shape is preferable. In addition, non-spherical particles obtained by combining spherical particles by a technique such as sintering are also preferably used. Generally, when the metal particles are in a liquid phase, the surface shape tends to be spherical in order to reduce the surface energy. If low melting point material of the first conductive layer before annealing is non-spherical, the annealing is heated in heat flow starting temperature above T _1, since the particles approaches the spherical shape, the surface shape of the first conductive layer The amount of change is greater. Therefore, it is easy to form an opening in the insulating layer 9 on the first conductive layer 71.

As described above, the first conductive layer 71 is conductive, and the volume resistivity may be 10 ⁻² Ω · cm or less. The volume resistivity of the first conductive layer 71 is preferably 10 ⁻⁴ Ω · cm or less. When the first conductive layer has only the low melting point material, the low melting point material only needs to have conductivity. In the case where the first conductive layer contains a low melting point material and a high melting point material, at least one of the low melting point material and the high melting point material may be conductive. For example, the combination of low melting point material / high melting point material includes insulation / conductivity, conductivity / insulation, conductivity / conductivity. In order to make the first conductive layer have a lower resistance, Both the low melting point material and the high melting point material are preferably conductive materials.

In addition to the combination of the low-melting-point material and the high-melting-point material as described above as the material of the first conductive layer 71, the first conductive layer 71 can be adjusted by adjusting the size (for example, particle size) of the material, so It is also possible to suppress disconnection of one conductive layer and improve conversion efficiency. For example, if a material having a high melting point such as silver, copper, gold or the like is fine particles having a particle size of 1 μm or less, sintering necking (particulate particles) at a temperature T ₁ ′ of about 200 ° C. or lower than the melting point. Therefore, it can be used as the “low melting point material” of the present invention. When the material that causes such sintering necking is heated to the sintering necking start temperature T ₁ ′ or higher, deformation occurs in the vicinity of the outer periphery of the fine particles, so that the surface shape of the first conductive layer is changed, and the insulating layer An opening can be formed in 9. Further, even when the fine particles are heated to a temperature higher than the sintering necking start temperature, the fine particles maintain the solid state if the temperature is lower than the melting point T ₂ ′. Disconnection due to is difficult to occur. That is, it can be said that a material that causes sintering necking such as metal fine particles is a “low melting point material” in the present invention, but also has a side surface as a “high melting point material”.

In a material that causes such sintering necking, it can be defined that sintering necking start temperature T ₁ ′ = heat flow start temperature T ₁ . FIG. 6 is a diagram for explaining the sintering necking start temperature. FIG. 6A is a plan view schematically showing the particles before sintering. Since they are not sintered, the particles are in point contact with each other. FIG. 6B and FIG. 5C are cross-sectional views schematically showing a state when the particles after the sintering is started are cut along a cross section passing through the center of each particle. FIG. 6 (B) shows the state where the sintering has progressed from (B) after the start of sintering (the initial stage of sintering), and FIG. In FIG. 6B, a grain boundary between the particle A (radius r _A ) and the particle B (radius r _B ) is indicated by a dotted line having a length a _AB .

Sintering necking onset temperature _{T 1} ', the ratio of _{r A} and _r larger value max _(r A, _{r B)} of the _B and the grain boundary between the length _{a AB, a AB / max (} r A, r _B ) is defined as the temperature at which it becomes 0.1 or more. That is, the temperature at which a _AB / max (r _A , r _B ) of at least a pair of particles is 0.1 or more is referred to as a sintering necking start temperature. In FIG. 6, for the sake of simplicity, the particles are shown as spherical, but when the particles are not spherical, the radius of curvature of the particles near the grain boundary is regarded as the radius of the particles. When the radius of curvature of the particle near the grain boundary varies depending on the location, the largest radius of curvature among the measurement points is regarded as the radius of the particle. For example, as shown in FIG. 7A, a grain boundary having a length of _AB is formed between a pair of fine particles A and B that have been sintered. In this case, the shape of the particle A in the vicinity of the grain boundary is approximated by an arc of a virtual circle A indicated by a dotted line. On the other hand, the grain boundaries near the particle B, one is approximated by an arc of a virtual circle B ₁ indicated by broken lines, and the other is approximated by an arc of a virtual circle B ₂ indicated by a solid line. As shown in FIG. 7B, since r _B2 > r _B1 , r _B2 is regarded as the radius r _{B of the} particle B. Note that the above virtual circle is determined by a method in which the boundary is defined by black and white binarization processing of the observation image of the cross section or surface, and the center coordinates and radius are calculated by the least square method based on the coordinates of the boundary in the vicinity of the grain boundary. it can. In addition, when it is difficult to strictly measure the sintering necking start temperature according to the above definition, the first conductive layer containing fine particles is formed, and the insulating layer is formed thereon or after the insulating layer is formed. The temperature at which the deformed portion is generated in the insulating layer by annealing can be regarded as the sintering necking start temperature.

  In addition to the low melting point material (and high melting point material) described above, a paste containing a binder resin or the like can be preferably used as the first conductive layer forming material. In order to sufficiently improve the conductivity of the first conductive layer formed by the screen printing method, it is desirable to cure the first conductive layer by heat treatment. Therefore, as the binder resin contained in the paste, it is preferable to use a material that can be cured at the drying temperature, and an epoxy resin, a phenol resin, an acrylic resin, or the like is applicable. In this case, the shape of the low melting point material changes with hardening, and as shown in FIG. 4D, an opening (crack) is likely to occur in the insulating layer near the low melting point material during the annealing process. Note that the ratio between the binder resin and the conductive low melting point material may be set to be equal to or higher than a so-called percolation threshold (a critical value of the ratio corresponding to the low melting point material content at which conductivity is manifested).

  The first conductive layer 71 can be produced by a known technique such as an inkjet method, a screen printing method, a conductive wire bonding method, a spray method, a vacuum deposition method, or a sputtering method. The first conductive layer 71 is preferably patterned in a predetermined shape such as a comb shape. A screen printing method is suitable for forming the patterned first conductive layer from the viewpoint of productivity. In the screen printing method, a method of printing a collector electrode pattern using a printing paste containing a low melting point material made of metal particles and a screen plate having an opening pattern corresponding to the pattern shape of the collector electrode is preferably used. Even when the first conductive layer having a wide region at the end portion is formed, it can be easily formed with high productivity by a screen printing method using a screen plate having a wide end portion.

  As shown in FIG. 3, the plurality of finger electrodes of the first conductive layer 71 are formed with wide regions at the ends. By forming the wide region, an effect of preventing peeling between the first conductive layer and the second conductive layer can be expected more. The shape of the wide area | region of the said finger electrode is not specifically limited, The circular thing as shown to FIG. 3 (A), the connected thing as shown to (B), a rectangle, an ellipse (not shown) Can be used. Among these, it is preferable to use one in which at least a part of the wide regions of the plurality of finger electrodes are connected. Here, “at least a part is connected” means that at least two of the plurality of finger electrodes are connected. It is more preferable that the number of connected portions is larger, and it is particularly preferable to use a connected portion as shown in (B). As the number of connected portions between the finger electrodes increases, for example, even if the collector electrode has a defect, the current loss can be further reduced.

  As described above, the finger electrode is preferably as thin as possible from the viewpoint of light collection, preferably 10 to 200 μm, and more preferably 10 to 120 μm. Especially when producing by screen printing, about 50-120 micrometers is preferable.

  The finger electrode preferably has a wide first conductive layer. Usually, when the second conductive layer is formed by a plating method, the second conductive layer is plated on the first conductive layer, so that the shape of the collector electrode is substantially determined by the shape of the first conductive layer. Therefore, when the plating layer is formed on the wide first conductive layer, the second conductive layer can also be wide, and the adhesion is further improved. In addition, the magnitude | size of the wide area | region of a 1st conductive layer and a 2nd conductive layer may be the same or different, and can be suitably adjusted with the formation conditions of a 2nd conductive layer.

On the other hand, when a material containing a solvent is used as the printing paste, a drying step for removing the solvent is required. As described earlier, the drying temperature in this case, it is preferred to heat flow temperature T ₁ of the low melting point material is a low temperature. The drying time can be appropriately set, for example, from about 5 minutes to 1 hour.

  The first conductive layer may be composed of a plurality of layers. For example, a laminated structure including a lower layer having a low contact resistance with the transparent electrode layer on the surface of the photoelectric conversion portion and an upper layer containing a low melting point material may be used. According to such a structure, an improvement in the curve factor of the solar cell can be expected with a decrease in contact resistance with the transparent electrode layer. Moreover, the resistance of the first conductive layer can be further reduced by adopting a laminated structure of the low-melting-point material-containing layer and the high-melting-point material-containing layer.

  As mentioned above, although demonstrated centering on the case where a 1st conductive layer is formed by the printing method, the formation method of a 1st conductive layer is not limited to a printing method. For example, the first conductive layer may be formed by vapor deposition or sputtering using a mask corresponding to the pattern shape.

(Insulating layer)
An insulating layer 9 is formed on the first conductive layer 71. Here, when the first conductive layer 71 is formed in a predetermined pattern (for example, comb shape), the first conductive layer forming region where the first conductive layer is formed on the surface of the photoelectric conversion unit 50, and the first There is a first conductive layer non-formation region where one conductive layer is not formed.

  The insulating layer 9 is formed at least in the first conductive layer formation region. In the present invention, the insulating layer 9 is considered to contribute to an improvement in adhesion between the first conductive layer 71 and the second conductive layer 72. In general, when the collector electrode is formed by plating, there is room for improvement in terms of adhesion between the first conductive layer (underlayer) and the second conductive layer. In particular, a thin collector electrode is preferably used from the viewpoint of improving the light collection efficiency. In this case, it is desired to further improve the adhesion. In the present invention, even when the finger electrode is thinned by forming an insulating layer between the first conductive layer and the second conductive layer and widening the end of the finger electrode, The effect of preventing peeling between the second conductive layers can be expected more. Thereby, the improvement of the yield (effect by peeling prevention), the improvement of condensing efficiency (effect by thinning), etc. can be expected more.

  In particular, when an Ag layer or the like is used as the first conductive layer and a Cu layer is formed thereon by plating, the adhesion between the Ag layer and the Cu layer is small. However, silicon oxide or the like is formed on an insulating layer such as silicon oxide. By forming the Cu layer on the insulating layer, it is expected that the adhesion of the second conductive layer is enhanced and the reliability of the solar cell is improved.

  In the present invention, the insulating layer 9 is preferably formed also on the first conductive layer non-formation region, and particularly preferably formed on the entire surface of the first conductive layer non-formation region. When the insulating layer is also formed in the region where the first conductive layer is not formed, the photoelectric conversion part can be protected chemically and electrically from the plating solution when the second conductive layer is formed by plating. It becomes. For example, when a transparent electrode layer is formed on the surface of the photoelectric conversion unit 50 like a heterojunction solar cell, an insulating layer is formed on the surface of the transparent electrode layer, so that the transparent electrode layer and the plating solution Contact is suppressed and precipitation of the metal layer (second conductive layer) on the transparent electrode layer can be prevented. Also, from the viewpoint of productivity, it is more preferable that the insulating layer is formed in the entire first conductive layer formation region and the first conductive layer non-formation region. Further, in this case, since the first conductive layer is covered with the insulating layer, the first conductive layer can be prevented from peeling from the substrate even when the first conductive layer is thinned. Can be expected more.

  As the material of the insulating layer 9, a material that exhibits electrical insulation is used. The insulating layer 9 is preferably a material having chemical stability with respect to the plating solution. By using a material having high chemical stability with respect to the plating solution, the insulating layer is hardly dissolved during the plating step when forming the second conductive layer, and damage to the surface of the photoelectric conversion portion is less likely to occur. Moreover, when the insulating layer 9 is formed also on the 1st conductive layer non-formation area | region, it is preferable that an insulating layer has a large adhesion strength with the photoelectric conversion part 50. FIG. For example, in the heterojunction solar cell, the insulating layer 9 preferably has a high adhesion strength with the transparent electrode layer 6a on the surface of the photoelectric conversion unit 50. By increasing the adhesion strength between the transparent electrode layer and the insulating layer, it becomes difficult for the insulating layer to be peeled off during the plating step, and metal deposition on the transparent electrode layer can be prevented. In addition, as described above, the effect of preventing peeling between the first conductive layer and the substrate can be expected.

  For the insulating layer 9, it is preferable to use a material with little light absorption. Since the insulating layer 9 is formed on the light incident surface side of the photoelectric conversion unit 50, more light can be taken into the photoelectric conversion unit if light absorption by the insulating layer is small. For example, when the insulating layer 9 has sufficient transparency with a transmittance of 90% or more, the optical loss due to light absorption in the insulating layer is small, and without removing the insulating layer after forming the second conductive layer, the solar Can be used as a battery.

  If the finger electrode has a wide region, after forming the first conductive layer having the wide region, a conventional method of forming an insulating layer using a mask, or forming a resist, etc. In the method of removing, it is estimated that a manufacturing process becomes complicated. On the other hand, the use of a material with low light absorption as described above eliminates the need for alignment and resist removal, thus simplifying the solar cell manufacturing process and further improving productivity. It becomes. When the insulating layer 9 is used as it is as a solar cell without being removed, the insulating layer 9 is more preferably made of a material having sufficient weather resistance and stability against heat and humidity in addition to transparency. .

  The material of the insulating layer is not particularly limited as long as it has high adhesion to the first conductive layer and the second conductive layer, and may be an inorganic insulating material or an organic insulating material. As the inorganic insulating material, for example, materials such as silicon oxide, silicon nitride, titanium oxide, aluminum oxide, magnesium oxide, and zinc oxide can be used. As the organic insulating material, for example, materials such as polyester, ethylene vinyl acetate copolymer, acrylic, epoxy, and polyurethane can be used. From the viewpoint of facilitating the formation of an opening in the insulating layer due to interface stress caused by the change in the surface shape of the first conductive layer in the annealing treatment, the material of the insulating layer is an inorganic material having a small breaking elongation. It is preferable.

Among these inorganic materials, from the viewpoint of plating solution resistance and transparency, silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, sialon (SiAlON), yttrium oxide, magnesium oxide, barium titanate, samarium oxide, Barium tantalate _, tantalum oxide, magnesium fluoride, titanium oxide, strontium titanate and the like are preferably used. Among these, from the viewpoint of electrical properties and adhesion to the transparent electrode layer, etc., silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, sialon (SiAlON), yttrium oxide, magnesium oxide, barium titanate, samarium oxide, Barium tantalate _, tantalum oxide, magnesium fluoride, and the like are preferable, and silicon oxide, silicon nitride, and the like are more preferably used from the viewpoint of appropriately adjusting the refractive index. Moreover, silicon oxide etc. are especially preferable from a viewpoint of adhesiveness with a 1st conductive layer or a 2nd conductive layer. These inorganic materials are not limited to those having a stoichiometric composition, and may include oxygen deficiency or the like.

  The film thickness of the insulating layer 9 is appropriately set according to the material and forming method of the insulating layer. The thickness of the insulating layer 9 is preferably thin enough that an opening can be formed in the insulating layer due to interface stress or the like caused by a change in the surface shape of the first conductive layer in the annealing process. From this viewpoint, the thickness of the insulating layer 9 is preferably 1000 nm or less, and more preferably 500 nm or less. In addition, by appropriately setting the optical characteristics and film thickness of the insulating layer 9 in the first conductive layer non-forming portion, the light reflection characteristics are improved, the amount of light introduced into the solar cell is increased, and the conversion efficiency is further improved. It becomes possible to improve. In order to obtain such an effect, the refractive index of the insulating layer 9 is preferably lower than the refractive index of the surface of the photoelectric conversion unit 50. Further, from the viewpoint of imparting suitable antireflection properties to the insulating layer 9, the film thickness is preferably set within a range of 30 nm to 250 nm, and more preferably within a range of 50 nm to 250 nm. The film thickness of the insulating layer on the first conductive layer forming region and the film thickness of the insulating layer on the first conductive layer non-forming region may be different. For example, in the first conductive layer formation region, the thickness of the insulating layer is set from the viewpoint of facilitating the formation of the opening by annealing, and in the first conductive layer non-formation region, an optical film having appropriate antireflection characteristics The film thickness of the insulating layer may be set to be thick.

  When a transparent electrode layer (generally having a refractive index of about 1.9 to 2.1) is provided on the surface of the photoelectric conversion unit 50 as in a heterojunction solar cell, the effect of preventing light reflection at the interface is enhanced and the solar cell. In order to increase the amount of light introduced into the inside, the refractive index of the insulating layer is preferably an intermediate value between air (refractive index = 1.0) and the transparent electrode layer. Moreover, when a photovoltaic cell is sealed and modularized, it is preferable that the refractive index of an insulating layer is an intermediate value of a sealing agent and a transparent electrode layer. From this viewpoint, the refractive index of the insulating layer 9 is preferably, for example, 1.4 to 1.9, more preferably 1.5 to 1.8, and further preferably 1.55 to 1.75. The refractive index of the insulating layer can be adjusted to a desired range depending on the material, composition, etc. of the insulating layer. For example, in the case of silicon oxide, the refractive index is increased by reducing the oxygen content. In addition, unless otherwise indicated, the refractive index in this specification is a refractive index with respect to the light of wavelength 550nm, and is a value measured by spectroscopic ellipsometry. Further, it is preferable that the optical film thickness (refractive index × film thickness) of the insulating layer is set so as to improve the antireflection characteristics according to the refractive index of the insulating layer.

  The insulating layer can be formed using a known method. For example, in the case of an inorganic insulating material such as silicon oxide or silicon nitride, a dry method such as a plasma CVD method or a sputtering method is preferably used. In the case of an organic insulating material, a wet method such as a spin coating method or a screen printing method is preferably used. According to these methods, it is possible to form a dense film with few defects such as pinholes.

  Among these, from the viewpoint of forming a film having a denser structure, the insulating layer 9 is preferably formed by a plasma CVD method. By this method, not only a thick film with a thickness of about 200 nm but also a thin insulating film with a thickness of about 30 to 100 nm can be formed.

  For example, in the case of having a texture structure (uneven structure) on the surface of the photoelectric conversion portion 50 as in the crystalline silicon solar cell shown in FIG. The layer is preferably formed by a plasma CVD method. By using a highly dense insulating layer, it is possible to reduce damage to the transparent electrode layer during the plating process and to prevent metal deposition on the transparent electrode layer. Such a highly dense insulating film functions as a barrier layer for water, oxygen, and the like for the layer inside the photoelectric conversion unit 50 as in the silicon thin film 3 in the crystalline silicon solar cell of FIG. Therefore, the effect of improving the long-term reliability of the solar cell can be expected.

  Note that the shape of the insulating layer 9 between the first conductive layer 71 and the second conductive layer 72, that is, the insulating layer 9 on the first conductive layer forming region, is not necessarily a continuous layer shape, and is an island shape. It may be. Note that the term “island” in this specification means a state in which a part of the surface has a non-formation region where the insulating layer 9 is not formed.

In the present invention, annealing is performed when the insulating layer 9 is formed on the first conductive layer 71 or after the insulating layer is formed and before the second conductive layer 72 is formed. During the annealing process, the first conductive layer 71 is heated to a temperature higher than the thermal flow temperature T ₁ of the low melting point material, for the low-melting-point material is fluidized state, the surface shape of the first conductive layer is changed. Along with this change, an opening 9h is formed in the insulating layer 9 formed thereon. Therefore, in a subsequent plating step, a part of the surface of the first conductive layer 71 is exposed to the plating solution and becomes conductive, so that the metal is deposited starting from this conductive portion as shown in FIG. It becomes possible.

  The opening is mainly formed on the low melting point material 711 of the first conductive layer 71. When the low melting point material is an insulating material, it is insulative immediately below the opening, but since the plating solution penetrates into the conductive high melting point material existing around the low melting point material, the first conductive layer and It is possible to conduct the plating solution.

The annealing temperature (heating temperature) Ta during the annealing treatment is preferably higher than the thermal flow start temperature T ₁ of the low melting point material, that is, T ₁ <Ta. The annealing temperature Ta preferably satisfies T ₁ + 1 ° C. ≦ Ta ≦ T ₁ + 100 ° C., and more preferably satisfies T ₁ + 5 ° C. ≦ Ta ≦ T ₁ + 60 ° C. The annealing temperature can be appropriately set according to the composition and content of the material of the first conductive layer.

Further, as described above, the annealing temperature Ta is preferably lower than the heat resistant temperature of the photoelectric conversion unit 50. The heat-resistant temperature of the photoelectric conversion unit varies depending on the configuration of the photoelectric conversion unit. For example, the heat resistant temperature in the case of having a transparent electrode layer or an amorphous silicon thin film, such as a heterojunction solar cell or a silicon thin film solar cell, is about 250 ° C. Therefore, in the case of a heterojunction solar cell in which the photoelectric conversion portion includes an amorphous silicon thin film or a silicon thin film solar cell, the annealing temperature is 250 from the viewpoint of suppressing thermal damage at the amorphous silicon thin film and its interface. It is preferable that the temperature is set to be equal to or lower. In order to realize a higher performance solar cell, the annealing temperature is more preferably 200 ° C. or less, and further preferably 180 ° C. or less. Accordingly, the heat flow temperature T ₁ of the low melting point material of the first conductive layer 71 is preferably less than 250 ° C., more preferably less than 200 ° C., more preferably less than 180 ° C..

(1) When annealing is performed in the insulating layer forming step, the material and composition of the insulating layer, and the film forming conditions (film forming method, substrate temperature, type and amount of introduced gas, film forming pressure, power density, etc.) are appropriately selected. By adjusting, a deformation part can be formed in the insulating layer. As an example of film formation when silicon oxide is used as the insulating layer, it is preferable to use plasma CVD. The film forming conditions, a substrate temperature of 145 ° C. to 250 DEG ° C., a pressure 30Pa～300Pa, it is preferable that the film formation is performed under the conditions of the power density ^{0.01W / cm 2 ~0.160W / cm 2} .

  Even in the case where a deformed portion such as an opening is formed in the insulating layer by performing an annealing process in the insulating layer forming process, an annealing process may be further performed after the insulating layer forming process and before the plating process. Thereby, for example, when the deformation part is not sufficiently formed, the predetermined deformation part can be easily formed. Even if the deformed portion is not formed in the insulating layer forming step, the deformed portion such as the opening can be formed by performing an annealing process after the (2) insulating layer forming step and before the plating step.

  On the other hand, a crystalline silicon solar cell having a reverse conductivity type diffusion layer on one main surface of a one conductivity type crystalline silicon substrate does not have an amorphous silicon thin film or a transparent electrode layer, and therefore has a heat resistance temperature of 800 ° C. to It is about 900 ° C. Therefore, the annealing process may be performed at an annealing temperature Ta higher than 250 ° C.

  After the deformed portion is formed by the annealing process, the second conductive layer 72 is formed on the insulating layer 9 in the first conductive layer formation region by a plating method. At this time, the metal deposited as the second conductive layer is not particularly limited as long as it is a material that can be formed by a plating method. For example, copper, nickel, tin, aluminum, chromium, silver, gold, zinc, lead, palladium, etc. Alternatively, a mixture of these can be used.

  During operation of the solar cell (power generation), current flows mainly through the second conductive layer. Therefore, from the viewpoint of suppressing resistance loss in the second conductive layer, it is preferable that the line resistance of the second conductive layer is as small as possible. Specifically, the line resistance of the second conductive layer is preferably 1 Ω / cm or less, and more preferably 0.5 Ω / cm or less. On the other hand, the line resistance of the first conductive layer only needs to be small enough to function as a base layer during electroplating, for example, 5 Ω / cm or less.

  The second conductive layer can be formed by either an electroless plating method or an electrolytic plating method, but the electrolytic plating method is preferable from the viewpoint of productivity. In the electroplating method, since the metal deposition rate can be increased, the second conductive layer can be formed in a short time.

  Taking the acidic copper plating as an example, a method of forming the second conductive layer by the electrolytic plating method will be described. FIG. 8 is a conceptual diagram of the plating apparatus 10 used for forming the second conductive layer. A substrate 12 on which a first conductive layer and an insulating layer are formed and subjected to an annealing process on the photoelectric conversion portion, and an anode 13 are immersed in a plating solution 16 in the plating tank 11. The first conductive layer 71 on the substrate 12 is connected to the power source 15 via the substrate holder 14. By applying a voltage between the anode 13 and the substrate 12, copper is selectively formed on the first conductive layer not covered with the insulating layer 9, that is, with an opening formed in the insulating layer by annealing treatment as a starting point. Can be deposited.

The plating solution 16 used for acidic copper plating contains copper ions. For example, a known composition mainly composed of copper sulfate, sulfuric acid, and water can be used, and a metal that is the second conductive layer is deposited by passing a current of 0.1 to 10 A / dm ² through this. be able to. An appropriate plating time is appropriately set according to the area of the collecting electrode, current density, cathode current efficiency, set film thickness, and the like.

  The second conductive layer may be composed of a plurality of layers. For example, after a first plating layer made of a material having high conductivity such as Cu is formed on the first conductive layer via an insulating layer, a second plating layer having excellent chemical stability is formed on the first plating layer. By forming on the surface of the layer, a collector electrode having low resistance and excellent chemical stability can be formed.

  It is preferable to provide a plating solution removing step after the plating step to remove the plating solution remaining on the surface of the substrate 12. By providing the plating solution removing step, it is possible to remove the metal that can be deposited starting from the opening 9h other than the opening 9h of the insulating layer 9 formed by annealing. Examples of the metal that is deposited starting from other than the opening 9h include those starting from a pinhole of the insulating layer 9 or the like. By removing such a metal by the plating solution removing step, the light-shielding loss is reduced, and the solar cell characteristics can be further improved.

  The plating solution is removed by, for example, a method in which the plating solution remaining on the surface of the substrate 12 taken out from the plating tank is removed by air blow type air washing, followed by washing with water and further blowing off the washing solution by air blowing. Can do. By reducing the amount of the plating solution remaining on the surface of the substrate 12 by performing air cleaning before rinsing, the amount of the plating solution brought in at the time of rinsing can be reduced. As a result, the amount of cleaning liquid required for water washing can be reduced, and the labor of waste liquid treatment that accompanies water washing can be reduced, reducing the environmental burden and cost of washing and improving the productivity of solar cells. Can be made.

  In general, since the transparent electrode layer such as ITO and the insulating layer such as silicon oxide are hydrophilic, the surface of the substrate 12, that is, the surface of the photoelectric conversion unit 50 or the surface of the insulating layer 9 is in contact with water. The angle is often about 10 ° or less. In the present invention, the contact angle of the surface of the substrate 12 is preferably set to 20 ° or more, and in order to make the above range, it is preferable that the surface of the substrate 12 is subjected to water repellent treatment. In the water repellent treatment, for example, by forming a water repellent layer on the surface, the wettability of the substrate surface with respect to the plating solution can be reduced, and the contact angle with water can be increased. In addition, the water-repellent treatment in the present specification means a treatment for reducing the wettability of the surface with respect to water (increasing the contact angle). By performing the water repellent treatment, the plating solution can be easily removed.

  In the present invention, the insulating layer removing step may be performed after the collector electrode is formed (after the plating step). In particular, when a material having a large light absorption is used as the insulating layer, it is preferable to perform an insulating layer removing step in order to suppress a decrease in solar cell characteristics due to the light absorption of the insulating layer. The method for removing the insulating layer is appropriately selected according to the characteristics of the insulating layer material. For example, the insulating layer can be removed by chemical etching or mechanical polishing. An ashing method can also be applied depending on the material. At this time, from the viewpoint of further improving the light capturing effect, it is more preferable that all of the insulating layer on the first conductive layer non-forming region is removed. When the water repellent layer 91 is formed on the insulating layer 9, it is preferable that the water repellent layer 91 is also removed together with the insulating layer 9. Note that in the case where a material with low light absorption is used for the insulating layer, the insulating layer removing step does not need to be performed.

  As described above, the case where the collector electrode 7 is provided on the light incident side of the heterojunction solar cell has been mainly described, but a similar collector electrode may be formed on the back surface side. Since a solar cell using a crystalline silicon substrate, such as a heterojunction solar cell, has a large amount of current, in general, power generation loss due to loss of contact resistance between the transparent electrode layer / collector electrode tends to be significant. On the other hand, since the collector electrode having the first conductive layer and the second conductive layer as in the present invention has a low contact resistance with the transparent electrode layer, it is possible to reduce power generation loss due to the contact resistance. Become.

  The present invention also relates to a crystalline silicon solar cell other than a heterojunction solar cell, a solar cell using a semiconductor substrate other than silicon such as GaAs, a pin junction or a pn junction of an amorphous silicon thin film or a crystalline silicon thin film. Various types of organic thin film solar cells such as silicon-based thin film solar cells having a transparent electrode layer formed thereon, compound semiconductor solar cells such as CIS and CIGS, dye-sensitized solar cells and organic thin films (conductive polymers) Applicable to solar cells.

A crystalline silicon solar cell has a structure in which a diffusion layer of reverse conductivity type (for example, n-type) is provided on one main surface of a single conductivity type (for example, p-type) crystalline silicon substrate, and the collector electrode is provided on the diffusion layer. Can be mentioned. Such a crystalline silicon solar cell is generally provided with a conductive layer such as a p ⁺ layer on the back side of one conductive layer. Thus, if the photoelectric conversion unit does not include an amorphous silicon layer and the transparent electrode layer, heat flow temperature T ₁ and the annealing temperature Ta of the low melting point material may be higher than 250 ° C..

Examples of the silicon thin film solar cell include an amorphous silicon thin film solar cell having an amorphous intrinsic (i type) silicon thin film between a p type thin film and an n type thin film, and a p type thin film and an n type thin film. Examples thereof include a crystalline silicon-based semiconductor solar cell having a crystalline intrinsic silicon thin film between the thin film. A tandem thin film solar cell in which a plurality of pin junctions are stacked is also suitable. In such a silicon-based thin-film solar cell, it in consideration of the heat resistance of the transparent electrode layer or an amorphous silicon-based thin film, the thermal flow temperature T ₁ and the annealing temperature Ta of the low melting point material is 250 ° C. or less Preferably, it is 200 degrees C or less, More preferably, it is 180 degrees C or less.

  The solar cell of the present invention is preferably modularized for practical use. The modularization of the solar cell is performed by an appropriate method. For example, a bus bar is connected to a collector electrode via an interconnector such as a tab, so that a plurality of solar cells are connected in series or in parallel, and sealed with a sealant and a glass plate to be modularized. Done.

  Hereinafter, the present invention will be specifically described with reference to the examples of the heterojunction solar cell shown in FIG. 2, but the present invention is not limited to the following examples.

Example 1
The heterojunction solar cell of Example 1 was manufactured as follows.

  As a single conductivity type single crystal silicon substrate, an n-type single crystal silicon wafer having an incident plane of (100) and a thickness of 200 μm was used, and this silicon wafer was immersed in a 2 wt% HF aqueous solution for 3 minutes. After the silicon oxide film was removed, rinsing with ultrapure water was performed twice. This silicon substrate was immersed in a 5/15 wt% KOH / isopropyl alcohol aqueous solution maintained at 70 ° C. for 15 minutes, and the texture was formed by etching the surface of the wafer. Thereafter, rinsing with ultrapure water was performed twice. When the surface of the wafer was observed with an atomic force microscope (manufactured by AFM Pacific Nanotechnology), the surface of the wafer was most etched and a pyramidal texture with an exposed (111) surface was formed. It was.

The etched wafer was introduced into a CVD apparatus, and an i-type amorphous silicon film having a thickness of 5 nm was formed on the light incident side as an intrinsic silicon-based thin film 2a. The film formation conditions for the i-type amorphous silicon were: substrate temperature: 150 ° C., pressure: 120 Pa, SiH ₄ / H ₂ flow rate ratio: 3/10, and input power density: 0.011 W / cm ² . In addition, the film thickness of the thin film in a present Example measures the film thickness of the thin film formed on the glass substrate on the same conditions by the spectroscopic ellipsometry (brand name M2000, JA Woollam Co., Ltd. product). It is a value calculated from the film forming speed obtained by this.

On the i-type amorphous silicon layer 2a, a p-type amorphous silicon film having a thickness of 7 nm was formed as the reverse conductivity type silicon-based thin film 3a. The film forming conditions for the p-type amorphous silicon layer 3a were as follows: the substrate temperature was 150 ° C., the pressure was 60 Pa, the SiH ₄ / B ₂ H ₆ flow rate ratio was 1/3, and the input power density was 0.01 W / cm ² . . The B ₂ H ₆ gas flow rate mentioned above is the flow rate of the diluted gas diluted with H ₂ to a B ₂ H ₆ concentration of 5000 ppm.

Next, an i-type amorphous silicon layer having a thickness of 6 nm was formed as an intrinsic silicon-based thin film 2b on the back side of the wafer. The film formation conditions for the i-type amorphous silicon layer 2b were the same as those for the i-type amorphous silicon layer 2a. On the i-type amorphous silicon layer 2b, an n-type amorphous silicon layer having a thickness of 4 nm was formed as a one-conductivity-type silicon-based thin film 3b. The film forming conditions for the n-type amorphous silicon layer 3b were: substrate temperature: 150 ° C., pressure: 60 Pa, SiH ₄ / PH ₃ flow rate ratio: 1/2, input power density: 0.01 W / cm ² . The PH ₃ gas flow rate mentioned above is the flow rate of the diluted gas diluted with H ₂ to a PH ₃ concentration of 5000 ppm.

On this, as transparent electrode layers 6a and 6b, indium tin oxide (ITO, refractive index: 1.9) was formed to a thickness of 100 nm. Using indium oxide as a target, a transparent electrode layer was formed by applying a power density of 0.5 W / cm ² in an argon atmosphere at a substrate temperature of room temperature and a pressure of 0.2 Pa. On the back surface side transparent electrode layer 6b, silver was formed as a back surface metal electrode 8 with a film thickness of 500 nm by sputtering. On the light incident side transparent electrode layer 6a, the collector electrode 7 having the first conductive layer 71 and the second conductive layer 72 was formed as follows.

For the formation of the first conductive layer 71, SnBi metal powder (particle diameter D _L = 25 to 35 μm, melting point T ₁ = 141 ° C.) as a low melting point material and silver powder (particle diameter D _H = 2 to 3 μm, melting point T ₂ = 971 ° C.) at a weight ratio of 20:80, and a printing paste containing an epoxy resin as a binder resin was used. This printing paste was screen-printed using a # 230 mesh (opening width: l = 85 μm) screen plate having an opening width (L = 80 μm) corresponding to the collector electrode pattern and connected to the finger electrode ends. Drying was performed at 90 ° C.

  When the first conductive layer 71 was formed, as shown in FIG. 3, a structure was formed in which the ends of the finger electrodes were connected by electrodes extending in a direction substantially perpendicular to the finger electrodes and having the same width and thickness as the finger electrodes. .

  The wafer on which the first conductive layer 71 is formed is put into a CVD apparatus, and a silicon oxide layer (refractive index: 1.5) is formed as an insulating layer 9 with a thickness of 80 nm on the light incident surface side by the plasma CVD method. It was.

The film forming conditions of the insulating layer 9 were: substrate temperature: 135 ° C., pressure 133 Pa, SiH ₄ / CO ₂ flow rate ratio: 1/20, input power density: 0.05 W / cm ² (frequency 13.56 MHz). The refractive index (n) and extinction coefficient (k) of the insulating layer formed on the light incident surface side under these conditions are as shown in FIG. Thereafter, the wafer after forming the insulating layer was introduced into a hot-air circulating oven, and an annealing process was performed at 180 ° C. for 20 minutes in an air atmosphere.

The substrate 12 that has been annealed as described above was put into the plating tank 11 as shown in FIG. In the plating solution 16, copper sulfate pentahydrate, sulfuric acid, and sodium chloride were added to a solution prepared so as to have a concentration of 120 g / l, 150 g / l, and 70 mg / l, respectively. (Product: ESY-2B, ESY-H, ESY-1A) added were used. Using this plating solution, plating is performed under conditions of a temperature of 40 ° C. and a current of 3 A / dm ² , and copper is uniformly formed as the second conductive layer 72 with a thickness of about 10 μm on the insulating layer on the first conductive layer 71. Precipitated in Almost no copper was deposited in the region where the first conductive layer was not formed.

  Thereafter, the silicon wafer on the outer periphery of the cell was removed with a width of 0.5 mm by a laser processing machine, and the heterojunction solar cell of the present invention was produced.

(Reference Example 1)
A heterojunction solar cell was fabricated in the same manner as in Example 1 except that the finger electrode of the first conductive layer was formed without connecting the end portions.

(Comparative Example 1)
Location where no silicon oxide layer is formed after forming a silicon oxide layer as an insulating layer in a portion other than the first conductive layer forming region using a mask corresponding to the first conductive layer forming region (where no insulating layer is formed) A heterojunction solar cell was fabricated in the same manner as in Example 1 except that the first conductive layer was formed on the first conductive layer and the second conductive layer was formed directly on the first conductive layer by plating. That is, the collector electrode connected similarly to Example 1 was formed.
(Comparative Example 2)
Location where no silicon oxide layer is formed after forming a silicon oxide layer as an insulating layer in a portion other than the first conductive layer forming region using a mask corresponding to the first conductive layer forming region (where no insulating layer is formed) A heterojunction solar cell was fabricated in the same manner as in Reference Example 1 except that the first conductive layer was formed on the first conductive layer and the second conductive layer was formed directly on the first conductive layer by plating. That is, the collector electrode which was not connected similarly to the reference example 1 was formed.

  In order to compare the adhesion strength of the end portions of the finger electrodes of Example 1, Reference Example 1, and Comparative Examples 1 and 2, after performing a peeling experiment with a tape (mending tape: manufactured by 3M), optical was performed. Observation with a microscope (OLS3000: Olympus) was performed. A 20 × objective lens was used for observation. Under the present circumstances, the tape was affixed to the position of 2-3 cm toward the center from the edge part of a finger electrode so that the edge part of a finger electrode might be covered. After the tape attached from the end of the tape (that is, the end portion side) was peeled off by hand, the presence or absence of a portion where the second conductive layer at the finger end portion was peeled off from the first conductive layer was observed. At this time, the adhesion evaluation was evaluated with 1 to 5 points, with 5 points being the highest and 1 point being the lowest. The observation results are shown in Table 1.

  In Comparative Example 2, peeling of the second conductive layer occurred, and the portion where the surface of the first conductive layer was exposed was confirmed by microscopic observation. Peeling occurred at 10 points out of the 96 end portions of the finger electrode, and peeling was about 10 to 100 μm. The relative adhesion evaluation of Comparative Example 2 was evaluated as 2 out of 5 points. In contrast to Comparative Example 2, in Comparative Example 1, peeling occurred at five joints at the end of the finger electrode, and each was moderate peeling of about 50 μm. The relative adhesion evaluation of Comparative Example 1 was evaluated as 3 out of 5 points. Comparing Comparative Example 1 and Comparative Example 2, it is considered that in Comparative Example 1, the adhesion was improved by connecting the ends of the finger electrodes.

  Further, when Comparative Example 2 and Reference Example 1 were compared, and Comparative Example 1 and Example 1 were compared, Reference Example 1 and Example 1 each had fewer peeling portions of the second conductive layer. In Reference Example 1, peeling occurred in three of the 96 end portions of the finger electrode, all of which were mild peeling of about 10 μm. The relative adhesion evaluation of Reference Example 1 was evaluated as 4 out of 5 points. In the case of mild peeling as in Reference Example 1, it is considered that the peeling is in a range that does not affect the photoelectric conversion region, and thus there is little influence on the solar cell characteristics. In Example 1, the peeling part was not seen by the edge part of the finger electrode. The relative adhesion evaluation of Example 1 was evaluated as 5 out of 5 points.

  Comparing Comparative Example 2 and Reference Example 1, and Comparative Example 1 and Example 1, respectively, Reference Example 1 and Example 1 each have an insulating layer between the first conductive layer and the second conductive layer. As a result, it is considered that the adhesion is improved as compared with Comparative Example 1 and Comparative Example 2 that do not have an insulating layer between the first conductive layer and the second conductive layer.

  Moreover, when the reference example 1 and the example 1 were compared, the peeling of the second conductive layer was less in the example 1. This is considered to be because the adhesion between the first conductive layer and the second conductive layer could be further improved by connecting the ends of the finger electrodes.

  From the above results, it is considered that peeling of the second conductive layer can be prevented by having a connecting portion at the end of the finger electrode and having an insulating layer between the first conductive layer and the second conductive layer. It is done.

  As described above with reference to the examples, according to the present invention, the collector electrode of the solar cell can be produced without performing the patterning of the insulating layer, so that a high-power solar cell is provided at a low cost. It becomes possible to do. Further, in the present invention, the first conductive layer is formed by using a collector electrode having an insulating layer between the first conductive layer and the second conductive layer forming the collector electrode, and the end portion of the finger electrode has a wide region. And peeling of the second conductive layer is prevented, and a solar cell can be provided with high yield.

1. 1. One conductivity type single crystal silicon substrate 2. Intrinsic silicon-based thin film 5. Conductive silicon thin film 6. Transparent electrode layer Collector electrode 71. First conductive layer 711. Low melting point material 72. Second conductive layer 7a. Finger electrode 7b. Bus bar electrode 8. Back metal electrode 9. Insulating layer 9h. Opening 50. Photoelectric conversion unit 100. Solar cell 101. Heterojunction solar cell 10. Plating apparatus 11. Plating tank 12. Substrate 13. Anode 14. Substrate holder 15. Power supply 16. Plating solution

Claims (14)

A solar cell having a photoelectric conversion part and a collector electrode on one main surface of the photoelectric conversion part,
The collector electrode includes a first conductive layer and a second conductive layer in order from the photoelectric conversion unit side, and includes an insulating layer between the first conductive layer and the second conductive layer,
The first conductive layer includes a low-melting-point material, and a heat flow start temperature T1 of the low-melting-point material is lower than a heat-resistant temperature of the photoelectric conversion unit,
The collector electrode includes a bus bar electrode extending in a first direction and a plurality of finger electrodes extending in a second direction substantially perpendicular to the first direction, and a wide region is formed at an end of the finger electrode. ,
A solar cell in which a part of the second conductive layer is electrically connected to the first conductive layer.   The solar cell according to claim 1, wherein at least some of the wide regions of the plurality of finger electrodes are connected.   The solar cell according to claim 1, wherein the second conductive layer is a plating layer.   The solar cell according to claim 1, wherein the second conductive layer has copper. The photoelectric conversion unit has a silicon-based thin film and a transparent electrode layer in this order on one main surface of one conductivity type crystalline silicon substrate,
Having the collector on the transparent electrode layer;
The solar cell according to any one of claims 1 to 4, wherein a heat flow starting temperature T1 of the low melting point material is 250 ° C or lower.   The solar cell according to claim 1, wherein the second conductive layer is electrically connected to the first conductive layer through an opening of the insulating layer.   The crystalline silicon solar cell according to any one of claims 1 to 6, wherein the insulating layer is also formed on a first conductive layer non-formation region of the photoelectric conversion unit.   A solar cell module provided with the solar cell of any one of Claims 1-7. It is a method of manufacturing the solar cell of any one of Claims 1-7,
A first conductive layer forming step in which a first conductive layer containing a low melting point material is formed on the photoelectric conversion portion;
An insulating layer forming step in which an insulating layer is formed on the first conductive layer; and a plating step in which a second conductive layer is formed by a plating method.
In the insulating layer forming step or before the post plating step of the insulating layer forming step,
A method for manufacturing a solar cell, wherein annealing is performed at an annealing temperature Ta higher than a thermal flow start temperature T1 of the low melting point material.   The method for manufacturing a solar cell according to claim 9, wherein the annealing temperature Ta is lower than a heat resistant temperature of the photoelectric conversion unit.   The method for manufacturing a solar cell according to claim 9 or 10, wherein the annealing temperature Ta is 250 ° C or lower.   The method for manufacturing a solar cell according to any one of claims 9 to 11, wherein an opening is formed in the insulating layer by an annealing treatment at the annealing temperature Ta.   The method for manufacturing a solar cell according to any one of claims 9 to 12, wherein an insulating layer is also formed on the first conductive layer non-formation region of the photoelectric conversion unit in the insulating layer forming step.   The photoelectric conversion unit has a silicon-based thin film and a transparent electrode layer in this order on one main surface of a one-conductivity-type crystalline silicon substrate, and the collector electrode is formed on the transparent electrode layer. 14. The method for producing a solar cell according to any one of items 13 to 13.