JP2014232820A - Solar cell and method for manufacturing the same, and solar cell module - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a solar cell capable of improving conversion efficiency and reducing manufacturing costs, and a method for manufacturing the same.SOLUTION: A method is a method for manufacturing a solar cell having a photoelectric conversion part 50 having a first main surface side layer containing a reverse conductive type semiconductor region and a transparent electrode layer in this order on the first main surface and an electrode layer on a second main surface of one conductive type semiconductor region; and a collector electrode having a first conductive layer 71 and a second conductive layer 72 in this order on the first main surface of the photoelectric conversion part. The method comprises a first conductive layer formation step for forming the first conductive layer on the first main surface of the photoelectric conversion part; and a plating step for forming the second conductive layer on the first conductive layer by the plating method. The method also comprises an insulation layer formation step for forming an insulation layer 9 on a first conductive layer non-formation region on the first main surface of the photoelectric conversion part before the plating process. The method comprises also an insulation processing step for forming an insulation region where an electric short circuit between the transparent electrode layer at the first main surface side and the electrode layer on the second main surface of the photoelectric conversion part is removed.

Description

  The present invention relates to a solar cell and a manufacturing method thereof. Furthermore, the present invention relates to a solar cell module.

  As energy problems and global environmental problems become more serious, solar cells are attracting attention as alternative energy alternatives to fossil fuels. In a solar cell, electric power is generated by taking out carriers (electrons and holes) generated by light irradiation to a photoelectric conversion unit made of a semiconductor junction or the like to an external circuit. In order to efficiently extract carriers generated in the photoelectric conversion unit to an external circuit, a collector electrode is provided on the photoelectric conversion unit of the solar cell.

  For example, in a crystalline silicon solar cell using a single crystal silicon substrate or a polycrystalline silicon substrate, a collector electrode made of a thin metal is provided on the light receiving surface. Further, even in a heterojunction solar cell having an amorphous silicon layer and a transparent electrode layer on a crystalline silicon substrate, a collector electrode is provided on the transparent electrode layer.

  The collector electrode of a solar cell is generally formed by pattern printing of a silver paste by a screen printing method. Although this method is simple in itself, there are problems that the material cost of silver is large and the silver paste material containing a resin is used, so that the resistivity of the collector electrode is increased. In order to reduce the resistivity of the collector electrode formed using the silver paste, it is necessary to print the silver paste thickly. However, when the printed thickness is increased, the line width of the electrode also increases, so that it is difficult to make the electrode thin, and the light shielding loss due to the collecting electrode increases.

  As a technique for solving these problems, a method of forming a collecting electrode by a plating method that is excellent in terms of material cost and process cost is known. For example, Patent Documents 1 and 2 disclose solar cells in which a metal layer made of copper or the like is formed on a transparent electrode constituting a photoelectric conversion unit by a plating method. In this method, first, a resist material layer (insulating layer) having an opening corresponding to the shape of the collector electrode is formed on the transparent electrode layer of the photoelectric conversion portion, and electrolytic plating is applied to the resist opening of the transparent electrode layer. As a result, a metal layer is formed. Thereafter, the resist is removed to form a collector electrode having a predetermined shape.

  In Patent Document 3, after providing an insulating layer such as SiO2 on the transparent electrode, a groove penetrating the insulating layer is provided to expose the surface or side surface of the transparent electrode layer so as to be electrically connected to the exposed portion of the transparent electrode. Discloses a method of forming a metal collector electrode. Specifically, a method has been proposed in which a metal seed is formed on the exposed portion of the transparent electrode layer by a photoplating method or the like, and a metal electrode is formed by electroplating using the metal seed as a starting point. Such a method is more advantageous in terms of material cost and process cost because it is not necessary to use a resist as in Patent Documents 1 and 2. Moreover, by providing a low-resistance metal seed, the contact resistance between the transparent electrode layer and the collector electrode can be reduced.

  In Patent Document 4, by increasing the unevenness of the conductive seed, the entire surface of the photoelectric conversion part other than the conductive seed is covered and a discontinuous opening is formed on the conductive seed when forming the insulating layer. In addition, it is described that a plating layer is formed through the opening.

  By the way, in the formation of the photoelectric conversion part of the solar cell, generally, a thin film such as a semiconductor layer, a transparent electrode layer, a metal electrode layer or the like is formed on the substrate surface by a plasma CVD method, a sputtering method or the like. These thin films wrap around not only the substrate surface but also the side surfaces and the back surface, which may cause a short circuit or a leak between the front surface and the back surface. In order to prevent such wraparound, for example, Patent Document 5 proposes a method of forming a semiconductor layer or a transparent electrode layer while covering the peripheral edge of a crystalline silicon substrate with a film-forming mask. Further, in Patent Document 6, in order to suppress a leakage current generated when the transparent electrode layer comes into contact with the crystalline silicon substrate, the film formation region of the transparent electrode layer may be made smaller than the one-conductivity-type semiconductor formation region. Proposed. However, in a manufacturing process that uses a large number of masks for film formation, there is a problem that the effective area of the solar cell cannot be increased, so that the conversion efficiency of the solar cell is reduced and mass productivity is poor.

  In order to solve the above problems, Patent Documents 7 and 8 disclose a method of preventing a short circuit by performing predetermined processing after forming a semiconductor thin film or an electrode on a substrate. Patent Document 7 discloses a method of forming a solar cell in which a side surface of a photoelectric conversion portion has a fractured surface by breaking a crystalline silicon substrate along the groove after forming the groove by laser irradiation. In the process using a laser as in Patent Documents 7 and 8, the effective area can be increased, so that the conversion efficiency can be improved and the productivity is also improved.

  Patent Document 8 proposes a method of forming a groove by removing a semiconductor layer and a transparent electrode layer formed on a crystalline silicon substrate by laser irradiation. Since there are no semiconductor thin films or electrodes on the fracture surface of Patent Document 7 or the surface of the groove of Patent Document 8, the problem of short circuit due to wraparound is solved.

  In Patent Document 8, a mode in which the transparent electrode layer and the conductive semiconductor layer are removed by laser irradiation is illustrated, but it is difficult to selectively remove only these layers by laser irradiation. Therefore, in general, the groove formed by laser irradiation reaches the surface or the inside of the crystalline silicon substrate.

JP 60-66426 A JP 2000-58885 A JP 2011-199045 A Special table 2013-507781 gazette JP 2002-76397 A JP 2001-44461 A JP 2006-310774 A JP-A-9-129904

  According to the method disclosed in Patent Document 3, it is possible to form a collector electrode having a fine line pattern by plating without using an expensive resist material. However, as disclosed in Patent Document 3, a method of forming a metal seed serving as a starting point for electrolytic plating by a photoplating method can be applied to the n-layer side of the semiconductor junction, but cannot be applied to the p-layer side. . Generally, in a heterojunction solar cell, it is known that the characteristics of the configuration using the n-type single crystal silicon substrate and the p-layer side heterojunction as the light incident side are the highest. There is a problem that it is not suitable for forming a collector electrode on the light incident side in a heterojunction solar cell in which the p-layer side is the light incident side. Further, in Patent Document 3, the side surface of the transparent electrode layer and the metal collecting electrode are in contact with each other in a groove that penetrates the insulating layer and the transparent electrode layer, but the thickness of the transparent electrode layer is generally about 100 nm. The contact area between the two is small. Therefore, there is a problem that the resistance between the transparent electrode and the collector electrode is increased, and the function as the collector electrode cannot be sufficiently exhibited. In Patent Document 5, no study is made on a short circuit that may occur due to the wraparound of the conductive thin films on the front and back surfaces.

  Moreover, if the method described in patent document 7 and 8 is used, the groove | channel which removed the conductive silicon-type thin film and the transparent electrode layer by laser processing will be formed, and the electrical short circuit between the surface and a back surface may be removed. Therefore, it is considered that an electrical short circuit that may be caused by the wraparound of the conductive thin film on the front surface and the back surface can be removed.

  However, even when the insulating region is formed, if a deposit is generated in the insulating region by laser irradiation, a leakage current may be generated, and thus the deposit needs to be removed separately. According to the study by the present inventors, it was clarified that, particularly when a collector electrode is formed by plating, a collector electrode material is deposited from an undesired region by the deposit, and further characteristic deterioration can occur. . However, Patent Documents 7 and 8 have not been studied at all for the above problems.

  An object of the present invention is to solve the problems of the prior art relating to the formation of a collector electrode of a solar cell as described above, to improve the conversion efficiency of the solar cell, and to reduce the manufacturing cost of the solar cell.

  As a result of intensive studies in view of the above problems, the present inventors have found that by using a predetermined collector electrode, the conversion efficiency of the solar cell can be improved, and that the collector electrode can be formed at a low cost, The present invention has been reached.

  That is, the present invention relates to the following.

  A first main surface side layer including a reverse conductivity type semiconductor region and a transparent electrode layer in this order on the first main surface of the one conductivity type semiconductor region; and an electrode layer on the second main surface of the one conductivity type semiconductor region. A solar cell manufacturing method comprising: a photoelectric conversion unit having a first electrode; and a collector electrode having a first conductive layer and a second conductive layer in order from the photoelectric conversion unit side on the first main surface of the photoelectric conversion unit, The first conductive layer forming step in which the first conductive layer is formed on the first main surface of the photoelectric conversion portion and the plating step in which the second conductive layer is formed on the first conductive layer by the plating method in this order. And having an insulating layer forming step of forming an insulating layer on the first conductive layer non-formation region on the first main surface of the photoelectric conversion portion before the plating step, An insulating region in which an electrical short circuit between the transparent electrode layer on the main surface side and the electrode layer on the second main surface is removed is formed. An edge treatment step, wherein the insulation treatment step removes at least one of the first main surface side layer or the electrode layer and removes at least a part of the one-conductivity-type semiconductor region. A laser irradiation step in which laser irradiation is performed, and in the insulating treatment step, the insulating region is formed by removing the one-conductivity-type semiconductor region and the first main surface side layer, and the insulating A method for manufacturing a solar cell, wherein after the treatment step, at least a part of the deposit formed in the insulating region by the laser irradiation is removed in the plating step.

  The electrode layer preferably has at least one of a second transparent electrode layer or a metal electrode layer.

  It is preferable that the electrode layer has the second transparent electrode layer and the metal electrode layer in this order from the one conductivity type semiconductor region side.

  In the laser irradiation step, it is preferable that the laser irradiation is performed so as to penetrate the first main surface side layer and remove at least a part of the one-conductivity-type semiconductor region.

  The deposit preferably includes a transparent electrode layer deposit formed by irradiating the transparent electrode layer in the first main surface side layer with laser.

  The one conductivity type semiconductor region is preferably a one conductivity type single crystal silicon substrate.

  The reverse conductivity type semiconductor layer is preferably a reverse conductivity type silicon-based thin film.

  After the first conductive layer forming step, before the plating step, the insulating layer forming step is included, and in the insulating layer forming step, the insulating layer is formed so as to cover the first conductive layer, After forming the layer and before the plating step, the method includes a step of forming an opening in the insulating layer on the first conductive layer. In the plating step, the first conductive layer and the first conductive layer are formed through the opening of the insulating layer. The two conductive layers are preferably conducted.

  The first conductive layer includes a low melting point material having a heat flow start temperature T1 lower than a heat resistant temperature of the photoelectric conversion unit, and after the insulating layer forming step, the heat flow start temperature T1 of the low melting point material. It is preferable that an opening is formed in the insulating layer by heating at a high substrate temperature Ta.

  In the insulating layer forming step, it is preferable that an opening is formed in the insulating layer by forming the insulating layer while heating at a substrate temperature Tb higher than the heat flow starting temperature T1 of the low melting point material. .

  It is preferable that the photoelectric conversion unit has a silicon-based thin film and a transparent electrode layer in this order on one main surface of the one-conductivity type crystalline silicon substrate, and the collector electrode is formed on the transparent electrode layer.

  Moreover, the solar cell of the present invention is a photovoltaic cell having a one-conductivity-type semiconductor region, and a solar cell having a collector electrode on the first main surface of the photoelectric-conversion unit, wherein the one-conductivity-type semiconductor region is A first main surface side layer including a reverse conductivity type semiconductor region and a transparent electrode layer in this order on the first main surface; and an electrode layer on the second main surface; The first conductive layer includes a first conductive layer and a second conductive layer in order from the conversion unit side, and includes an insulating layer in which an opening is formed between the first conductive layer and the second conductive layer. The layer is covered with the insulating layer, a part of the second conductive layer is electrically connected to the first conductive layer through the opening of the insulating layer, and the photoelectric conversion unit includes a first main surface, The second main surface or the side surface has an insulating region from which an electrical short circuit between the transparent electrode layer and the electrode layer is removed, and the insulating Pass, it said has one conductivity type semiconductor region and the first main surface side layer is formed so as to expose, it is preferable to have a laser mark on at least a portion of the insulating region.

  The insulating region preferably has a laser mark that reaches the second main surface of the photoelectric conversion region from the first main surface of the photoelectric conversion region.

  It is preferable that the insulating layer is also formed on the first conductive layer non-formation region on the surface of the photoelectric conversion portion on the first main surface side.

  It is preferable that the insulating layer is not attached to the insulating region.

  According to the present invention, since the collector electrode can be formed by a plating method, the resistance of the collector electrode is reduced, and the conversion efficiency of the solar cell can be improved. In addition, by forming an insulating region, it is possible to remove an electrical short circuit between the transparent electrode layer formed on the first main surface of the photoelectric conversion unit and the electrode layer formed on the second main surface. it can. Further, by performing a plating step after forming the insulating region, it is possible to easily remove deposits formed in the insulating region, and the deterioration of conversion characteristics due to the occurrence of leakage current is suppressed. Further, deposits can be removed by the same step as the step of forming the second conductive layer. Therefore, it is possible to provide a solar cell with excellent productivity and high efficiency at low cost.

It is typical sectional drawing which shows the solar cell of this invention. It is typical sectional drawing which shows the heterojunction solar cell concerning one Embodiment. It is typical sectional drawing which shows the heterojunction solar cell concerning one Embodiment. It is a conceptual diagram of the manufacturing process of the solar cell by one Embodiment of this invention. It is a process conceptual diagram which shows one Embodiment of this invention. It is a process conceptual diagram which shows one Embodiment of this invention. It is a conceptual diagram which shows an example of the shape change at the time of the heating of a low melting-point material. It is a conceptual diagram for demonstrating the shape change at the time of the heating of low melting-point material powder, and necking. It is a SEM photograph of metal fine particles in which sintering necking has occurred. It is a structure schematic diagram of a plating apparatus. It is typical sectional drawing which shows the solar cell module concerning one Embodiment. It is a figure which shows the optical characteristic of the insulating layer in an Example. It is typical sectional drawing which shows the heterojunction solar cell concerning one Embodiment.

  Although preferable embodiment of the solar cell of this invention is described below, it is not limited to the following embodiment.

  As schematically shown in FIG. 1, a solar cell 100 according to an embodiment of the present invention includes a collector electrode 7 on one main surface of a photoelectric conversion unit 50. The collector electrode 7 includes a first conductive layer 71 and a second conductive layer 72 in order from the photoelectric conversion unit 50 side. An insulating layer is formed on one main surface of the photoelectric conversion unit. The photoelectric conversion unit has a first principal surface side layer including a reverse conductivity type semiconductor region and a transparent electrode layer in this order on the first principal surface of the one conductivity type semiconductor region. An electrode layer is provided on the second main surface (the second main surface is not shown in FIG. 1).

  Hereinafter, the present invention will be described in more detail by taking, as an example, a heterojunction crystalline silicon solar cell (hereinafter sometimes referred to as a “heterojunction solar cell”) that is an embodiment of the present invention. A heterojunction solar cell is a crystalline silicon solar cell in which a diffusion potential is formed by having a silicon thin film having a band gap different from that of single crystal silicon on the surface of a single crystal silicon substrate of one conductivity type. The silicon-based thin film is preferably amorphous. Among them, a thin intrinsic amorphous silicon layer interposed between a conductive amorphous silicon thin film for forming a diffusion potential and a crystalline silicon substrate is a crystalline silicon solar cell having the highest conversion efficiency. It is known as one of the forms.

  FIG. 2 is a schematic cross-sectional view of the entire one-conductivity-type single crystal silicon substrate 1 in the crystalline silicon solar cell according to one embodiment of the present invention. In the crystalline silicon-based solar cell schematically shown in FIG. 2, a one-conductivity-type single-crystal silicon substrate 1 and a one-conductivity-type silicon-based thin film 3b are formed as one-conductivity-type semiconductor regions. As a result, a reverse conductivity type silicon-based thin film 3a is formed. Further, as the electrode layer 18, a back side transparent electrode layer 6 b and a back metal electrode 8 are formed. The electrode layer 18 should just form at least one of the back surface side transparent electrode layer 6b and the back surface metal electrode 8. FIG.

  As the photoelectric conversion unit 50, the crystalline silicon-based solar cell 101 has a first main surface side layer on the first main surface (also referred to as a light incident side surface, also referred to as a light incident surface) of the one-conductivity single crystal silicon substrate 1. From the one conductivity type semiconductor region (one conductivity type single crystal silicon substrate 1) side, the conductive silicon thin film 3a and the light incident side transparent electrode layer 6a are provided in this order. Further, the second main surface of the one-conductivity-type single crystal silicon substrate 1 (also referred to as the opposite surface to the light incident side and the back surface) has a conductive silicon-based thin film 3b and an electrode layer in this order.

  A collector electrode 7 including a first conductive layer 71 and a second conductive layer 72 is formed on the light incident side transparent electrode layer 6 a on the surface of the photoelectric conversion unit 50. As in the present embodiment, the insulating layer 9 is preferably formed in the first conductive layer non-formation region. In addition, it is preferable that an insulating layer 9 having an opening 9 h is formed between the first conductive layer 71 and the second conductive layer 72.

  It is preferable to have intrinsic silicon-based thin films 2a and 2b between the one-conductivity-type single crystal silicon substrate 1 and the conductive silicon-based thin films 3a and 3b. On the conductive silicon thin film 3b, at least one of the back surface side transparent electrode layer 6b or the back surface metal electrode 8 is formed as the electrode layer 18, and the back surface side transparent electrode layer 6b and the back surface metal are formed as the electrode layer 18. When it has the electrode 8, it is preferable to form the back surface side transparent electrode layer 6b on the conductive silicon thin film 3b, and it is preferable to have the back surface metal electrode 8 on the back surface side transparent electrode layer 6b.

  First, the one conductivity type single crystal silicon substrate 1 in the crystalline silicon solar cell of the present invention will be described. In general, a single crystal silicon substrate contains an impurity that supplies electric charge to silicon in order to provide conductivity. Single crystal silicon substrates include an n-type in which atoms (for example, phosphorus) for introducing electrons into silicon atoms and a p-type in which atoms (for example, boron) for introducing holes into silicon atoms are contained. That is, “one conductivity type” in the present invention means either n-type or p-type.

  In heterojunction solar cells, electron / hole pairs are efficiently separated and recovered by providing a strong electric field with the heterojunction on the incident side where the most incident light is absorbed as the reverse junction. Can do. Therefore, the heterojunction on the light incident side is preferably a reverse junction. On the other hand, when holes and electrons are compared, electrons having smaller effective mass and scattering cross section generally have higher mobility. From the above viewpoint, the single crystal silicon substrate 1 used for the heterojunction solar cell is preferably an n-type single crystal silicon substrate. The single conductivity type single crystal silicon substrate 1 preferably has a texture structure on the surface from the viewpoint of light confinement.

A silicon-based thin film is formed on the surface of the one conductivity type single crystal silicon substrate 1 on which the texture is formed. As a method for forming a silicon-based thin film, a plasma CVD method is preferable. As conditions for forming a silicon-based thin film by plasma CVD, a substrate temperature of 100 to 300 ° C., a pressure of 20 to 2600 Pa, and a high frequency power density of 0.004 to 0.8 W / cm ² are preferably used. As a raw material gas used for forming a silicon-based thin film, a silicon-based gas such as SiH ₄ or Si ₂ H ₆ or a mixed gas of a silicon-based gas and H ₂ is preferably used.

The conductive silicon thin film 3 is a one-conductivity type or reverse conductivity type silicon thin film. For example, when n-type is used as the one-conductivity-type single crystal silicon substrate 1, the one-conductivity-type silicon-based thin film and the reverse-conductivity-type silicon-based thin film are n-type and p-type, respectively. B ₂ H ₆ or PH ₃ is preferably used as a dopant gas for forming the p-type or n-type silicon thin film. Further, since the addition amount of impurities such as P and B may be small, it is preferable to use a mixed gas diluted with SiH ₄ or H ₂ in advance. By adding a gas containing different elements such as CH ₄ , CO ₂ , NH ₃ , GeH _{4 and the} like to alloy the silicon thin film when forming the conductive silicon thin film, the energy gap of the silicon thin film is increased. It can also be changed.

  Examples of silicon-based thin films include amorphous silicon thin films, microcrystalline silicon (thin films containing amorphous silicon and crystalline silicon), and the like. Among these, it is preferable to use an amorphous silicon thin film. For example, as a preferable configuration of the photoelectric conversion unit 50 when an n-type single crystal silicon substrate is used as the one-conductivity-type single crystal silicon substrate 1, the transparent electrode layer 6a / p-type amorphous silicon thin film 3a / i type is used. Examples include a laminated structure in the order of amorphous silicon thin film 2a / n type single crystal silicon substrate 1 / i type amorphous silicon thin film 2b / n type amorphous silicon thin film 3b / transparent electrode layer 6b. In this case, for the reason described above, it is preferable that the p-layer side be the light incident surface.

  The intrinsic silicon thin films 2a and 2b are preferably i-type hydrogenated amorphous silicon composed of silicon and hydrogen. When i-type hydrogenated amorphous silicon is deposited on a single crystal silicon substrate by CVD, surface passivation can be effectively performed while suppressing impurity diffusion into the single crystal silicon substrate. Further, by changing the amount of hydrogen in the film, it is possible to give an effective profile to the carrier recovery in the energy gap.

  The p-type silicon thin film is preferably a p-type hydrogenated amorphous silicon layer, a p-type amorphous silicon carbide layer, or a p-type amorphous silicon oxide layer. A p-type hydrogenated amorphous silicon layer is preferable from the viewpoint of suppressing impurity diffusion and reducing the series resistance. On the other hand, the p-type amorphous silicon carbide layer and the p-type amorphous silicon oxide layer are wide gap low-refractive index layers, which are preferable in terms of reducing optical loss.

  The photoelectric conversion unit 50 of the heterojunction solar cell 101 preferably includes the transparent electrode layers 6a and 6b on the conductive silicon thin films 3a and 3b. The transparent electrode layer is formed by a transparent electrode layer forming step. The transparent electrode layers 6a and 6b are preferably composed mainly of a conductive oxide. As the conductive oxide, for example, zinc oxide, indium oxide, or tin oxide can be used alone or in combination. From the viewpoints of conductivity, optical characteristics, and long-term reliability, an indium oxide containing indium oxide is preferable, and an indium tin oxide (ITO) as a main component is more preferably used. Here, “main component” means that the content is more than 50% by weight, preferably 70% by weight or more, and more preferably 90% by weight or more. The transparent electrode layer may be a single layer or a laminated structure composed of a plurality of layers. At this time, the transparent electrode layers 6a and 6b are preferably formed on the entire surfaces of the first main surface and the second main surface of the one conductivity type single crystal silicon substrate 1, respectively.

  A doping agent can be added to the transparent electrode layer. For example, when zinc oxide is used as the transparent electrode layer, examples of the doping agent include aluminum, gallium, boron, silicon, and carbon. When indium oxide is used as the transparent electrode layer, examples of the doping agent include zinc, tin, titanium, tungsten, molybdenum, and silicon. When tin oxide is used as the transparent electrode layer, examples of the doping agent include fluorine.

  The doping agent can be added to one or both of the light incident side transparent electrode layer 6a and the back surface side transparent electrode layer 6b. In particular, it is preferable to add a doping agent to the light incident side transparent electrode layer 6a. By adding a doping agent to the light incident side transparent electrode layer 6a, the resistance of the transparent electrode layer itself is reduced, and resistance loss between the light incident side transparent electrode layer 6a and the collector electrode 7 is suppressed. Can do.

  The film thickness of the light incident side transparent electrode layer 6a is preferably 10 nm or more and 140 nm or less from the viewpoints of transparency, conductivity, and light reflection reduction. The role of the light incident side transparent electrode layer 6a is to transport carriers to the collector electrode 7, and it is only necessary to have conductivity necessary for that purpose, and the film thickness is preferably 10 nm or more. By setting the film thickness to 140 nm or less, the absorption loss in the light incident side transparent electrode layer 6a is small, and the decrease in photoelectric conversion efficiency accompanying the decrease in transmittance can be suppressed. Moreover, if the film thickness of the light incident side transparent electrode layer 6a is within the above range, an increase in carrier concentration in the transparent electrode layer can also be prevented, so that a decrease in photoelectric conversion efficiency due to a decrease in transmittance in the infrared region is also suppressed. Is done.

  The method for forming the transparent electrode layer is not particularly limited, but a physical vapor deposition method such as a sputtering method, a chemical vapor deposition (MOCVD) method using a reaction between an organometallic compound and oxygen or water is preferable. In any film forming method, energy by heat or plasma discharge can be used.

  The substrate temperature at the time of producing the transparent electrode layer is appropriately set. For example, when an amorphous silicon thin film is used as the silicon thin film, the temperature is preferably 200 ° C. or lower. By setting the substrate temperature to 200 ° C. or lower, desorption of hydrogen from the amorphous silicon layer and accompanying dangling bonds to silicon atoms can be suppressed, and as a result, conversion efficiency can be improved.

  It is preferable that the back surface metal electrode 8 is formed on the back surface side transparent electrode layer 6b. As the back surface metal electrode 8, it is desirable to use a material having high reflectivity from the near infrared to the infrared region and high conductivity and chemical stability. Examples of the material satisfying such characteristics include silver and aluminum. The method for forming the back surface metal electrode layer is not particularly limited, but a physical vapor deposition method such as a sputtering method or a vacuum evaporation method, a printing method such as screen printing, or the like is applicable.

  FIG. 4A shows crystal silicon in a state where silicon thin films 2 and 3; transparent electrode layer 6; and back metal electrode layer 8 are formed on one conductivity type single crystal silicon substrate 1 according to one embodiment. It is sectional drawing which represents a system solar cell typically. In the crystalline silicon-based solar cell shown in FIG. 4A, the one-conductivity-type single crystal silicon substrate 1 and the one-conductivity-type silicon-based thin film 3b are formed as the one-conductivity-type semiconductor region, and the reverse-conductivity-type semiconductor region. As a result, a reverse conductivity type silicon-based thin film 3a is formed. Further, as the electrode layer 18, a back side transparent electrode layer 6 b and a back metal electrode 8 are formed. In FIG. 4A, after the intrinsic silicon thin film 2b and the one conductivity type silicon thin film 3a are formed on the back surface side of the one conductivity type single crystal silicon substrate 1, as the first main surface side layer on the light incident side, Intrinsic silicon-based thin film 2a and reverse-conductivity-type silicon-based thin film 3a are formed, and then light-incident-side transparent electrode layer 6a is formed, and then back-side transparent electrode layer 6b and back-side metal electrode layer 8 are formed as electrode layer 18. (The order of formation of the layers of the crystalline silicon solar cell is not limited to the form shown in FIG. 4A).

  When each of the above layers is formed by CVD, sputtering, or the like without using a film-forming mask, intrinsic silicon-based thin film 2b and one-conductivity-type silicon-based thin film 3b on the back side of one-conductivity-type single crystal silicon substrate 1 are used. The transparent electrode layer 6b and the back surface metal electrode layer 8 which are electrode layers are formed to the side surface and the light incident surface of the one-conductivity type single crystal silicon substrate 1 by wraparound during film formation. In addition, the intrinsic silicon thin film 2a, the reverse conductivity silicon thin film 3a, and the transparent electrode layer 6a formed on the light incident surface of the one-conductivity-type single crystal silicon substrate 1 are formed into one-conductivity-type single-crystal The crystal silicon substrate 1 is formed up to the side surface and the back surface side. When such a wraparound occurs, as can be understood from FIG. 4A, the transparent conductive layer 6a on the light incident surface side, the back side transparent conductive layer 6b and the back side metal electrode layer 8 which are electrode layers, , May be short-circuited, and the solar cell characteristics may be degraded.

  In the present invention, in the insulating treatment step, an insulating region is formed on at least the first main surface or the second main surface of the one conductivity type semiconductor region, and the first main surface side layer on the first main surface side and The electrical short circuit between the electrode layer on the second main surface is removed. At this time, laser irradiation is performed so as to remove at least one of the first main surface side layer or the electrode layer and to remove at least a part of the one-conductivity-type semiconductor region, whereby the insulating region Is formed.

  The “insulating region” in the present invention is a region from which the one-conductivity-type semiconductor region and the first main surface side layer are removed, and the transparent electrode layer on the first main surface side of the photoelectric conversion unit, and the second It means a region where an electrical short circuit between the electrode layers on the main surface is removed. Moreover, a plating process is implemented after an insulation treatment process. In this step, at least a part of the deposit formed in the insulating region is removed by laser irradiation. More deposits are preferably removed.

  Below, each process is demonstrated in detail. First, the insulating process will be described. In the insulating process, the insulating region is formed by removing the one conductivity type semiconductor region and the first main surface side layer. In addition, the area | region where the 1st main surface side layer was removed is called 1st main surface side layer removal area | region 6aN. The first main surface side layer removal region 6aN includes a reverse conductivity type semiconductor region and a region where the transparent electrode layer, which is the outermost surface layer on the first main surface side of the photoelectric conversion portion, has been removed. In the present invention, the insulating region is removed (i) through the first main surface side layer, and laser irradiation is performed so as to remove at least a part of the one-conductivity-type semiconductor region, Alternatively, (ii) formed by a method in which the photoelectric conversion portion is broken after laser irradiation is performed so as to remove through the electrode layer and remove at least a part of the one conductivity type semiconductor region. Is done.

  In the case of (i), for example, as shown in FIG. 4 (C-1), the laser is removed from the first main surface side through the first main surface side layer and reaches the one-conductivity-type semiconductor region. By performing irradiation, an insulating region is formed. Specifically, a material formed by irradiating laser light so as to pass through the light incident side transparent electrode layer 6a and forming at least a part of the transparent electrode layer in the laser irradiation region under the transparent electrode layer (for example, It can be carried out by a method of removing together with the silicon-based thin film layer and the one-conductivity single crystal silicon substrate 1). When the laser irradiation is performed linearly, the first main surface side layer removal region 6aN is formed in a groove shape as schematically shown in the sectional structure in FIG.

  Further, a groove is formed by irradiating laser light from the first main surface side, and as shown in FIG. 4 (D-1), the one-conductivity type single crystal silicon substrate 1 is broken by using the groove. Also, the first main surface side layer removal region 6aN can be formed.

  Further, as shown in FIGS. 4C-2 and C-3, as shown in FIG. 4, the first main surface side surface to the second main surface side surface, or the second main surface side surface to the first main surface side. The first main surface side layer removal region 6aN can also be formed by irradiating a laser beam so as to reach the surface side surface, forming a through hole, and cutting the one-conductivity single crystal silicon substrate 1 together. In this case, the first main surface side layer removal region 6aN is formed on the side surface of the one conductivity type single crystal silicon substrate 1 as schematically shown in FIG. Further, the first main surface side layer is removed by laser irradiation.

  In the case of (ii), as shown in FIG. 4 (C-4), the electrode layer on the second main surface side is removed from the second main surface side, and the single conductivity type single crystal silicon substrate 1 is formed. A groove is formed by performing laser irradiation so as to reach, and the first main surface side layer is removed by breaking along the groove. Thus, the 1st main surface side layer removal area | region 6aN can be formed by forming the 1st main surface side layer removal area | region 6aN.

  The insulating layer region can be formed by irradiating a laser beam having an appropriate intensity and wavelength. Laser light that can be suitably used for the formation of grooves or through-holes is applicable as long as it has a wavelength that can be absorbed by the crystalline silicon substrate and has sufficient output to form grooves or through-holes. it can. A laser having a wavelength of 1000 nm or less such as a second harmonic or a third harmonic of a YAG laser or an Ar laser and a power of 1 to 40 W can be used. Moreover, as a light diameter of a laser beam, a 20-200 micrometers thing can be used, for example. By irradiating the laser beam under such conditions, it is possible to form a groove or a through-hole whose width is substantially the same as the light diameter of the laser beam.

  When the one-conductivity-type single crystal silicon substrate is ruptured along the groove, the depth of the groove 17 can be appropriately selected as a depth that facilitates rupture along the groove. As a breaking method, for example, there is a method of bending and breaking by sandwiching and bending the peripheral portion of the crystalline silicon substrate with the holding member around the groove portion.

  Next, removal of deposits generated by laser processing will be described. In general, when laser irradiation is performed, deposits generated by laser processing adhere to the laser irradiation region. This is formed by re-aggregating a part of the material evaporated by laser irradiation and depositing it on the insulating region. The deposit generated by the laser irradiation generated by the laser irradiation includes a substance in the region removed by the laser irradiation. Examples of this material include constituent materials of a crystalline silicon substrate, a silicon-based thin film layer, a transparent electrode layer, and an insulating layer, and materials that have been altered by laser irradiation (for example, reduced products, oxides and mixtures, and before irradiation). And those in which the atomic arrangement has changed or the composition has changed). In addition, some of such deposits may be metallized due to alteration (for example, reduction) by laser light irradiation. It is considered that the metal is easily melted and aggregated because of high temperature at the time of laser beam irradiation and immediately after irradiation.

  Even when the insulating region is formed by laser irradiation and the electrical short circuit between the first main surface and the second main surface is removed, when the deposit generated by the laser irradiation adheres to the insulating region, It is considered that a leakage current may occur in a new path.

  Foreign matter adhering between the transparent electrode layer or the electrode layer and the one-conductivity-type single crystal silicon substrate can cause a decrease in solar cell performance. In the present invention, deposits generated by laser irradiation can become foreign matters. That is, in the insulating region, if a deposit adheres between the transparent electrode layer or the electrode layer and the one-conductivity single crystal silicon substrate, it may cause a decrease in solar cell performance.

  Conventionally, laser irradiation is generally performed at the final stage of the solar cell manufacturing process. However, when the collector electrode is formed by plating as in the present invention, the collector electrode material is deposited from the deposit. It became clear that the influence of sediment is more important.

  For example, a laser is provided between a reverse-conductivity-type silicon thin film and a transparent electrode layer formed on a one-conductivity type semiconductor region as a first main surface side layer and a one-conductivity-type single crystal silicon substrate as a one-conductivity type semiconductor region. When deposits generated by irradiation adhere, a pn junction or a pin junction is short-circuited, so that a leak current is likely to occur and FF tends to be lowered. On the other hand, when a deposit generated by laser irradiation adheres between the electrode layer and the one-conductivity-type single crystal silicon substrate, Voc tends to decrease because the back surface field (BSF) is weakened. Among them, when a deposit generated by laser irradiation adheres between the transparent electrode layer formed on the reverse conductivity type silicon thin film as the first main surface side layer and the one conductivity type single crystal silicon substrate, The decrease in solar cell characteristics tends to become more prominent. In particular, when the deposit generated by laser irradiation has conductivity, the influence is likely to become more remarkable.

  In the plating step in which the second conductive layer is formed, when a plating current is applied, the second conductive layer material is deposited starting from the deposit generated by laser irradiation as shown in FIG. 4 (D-1 ′). obtain. At this time, even if the electrical short circuit on the front and back sides is removed by the insulating region, there is a possibility that the leakage current due to the short circuit between the transparent electrode layer and the one-conductivity type single crystal silicon substrate is further increased.

  Since such a leakage current causes a decrease in the characteristics of the solar cell, in the present invention, it is preferable to remove the location where the leakage occurs, which is realized by removing the deposit generated by the laser irradiation. . In particular, a transparent electrode layer deposit made of a transparent electrode layer or a modified material of the transparent electrode layer is likely to be conductive. In addition, since the transparent electrode layer originally exists in the vicinity of one conductivity type semiconductor region such as one conductivity single crystal silicon substrate, the transparent electrode layer deposit is likely to be a path of leakage current and is preferably removed. Further, when the collector electrode is formed by plating as in the invention, the collector electrode material may be deposited starting from the deposit as described above. This may cause a decrease in solar cell characteristics including reliability, and in order to reduce such possibility, it is preferable to remove deposits generated by laser irradiation.

  In the present invention, in the plating process in which the second conductive layer is formed, deposits generated by laser irradiation are removed. In the present invention, the insulating layer forming step and the laser irradiation step may be performed in this order. In this case, the insulating layer is not formed on the resurface of the insulating region, and the deposit generated by the laser irradiation adheres. Therefore, in the plating step, the deposit can be brought into contact with the plating solution.

  The removal of deposits generated by laser irradiation in the plating process means that the plating solution used in the plating process in which the second conductive layer is formed, the main component of the same type of chemical solution, and the plating apparatus are used for laser irradiation. It is meant to carry out removal of deposits generated by the above. At this time, the deposit generated by the laser irradiation is exposed to the chemical solution, and the deposit generated by the laser irradiation can be removed from the insulating region.

  In this case, when the deposit generated by the laser irradiation is brought into contact with the etching solution, the deposit generated by the laser irradiation can be etched. When the deposit generated by laser irradiation has conductivity, the deposit generated by laser irradiation and the electrode in the plating tank in the electrolyte-containing liquid (the anode during the plating process for forming the second conductive layer) A voltage may be applied between the electrode and the electrode) so that the deposit produced by the laser irradiation is electrolytically etched. This can be performed, for example, by applying a voltage so that the polarity is opposite to that at the time of generating the second conductive layer.

  From the viewpoint of improving productivity, it is preferable to use a plating tank for forming a second conductive layer to remove deposits generated by laser irradiation. As the etching solution, it is preferable to use a plating solution for forming the second conductive layer. In addition, the liquid and the electrode containing the electrolyte are preferably a plating solution and an electrode (anode) used in the plating step, respectively. In addition, from the viewpoint of more reliably suppressing leakage current, the removal of deposits caused by laser irradiation is performed separately in the plating process as described above, in addition to air blow, water washing, ultrasonic washing, etc. You may implement using a removal method.

  When the second conductive layer is formed by a plating process, it is not necessary to newly provide a process for removing the deposit generated by laser irradiation if the deposit generated by laser irradiation is removed in the plating process. Therefore, it is preferable from the viewpoint of productivity that the process can be shortened and the generation amount of waste such as waste liquid and the occurrence frequency of substrate breakage in the process can be reduced. is there.

  Hereinafter, the details of the insulating process will be described with respect to the above-described (i) first embodiment and (ii) second embodiment. Note that the present invention is not limited to the following embodiment.

[First embodiment]
In FIG. 4, the transparent electrode layer 6a is formed on the entire surface (FIG. 4A), and the first main surface side first is formed on the transparent electrode layer so as to wrap around the surface opposite to the film forming surface. FIG. 5 is a schematic cross-sectional view illustrating an example of a case where an insulating layer 9 is formed in a conductive layer non-formation region (FIG. 4B).

  The insulating layer 9 is formed in the first conductive layer non-forming region on the first main surface side in the insulating layer forming step. The insulating layer 9 is preferably formed using an insulating material. By forming the insulating layer 9 having insulating properties, it is possible to suppress the second conductive layer material from being deposited on the transparent electrode layer and damage to the transparent electrode layer in the plating step described later. The insulating layer 9 is preferably made of a material that is not easily altered by laser irradiation.

  At this time, as shown schematically in FIG. 4A, the ends of the crystalline silicon-based solar cell 101 are a transparent electrode layer on the front side and an electrode layer on the back side (back side transparent electrode layer and back side metal electrode 8). Are short-circuited at the ends. It is preferable to remove the electrical short-circuit portion in the insulation treatment step because it causes a significant decrease in solar cell performance.

  In the said form, since the 1st main surface side layer removal area | region is formed as an insulation area | region as shown to FIG. 3 (A) (B) in an insulation process, it is transparent by the light-incidence surface side and a back surface side. The electrode layer is separated. Therefore, an electrical short circuit between the light incident surface and the back surface can be removed.

  From the viewpoint of improving the performance of the solar cell, the first main surface side layer removal region is preferably provided in a region outside the collector electrode 7. In particular, from the viewpoint of increasing the effective power generation area, the first main surface side layer removal region is provided at a position closer to the end of the first main surface and / or the second main surface (for example, a region of 5 mm or less from the end). It is preferred that

  Regarding the insulation treatment process of the present invention, the formation region of the insulation region will be described in more detail with reference to FIG. FIG. 4C-1 shows an example of the one-conductivity type crystalline silicon substrate 1 after the photoelectric conversion portion preparation step in which an insulating region is formed on the surface side of the crystalline silicon substrate shown in FIG. It is typical sectional drawing which shows an edge part. The groove 17 is formed so as to reach the one conductivity type crystalline silicon substrate 1, and the transparent electrode layer 6 a and the insulating layer 9 are removed by the groove 17. That is, the first main surface side layer removal region and the insulation layer removal region are formed as the insulation region. The electrical short circuit between the front surface side and the back surface side is removed by the first main surface side layer removal region.

  In the first embodiment, laser irradiation may be performed from the first main surface side as shown in FIG. 4C-2, or from the second main surface side as shown in FIG. Laser irradiation may be performed so as to reach the first main surface, but from the viewpoint of facilitating alignment of the collector electrode formation position and the groove, the groove is formed from the first main surface side of the crystalline silicon-based solar cell 101. Is preferably formed.

  Further, as schematically shown in FIG. 4C-1, in the insulating region, in addition to the transparent electrode layer, a one-conductivity-type single crystal silicon substrate 1 which is a one-conductivity-type semiconductor region, and a reverse-conductivity-type semiconductor At least a part of the reverse conductivity type silicon-based thin film 3a, which is a region, is removed by laser irradiation. Moreover, it is preferable that the electrode layer (the back surface metal electrode layer 8 or the back surface side transparent electrode layer 6b) on the second main surface side is not attached in the insulating region.

  From the viewpoint of more surely removing an electrical short circuit between the front surface and the back surface, the substrate may be broken after the groove is formed. FIG. 4D-1 is a schematic diagram showing an end shape of a crystalline silicon-based solar cell obtained by breaking the one-conductive single crystal silicon substrate shown in FIG. 4C-1 along the groove. FIG. A notch-like structure (laser mark) associated with the formation of a groove on the surface side can be formed at the end. In addition, by breaking the one-conductivity-type single crystal silicon substrate along the groove, a fracture surface in which neither the conductive-type silicon thin film nor the transparent electrode layer is attached is formed. As a result, a crystalline silicon solar cell having an insulating region (first main surface side layer removal region) having a notch-like structure and a fracture surface (divided surface) can be obtained.

  At this time, since the fracture surface is formed after laser irradiation on the second main surface side where no groove is formed by laser irradiation, deposits generated by laser irradiation are difficult to adhere, but on the first main surface side. Deposits generated by laser irradiation can adhere.

  The division of the substrate does not have to be performed in two stages, that is, a groove forming step and a substrate breaking step. As shown in FIGS. 4C-2 and C-3, the one-conductivity single crystal silicon substrate 1 is used. A through hole may be formed so as to penetrate through the substrate, and the substrate may be cut simultaneously with the formation of the through hole. If the insulating treatment process is performed using such a method, there is no need to provide a process of dividing the crystalline silicon substrate along the groove, and the production process may be shortened.

[Second Embodiment]
As shown in FIG. 4C-4, even if a laser is incident from the second main surface side, the electrode layer is penetrated, and a groove reaching the first conductivity type single crystal silicon substrate 1 is formed, A short circuit between the first main surface and the second main surface cannot be removed. For this reason, when the insulating region is formed by irradiating the laser from the second main surface side, the groove is formed by irradiating the laser beam as shown in FIG. It is necessary to break the first conductivity type single crystal silicon substrate 1 as follows.

  Thereby, a crystalline silicon solar cell having an insulating region having a notch-like structure (laser mark) and a split surface (fracture surface) can be obtained. At this time, the deposit generated by the laser irradiation is difficult to adhere to the first main surface side where the groove by the laser irradiation is not formed, but the deposit generated by the laser irradiation can adhere to the second main surface side. . Deposits produced by laser irradiation attached to the second main surface side can cause a decrease in Voc as described above.

  In the present invention, as shown in the first embodiment or the second embodiment, an insulating region can be formed by performing an insulating treatment process.

  In the following, the transparent electrode layer, the electrode layer, the one conductive semiconductor region, the reverse conductivity type semiconductor after the laser irradiation step (before the plating step in which the second conductive layer is formed) and after the plating step in which the second conductive layer is formed Various typical structures in the vicinity of the insulating region of each region will be described with reference to the cross-sectional view schematically shown in FIG. 6A is a diagram in which a short circuit occurs due to wraparound, FIGS. 6-2 to 6-4 correspond to the first embodiment, and FIGS. 6-5 to 6-9 are comparative examples. 6-10 and 11 correspond to the second embodiment.

  (I) The first embodiment is shown in FIGS. 6-2 to 6-4 below.

  In FIG. 6A, as shown in FIG. 4A, the silicon-based thin films 2 and 3; the transparent electrode layer 6; and the back metal electrode layer 8 are formed on the one-conductivity single crystal silicon substrate 1. It is sectional drawing which represents typically the crystalline silicon type solar cell of a state. 6A, after the intrinsic silicon thin film 2b and the one conductivity type silicon thin film 3a are formed on the back surface side of the one conductivity type single crystal silicon substrate 1, the intrinsic silicon type thin film 2a and the reverse conductivity type are formed on the light incident side. The silicon-based thin film 3a is formed, and then the structure in the case where the transparent electrode layer 6a on the light incident side and the transparent electrode layer 6b on the back side and the back metal electrode layer 8 are formed as the electrode layer 17 are schematically shown. ing.

  6A to 6D illustrate the photoelectric conversion unit in which the first surface of the photoelectric conversion unit illustrated in FIG. 6A is irradiated with laser light. The photoelectric conversion portion in which a groove that reaches the one-conductivity type single crystal silicon substrate 1 is formed by irradiating laser light from the front surface side is shown in FIG. FIG. 6-3 shows the photoelectric conversion part in which the through hole is formed, and FIG. 6-4 shows the photoelectric conversion part in which the through hole penetrating the laser beam from the back surface side to the surface side is formed. In the structure shown in FIGS. 6-2 to 6-4, the light incident side transparent electrode layer 6a and the reverse conductivity type silicon-based thin film 3a which are the first main surface side layers of the laser irradiation region, The crystal silicon substrate is removed. For this reason, an electrical short circuit between the transparent electrode layer on the front surface and the electrode layer on the back surface is removed.

  Before the plating process, deposits generated by laser irradiation are attached to the side surfaces of grooves and through holes formed by laser irradiation, but the deposits generated by laser irradiation are removed by the plating process. . Thereby, since the said electrical short circuit is removed, it can be anticipated that high solar cell performance is obtained.

  On the other hand, as shown in FIGS. 6-5, when the insulating layer is formed after the laser irradiation step, the deposit generated by the laser irradiation is covered with the insulating layer, so that the deposit generated by the laser irradiation in the plating step is reduced. It becomes difficult to remove completely. For this reason, leakage current due to deposits generated by laser irradiation occurs, and the solar cell performance may be lower than that of the solar cells shown in FIGS.

  Even if the wavelength and intensity of the laser light are adjusted so that the laser light is absorbed only by the transparent electrode layer 6a and the reverse conductivity type silicon thin film 3a and does not reach the one conductivity type single crystal silicon substrate, the transparent electrode layer Since the film thickness of 6a and the reverse conductivity type silicon thin film 3a is thin, the heat generated by the film thickness of the transparent electrode layer 6a and the reverse conductivity type silicon thin film 3a reaches the one conductivity type single crystal silicon substrate 1 and is transparent. Simultaneously with the electrode layer 6a and the reverse conductivity type silicon thin film 3a, the one conductivity type single crystal silicon substrate can also be removed. Furthermore, even if the laser light irradiation conditions are adjusted, if the light irradiation surface side transparent electrode layer 6a and the reverse conductivity type silicon-based thin film 3a partially remain in the laser irradiation region, these may cause leakage current. For this reason, the transparent electrode layer 6a on the light incident side and the reverse conductivity type silicon-based thin film 3a are removed without removing the one-conductivity-type crystalline silicon substrate 1, and the structures shown in FIGS. 6-6 and 6-7 are produced. That is practically difficult.

  Also, as shown in FIG. 6-8, by forming a transparent electrode layer or insulating layer on the light incident surface side using a mask and irradiating a laser in a region where the transparent electrode layer or insulating layer is not formed, A short circuit between the transparent electrode layer on the front surface and the electrode layer on the back surface can be prevented, but at this time, the formation area of the transparent electrode layer is reduced, and the effective area of the solar cell is reduced, so that the output is reduced. May occur.

  Moreover, (ii) 2nd embodiment is shown to FIGS. 6-9-10 below.

  As shown in FIG. 6-9, even if a laser is irradiated from the back surface side to form a groove reaching the one-conductivity type single crystal silicon substrate 1, the electricity between the transparent electrode layer on the front surface and the insulating layer on the back surface is It is difficult to obtain a high solar cell performance because it is not possible to remove the short circuit. 6-10 is a diagram schematically showing a solar cell formed by breaking the solar cell shown in FIG. 6-9 with a groove as a starting point. For this reason, deposits generated by laser irradiation do not occur on the light incident side, but deposits generated by laser irradiation can occur on the back surface side. Deposits generated by this laser irradiation can be removed in the plating process. For this reason, in addition to the improvement of FF due to the reduction in resistance loss at the collector electrode, which is conventionally expected with electrodes formed by plating, factors such as Voc are caused by the effect of removing deposits generated by the laser irradiation described above. A solar cell with improved conversion efficiency can be produced.

The collector electrode 7 is formed on the first main surface of the photoelectric conversion unit formed as described above. The collector electrode 7 includes a first conductive layer 71 and a second conductive layer 72. The first conductive layer 71 preferably includes a low melting point material having a heat flow start temperature T ₁ lower than the heat resistant temperature of the photoelectric conversion portion.

A collecting electrode 7 is formed on the transparent electrode layer 6a. The collector electrode 7 includes a first conductive layer 71 and a second conductive layer 72. The first conductive layer 71 includes a conductive material. The conductive material preferably includes a low melting point material having a heat flow start temperature T ₁ lower than the heat resistant temperature of the photoelectric conversion portion. In the collector electrode 7 according to the embodiment of the present invention, a part of the second conductive layer 72 is electrically connected to the first conductive layer 71. Here, “partially conducting” means a state in which the insulating layer is typically formed with an opening and the opening is filled with the material of the second conductive layer. In addition, when the thickness of a part of the insulating layer becomes as thin as about several nm (that is, a region having a thin film thickness is locally formed), the second conductive layer 72 becomes the first conductive layer. The thing which is conducting to 71 is also included. For example, when the low-melting-point material of the first conductive layer 71 is a metal material such as aluminum, the first conductive layer 71 and the second conductive layer are interposed via an oxide film (corresponding to an insulating layer) formed on the surface thereof. A state in which the gap is conducted is exemplified.
In the present invention, as shown in FIG. 13, the entire surface of the first conductive layer on one main surface side may be electrically connected to the second conductive layer.

  A method for forming an opening for electrically connecting the first conductive layer and the second conductive layer in the insulating layer 9 is not particularly limited, and methods such as laser irradiation, mechanical drilling, and chemical etching can be employed. In addition, a method of forming the opening when forming the insulating layer by making the surface uneven structure of the first conductive layer larger than the surface uneven structure of the photoelectric conversion portion can be used. In one embodiment, a method of forming an opening in an insulating layer formed thereon by using a low-melting-point material as the conductive material in the first conductive layer and causing the low-melting-point material to heat flow. .

  As a method of forming the opening by thermal flow of the low melting point material in the first conductive layer, after forming the insulating layer 9 on the first conductive layer 71 containing the low melting point material, the heat flow start temperature of the low melting point material A method in which the surface shape of the first conductive layer is changed by heating (annealing) to T1 or more, and an opening (crack) is formed in the insulating layer 9 formed thereon; There is a method in which when the insulating layer 9 is formed on the first conductive layer 71 to be contained, the opening is formed at the same time as the formation of the insulating layer by causing the low melting point material to heat flow by heating to T1 or higher.

  Hereinafter, a method for forming an opening in the insulating layer by utilizing the thermal flow of the low melting point material in the first conductive layer will be described with reference to the drawings. Note that the present invention is not limited to the following embodiment.

  FIG. 5 is a process conceptual diagram showing an embodiment of a method for forming the collector electrode 7 on the photoelectric conversion unit 50 of the solar cell. In this embodiment, first, the photoelectric conversion unit 50 is prepared (photoelectric conversion unit preparation step, FIG. 5A). The photoelectric conversion part has the transparent electrode layer 6a as the outermost surface layer on the first main surface side. In the present embodiment, as shown in FIG. 4A, the transparent electrode layer 6a is formed to wrap around on the back surface side. For example, in the case of a heterojunction solar cell, as described above, a photoelectric conversion unit including a silicon-based thin film and a transparent electrode layer is prepared on one conductivity type silicon substrate.

  A first conductive layer 71 including a low melting point material 711 is formed on the first main surface of the photoelectric conversion portion (first conductive layer forming step, FIG. 5B). An insulating layer 9 is formed on the first conductive layer 71 and the transparent electrode layer 6b (FIG. 5C). The insulating layer 9 is also formed on a region (first conductive layer non-formation region) where the first conductive layer 71 of the photoelectric conversion unit 50 is not formed. In the present invention, the transparent electrode layer is formed as the outermost surface layer of the photoelectric conversion unit 50, and the insulating layer 9 is formed on the transparent electrode layer forming region as described above. At this time, it is preferable that the insulating layer 9 is also formed on the first conductive layer forming region.

  Thereafter, an annealing process by heating is performed (annealing process, FIG. 5D). Due to the annealing treatment, the first conductive layer 71 is heated to the annealing temperature Ta, and the low melting point material is heat-fluidized to change the surface shape, and accordingly, the insulating layer 9 formed on the first conductive layer 71 is deformed. Occurs. The deformation of the insulating layer 9 is typically the formation of an opening 9h in the insulating layer. The opening 9h is formed in a crack shape, for example.

  After the insulating layer is formed, an insulating process is performed, and the short-circuit between the first main surface and the second main surface is removed by forming an insulating region (insulating process, FIG. 5E). In FIG. 5E, laser irradiation is performed so as to reach the second main surface from the first main surface, but laser irradiation may be performed so as to reach the first main surface from the second main surface. After forming a groove reaching the silicon substrate from one main surface or the second main surface, the insulating region may be formed by breaking along the groove.

  After forming an opening in the insulating layer by annealing, the second conductive layer 72 is formed by a plating method (plating step, FIG. 5F). Although the first conductive layer 71 is covered with the insulating layer 9, the first conductive layer 71 is exposed at a portion where the opening 9 h is formed in the insulating layer 9. Therefore, the first conductive layer is exposed to the plating solution, and metal can be deposited starting from the opening 9h. According to such a method, the second conductive layer corresponding to the shape of the collector electrode can be formed by plating without providing a resist material layer having an opening corresponding to the shape of the collector electrode. Further, the deposit formed in the insulating region can be removed by the plating solution in the plating step by the laser irradiation of FIG.

  The insulation treatment process is performed before the plating process. By performing the insulation treatment before the plating step, an electrical short circuit between the front surface and the back surface is removed, so even if electrolytic plating is performed during the formation of the second conductive layer, the back surface side and the plating power source Can be prevented from being deposited on the back surface side. Further, since the deposits generated by the laser irradiation can be removed in the plating step, it is advantageous from the viewpoint of productivity as described above.

  The laser irradiation process is performed after the insulating layer forming process. According to such an order, since the insulating layer is not formed on the deposit generated by the laser irradiation, the deposit generated by the laser irradiation is exposed. For this reason, in the plating process, deposits generated by laser irradiation can be easily removed.

  Note that the laser irradiation step may be performed before the annealing treatment or after the annealing treatment. Note that, from the viewpoint of further suppressing the leakage current that may occur in the insulating region, it is preferable to perform the annealing before the annealing treatment.

  Below, the detail of a 1st conductive layer, an insulating layer, and a 2nd conductive layer is demonstrated.

(First conductive layer)
As in the first embodiment, the first conductive layer 71 is a layer that functions as a conductive underlayer when the second conductive layer is formed by a plating method. The first conductive layer only needs to have conductivity that can function as a base layer for electrolytic plating. Note that in this specification, a volume resistivity of 10 ⁻² Ω · cm or less is defined as being conductive. Further, if the volume resistivity is 10 ² Ω · cm or more, it is defined as insulating.

  The film thickness of the first conductive layer 71 is preferably 20 μm or less from the viewpoint of cost, and more preferably 10 μm or less. On the other hand, from the viewpoint of setting the line resistance of the first conductive layer 71 in a desired range, the film thickness is preferably 0.5 μm or more, and more preferably 1 μm or more.

The first conductive layer 71 includes a conductive material. The conductive material is not particularly limited, and for example, silver, copper, nickel, tin, aluminum, chromium, silver, gold, zinc, lead, palladium, tungsten, etc. can be used. Conductive material preferably comprises a low melting point material of the heat flow temperature T _1. The heat flow start temperature is a temperature at which the material causes heat flow by heating and the surface shape of the layer containing the low melting point material changes, and is typically the melting point. In the case of a polymer material or glass, the material may soften at a temperature lower than the melting point to cause heat flow. In such a material, it can be defined that heat flow start temperature = softening point. The softening point is a temperature at which the viscosity becomes 4.5 × 10 ⁶ Pa · s (the same as the definition of the softening point of glass).

The low melting point material is preferably a material that causes heat flow in the annealing process and changes the surface shape of the first conductive layer 71. Therefore, it is preferable that the thermal flow start temperature T ₁ of the low melting point material is lower than the annealing temperature Ta. In the present invention, the annealing process is preferably performed at an annealing temperature Ta lower than the heat resistant temperature of the photoelectric conversion unit 50. Therefore, the heat flow start temperature T ₁ of the low melting point material is preferably lower than the heat resistant temperature of the photoelectric conversion part.

The heat-resistant temperature of the photoelectric conversion unit is irreversibly reduced in the characteristics of a solar cell including the photoelectric conversion unit (also referred to as “solar battery cell” or “cell”) or a solar battery module manufactured using the solar battery cell. Temperature. For example, in the heterojunction solar cell 101 shown in FIG. 2, the single crystal silicon substrate 1 constituting the photoelectric conversion unit 50 hardly changes its characteristics even when heated to a high temperature of 500 ° C. or higher. When the amorphous silicon-based thin films 2 and 3 are heated to about 250 ° C., thermal deterioration or diffusion of doped impurities may occur, resulting in irreversible deterioration of solar cell characteristics. Therefore, in the heterojunction solar cell, it is preferable that the first conductive layer 71 includes a low melting point material having a heat flow start temperature T ₁ of 250 ° C. or lower.

The lower limit of the heat flow starting temperature T ₁ of the low melting point material is not particularly limited. From the viewpoint of easily forming the opening 9h in the insulating layer 9 by increasing the amount of change in the surface shape of the first conductive layer during the annealing treatment, the low melting point material is thermally flowable in the first conductive layer forming step. It is preferable not to produce. For example, when the first conductive layer is formed by coating or printing, heating may be performed for drying. In this case, the heat flow start temperature T ₁ of the low melting point material is preferably higher than the heating temperature for drying the first conductive layer. From this viewpoint, the heat flow starting temperature T ₁ of the low melting point material is preferably 80 ° C. or higher, and more preferably 100 ° C. or higher.

The low melting point material may be an organic substance or an inorganic substance as long as the heat flow start temperature T ₁ is in the above range. The low melting point material may be electrically conductive or insulating, but is preferably a metal material having conductivity. If the low-melting-point material is a metal material, the resistance value of the first conductive layer can be reduced. Therefore, when the second conductive layer is formed by electrolytic plating, the film thickness of the second conductive layer can be increased. it can. If the low melting point material is a metal material, the contact resistance between the photoelectric conversion unit 50 and the collector electrode 7 can be reduced.

  As the low melting point material, a simple substance or an alloy of a low melting point metal material or a mixture of a plurality of low melting point metal materials can be suitably used. Examples of the low melting point metal material include indium, bismuth, and gallium.

The first conductive layer 71 preferably contains, as a conductive material, a high melting point material having a heat flow start temperature T ₂ that is relatively higher than that of the low melting point material, in addition to the above low melting point material. Since the first conductive layer 71 includes the high melting point material, the first conductive layer and the second conductive layer can be efficiently conducted, and the conversion efficiency of the solar cell can be improved. For example, when a material having a large surface energy is used as the low melting point material, when the first conductive layer 71 is exposed to a high temperature by the annealing process and the low melting point material is in a liquid phase state, as conceptually shown in FIG. In some cases, the particles of the low-melting-point material are aggregated to become coarse particles, and the first conductive layer 71 may be disconnected. On the other hand, since the high melting point material does not enter a liquid phase state even when heated during the annealing process, the low melting point material as shown in FIG. 7 can be obtained by including the high melting point material in the first conductive layer forming material. Disconnection of the first conductive layer due to coarsening can be suppressed.

The heat flow starting temperature T ₂ of the high melting point material is preferably higher than the annealing temperature Ta. That is, when the first conductive layer 71 contains a low melting point material and a high melting point material, the heat flow starting temperature T _{1 of} the low melting point material, the heat flow starting temperature T _{2 of} the high melting point material, and the annealing temperature Ta in the annealing process are: , T ₁ <Ta <T ₂ is preferably satisfied. The high melting point material may be an insulating material or a conductive material, but a conductive material is preferable from the viewpoint of reducing the resistance of the first conductive layer. When the low melting point material has low conductivity, the resistance of the first conductive layer as a whole can be reduced by using a material having high conductivity as the high melting point material. As the conductive high melting point material, for example, a single metal material such as silver, aluminum, copper, or a plurality of metal materials can be preferably used.

  When the first conductive layer 71 contains a low-melting-point material and a high-melting-point material, the content ratio is to suppress disconnection due to the coarsening of the low-melting-point material as described above, to the conductivity of the first conductive layer, to the insulating layer. From the standpoint of easiness of forming the opening (increase in the number of starting points of metal deposition of the second conductive layer) and the like, it is appropriately adjusted. The optimum value varies depending on the material used and the combination of particle sizes. For example, the weight ratio of the low melting point material to the high melting point material (low melting point material: high melting point material) is 5:95 to 67:33. It is a range. The weight ratio of the low melting point material: the high melting point material is more preferably 10:90 to 50:50, and further preferably 15:85 to 35:65.

When a particulate low melting point material such as metal particles is used as the material of the first conductive layer 71, the particle diameter D _L of the low melting point material is from the viewpoint of facilitating the formation of an opening in the insulating layer by annealing. It is preferably 1/20 or more of the film thickness d of the first conductive layer, and more preferably 1/10 or more. Particle size D _L of the low-melting material, more preferably 0.25 [mu] m, more preferably not less than 0.5 [mu] m. When the first conductive layer 71 is formed by a printing method such as screen printing, the particle size of the particles can be set as appropriate according to the mesh size of the screen plate. For example, the particle size is preferably smaller than the mesh size, and more preferably ½ or less of the mesh size. When the particles are non-spherical, the particle size is defined by the diameter of a circle having the same area as the projected area of the particles (projected area circle equivalent diameter, Heywood diameter).

The shape of the particles of the low melting point material is not particularly limited, but a non-spherical shape such as a flat shape is preferable. In addition, non-spherical particles obtained by combining spherical particles by a technique such as sintering are also preferably used. Generally, when the metal particles are in a liquid phase, the surface shape tends to be spherical in order to reduce the surface energy. If the low-melting-point material of the first conductive layer before the annealing treatment is non-spherical, the particles approach the sphere when heated to the heat flow start temperature T ₁ or higher by the annealing treatment. The amount of change is greater. Therefore, it is easy to form an opening in the insulating layer 9 on the first conductive layer 71.

As described above, the first conductive layer 71 may be conductive and the volume resistivity may be 10 ⁻² Ω · cm or less. The volume resistivity of the first conductive layer 71 is preferably 10 ⁻⁴ Ω · cm or less. When the first conductive layer has only the low melting point material, the low melting point material only needs to have conductivity. In the case where the first conductive layer contains a low melting point material and a high melting point material, at least one of the low melting point material and the high melting point material may be conductive. For example, the combination of low melting point material / high melting point material includes insulation / conductivity, conductivity / insulation, conductivity / conductivity. In order to make the first conductive layer have a lower resistance, Both the low melting point material and the high melting point material are preferably conductive materials.

In addition to the combination of the low-melting-point material and the high-melting-point material as described above as the material for the first conductive layer 71, by adjusting the size (for example, particle size) of the material, the first conductive layer 71 is heated by the annealing process. It is also possible to suppress disconnection of the conductive layer and improve conversion efficiency. For example, if a material having a high melting point, such as silver, copper, or gold, is fine particles having a particle size of 1 μm or less, sintering necking (particulate particles) is performed at a temperature T ₁ ′ of about 200 ° C. or lower than the melting point. Therefore, it can be used as the “low melting point material” of the present invention. When the material that causes such sintering necking is heated to the sintering necking start temperature T ₁ ′ or higher, deformation occurs near the outer periphery of the fine particles, so that the surface shape of the first conductive layer is changed, and the insulating layer An opening can be formed in 9. Further, even when the fine particles are heated to a temperature higher than the sintering necking start temperature, the fine particles maintain the solid state if the temperature is lower than the melting point T ₂ ′. Disconnection due to is difficult to occur. That is, it can be said that a material that causes sintering necking such as metal fine particles is a “low melting point material” in the present invention, but also has a side surface as a “high melting point material”.

In a material that causes such sintering necking, it can be defined that sintering necking start temperature T ₁ ′ = thermal flow start temperature T ₁ . FIG. 8 is a diagram for explaining the sintering necking start temperature. FIG. 8A is a plan view schematically showing the particles before sintering. Since they are not sintered, the particles are in point contact with each other. FIG. 8B and FIG. 8C are cross-sectional views schematically showing a state in which the particles after the sintering is started are cut along a cross section passing through the center of each particle. FIG. 8B shows the state after the start of sintering (sintering initial stage), and FIG. 8C shows the state where the sintering has progressed from (B). In FIG. 8B, the grain boundary between the particle A (radius r _A ) and the particle B (radius r _B ) is indicated by a dotted line having a length a _AB .

Sintering necking onset temperature T ₁ ', the ratio of r _A and r larger value max (r _A, r _B) of the _B and the grain boundary between the length _{a AB, a AB / max (} r A, r _B ) is defined as the temperature at which it is 0.1 or more. That is, a temperature at which a _AB / max (r _A , r _B ) of at least a pair of particles is 0.1 or more is referred to as a sintering necking start temperature. In FIG. 8, for the sake of simplicity, the particles are shown as spherical, but when the particles are not spherical, the radius of curvature of the particles near the grain boundary is regarded as the radius of the particles. When the radius of curvature of the particle near the grain boundary varies depending on the location, the largest radius of curvature among the measurement points is regarded as the radius of the particle. For example, as shown in FIG. 9A, a grain boundary having a length a _AB is formed between a pair of fine particles A and B that have been sintered. In this case, the shape of the particle A in the vicinity of the grain boundary is approximated by an arc of a virtual circle A indicated by a dotted line. On the other hand, in the vicinity of the grain boundary of the particle B, one is approximated by an arc of a virtual circle B ₁ indicated by a broken line, and the other is approximated by an arc of a virtual circle B ₂ indicated by a solid line. As shown in FIG. 9B, since r _B2 > r _B1 , r _B2 is regarded as the radius r _{B of the} particle B. Note that the above virtual circle is determined by a method in which the boundary is defined by black and white binarization processing of the observation image of the cross section or the surface, and the center coordinates and radius are calculated by the least square method based on the coordinates of the boundary near the grain boundary it can. If it is difficult to strictly measure the sintering necking start temperature according to the above definition, the first conductive layer containing fine particles is formed, and the temperature at which an opening (crack) is generated in the insulating layer by heating is set. It can be regarded as the sintering necking start temperature.

As will be described later, when heating is performed during the formation of the insulating layer, the temperature at which an opening (crack) is generated by heating the substrate during the formation of the insulating layer can be regarded as the firing necking start temperature.
As described above, as the conductive material of the first conductive layer, in addition to the material having a low melting point material, for example, a material having no low melting point material (for example, only the above high melting point material) may be used. it can. Even if it does not have a low melting point material, as described above, after forming an insulating layer so as to cover the first conductive layer, a method of separately forming an opening in the insulating layer, or the first conductive layer The opening is formed in the insulating layer on the first conductive layer by, for example, forming the opening when forming the insulating layer by making the surface uneven structure of the electrode larger than the surface uneven structure of the photoelectric conversion portion. be able to.

  The material for forming the first conductive layer preferably includes an insulating material in addition to the above-described conductive material (for example, a low melting point material and / or a high melting point material). As the insulating material, a paste containing a binder resin or the like can be preferably used. In order to sufficiently improve the conductivity of the first conductive layer formed by the screen printing method, it is desirable to cure the first conductive layer by heat treatment. Therefore, as the binder resin contained in the paste, it is preferable to use a material that can be cured at the drying temperature, and an epoxy resin, a phenol resin, an acrylic resin, or the like is applicable.

  When a conductive material containing a low-melting-point material is used, the shape of the low-melting-point material changes with the curing of the binder resin, and as shown in FIG. Openings (cracks) are likely to occur. Note that the ratio between the binder resin and the conductive material may be set to be equal to or higher than a so-called percolation threshold (a critical value of a ratio corresponding to the content of the conductive material at which the conductivity develops).

  The first conductive layer 71 can be produced by a known technique such as an inkjet method, a screen printing method, a conductive wire bonding method, a spray method, a vacuum deposition method, or a sputtering method. The first conductive layer 71 is preferably patterned in a predetermined shape such as a comb shape. A screen printing method is suitable for forming the patterned first conductive layer from the viewpoint of productivity. In the screen printing method, a method of printing a collecting electrode pattern using a printing paste containing a conductive material and a screen plate having an opening pattern corresponding to the pattern shape of the collecting electrode is preferably used.

On the other hand, when a material containing a solvent is used as the printing paste, a drying step for removing the solvent is required. As described above, the drying temperature in this case is preferably lower than the heat resistant temperature of the photoelectric conversion part. For example, when the photoelectric conversion part has a transparent electrode layer or an amorphous silicon thin film, the drying temperature is preferably 250 ° C. or lower, more preferably 200 ° C. or lower, and 180 ° C. or lower. Further preferred. Further, when the first conductive layer has a low melting point material, it is preferably lower than the heat flow start temperature T _{1 of} the low melting point material. The drying time can be appropriately set, for example, from about 5 minutes to 1 hour.

  The first conductive layer may be composed of a plurality of layers. For example, a laminated structure including a lower layer having a low contact resistance with the transparent electrode layer on the surface of the photoelectric conversion portion and an upper layer containing a conductive material may be used. According to such a structure, an improvement in the curve factor of the solar cell can be expected with a decrease in contact resistance with the transparent electrode layer. In addition, for example, by forming a laminated structure of a low-melting-point material-containing layer and a high-melting-point material-containing layer, a lower layer with a high content of conductive material, and an upper-layered structure with a low content of conductive material, Further reduction in resistance of the first conductive layer can be expected.

  As mentioned above, although demonstrated centering on the case where a 1st conductive layer is formed by the printing method, the formation method of a 1st conductive layer is not limited to a printing method. For example, the first conductive layer may be formed by vapor deposition or sputtering using a mask corresponding to the pattern shape. Further, the pattern may be formed by an ink jet method or the like.

(Insulating layer)
An insulating layer 9 is formed on the surface on the one main surface side of the photoelectric conversion portion.

  Here, when the first conductive layer 71 is formed in a predetermined pattern (for example, comb shape), the first conductive layer forming region where the first conductive layer is formed on the surface of the photoelectric conversion unit 50, and the first There is a first conductive layer non-formation region where one conductive layer is not formed. The insulating layer 9 is formed at least in the first conductive layer non-formation region.

  In the present invention, the insulating layer 9 is preferably formed over substantially the entire surface of the first conductive layer non-formation region, and particularly preferably formed over the entire surface of the first conductive layer non-formation region. preferable. In this case, when the second conductive layer is formed by plating, the photoelectric conversion part can be protected chemically and electrically from the plating solution.

  As the material of the insulating layer 9, a material that exhibits electrical insulation is used. The insulating layer 9 is preferably a material having chemical stability with respect to the plating solution. By using a material having high chemical stability with respect to the plating solution, the insulating layer is hardly dissolved during the plating step when forming the second conductive layer, and damage to the surface of the photoelectric conversion portion is less likely to occur. Moreover, when the insulating layer 9 is formed also on the 1st conductive layer non-formation area | region, it is preferable that an insulating layer has a large adhesion strength with the photoelectric conversion part 50. FIG. For example, in the heterojunction solar cell, the insulating layer 9 preferably has a high adhesion strength with the transparent electrode layer 6a on the surface of the photoelectric conversion unit 50. By increasing the adhesion strength between the transparent electrode layer and the insulating layer, it becomes difficult for the insulating layer to be peeled off during the plating step, and metal deposition on the transparent electrode layer can be prevented.

  For the insulating layer 9, it is preferable to use a material with little light absorption. Since the insulating layer 9 is formed on the light incident surface side of the photoelectric conversion unit 50, more light can be taken into the photoelectric conversion unit if light absorption by the insulating layer is small. For example, when the insulating layer 9 has sufficient transparency with a transmittance of 90% or more, the optical loss due to light absorption in the insulating layer is small, and without removing the insulating layer after forming the second conductive layer, the solar Can be used as a battery. Therefore, the manufacturing process of a solar cell can be simplified and productivity can be further improved. When the insulating layer 9 is used as it is as a solar cell without being removed, the insulating layer 9 is more preferably made of a material having sufficient weather resistance and stability against heat and humidity in addition to transparency. .

  The material of the insulating layer may be an inorganic insulating material or an organic insulating material. As the inorganic insulating material, for example, materials such as silicon oxide, silicon nitride, titanium oxide, aluminum oxide, magnesium oxide, and zinc oxide can be used. As the organic insulating material, for example, materials such as polyester, ethylene vinyl acetate copolymer, acrylic, epoxy, and polyurethane can be used. From the viewpoint of facilitating the formation of an opening in the insulating layer due to interface stress caused by the change in the surface shape of the first conductive layer in the annealing treatment, the material of the insulating layer is an inorganic material having a small breaking elongation. It is preferable.

  Among these inorganic materials, from the viewpoint of plating solution resistance and transparency, silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, sialon (SiAlON), yttrium oxide, magnesium oxide, barium titanate, samarium oxide, Barium tantalate, tantalum oxide, magnesium fluoride, titanium oxide, strontium titanate and the like are preferably used. Among these, from the viewpoint of electrical properties and adhesion to the transparent electrode layer, etc., silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, sialon (SiAlON), yttrium oxide, magnesium oxide, barium titanate, samarium oxide, Barium tantalate, tantalum oxide, magnesium fluoride, and the like are preferable, and silicon oxide, silicon nitride, and the like are particularly preferably used from the viewpoint that the refractive index can be appropriately adjusted. These inorganic materials are not limited to those having a stoichiometric composition, and may include oxygen deficiency or the like.

  The film thickness of the insulating layer 9 is appropriately set according to the material and forming method of the insulating layer. When a material containing a low-melting-point material is used as the first conductive layer, the thickness of the insulating layer 9 is such that the insulating layer 9 opens to the insulating layer due to interface stress or the like caused by a change in the surface shape of the first conductive layer in the annealing process It is preferable that the portion is thin enough to be formed. From this viewpoint, the thickness of the insulating layer 9 is preferably 1000 nm or less, and more preferably 500 nm or less. In addition, by appropriately setting the optical characteristics and film thickness of the insulating layer 9 in the first conductive layer non-forming portion, the light reflection characteristics are improved, the amount of light introduced into the solar cell is increased, and the conversion efficiency is further improved. It becomes possible to improve. In order to obtain such an effect, the refractive index of the insulating layer 9 is preferably lower than the refractive index of the surface of the photoelectric conversion unit 50. Further, from the viewpoint of imparting suitable antireflection properties to the insulating layer 9, the film thickness is preferably set within a range of 30 nm to 250 nm, and more preferably within a range of 50 nm to 250 nm.

  In addition, when forming an insulating layer in both the first conductive layer forming region and the first conductive layer non-forming region, the thickness of the insulating layer on the first conductive layer forming region and the insulation on the first conductive layer non-forming region The layer thicknesses may be different. For example, in the first conductive layer formation region, the thickness of the insulating layer is set from the viewpoint of facilitating the formation of the opening by annealing, and in the first conductive layer non-formation region, an optical film having appropriate antireflection characteristics The film thickness of the insulating layer may be set to be thick.

  When a transparent electrode layer (generally having a refractive index of about 1.9 to 2.1) is provided on the surface of the photoelectric conversion unit 50 as in a heterojunction solar cell, the effect of preventing light reflection at the interface is enhanced and the solar cell. In order to increase the amount of light introduced into the inside, the refractive index when the insulating layer material is formed in the first conductive layer non-formation region is intermediate between air (refractive index = 1.0) and the transparent electrode layer. It is preferably a value. Moreover, when a photovoltaic cell is sealed and modularized, it is preferable that the refractive index of an insulating layer is an intermediate value of a sealing agent and a transparent electrode layer. From this viewpoint, the refractive index of the insulating layer 9 is preferably, for example, 1.4 to 1.9, more preferably 1.5 to 1.8, and further preferably 1.55 to 1.75. The refractive index of the insulating layer can be adjusted to a desired range depending on the material, composition, etc. of the insulating layer. For example, in the case of silicon oxide, the refractive index is increased by reducing the oxygen content. In addition, unless otherwise indicated, the refractive index in this specification is a refractive index with respect to the light of wavelength 550nm, and is a value measured by spectroscopic ellipsometry. Further, it is preferable that the optical film thickness (refractive index × film thickness) of the insulating layer is set so as to improve the antireflection characteristics according to the refractive index of the insulating layer.

  The insulating layer can be formed using a known method. For example, in the case of an inorganic insulating material such as silicon oxide or silicon nitride, a dry method such as a plasma CVD method or a sputtering method is preferably used. In the case of an organic insulating material, a wet method such as a spin coating method or a screen printing method is preferably used. According to these methods, it is possible to form a dense film with few defects such as pinholes.

  Among these, from the viewpoint of forming a film having a denser structure, the insulating layer 9 is preferably formed by a plasma CVD method. By this method, not only a thick film with a thickness of about 200 nm but also a thin insulating film with a thickness of about 30 to 100 nm can be formed.

  For example, in the case of having a texture structure (uneven structure) on the surface of the photoelectric conversion portion 50 as in the crystalline silicon solar cell shown in FIG. The layer is preferably formed by a plasma CVD method. By using a highly dense insulating layer, it is possible to reduce damage to the transparent electrode layer during the plating process and to prevent metal deposition on the transparent electrode layer. Such a highly dense insulating film functions as a barrier layer for water, oxygen, and the like for the layer inside the photoelectric conversion unit 50 as in the silicon thin film 3 in the crystalline silicon solar cell of FIG. Therefore, the effect of improving the long-term reliability of the solar cell can be expected.

  When the insulating layer 9 is formed between the first conductive layer 71 and the second conductive layer 72, that is, when the insulating layer is formed on the first conductive layer forming region, the shape of the insulating layer 9 is It does not necessarily have to be a continuous layer shape, and may be an island shape. Note that the term “island” in this specification means a state in which a part of the surface has a non-formation region where the insulating layer 9 is not formed.

  Moreover, it is preferable that an insulating layer is also formed in the whole surface of the 1st main surface or 2nd main surface of a photoelectric conversion part.

  In the present embodiment, the insulating layer 9 can also contribute to improving the adhesion between the first conductive layer 71 and the second conductive layer 72. For example, when a Cu layer is formed by plating on the Ag layer that is the base electrode layer, the adhesion between the Ag layer and the Cu layer is small, but the Cu layer is formed on an insulating layer such as silicon oxide. Therefore, it is expected that the adhesion of the second conductive layer is enhanced and the reliability of the solar cell is improved.

As described above, when the first conductive layer has, for example, a low melting point material, an annealing process is performed after the insulating layer is formed on the first conductive layer 71 and before the second conductive layer 72 is formed. During the annealing process, the first conductive layer 71 is heated to a temperature higher than the thermal flow start temperature T _{1 of} the low melting point material, and the low melting point material becomes a fluid state, so that the surface shape of the first conductive layer changes. Along with this change, an opening 9h is formed in the insulating layer 9 formed thereon. Therefore, in the subsequent plating process, a part of the surface of the first conductive layer 71 is exposed to the plating solution and becomes conductive, so that the metal is deposited starting from this conductive portion as shown in FIG. It becomes possible.

  In this case, the opening is mainly formed on the low melting point material 711 of the first conductive layer 71. When the low melting point material is an insulating material, it is insulative immediately below the opening, but since the plating solution penetrates into the conductive high melting point material existing around the low melting point material, the first conductive layer and It is possible to conduct the plating solution.

The annealing temperature (heating temperature) Ta during the annealing treatment is preferably higher than the thermal flow start temperature T ₁ of the low melting point material, that is, T ₁ <Ta. The annealing temperature Ta preferably satisfies T ₁ + 1 ° C. ≦ Ta ≦ T ₁ + 100 ° C., and more preferably satisfies T ₁ + 5 ° C. ≦ Ta ≦ T ₁ + 60 ° C. The annealing temperature can be appropriately set according to the composition and content of the material of the first conductive layer.

Further, as described above, the annealing temperature Ta is preferably lower than the heat resistant temperature of the photoelectric conversion unit 50. The heat-resistant temperature of the photoelectric conversion unit varies depending on the configuration of the photoelectric conversion unit. For example, the heat resistant temperature in the case of having a transparent electrode layer or an amorphous silicon-based thin film, such as a heterojunction solar cell or a silicon-based thin film solar cell, is about 250 ° C. Therefore, in the case of a heterojunction solar cell in which the photoelectric conversion portion includes an amorphous silicon thin film or a silicon thin film solar cell, the annealing temperature is 250 from the viewpoint of suppressing thermal damage at the amorphous silicon thin film and its interface. It is preferable that the temperature is set to be equal to or lower. In order to realize a higher performance solar cell, the annealing temperature is more preferably 200 ° C. or less, and further preferably 180 ° C. or less. Accordingly, the heat flow start temperature T ₁ of the low melting point material of the first conductive layer 71 is preferably less than 250 ° C., more preferably less than 200 ° C., and even more preferably less than 180 ° C.

  On the other hand, the crystalline silicon solar cell having the reverse conductivity type diffusion layer on the first main surface of the one conductivity type crystal silicon substrate does not have an amorphous silicon thin film or a transparent electrode layer. It is about -900 degreeC. Therefore, the annealing process may be performed at an annealing temperature Ta higher than 250 ° C.

  Note that the method for forming the opening in the insulating layer is not limited to the method in which the annealing treatment is performed after the insulating layer is formed as described above. For example, the opening 9h can be formed simultaneously with the formation of the insulating layer 9, as indicated by the broken-line arrows from FIG. 5B to FIG. 5D.

  For example, the opening is formed substantially simultaneously with the formation of the insulating layer by forming the insulating layer while heating the substrate. Here, “substantially simultaneously with the formation of the insulating layer” means that a separate process such as annealing is not performed in addition to the insulating layer forming process, that is, during or immediately after the formation of the insulating layer. Means the state. The term “immediately after film formation” includes the period from the end of film formation of the insulating layer (after the stop of heating) to the time when the substrate is cooled and returned to room temperature. In addition, when an opening is formed in the insulating layer on the low-melting-point material, even after the insulating layer on the low-melting-point material has been formed, the insulating layer is formed around the periphery. Thus, the case where the insulating layer around the low melting point material is deformed and an opening is formed is included.

  As a method of forming the opening substantially simultaneously with the formation of the insulating layer, for example, in the insulating layer forming step, the substrate is heated to a temperature Tb higher than the thermal flow start temperature T1 of the low melting point material 711 of the first conductive layer 71. However, a method of forming the insulating layer 9 on the first conductive layer 71 is used. Since the insulating layer 9 is formed on the first conductive layer in which the low melting point material is in a fluid state, stress is generated at the film forming interface at the same time as the film formation, for example, a crack-shaped opening is formed in the insulating layer. The

  The substrate temperature Tb at the time of forming the insulating layer (hereinafter referred to as “insulating layer forming temperature”) represents the substrate surface temperature (also referred to as “substrate heating temperature”) at the time of starting the formation of the insulating layer. In general, the average value of the substrate surface temperature during the formation of the insulating layer is usually equal to or higher than the substrate surface temperature at the start of film formation. Therefore, if the insulating layer forming temperature Tb is higher than the heat flow starting temperature T1 of the low melting point material, deformation of the opening or the like can be formed in the insulating layer.

  For example, when the insulating layer 9 is formed by a dry method such as a CVD method or a sputtering method, the substrate surface temperature in the insulating layer formation is set higher than the thermal flow start temperature T1 of the low melting point material, thereby opening the opening. The part can be formed. When the insulating layer 9 is formed by a wet method such as coating, the opening is formed by setting the substrate surface temperature when drying the solvent to be higher than the thermal flow start temperature T1 of the low melting point material. be able to. Note that the “film formation start point” when the insulating layer is formed by a wet method refers to the time point when the solvent starts drying. The preferable range of the insulating layer formation temperature Tb is the same as the preferable range of the annealing temperature Ta.

  The substrate surface temperature can be measured, for example, by attaching a temperature display material (also called a thermo label or a thermo seal) or a thermocouple to the substrate surface. In addition, the temperature of the heating unit (such as a heater) can be appropriately adjusted so that the surface temperature of the substrate falls within a predetermined range. When annealing treatment is performed in the insulating layer forming step, the material and composition of the insulating layer, and the film forming conditions (film forming method, substrate temperature, type and amount of introduced gas, film forming pressure, power density, etc.) are adjusted as appropriate. Thus, an opening can be formed in the insulating layer.

  When the insulating layer 9 is formed by the plasma CVD method, from the viewpoint of forming a dense film, the insulating layer forming temperature Tb is preferably 130 ° C. or higher, more preferably 140 ° C. or higher, and further preferably 150 ° C. or higher. Moreover, it is preferable that the highest temperature reached on the substrate surface during the formation of the insulating layer is lower than the heat-resistant temperature of the photoelectric conversion part.

The film deposition rate by plasma CVD is preferably 1 nm / second or less, more preferably 0.5 nm / second or less, and further preferably 0.25 nm / second or less from the viewpoint of forming a denser film. As film forming conditions when silicon oxide is formed by plasma CVD, a substrate temperature of 145 ° C. to 250 ° C., a pressure of 30 Pa to 300 Pa, and a power density of 0.01 W / cm ^{2 to} 0.16 W / cm ² are preferable.

  After the opening is formed substantially simultaneously with the formation of the insulating layer, when there is a portion where the opening is not sufficiently formed, the above-described annealing step may be further performed.

  In addition, the method for forming the opening in the insulating layer is not limited to the above. As described above, the surface uneven structure of the first conductive layer is formed on the first main surface of the photoelectric conversion unit, and the first conversion of the photoelectric conversion unit is performed. A relatively thin insulating layer is formed on one main surface of the photoelectric conversion part on the first conductive layer formation region and the first conductive layer non-formation region, using a larger surface uneven structure in the conductive layer non-formation region. In this case, the opening can be easily formed in the insulating layer on the first conductive layer simultaneously with the formation of the insulating layer.

  As described above, in the first embodiment, the insulating layer is formed on the first conductive layer non-formation region. However, in the present invention, the insulating layer is also formed on the first conductive layer 71. Is preferably formed. At this time, in the collector electrode 7 of the present invention, the opening is formed in the insulating layer on the first conductive layer, whereby the first conductive layer and the second conductive layer are conducted through the opening 9h of the insulating layer. .

(Second conductive layer)
As described above, after the insulating layer 9 having the opening 9h is formed, the second conductive layer 72 is formed on the insulating layer 9 in the first conductive layer forming region by plating. The second conductive layer 72 is the same as in the first embodiment. Since the second conductive layer is formed in the same manner as in the first embodiment, the description is omitted to avoid duplication. At this time, the metal deposited as the second conductive layer is not particularly limited as long as it is a material that can be formed by a plating method. For example, copper, nickel, tin, aluminum, chromium, silver, gold, zinc, lead, palladium, etc. Alternatively, a mixture of these can be used.

  During operation of the solar cell (power generation), current flows mainly through the second conductive layer. Therefore, from the viewpoint of suppressing resistance loss in the second conductive layer, it is preferable that the line resistance of the second conductive layer is as small as possible. Specifically, the line resistance of the second conductive layer is preferably 1 Ω / cm or less, and more preferably 0.5 Ω / cm or less. On the other hand, the line resistance of the first conductive layer only needs to be small enough to function as a base layer during electrolytic plating, and may be, for example, 5 Ω / cm or less.

  The second conductive layer can be formed by either an electroless plating method or an electrolytic plating method, but the electrolytic plating method is preferably used from the viewpoint of productivity. In the electroplating method, since the metal deposition rate can be increased, the second conductive layer can be formed in a short time.

  Taking the acidic copper plating as an example, a method of forming the second conductive layer by the electrolytic plating method will be described. Here, a case where an insulating layer having an opening is formed over the first conductive layer will be described. FIG. 10 is a conceptual diagram of the plating apparatus 10 used for forming the second conductive layer. A substrate 12 on which an insulating layer having a first conductive layer and an opening is formed on a photoelectric conversion portion, and an anode 13 are immersed in a plating solution 16 in the plating tank 11. The first conductive layer 71 on the substrate 12 is connected to the power source 15 via the substrate holder 14. By applying a voltage between the anode 13 and the substrate 12, copper is selectively formed on the first conductive layer not covered with the insulating layer 9, that is, with an opening formed in the insulating layer by annealing treatment as a starting point. Can be deposited.

The plating solution 16 used for acidic copper plating contains copper ions. For example, a known composition mainly composed of copper sulfate, sulfuric acid, and water can be used, and a metal that is the second conductive layer is deposited by applying a current of 0.1 to 10 A / dm ² thereto. be able to. An appropriate plating time is appropriately set according to the area of the collecting electrode, current density, cathode current efficiency, set film thickness, and the like.

  The second conductive layer may be composed of a plurality of layers. For example, after a first plating layer made of a material having high conductivity such as Cu is formed on the first conductive layer through the opening of the insulating layer, the second plating layer having excellent chemical stability is formed on the first plating layer. By forming on the surface of one plating layer, a collector electrode having low resistance and excellent chemical stability can be formed.

  In the plating step in which the second conductive layer is formed, it is preferable to remove deposits generated by laser irradiation as described above.

  It is preferable to provide a plating solution removing step after the plating step to remove the plating solution remaining on the surface of the substrate 12. By providing the plating solution removing step, it is possible to remove the metal that can be deposited starting from the opening 9h other than the opening 9h of the insulating layer 9 formed by annealing. Examples of the metal that is deposited starting from other than the opening 9h include those starting from a pinhole of the insulating layer 9 or the like. By removing such a metal by the plating solution removing step, the light-shielding loss is reduced, and the solar cell characteristics can be further improved.

  In general, a transparent electrode layer such as ITO or an insulating layer such as silicon oxide is hydrophilic, and a contact angle with water on the surface of the substrate 12 or the surface of the insulating layer 9 is about 10 ° or less. There are many cases. On the other hand, from the viewpoint of facilitating removal of the plating solution by air blow or the like, the contact angle with the water on the surface of the substrate 12 is preferably set to 20 ° or more. In order to increase the contact angle of the substrate surface, the surface of the substrate 12 may be subjected to water repellent treatment. The water repellent treatment is performed, for example, by forming a water repellent layer on the surface. By the water repellent treatment, the wettability of the substrate surface to the plating solution can be reduced.

  Instead of the water repellent treatment on the surface of the insulating layer 9, an insulating layer 9 having water repellency may be formed. That is, by forming the insulating layer 9 having a large contact angle θ with water (for example, 20 ° or more), a separate water-repellent treatment step can be omitted, so that the productivity of the solar cell can be further improved. As a method for imparting water repellency to the insulating layer, for example, the insulating layer is formed by a plasma CVD method in which the film forming conditions of the insulating layer (for example, the flow rate ratio of silicon source gas and oxygen source gas introduced into the film forming chamber) are changed And a method of forming a silicon oxide layer as the above.

  In the present invention, the insulating layer removing step may be performed after the collector electrode is formed (after the plating step). In particular, when a material having a large light absorption is used as the insulating layer, it is preferable to perform an insulating layer removing step in order to suppress a decrease in solar cell characteristics due to the light absorption of the insulating layer. The method for removing the insulating layer is appropriately selected according to the characteristics of the insulating layer material. For example, the insulating layer can be removed by chemical etching or mechanical polishing. An ashing method can also be applied depending on the material. At this time, from the viewpoint of further improving the light capturing effect, it is more preferable that all of the insulating layer on the first conductive layer non-forming region is removed. When the water repellent layer 91 is formed on the insulating layer 9, it is preferable that the water repellent layer 91 is also removed together with the insulating layer 9. Note that in the case where a material with low light absorption is used for the insulating layer, the insulating layer removing step does not need to be performed.

  As described above, the case where the collector electrode 7 is provided on the light incident side of the heterojunction solar cell has been mainly described, but a similar collector electrode may be formed on the back surface side. In addition, in this invention, when forming a 2nd transparent electrode layer and a back surface metal electrode as an electrode layer on a 2nd main surface, a back surface metal electrode can be formed in the whole surface on a 2nd main surface. In this case, when removing the deposit adhering to the insulating region, if the back metal electrode is used as a mask, the transparent electrode layer (second transparent electrode layer) on the back surface can be protected, and only the deposit is selectively selected. It is thought that it can be removed.

  Since a solar cell using a crystalline silicon substrate, such as a heterojunction solar cell, has a large amount of current, in general, power generation loss due to loss of contact resistance between the transparent electrode layer / collector electrode tends to be significant. On the other hand, in the present invention, since the collector electrode having the first conductive layer and the second conductive layer has a low contact resistance with the transparent electrode layer, it is possible to reduce power generation loss due to the contact resistance. .

  The solar cell of the present invention is preferably modularized for practical use. The modularization of the solar cell is performed by an appropriate method. For example, a bus bar is connected to the collector electrode via an interconnector such as a tab wire, so that a plurality of solar cells are connected in series or in parallel and sealed with a sealant and a glass plate to form a module. Is done.

  In particular, when an insulating layer is formed on the surface of the substrate, a short circuit during modularization is suppressed, so that productivity in the modularization process is excellent. That is, when an insulating region having a groove structure is formed on the light incident surface side as shown in FIG. 11A, if the insulating layer 9 is not formed on the side surface end side of the photoelectric conversion portion from the groove, FIG. As indicated by arrows in (A), the current flow is schematically shown, and when modularization is performed, there is a possibility that the front and back electrodes of the solar cell are short-circuited by the tab wire 20. On the other hand, as shown in FIG. 11B (same as FIG. 6-2), an insulating layer is also formed on the side edge portion side of the photoelectric conversion portion as in the present invention, so that the tab wire and the back surface are formed. It is considered that contact with the side electrode can be further suppressed. Thereby, it becomes possible to prevent the occurrence of leakage current after modularization.

  In this case, from the viewpoint that the contact between the tab wire and the back electrode can be further suppressed, in the region short-circuited with the back electrode on the first main surface side surface of the photoelectric conversion portion, the abbreviation of the region where the tab wire and the region can abut. An insulating layer is preferably formed on the entire surface. In particular, when the surface of the photoelectric conversion part has a concavo-convex structure such as a heterojunction solar cell, it is considered that the leakage current that can be generated by the convex part can be further suppressed. In the present invention, “substantially the entire surface of the first conductive layer non-formation region on the one main surface side surface” means 90% or more of the region other than the insulating region on the one main surface side surface. Among them, it is preferable that 95% or more is covered, and it is more preferable that the entire surface, that is, 100% is covered.

  The present invention also relates to a crystalline silicon solar cell other than a heterojunction solar cell, a solar cell using a semiconductor substrate other than silicon such as GaAs, a pin junction or a pn junction of an amorphous silicon thin film or a crystalline silicon thin film. Various types of organic thin film solar cells such as silicon-based thin film solar cells having a transparent electrode layer formed thereon, compound semiconductor solar cells such as CIS and CIGS, dye-sensitized solar cells and organic thin films (conductive polymers) Applicable to solar cells.

The crystalline silicon solar cell has a reverse conductivity type (for example, n-type) diffusion layer on the first main surface of one conductivity type (for example, p-type) crystal silicon substrate, and the collector electrode on the diffusion layer. Is mentioned. Such a crystalline silicon solar cell is generally provided with a conductive layer such as a p ⁺ layer on the back side of one conductive layer. Thus, when the photoelectric conversion part does not include an amorphous silicon layer or a transparent electrode layer, the thermal flow start temperature T ₁ and the annealing temperature Ta of the low melting point material may be higher than 250 ° C.

Examples of the silicon thin film solar cell include an amorphous silicon thin film solar cell having an amorphous intrinsic (i type) silicon thin film between a p type thin film and an n type thin film, and a p type thin film and an n type thin film. Examples thereof include a crystalline silicon-based semiconductor solar cell having a crystalline intrinsic silicon thin film between the thin film. A tandem thin film solar cell in which a plurality of pin junctions are stacked is also suitable. In such a silicon-based thin film solar cell, in consideration of the heat resistance of the transparent electrode layer and the amorphous silicon-based thin film, the heat flow starting temperature T ₁ and the annealing temperature Ta of the low melting point material may be 250 ° C. or less. Preferably, it is 200 degrees C or less, More preferably, it is 180 degrees C or less.

  The solar cell of the present invention is preferably modularized for practical use. The modularization of the solar cell is performed by an appropriate method. For example, a bus bar is connected to a collector electrode via an interconnector such as a tab, so that a plurality of solar cells are connected in series or in parallel, and sealed with a sealant and a glass plate to be modularized. Done.

  Hereinafter, the present invention will be specifically described with reference to the examples of the heterojunction solar cell shown in FIG. 2, but the present invention is not limited to the following examples.

Example 1
The heterojunction solar cell of Example 1 was manufactured as follows.

  As a single conductivity type single crystal silicon substrate, an n-type single crystal silicon substrate having an incident plane of (100) and a thickness of 200 μm was used, and this silicon substrate was immersed in a 2% by weight HF aqueous solution for 3 minutes. After the silicon oxide film was removed, rinsing with ultrapure water was performed twice. This silicon substrate was immersed in a 5/15 wt% KOH / isopropyl alcohol aqueous solution maintained at 70 ° C. for 15 minutes, and the texture was formed by etching the surface of the substrate. Thereafter, rinsing with ultrapure water was performed twice. When the surface of the substrate was observed with an atomic force microscope (manufactured by AFM Pacific Nanotechnology), the surface of the substrate was most etched and a pyramidal texture with an exposed (111) plane was formed. It was.

The etched substrate was introduced into a CVD apparatus, and an i-type amorphous silicon film having a thickness of 5 nm was formed on the light incident side as an intrinsic silicon-based thin film 2a. The film forming conditions for the i-type amorphous silicon were: substrate temperature: 150 ° C., pressure: 120 Pa, SiH ₄ / H ₂ flow rate ratio: 3/10, and input power density: 0.011 W / cm ² . In addition, the film thickness of the thin film in a present Example measures the film thickness of the thin film formed on the glass substrate on the same conditions by the spectroscopic ellipsometry (brand name M2000, JA Woollam Co., Ltd. product). It is a value calculated from the film forming speed obtained by this.

On the i-type amorphous silicon layer 2a, a p-type amorphous silicon film having a thickness of 7 nm was formed as the reverse conductivity type silicon-based thin film 3a. The film forming conditions for the p-type amorphous silicon layer 3a were as follows: the substrate temperature was 150 ° C., the pressure was 60 Pa, the SiH ₄ / B ₂ H ₆ flow rate ratio was 1/3, and the input power density was 0.01 W / cm ² . . The B ₂ H ₆ gas flow rate mentioned above is the flow rate of the diluted gas diluted with H ₂ to a B ₂ H ₆ concentration of 5000 ppm.

Next, an i-type amorphous silicon layer having a thickness of 6 nm was formed as an intrinsic silicon-based thin film 2b on the back side of the substrate. The film formation conditions for the i-type amorphous silicon layer 2b were the same as those for the i-type amorphous silicon layer 2a. On the i-type amorphous silicon layer 2b, an n-type amorphous silicon layer having a thickness of 4 nm was formed as a one-conductivity-type silicon-based thin film 3b. The film forming conditions of the n-type amorphous silicon layer 3b were: substrate temperature: 150 ° C., pressure: 60 Pa, SiH ₄ / PH ₃ flow rate ratio: 1/2, input power density: 0.01 W / cm ² . The PH ₃ gas flow rate mentioned above is the flow rate of the diluted gas diluted with H ₂ to a PH ₃ concentration of 5000 ppm.

On this, as transparent electrode layers 6a and 6b, indium tin oxide (ITO, refractive index: 1.9) was formed to a thickness of 100 nm. Indium oxide was used as a target, and a transparent electrode layer was formed by applying a power density of 0.5 W / cm ² in an argon atmosphere at a substrate temperature of room temperature and a pressure of 0.2 Pa. When forming the transparent electrode layer, a mask was not used, and both of the transparent electrode layers 6a and 6b went around to the surface opposite to the film forming surface. On the back surface side transparent electrode layer 6b, silver was formed as a back surface metal electrode 8 with a film thickness of 500 nm by sputtering. Even when the back metal electrode 8 was formed, a mask was not used, and the mask wraps around the light incident surface. On the light incident side transparent electrode layer 6a, the collector electrode 7 having the first conductive layer 71 and the second conductive layer 72 was formed as follows.

For the formation of the first conductive layer 71, SnBi metal powder (particle size D _L = 25 to 35 μm, melting point T ₁ = 141 ° C.) as a low melting point material and silver powder (particle size D _H = 2 to 3 μm, melting point T ₂ = 971 ° C.) at a weight ratio of 20:80, and a printing paste containing an epoxy resin as a binder resin was used. The printed paste was screen printed using a # 230 mesh (opening width: l = 85 μm) screen plate having an opening width (L = 80 μm) corresponding to the collector electrode pattern, and dried at 90 ° C. .

  The substrate on which the first conductive layer 71 is formed is put into a CVD apparatus, and a silicon oxide layer (refractive index: 1.5) is formed as an insulating layer 9 on the entire light incident surface side with a thickness of 80 nm by plasma CVD. It was done. At this time, an insulating layer was also formed on the first conductive layer.

The film formation conditions of the insulating layer 9 were: substrate temperature: 135 ° C., pressure 133 Pa, SiH ₄ / CO ₂ flow rate ratio: 1/20, input power density: 0.05 W / cm ² (frequency 13.56 MHz). The refractive index (n) and extinction coefficient (k) of the insulating layer formed on the light incident surface side under these conditions were as shown in FIG.

  Thereafter, the silicon wafer on the outer periphery of the cell was removed with a width of 0.5 mm by a laser processing machine, and the heterojunction solar cell of the present invention was fabricated. At this time, a groove was formed by irradiating laser light from the surface side to a position 0.5 mm from the edge of the wafer, and the wafer was broken starting from this groove. By this process, an insulating region was formed at the edge of the wafer. Thereafter, the substrate after the formation of the insulating layer was introduced into a hot-air circulating oven, and an annealing process was performed at 180 ° C. for 20 minutes in an air atmosphere.

The substrate after the annealing step was put into the plating tank 11 as shown in FIG. In the plating solution 16, copper sulfate pentahydrate, sulfuric acid, and sodium chloride were added to a solution prepared so as to have a concentration of 120 g / l, 150 g / l, and 70 mg / l, respectively. (Product: ESY-2B, ESY-H, ESY-1A) added were used. Using this plating solution, plating is performed under conditions of a temperature of 40 ° C. and a current of 3 A / dm ² , and copper is uniformly formed as the second conductive layer 72 with a thickness of about 10 μm on the insulating layer on the first conductive layer 71. Precipitated in Almost no copper was deposited in the region where the first conductive layer was not formed. In addition, before applying an electric current, the board | substrate after an annealing process was left still in the plating solution. At this time, the insulating region was exposed to the plating solution, and the deposits attached to the insulating region were removed.

(Comparative Example 1)
A heterojunction solar cell was fabricated in the same manner as in Example 1 except that the insulating layer and the second conductive layer were not formed, and that the insulating treatment was performed after the first conductive layer was formed. In Comparative Example 1, the deposit adhered to the insulating region was not removed.

(Reference Example 1)
The insulating region is covered with an insulating tape so that the insulating region is not exposed to the plating solution in the plating process, and the deposit attached to the insulating region is not removed. Thus, a heterojunction solar cell was produced.

  Production conditions and appearance observation results of the heterojunction solar cells of the above examples, comparative examples, and reference examples, solar cell characteristics (open voltage (Voc), short circuit current (Isc), fill factor (FF), and maximum output (Pmax) And the dark current value measurement result when measured by -2V is shown in Table 1. In addition, about the solar cell characteristic and the dark current measurement result, the ratio when the evaluation result in Example 1 was set to 1 was shown. .

  A comparison between Example 1 and Comparative Example 1 shows that high FF is obtained in Example 1. In Example 1 and Comparative Example 1, the presence or absence of deposits generated by laser irradiation in the second conductive layer or the insulating region is different, resulting in a difference in leakage current and resistance loss in the collector electrode, resulting in a difference in FF. Is considered to have occurred. The influence of resistance loss can be estimated from the comparison between Comparative Example 1 and Reference Example 1, and the influence of leakage current can be estimated in Example 1 and Comparative Example 1.

  From these results, it can be seen that the solar cell shown in Example 1 according to the present invention can obtain higher conversion efficiency than the conventional solar cell.

  As described above with reference to the examples, according to the present invention, the collector electrode of the solar cell can be produced without performing the patterning of the insulating layer, so that a high-power solar cell is provided at a low cost. It becomes possible to do.

1. 1. One conductivity type single crystal silicon substrate 2. Intrinsic silicon-based thin film 5. Conductive silicon thin film Transparent electrode layer 6aN. 6. First main surface side layer removal region Collector electrode 71. First conductive layer 711. Low melting point material 72. Second conductive layer 8. Back metal electrode 9. Insulating layer 9h. Opening 50. Photoelectric conversion unit 100. Solar cell 101. Heterojunction solar cell 10. Plating apparatus 11. Plating tank 12. Substrate 13. Anode 14. Substrate holder 15. Power supply 16. Plating solution 18. Electrode layer 20. Tab line

Claims (16)

A first main surface side layer including a reverse conductivity type semiconductor region and a transparent electrode layer in this order on the first main surface of the one conductivity type semiconductor region; and an electrode layer on the second main surface of the one conductivity type semiconductor region. A solar cell manufacturing method comprising: a photoelectric conversion unit having a first electrode; and a collector electrode having a first conductive layer and a second conductive layer in order from the photoelectric conversion unit side on the first main surface of the photoelectric conversion unit,
The first conductive layer forming step in which the first conductive layer is formed on the first main surface of the photoelectric conversion portion and the plating step in which the second conductive layer is formed on the first conductive layer by plating method in this order. Have
Before the plating step, an insulating layer forming step of forming an insulating layer on the first conductive layer non-forming region on the first main surface of the photoelectric conversion part,
Furthermore, it has an insulating treatment step of forming an insulating region in which an electrical short circuit between the transparent electrode layer on the first main surface side of the photoelectric conversion portion and the electrode layer on the second main surface is removed,
In the insulating treatment step, laser irradiation is performed so as to remove at least one of the first main surface side layer and the electrode layer and to remove at least a part of the one-conductivity-type semiconductor region. A laser irradiation process,
In the insulating treatment step, the insulating region is formed by removing the one conductivity type semiconductor region and the first main surface side layer,
The method for manufacturing a solar cell, wherein at least a part of the deposit formed in the insulating region by the laser irradiation is removed in the plating step after the insulating treatment step.   The method for manufacturing a solar cell according to claim 1, wherein the electrode layer has at least one of a second transparent electrode layer and a metal electrode layer.   The method for manufacturing a solar cell according to claim 1, wherein the electrode layer has the second transparent electrode layer and the metal electrode layer in this order in order from the one conductivity type semiconductor region side.   4. The solar cell according to claim 1, wherein in the insulating region, the deposit connects at least one of the transparent electrode layer or the electrode layer and the one-conductivity-type semiconductor region. Manufacturing method.   5. The laser irradiation according to claim 1, wherein in the laser irradiation step, laser irradiation is performed so as to penetrate through the first main surface side layer and to remove at least a part of the one-conductivity-type semiconductor region. A method for producing a solar cell according to claim 1.   The said deposit is a manufacturing method of the solar cell in any one of Claims 1-5 containing the transparent electrode layer deposit formed by irradiating the transparent electrode layer in said 1st main surface side layer with a laser.   The method for manufacturing a solar cell according to claim 1, wherein the one-conductivity-type semiconductor region is a one-conductivity-type single crystal silicon substrate.   The manufacturing method of the solar cell in any one of Claims 1-7 whose said reverse conductivity type semiconductor layer is a reverse conductivity type silicon-type thin film. After the first conductive layer forming step, before the plating step, the insulating layer forming step,
In the insulating layer forming step, the insulating layer is formed so as to cover the first conductive layer,
After forming the insulating layer and before the plating step, the step of forming an opening in the insulating layer on the first conductive layer,
The method for manufacturing a solar cell according to claim 1, wherein in the plating step, the first conductive layer and the second conductive layer are conducted through the opening of the insulating layer. The first conductive layer includes a low-melting-point material having a heat flow start temperature T1 lower than a heat resistant temperature of the photoelectric conversion unit,
10. The solar cell according to claim 9, wherein after the insulating layer forming step, an opening is formed in the insulating layer by heating at a substrate temperature Ta higher than a thermal flow start temperature T <b> 1 of the low melting point material. Manufacturing method. The first conductive layer includes a low-melting-point material having a heat flow start temperature T1 lower than a heat resistant temperature of the photoelectric conversion unit,
After the first conductive layer forming step, before the plating step, the insulating layer forming step,
In the insulating layer forming step, the insulating layer is formed so as to cover the first conductive layer, and the insulating layer is heated while being heated at a substrate temperature Tb higher than a thermal flow start temperature T1 of the low melting point material. To form an opening in the insulating layer,
The method for manufacturing a solar cell according to claim 9, wherein in the plating step, the first conductive layer and the second conductive layer are conducted through the opening of the insulating layer.   The photoelectric conversion unit has a silicon-based thin film and a transparent electrode layer in this order on one main surface of the one-conductivity-type crystalline silicon substrate, and the collector electrode is formed on the transparent electrode layer. The manufacturing method of the solar cell of any one of -11. A photoelectric conversion part having one conductivity type semiconductor region, and a solar cell having a collector electrode on the first main surface of the photoelectric conversion part,
The one conductivity type semiconductor region has a first main surface side layer including a reverse conductivity type semiconductor region and a transparent electrode layer in this order on the first main surface, and an electrode layer on the second main surface. ,
The collector electrode includes a first conductive layer and a second conductive layer in order from the photoelectric conversion unit side, and an insulating layer in which an opening is formed between the first conductive layer and the second conductive layer Including
The first conductive layer is covered with the insulating layer;
A portion of the second conductive layer is conducted to the first conductive layer through the opening of the insulating layer;
The photoelectric conversion unit has an insulating region in which an electrical short circuit between the transparent electrode layer and the electrode layer is removed on the first main surface, the second main surface, or the side surface,
The solar cell, wherein the insulating region is formed so as to expose the one-conductivity-type semiconductor region and the first main surface side layer, and has a laser mark in at least a part of the insulating region.   The solar cell according to claim 13, wherein the insulating region has a laser mark that reaches a second main surface of the photoelectric conversion region from a first main surface of the photoelectric conversion region.   The solar cell according to claim 13 or 14, wherein the insulating layer is also formed on a first conductive layer non-formation region on a surface of the first main surface side of the photoelectric conversion unit. The solar cell according to any one of claims 13 to 15, wherein the insulating layer is not attached to the insulating region.