JP2014072340A - Laminated wiring board, and packaging structure employing the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a laminated wiring board responding to a requirement of improving electrical reliability.SOLUTION: A laminated wiring board comprises: a laminate 8 which is formed by laminating a plurality of resin layers 6 and a plurality of inorganic insulation layers 7 while disposing resin layers 6 in a top layer and a bottom layer; a first wiring layer 9A which is disposed on a top face or a bottom face of the resin layer 6 in the top layer; and a second wiring layer 6B which is disposed on a top face or a bottom face of the resin layer 6 in the bottom layer. The first wiring layer 9A includes: a first pad 9x for external connection which is disposed on the top face of the resin layer 6 or disposed on the bottom face of the resin layer 6 so as to close a through hole and of which the top face is exposed, and the second wiring layer 9B includes: a second pad 9y for external connection which is disposed on the bottom face of the resin layer 6 or disposed on the top face of the resin layer 6 so as to close a through hole and of which the bottom face is exposed. As a result, electrical reliability of the laminated wiring board 3 can be improved.

Description

  The present invention relates to a laminated wiring board used for electronic devices (for example, various audiovisual devices, home appliances, communication devices, computer devices and peripheral devices thereof), and a mounting structure using the same.

  2. Description of the Related Art Conventionally, a mounting structure in which electronic components are mounted on an upper surface of a multilayer wiring board is used for electronic devices. This laminated wiring board includes a laminated body in which insulating layers are laminated, and a wiring layer disposed between the insulating layers of the laminated body.

  In Patent Document 1, a laminated body in which a plurality of insulating substrates mainly composed of a resin material are stacked, and each of the insulating substrates are partially disposed on one main surface, and separated in the thickness direction via the insulating substrates. A circuit-forming board provided with a plurality of circuits arranged as described above is described as an example of a laminated wiring board. The laminated body and the circuit of the circuit forming substrate correspond to the laminated body and the wiring layer of the laminated wiring substrate, respectively.

  By the way, in general, since the thermal expansion coefficient of the resin material is larger than the thermal expansion coefficient of the electronic component, the thermal expansion coefficient of the circuit forming substrate including the laminate mainly composed of the resin material is the thermal expansion coefficient of the electronic component. Will be greater than the rate. As a result, for example, when heat is applied to the circuit forming board during mounting of the electronic component or during operation of the electronic component, the circuit forming board is caused by the difference between the thermal expansion amount of the circuit forming substrate and the thermal expansion amount of the electronic component. Easy to warp. For this reason, there is a problem that the circuit of the circuit forming substrate is easily disconnected, and the electrical reliability of the circuit forming substrate is likely to be lowered.

Japanese Patent Laid-Open No. 08-116174

  SUMMARY OF THE INVENTION An object of the present invention is to provide a multilayer wiring board capable of improving the electrical reliability in response to the problem that the electrical reliability is likely to be lowered in the multilayer wiring board such as the circuit forming board described above. It is what.

  A laminated wiring board according to an aspect of the present invention includes a laminate in which a plurality of resin layers and a plurality of inorganic insulating layers are laminated with the resin layers arranged on the uppermost layer and the lowermost layer, and the uppermost resin layer. A first wiring layer disposed on an upper surface or a lower surface of the resin layer and a second wiring layer disposed on an upper surface or a lower surface of the lowermost resin layer, and the first wiring layer is disposed on an upper surface of the resin layer. A first pad for external connection that is disposed or is disposed so as to close the through hole on the lower surface of the resin layer and the upper surface is exposed; and the second wiring layer is disposed on the lower surface of the resin layer. Alternatively, a second pad for external connection is disposed on the upper surface of the resin layer so as to close the through hole and the lower surface is exposed.

  A mounting structure according to an aspect of the present invention includes the multilayer wiring board and an electronic component that is mounted on an upper surface of the multilayer wiring board and electrically connected to the first pad.

According to the multilayer wiring board concerning one form of the present invention, since the layered product contains a plurality of inorganic insulating layers, the curvature of the multilayer wiring board can be reduced. Furthermore, since the resin layers are arranged in the uppermost layer and the lowermost layer of the multilayer body, the occurrence of cracks in the multilayer wiring board can be reduced. Therefore, it is possible to obtain a multilayer wiring board having excellent electrical reliability.

It is sectional drawing which cut | disconnected a part of mounting structure concerning one Embodiment of this invention in the thickness direction. It is an enlarged view of R1 part of the mounting structure shown in FIG. FIG. 3 is an enlarged view of a portion R2 of the mounting structure shown in FIG. It is the figure which showed the upper surface of the laminated wiring board in the mounting structure shown in FIG. It is sectional drawing cut | disconnected in the plane direction along the II line | wire of FIG. (A)-(b) is sectional drawing cut | disconnected in the thickness direction explaining the manufacturing process of the mounting structure shown in FIG. 1, (b) is the one part enlarged view of (a). (A)-(c) is sectional drawing cut | disconnected in the thickness direction explaining the manufacturing process of the mounting structure shown in FIG. 1, (c) is a part of dried inorganic insulation sol shown in (b). FIG. (A)-(b) is sectional drawing cut | disconnected in the thickness direction explaining the manufacturing process of the mounting structure shown in FIG. 1, (b) is a partial expansion of the inorganic insulating layer shown in (a). FIG. (A)-(c) is sectional drawing cut | disconnected in the thickness direction explaining the manufacturing process of the mounting structure shown in FIG. 1, (b) is the resin precursor layer and inorganic insulating layer which were shown to (a). (C) is a partially enlarged view of the inorganic insulating layer shown in (b). (A)-(b) is sectional drawing cut | disconnected in the thickness direction explaining the manufacturing process of the mounting structure shown in FIG. 1, respectively. (A)-(c) is sectional drawing cut | disconnected in the thickness direction explaining the manufacturing process of the mounting structure shown in FIG. 1, respectively. (A)-(d) is sectional drawing cut | disconnected in the thickness direction explaining the manufacturing process of the mounting structure shown in FIG. 1, respectively. (A)-(c) is sectional drawing cut | disconnected in the thickness direction explaining the manufacturing process of the mounting structure shown in FIG. 1, respectively. It is sectional drawing which cut | disconnected the example of embodiment different from the mounting structure shown in FIG. 1 in the thickness direction.

  Hereinafter, a mounting structure including the multilayer wiring board according to the first embodiment of the present invention will be described in detail with reference to the drawings.

<First Embodiment>
(Mounting structure)
The mounting structure 1 shown in FIG. 1 is used for electronic devices such as various audiovisual devices, home appliances, communication devices, computer devices or peripheral devices thereof. The mounting structure 1 includes an electronic component 2 and a multilayer wiring board 3 on which the electronic component 2 is mounted, and is mounted on an external circuit board 4.

(Electronic parts)
The electronic component 2 is a semiconductor element such as an IC or an LSI, for example, and is flip-chip mounted on the multilayer wiring board 3 via a first bump 5A made of a conductive material such as solder. The electronic component 2 is made of a semiconductor material such as silicon, germanium, gallium arsenide, gallium arsenide phosphorus, gallium nitride, or silicon carbide.

  The thickness of the electronic component 2 is set to, for example, 0.05 mm or more and 1 mm or less. Further, the coefficient of thermal expansion in the plane direction (XY plane direction) of the electronic component 2 is set to 3 ppm / ° C. or more and 16 ppm / ° C. or less, for example. The thickness of the electronic component 2 is measured by observing a cross section along the thickness direction (Z direction) of the electronic component 2 with a scanning electron microscope (SEM), and measuring the length along the thickness direction at 10 or more locations. It is obtained by calculating an average value. Moreover, the thermal expansion coefficient of the electronic component 2 is measured by a measuring method according to JISK7197-1991 using a commercially available TMA apparatus.

(External circuit board)
The external circuit board 4 is, for example, a mother board or the like, and the mounting structure 1 is mounted on one main surface thereof via second bumps 5B made of a conductive material such as solder. The thermal expansion coefficient in the planar direction of the external circuit board 4 is set to 17 ppm / ° C. or higher and 30 ppm / ° C. or lower.

(Laminated wiring board)
The multilayer wiring board 3 is disposed between the electronic component 2 and the external circuit board 4, and supplies power and signals for driving or controlling the electronic component 2 from the external circuit board 4 to the electronic component 2. The laminated wiring board 3 is disposed so as to be separated from each other in the thickness direction through a laminated body 8 in which a plurality of resin layers 6 and a plurality of inorganic insulating layers 7 are laminated, and the resin layer 6 and the inorganic insulating layers 7. The plurality of wiring layers 9 partially disposed on one main surface of the resin layer 6 or one main surface of the inorganic insulating layer 7, and the plurality of resin layers 6 and the plurality of inorganic insulating layers 7 are penetrated in the thickness direction. And a plurality of via conductors 10 for connecting the plurality of wiring layers 9 to each other.

  The thickness of the multilayer wiring board 3 is set to 0.06 mm or more and 0.8 mm or less, for example. The coefficient of thermal expansion in the planar direction of the multilayer wiring board 3 is set to, for example, 5 ppm / ° C. or more and 17 ppm / ° C. or less. The thickness and thermal expansion coefficient of the multilayer wiring board 3 are measured in the same manner as the thickness and thermal expansion coefficient of the electronic component 2.

  In addition, the laminated wiring board 3 of this embodiment is a wiring board which does not have a core board used for a general build-up board, that is, a coreless board.

(Laminate)
The laminated body 8 is a main part of the laminated wiring board 3 and is formed by laminating a plurality of resin layers 6 and a plurality of inorganic insulating layers 7 as described above. Specifically, the laminate 8 is formed by alternately laminating a plurality of resin layers 6 and a plurality of inorganic insulating layers 7 one by one, and the resin layer 6 is disposed on the uppermost layer and the lowermost layer of the laminate 8. Has been. In the following, regarding the arrangement of the constituent elements of the multilayer wiring board 3, “upper” refers to the electronic component 2 side in the thickness direction, and “lower” refers to the external circuit board 4 side in the thickness direction.

(Resin layer)
The resin layer 6 ensures insulation between the plurality of wiring layers 9 and the plurality of via conductors 10 together with the inorganic insulating layer 7. The resin layer 6 includes a first resin part 11 and first filler particles 12 dispersed in the first resin part 11. The plurality of resin layers 6 included in the laminate 8 are arranged in the uppermost layer of the plurality of resin layers 6 and the first resin layer 6A arranged in the uppermost layer of the laminate 8; 2nd resin layer 6B arrange | positioned at the lowest layer among the resin layers 6 and arrange | positioned at the lowest layer of the laminated body 8, and the 1st resin layer 6A and 2nd resin layer in the thickness direction among the some resin layers 6 A plurality of third resin layers 6 </ b> C arranged between 6 </ b> B. As will be described later, a first through hole V1 for exposing the wiring layer 9 (second pad 9y) connected to the second bump 5B is formed in the second resin layer 6B.

  The thickness of the resin layer 6 is set to, for example, 5 μm or more and 50 μm or less. Moreover, the Young's modulus of the resin layer 6 is set to 0.2 GPa or more and 10 GPa or less, for example. The coefficient of thermal expansion in the planar direction of the resin layer 6 is set to, for example, 20 ppm / ° C. or more and 70 ppm / ° C. or less. Moreover, the content rate of the 1st resin part 11 in the resin layer 6 is set to 35 volume% or more and 90 volume% or less. Moreover, the content rate of the 1st filler particle 12 in the resin layer 6 is set to 10 volume% or more and 65 volume% or less. The thickness of the resin layer 6 is measured in the same manner as the electronic component 2. Moreover, the Young's modulus of the resin layer 6 is measured by a measuring method according to ISO 527-1: 1993 using a nanoindenter. In addition, the content ratio of the first resin portion 11 in the resin layer 6 and the content ratio of the first filler particles 12 in the resin layer 6 are determined from an image taken by SEM, an image analysis device, and the like for a cross section along the thickness direction of the resin layer 6. Each area ratio (area%) is measured using, and this measured value is obtained as a volume ratio (volume%).

(First resin part)
The first resin part 11 is a main part of the resin layer 6. This 1st resin part 11 consists of resin materials, such as an epoxy resin, a bismaleimide triazine resin, or cyanate resin, for example.

(First filler particles)
The first filler particles 12 reduce the thermal expansion coefficient of the resin layer 6 and improve the Young's modulus of the resin layer 6. The first filler particles 12 are made of, for example, an inorganic insulating material such as silicon oxide, aluminum oxide, magnesium oxide, calcium oxide, or calcium hydroxide. Moreover, in order to improve the flame retardance of the resin layer 6, the first filler particles 12 may further include particles made of an organic material containing phosphorus in addition to particles made of an inorganic insulating material.

  The particle size of the first filler particles 12 is set to, for example, 0.3 μm or more and 5 μm or less. In addition, the particle size of the 1st filler particle 12 contains 20 or more and 50 or less 1st inorganic insulating particles about the cross section along the thickness direction of the resin layer 6 using SEM or a transmission electron microscope (TEM). Thus, the enlarged cross section is observed, the maximum diameter of each particle is measured in the enlarged cross section, and the average value of the maximum diameters is calculated.

(Inorganic insulating layer)
The inorganic insulating layer 7 reduces the coefficient of thermal expansion of the laminate 8 and improves the Young's modulus of the laminate 8. This inorganic insulating layer 7 is connected to a plurality of first inorganic insulating particles 13 connected at a part of each other, and connected to a plurality of first inorganic insulating particles 13 at a part of each other, and more than the first inorganic insulating particles 13. It includes a plurality of second inorganic insulating particles 14 having a large particle size. In the inorganic insulating layer 7, a gap G is formed that is surrounded by the plurality of first inorganic insulating particles 13 and between the plurality of first inorganic insulating particles 13 and the second inorganic insulating particles 14. A part of the resin layer 6 enters G.

  Specifically, as shown in FIG. 3, the plurality of first inorganic insulating particles 13 are connected to each other at a part of each other, and the plurality of first inorganic insulating particles 13 and the second inorganic insulating particles 14 Are connected at a part of each other, and the plurality of first inorganic insulating particles 13 are arranged between the plurality of second inorganic insulating particles 14. The gap G of the inorganic insulating layer 7 includes a gap G1 surrounded by the plurality of first inorganic insulating particles 13, and a gap G2 surrounded by the plurality of first inorganic insulating particles 13 and the second inorganic insulating particles 14. A part of the first resin portion 11 included in the resin layer 6 enters each of the gap G1 and the gap G2.

In addition, the plurality of inorganic insulating layers 7 included in the stacked body 8 include a first inorganic insulating layer 7A disposed in the uppermost layer among the plurality of inorganic insulating layers 7 and a lowermost layer among the plurality of inorganic insulating layers 7. The arranged second inorganic insulating layer 7B, and the third inorganic insulating layer 7C arranged between the first inorganic insulating layer 7A and the second inorganic insulating layer 7B in the thickness direction among the plurality of inorganic insulating layers 7 It has.

  The thickness of the inorganic insulating layer 7 is set to 3 μm or more and 25 μm or less, for example. The coefficient of thermal expansion in the planar direction of the inorganic insulating layer 7 is set to, for example, 0.6 ppm / ° C. or more and 10 ppm / ° C. or less. The Young's modulus of the inorganic insulating layer 7 is set to 20 GPa or more and 50 GPa or less, for example. Further, the volume ratio (volume%) including the first inorganic insulating particles 13 and the second inorganic insulating particles 14 in the inorganic insulating layer 7 is set to, for example, 62 volume% or more and 75 volume% or less, of which The content ratio of the first inorganic insulating particles 13 in the first inorganic insulating particles 13 and the second inorganic insulating particles 14 is set to 20% by volume or more and 90% by volume or less. The first inorganic insulating particles 13 and the second inorganic insulating particles 14, the content ratio of the second inorganic insulating particles 14 is set to 10% by volume or more and 80% by volume or less. Further, in the cross-sectional view along the thickness direction, the width of the gap G of the inorganic insulating layer 7 is set to, for example, 10 nm or more and 300 nm or less.

  The thickness, thermal expansion coefficient, and Young's modulus of the inorganic insulating layer 7 are measured in the same manner as the resin layer 6. The thickness, thermal expansion coefficient, and Young's modulus of the inorganic insulating layer 7 are measured values in a state where a part of the resin layer 6 enters the gap G of the inorganic insulating layer 7. Further, in the cross-sectional view along the thickness direction, the width of the gap G of the inorganic insulating layer 7 is such that the gap along the thickness direction of the inorganic insulating layer 7 is 20 or more and 50 or less using SEM or TEM. The cross section expanded to include G is taken, and the average value of the maximum diameter of each gap G is regarded as the width of the gap G in the enlarged cross section.

(First inorganic insulating particles)
The first inorganic insulating particles 13 are made of an inorganic insulating material such as silicon oxide, aluminum oxide, magnesium oxide, or calcium oxide, for example. The particle diameter of the first inorganic insulating particles 13 is set to 3 nm to 110 nm, for example. The particle diameter of the first inorganic insulating particles 13 is measured in the same manner as the particle diameter of the first filler particles 12.

(Second inorganic insulating particles)
The second inorganic insulating particles 14 are made of the same material as the first inorganic insulating particles 13, for example. The particle diameter of the second inorganic insulating particles 14 is set to, for example, 0.5 μm or more and 5 μm or less. The second inorganic insulating particles 14 are measured in the same manner as the particle size of the first filler particles 12.

(Wiring layer)
The wiring layer 9 functions as a ground wiring, a power supply wiring, or a signal wiring, and the one-layer wiring layer 9 is one layer between the upper and lower surfaces of the stacked body 8 or the layers of the stacked body 8. Includes all of the wiring placed in The wiring layer 9 is made of, for example, a metal material such as copper, silver, gold, or aluminum, and is preferably made of copper.

  The plurality of wiring layers 9 included in the multilayer wiring substrate 3 are arranged in the first wiring layer 9A arranged in the uppermost layer among the plurality of wiring layers 9 and in the lowermost layer among the plurality of wiring layers 9. And between the first wiring layer 9A and the second wiring layer 9B in the thickness direction among the plurality of wiring layers 9, the second wiring layer 9B having a larger area in a plan view (XY plane) than the first wiring layer 9A. And a plurality of third wiring layers 9 </ b> C arranged on the substrate.

  9 A of 1st wiring layers are arrange | positioned at the upper surface of the laminated body 8, ie, the upper surface of 6 A of 1st resin, and consist of several 1st pads 9x for external connection. The upper surface of the first pad 9x is exposed on the upper surface of the multilayer wiring board 3, and is connected to the electronic component 2 via the first bump 5A.

  The second wiring layer 9B is disposed between the second inorganic insulating layer 7B and the second resin layer 6B, and includes a plurality of second pads 9y for external connection. The second resin layer 6B is formed with a first through hole V1 that penetrates in the thickness direction and exposes at least a part of the lower surface of the second pad 9y. The lower surface of the second pad 9y is formed by the second bump 5B. To the external circuit board 4 via

  The third wiring layer 9C is disposed between the first inorganic insulating layer 7A or the third inorganic insulating layer 7C and the third resin layer 6C, and the first conductive portion 9z which is an electric signal wiring and the ground wiring. Or it consists of the 2nd electroconductive part 9w which is wiring for electric power.

  In the present embodiment, the first wiring layer 9A includes only a plurality of first pads 9x, but the first wiring layer 9A is a first wiring that is an electric signal wiring in addition to the plurality of first pads 9x. The conductive portion 9z, the ground wiring, or the second conductive portion 9w that is a power wiring may be included. In addition, the second wiring layer 9B includes only the plurality of second pads 9y. However, the second wiring layer 9B includes, in addition to the plurality of second pads 9y, the first conductive portion 9z that is an electric signal wiring or a ground. The second conductive portion 9w that is a wiring for power or a wiring for power may be included.

  The thickness of the wiring layer 9 is set to, for example, 1.5 μm or more and 15 μm or less. The coefficient of thermal expansion in the plane direction of the wiring layer 9 is set to, for example, 15 ppm / ° C. or more and 18 ppm / ° C. or less. The Young's modulus of the wiring layer 9 is set to, for example, 50 GPa or more and 200 GPa or less. The thickness, Young's modulus, and thermal expansion coefficient of the wiring layer 9 are measured in the same manner as the insulating layer 6. Further, the size of the area of the wiring layer 9 in plan view is determined by polishing the upper surface and the lower surface of the multilayer wiring substrate 3 to expose the upper surface of the first wiring layer 9A and the lower surface of the second wiring layer 9B, and then the upper surface thereof. The lower surface and the lower surface are determined by measuring the respective areas from an image taken by an optical microscope or SEM using an image analyzer or the like.

(Via conductor)
The via conductor 10 is for electrically connecting a pair of wiring layers 9 arranged apart in the thickness direction. The via conductor 10 is formed through the resin layer 6 and the inorganic insulating layer 7 in the thickness direction, and is made of a conductive material such as copper, silver, gold, or aluminum. Further, in the cross-sectional view along the thickness direction, the width of the via conductor 10 decreases from the lower side toward the upper side. The via conductor 10 includes a first via conductor 10A connected to the lower surface of the first pad 9x and a second via conductor 10B connected to the upper surface of the second pad 9y.

  Here, in this embodiment, the laminated body 8 includes the inorganic insulating layer 7 including the first inorganic insulating particles 13 and the second inorganic insulating particles 14 made of an inorganic insulating material. As a result, since the inorganic insulating material has a smaller thermal expansion coefficient than that of the resin material, the thermal expansion coefficient of the multilayer body 8 can be reduced as compared with the case where the multilayer body 8 is composed only of the resin layer 6. The difference in coefficient of thermal expansion between the substrate 3 and the electronic component 2 can be reduced. Therefore, for example, when heat is applied to the multilayer wiring substrate 3 when the electronic component 2 is mounted or when the electronic component 2 is operated, the multilayer wiring substrate is caused by a difference in thermal expansion between the electronic component 2 and the multilayer wiring substrate 3. 3 can be reduced, and as a result, the electrical reliability of the multilayer wiring board 3 can be improved.

In addition, the resin layer 6 is disposed on the uppermost layer and the lowermost layer of the laminate 8. Here, for example, when heat is applied to the mounting structure 1, the electronic component 2 having a low coefficient of thermal expansion is mounted on the upper surface of the multilayer wiring board 3, and therefore, the thermal expansion of the upper region of the multilayer body 8. However, since the lower region of the laminate 8 tends to thermally expand, the stress applied to the surface of the laminate 8 tends to increase. On the other hand, in the present embodiment, since the resin layer 6 having a smaller Young's modulus and easily deformed compared to the inorganic insulating layer 7 is disposed on the surface of the laminated body 8, the uppermost layer of the laminated body 8 and Compared with the case where the inorganic insulating layer 7 is disposed in the lowermost layer, the generation of cracks on the surface of the multilayer body 8 can be reduced, and as a result, the electrical reliability of the multilayer wiring board 3 can be improved. .

  Incidentally, for example, as shown in FIGS. 4 and 5, in order to increase the density of the first pads 9x connected to the electronic component 2, the area of each first pad 9x is made larger than the area of each second pad 9y. For example, the area of the second wiring layer 9B in plan view may be larger than the area of the first wiring layer 9A in plan view. In this case, for example, when heat is applied to the multilayer wiring board 3 when the electronic component 2 is mounted, the thermal expansion amount in the region on the lower surface side (second wiring layer 9B side) of the multilayer wiring board 3 is the multilayer wiring board 3. The thermal expansion amount of the region on the upper surface side (the first wiring layer 9A side) of the laminated wiring board 3 tends to be larger, and the multilayer wiring board 3 tends to warp.

  On the other hand, in the multilayer wiring board 3 of the present embodiment, the distance from the center in the thickness direction of the multilayer body 8 to the second wiring layer 9B is greater than the distance from the center in the thickness direction of the multilayer body 8 to the first wiring layer 9A. Is also small. As a result, in the second wiring layer 9B having a large thermal expansion amount, the influence on the warp of the multilayer wiring substrate 3 is reduced, while in the first wiring layer 9A having a small thermal expansion amount, the influence on the warp of the multilayer wiring substrate 3 is obtained. Therefore, it is possible to reduce the warpage of the multilayer wiring board 3 due to heating during mounting of the electronic component 2. Therefore, the flatness of the multilayer wiring board 3 when the electronic component 2 is mounted can be improved, and as a result, the connection reliability of the electronic component 2 with the multilayer wiring board 3 can be improved.

  The distance from the center in the thickness direction of the stacked body 8 to the first wiring layer 9A is from the center of the stacked body 8 at a perpendicular line that intersects the lower surface of the first wiring layer 9A and passes through the center of the stacked body 8. The length (L1) to the lower surface of the first wiring layer 9A is indicated. The distance from the center in the thickness direction of the stacked body 8 to the second wiring layer 9B is from the center of the stacked body 8 at a perpendicular line that intersects the upper surface of the second wiring layer 9B and passes through the center of the stacked body 8. The length (L2) to the upper surface of the second wiring layer 9B is indicated.

  Further, in a cross-sectional view along the thickness direction, the width of the first via conductor 10A decreases from the lower side toward the upper side. As a result, the area of the first pad 9x disposed on the upper surface of the first via conductor 10A in a plan view can be reduced, and the plurality of first pads 9x can be disposed at a high density. 3 can be reduced in size.

  Further, in the cross-sectional view along the thickness direction, the width of the first via conductor 10A decreases from the lower side toward the upper side, and around the connection portion between the first wiring layer 9A and the first via conductor 10A. The first resin layer 6A is disposed. That is, the resin layer 6 enters the first corner C1 formed by crossing the lower surface of the first wiring layer 9A and the side surface of the first via conductor 10A at an acute angle in a cross-sectional view along the thickness direction. As a result, since the resin layer 6 has a smaller Young's modulus and is softer than the inorganic insulating layer 7 as compared with the case where the inorganic insulating layer 7 enters the first corner C1, the first via conductor 10A extends in the planar direction. It is possible to reduce the separation of the first wiring layer 9 </ b> A and the first via conductor 10 </ b> A due to the stress concentration on the first corner C <b> 1 when thermally expanded.

  In addition, as shown in FIG. 2, the content ratio of the first filler particles 12 in the first resin layer 6A increases from the upper side to the lower side. That is, the content ratio of the first filler particles 12 in the first resin layer 6A is larger on the first inorganic insulating layer 7A side than on the first wiring layer 9A side. As a result, the difference between the coefficient of thermal expansion of the first resin layer 6A and the coefficient of thermal expansion of each of the first wiring layer 9A and the first inorganic insulating layer 7A is reduced, and the first resin layer 6A and the first wiring layer 9A are different from each other. While peeling can be reduced, peeling between the first resin layer 6A and the first inorganic insulating layer 7A can be reduced.

As shown in FIG. 1, the second resin layer 6B has a first through hole V1 in which the second pad 9y disposed on the upper surface of the second resin layer 6B is exposed. As a result, when the second bump 5B is melted to connect the mounting structure 1 and the external circuit board 4, the inner wall of the first through-hole V1 formed in the second resin layer 6B is the second bump 5B. In order to suppress the flow, an electrical short circuit between the plurality of second pads 9y adjacent in the planar direction is suppressed.

  In addition, in the cross-sectional view along the thickness direction, the width of the second via conductor 10B increases from the upper side to the lower side, and around the connection portion between the second wiring layer 9B and the second via conductor 10B. The second inorganic insulating layer 7B is disposed. In other words, in the cross-sectional view along the thickness direction, the second inorganic insulating layer 7B is formed at the second corner C2 formed by the obtuse angle between the upper surface of the second wiring layer 9B and the side surface of the second via conductor 10B. Has entered. As a result, since the inorganic insulating layer 7 has a Young's modulus larger than that of the resin layer 6, when the second via conductor 10B thermally expands in the plane direction, stress tends to concentrate on the second corner C2. Since the part C2 has an obtuse angle, the stress concentration can be reduced and the separation between the second wiring layer 9B and the second via conductor 10B can be reduced as compared with the case where the second corner part C2 is an acute angle. be able to.

  In the laminate 8, the resin layers 6 are disposed on the uppermost layer and the lowermost layer of the laminate 8, and the plurality of resin layers 6 and the plurality of inorganic insulating layers 7 are alternately disposed one by one. . As a result, when heat is applied to the multilayer wiring board 3 when the electronic component 2 is mounted, the variation in the amount of thermal expansion in the plane direction of the multilayer body 8 can be reduced between the upper side and the lower side of the multilayer body 8. The warp of the body 8 can be reduced, and the warp of the multilayer wiring board 3 can be reduced. Therefore, the reliability of mounting the electronic component 2 on the laminated wiring board 3 can be improved.

  The thickness of the first resin layer 6A is smaller than the thickness of the second resin layer 6B. As a result, since the amount of thermal expansion in the thickness direction of the first resin layer 6A can be reduced, the separation between the first via conductor 10A and the first pad 9x can be reduced.

  On the other hand, in the present embodiment, since a part of the plurality of resin layers 6 included in the laminate 8 has entered the inorganic insulating layer 7 disposed on the lower surface, the thermal expansion amount of the resin layer 6. Tends to be larger on the upper side than on the lower side, and the thermal expansion amount of the laminate 8 tends to be larger on the upper side. Therefore, by forming the second resin layer 6B disposed in the lowermost layer of the multilayer body 8 thick, it is possible to balance the thermal expansion between the upper side and the lower side of the multilayer body 8, and consequently warp of the multilayer wiring board 3. Can be reduced. In this case, the thickness of the second resin layer 6B is set to, for example, 1.04 times or more and 1.2 times or less of the first resin layer 6A.

  The content ratio of the first filler particles 12 in the first resin layer 6A is larger than the content ratio of the first filler particles 12 in the second resin layer 6B. As a result, since the amount of thermal expansion in the thickness direction of the first resin layer 6A can be reduced, the separation between the first via conductor 10A and the first pad 9x can be reduced. In this case, the content ratio of the first filler particles 12 in the second resin layer 6B is, for example, 1.04 to 1.2 times the content ratio of the first filler particles 12 in the first resin layer 6A. Is set.

  Moreover, it is desirable that all the resin layers 6 do not include a base material made of glass fiber or resin fiber, for example. As a result, since the thickness for including the base material in the resin layer 6 can be reduced, the laminated wiring board 3 can be thinned.

  Moreover, it is desirable that all the resin layers 6 consist only of the first resin portion 11 and the first filler particles 12. As a result, since the thickness for including the base material in the resin layer 6 can be reduced, the laminated wiring board 3 can be thinned.

The thickness of the resin layer 6 is preferably smaller than the thickness of the inorganic insulating layer 7. As a result, the ratio of the inorganic insulating layer 7 in the multilayer body 8 is increased, the thermal expansion coefficient of the multilayer body 8 can be reduced, and the thermal expansion coefficient of the multilayer wiring board 3 can be reduced.

  The first inorganic insulating particles 13 and the second inorganic insulating particles 14 are preferably made of silicon oxide. Since silicon oxide has a lower dielectric loss tangent and dielectric constant than other inorganic insulating materials, the signal transmission characteristics of the laminated wiring board 3 can be improved.

  In the laminated wiring board 3, the thickness of the inorganic insulating layer 7 may be the same as the thickness of all other inorganic insulating layers 7. In this case, variation in the thermal expansion amount of each of the plurality of inorganic insulating layers 7 can be reduced, the thermal expansion coefficient of the entire multilayer wiring board 3 can be balanced, and the warpage of the multilayer wiring board 3 can be reduced. can do. Here, “same” means that the difference in numerical values is 3% or less. The same applies to “same” in the following description.

  Moreover, in the laminated wiring board 3, the material of the 1st resin part 11 and the 1st filler particle | grains 12 of all the resin layers 6 may be the same. In this case, since the variation in the thermal expansion coefficient of each of the plurality of resin layers 6 can be reduced, the thermal expansion coefficient of the entire multilayer wiring board 3 can be balanced and the warpage of the multilayer wiring board 3 can be reduced. can do.

(Manufacturing method of mounting structure)
Next, the manufacturing method of the mounting structure 1 mentioned above is demonstrated based on FIGS.

(Production of laminated sheet)
(1) As shown in FIGS. 6 (a) and 6 (b), a solid content 7 ′ containing the first inorganic insulating particles 13 and the second inorganic insulating particles 14 and a solvent in which the solid content 7 ′ is dispersed. 15 is prepared. The inorganic insulating sol 7x includes, for example, a solid content 7 'of 10% by volume to 50% by volume and a solvent 15 of 50% to 90% by volume. Further, the solid content 7 ′ of the inorganic insulating sol 7x includes, for example, the first inorganic insulating particles 13 by 20% by volume or more and 90% by volume or less, and the second inorganic insulating particles 14 by 10% by volume or more and 80% by volume or less.

  The first inorganic insulating particles 13 can be produced, for example, by purifying a silicate compound such as a sodium silicate aqueous solution (water glass) and chemically depositing silicon oxide.

  If the second inorganic insulating particles 14 are made of silicon oxide, for example, a silicate compound such as a sodium silicate aqueous solution (water glass) is purified, and a solution in which silicon oxide is chemically deposited is put in a flame. It can produce by spraying and heating at 800 degreeC or more and 1500 degrees C or less, reducing formation of the aggregate.

  The solvent 15 is, for example, selected from methanol, isopropanol, n-butanol, ethylene glycol, ethylene glycol monopropyl ether, methyl ethyl ketone, methyl isobutyl ketone, xylene, propylene glycol monomethyl ether, propylene glycol monomethyl ether acetate, dimethylacetamide or the like. An organic solvent containing a mixture of two or more kinds can be used.

  (2) As shown in FIG. 7A, a metal foil 16 made of a metal material such as copper is prepared, and an inorganic insulating sol 7x is applied to one main surface of the metal foil 16 in layers. The inorganic insulating sol 7x can be applied using, for example, a dispenser, a bar coater, a die coater, or screen printing.

(3) As shown in FIGS. 7B and 7C, the solvent 15 is evaporated to dry the inorganic insulating sol 7x, leaving the solid content 7 ′. The inorganic insulating sol 7x is dried by, for example, heating and air drying. The drying temperature is set to, for example, 20 ° C. or higher and lower than the boiling point of the solvent 15 (in the case where two or more solvents 15 are mixed), the drying time is set to, for example, 20 seconds or more. Set to 30 minutes or less.

  (4) As shown in FIG. 8 (a) and FIG. 8 (b), the solid content 7 ′ is heated, and the first inorganic insulating particles 13 and the first inorganic insulating particles 13 and the second inorganic insulating particles 14 The inorganic insulating layer 7 in which the layers are connected to each other is prepared.

  Here, the solid content 7 ′ in the present embodiment includes the first inorganic insulating particles 13 whose particle size is set to a very small value, for example, 3 nm to 110 nm. As a result, even if the heating temperature of the solid content 7 ′ is relatively low, for example, below the crystallization start temperature of the first inorganic insulating particles 13 and the second inorganic insulating particles 14, the first inorganic insulating particles 13 are bonded together. It can be firmly connected.

  In addition, by heating at such a low temperature, the first inorganic insulating particles 13 and the second inorganic insulating particles 14 maintain the shape of the particles, and the first inorganic insulating particles 13 and the first inorganic insulating particles 13 and the first inorganic insulating particles 13 2 The inorganic insulating particles 14 can be connected only in the proximity region. As a result, the first inorganic insulating particles 13 and the first inorganic insulating particles 13 and the second inorganic insulating particles 14 can be connected by a part of each other, and the gap G can be easily formed.

  In addition, as for heating of solid content 7 ', it is desirable that temperature is set to 100 degreeC or more and less than 300 degreeC, and time is set to 0.5 hours or more and 24 hours or less, for example.

  (5) As shown in FIGS. 9A and 9B, the resin precursor layer 6x in which the first filler particles 12 are dispersed in the uncured first resin 11x is prepared, and the inorganic insulating layer 7 is prepared. The resin precursor layer 6x is applied or laminated on the main surface opposite to the metal foil 16.

  Next, as shown in FIG. 9C, the metal foil 16, the inorganic insulating layer 7, and the resin precursor layer 6 x are heated and pressed in the vertical direction so that a part of the gap G of the inorganic insulating layer 7 is uncured. Of the first resin 11x. The metal foil 16, the inorganic insulating layer 7, and the resin precursor layer 6x are heated and pressurized at a temperature lower than the thermosetting start temperature of the resin precursor layer 6x. Specifically, the heating temperature is set to, for example, 60 ° C. or more and 160 ° C. or less, the pressure is set to, for example, 0.1 MPa or more and 2 MPa or less, and the heating and pressing time is set to, for example, 0.5 hours or more and 2 hours or less. . In addition, uncured is the state of A-stage or B-stage according to ISO472: 1999.

  As described above, the laminated sheet 17 including the metal foil 16, the inorganic insulating layer 7, and the resin precursor layer 6x is produced. In this step, since a part of the uncured first resin 11x of the resin precursor layer 6 is filled in the gap G of the inorganic insulating layer 7, some of the plurality of first filler particles 12 are inorganic. It gathers so that it may filter on one main surface of the insulating layer 7. FIG.

(Production of multilayer wiring board)
(6) As shown in FIG. 10B, a support 18 having a metal foil 16 formed on one main surface is prepared, and a resin layer 6 (first layer) is formed on one main surface of the metal foil 16 of the support 18. Resin layer 6A) and inorganic insulating layer 7 (first inorganic insulating layer 7A) are formed. Specifically, for example, the following is performed.

  First, as shown in FIG. 10A, the resin precursor layer 6 x of the laminated sheet 17 is laminated so as to be in contact with one main surface of the metal foil 16 of the support 18. Next, the support 18 and the laminated sheet 17 are heated and pressed in the thickness direction to cure the resin precursor layer 6x, thereby forming the resin layer 6 as shown in FIG. The inorganic insulating layer 7 (first inorganic insulating layer 7A) is bonded to the metal foil 16 via the first resin layer 6A).

  In addition, as for the heating and pressurization of the support body 18 and the laminated sheet 17, it is desirable that the temperature is set to be equal to or higher than the curing start temperature of the uncured first resin 11x and lower than the thermal decomposition temperature. Specifically, the heat and pressure of the support 18 and the laminated sheet 17 are set such that the temperature is set to 170 ° C. or higher and 230 ° C. or lower, the pressure is set to 2 MPa or higher and 3 MPa or lower, and the time is 0.5 hours or longer, for example. It is set to 2 hours or less. The curing start temperature is a temperature at which the resin material becomes a C-stage according to ISO 472: 1999. The thermal decomposition temperature is a temperature at which the mass of the resin is reduced by 5% in thermogravimetry according to ISO11358: 1997.

  (7) As shown in FIG. 11C, the via conductor 10 (first via) that penetrates the resin layer 6 (first resin layer 6A) and the inorganic insulating layer 7 (first inorganic insulating layer 7A) in the thickness direction. The conductor 10A) is formed, and the wiring layer 9 (third wiring layer 9C) is formed on the lower surface of the inorganic insulating layer 7. Specifically, for example, the following is performed.

  First, as shown in FIG. 11A, the resin layer 6 (first resin) is irradiated by irradiating the lower surface of the metal foil 16 of the laminated sheet 17 with, for example, a YAG laser device or a carbon dioxide laser device. A through hole V (second through hole V2) penetrating the layer 6A) and the inorganic insulating layer 7 (first inorganic insulating layer 7A), and at least the metal foil 16 of the support 18 is formed in the second through hole V2. Expose part. Next, a conductive material is deposited on the inner wall of the second through hole V2 by using, for example, an electroless plating method, an electroplating method, a vapor deposition method, a CVD method, a sputtering method, or the like, as shown in FIG. In this way, the columnar via conductor 10 (first via conductor 10A) can be formed. Next, by patterning the metal foil 16 of the laminated sheet 17 using, for example, a photolithography technique or an etching method, the wiring layer 9 is formed on one main surface of the inorganic insulating layer 7 as shown in FIG. (Third wiring layer 9C) can be formed.

  Since the second through-hole V2 is formed by irradiating one main surface of the metal foil 16 of the laminated sheet 17 with laser light, the second through-hole V2 is adjusted by appropriately adjusting the irradiation amount or irradiation time of the laser light. The through hole V <b> 2 can be formed so that the cross-sectional area increases from the metal foil 16 of the laminated sheet 17 toward the metal foil 16 of the support 18.

  (8) As shown in FIGS. 12A to 12C, by repeating the process of (6) and the process of (7), the third resin layer 6C, the third inorganic insulating layer 7C, and A third wiring layer 9C, a third resin layer 6C, a second inorganic insulating layer 7B, and a second wiring layer 9B are formed. Next, as shown in FIG. 12D, the single resin precursor layer 6x is laminated so as to cover the second wiring layer 9B, and the single resin precursor layer 6x covering the second wiring layer 9B is formed. After thermosetting, the through hole V (first through hole V1) is formed by irradiating laser light, the second pad 9y in the second wiring layer 9B is exposed, and the second resin layer 6B is formed. Further, in this step, the second resin layer 6B does not enter the gap G of the inorganic insulating layer 7 unlike the first resin layer 6A. Therefore, the second resin layer 6B is formed thicker than the first resin layer 6A. The content ratio of 12 becomes small.

  (9) As shown in FIG. 13A, the metal foil 16 is peeled from the support 18. Specifically, for example, the laminated wiring board 3 is placed on a porous table so that the support 18 is positioned above, and the laminated wiring board 3 is fixed and supported by suction using a vacuum pump. The metal foil 16 can be peeled from the support 18 by pulling the body 18 upward.

  (10) As shown in FIG. 13B, the wiring layer 9 (first wiring layer 9A) is formed by patterning the metal foil 16 of the support 18 using, for example, a photolithography technique or an etching method. To do.

  As described above, the multilayer wiring board 3 can be manufactured.

(Production of mounting structure)
(11) As shown in FIG. 13C, the mounting structure 1 can be manufactured by flip-chip mounting the electronic component 2 on the multilayer wiring board 3 via the first bumps 5A.

Second Embodiment
(Mounting structure)
Next, a mounting structure including the multilayer wiring board according to the second embodiment of the present invention will be described in detail with reference to FIG. In addition, description is abbreviate | omitted regarding the structure similar to 1st Embodiment mentioned above.

  Unlike the first embodiment, the multilayer wiring board 3 of the second embodiment is provided between the resin layer 6 and the plurality of inorganic insulating layers 7 disposed above the resin layer 6 as shown in FIG. An adhesive resin layer 19 is disposed.

  The adhesive resin layer 19 is made of a resin material such as an epoxy resin, a bismaleimide triazine resin, a cyanate resin, or a polyimide resin, and has a Young's modulus smaller than that of the resin layer 6. The thickness of the adhesive resin layer 19 is set to, for example, 0.1 μm to 5 μm, the thickness of the resin layer 6 is set to, for example, 0.1% to 10%, and the thickness of the wiring layer 8 is, for example, 1.5% or more. It is set to 50% or less. The Young's modulus of the adhesive resin layer 19 is set to, for example, 0.05 GPa or more and 5 GPa or less, the Young's modulus of the resin layer 6 is set to, for example, 0.5% to 50%, and the Young's modulus of the wiring layer 8 is, for example, 0. It is set to 04% or more and 4% or less. The thermal expansion coefficient in the planar direction of the adhesive resin layer 19 is set to, for example, 20 ppm / ° C. or more and 100 ppm / ° C. or less.

  Further, the adhesive resin layer 19 may include second filler particles made of an inorganic insulating material such as silicon oxide in order to improve the flame retardance of the adhesive resin layer 19. The second filler particles have a particle size set to, for example, 0.05 μm or more and 0.7 μm or less. The content of the second filler particles in the adhesive resin layer 19 is set to, for example, 1 volume% or more and 10 volume% or less.

  Here, in this embodiment, the plurality of resin layers 6 partially enter the inorganic insulating layer 7 disposed on the lower surface, and the inorganic insulating layer 7 and adhesive resin disposed on the upper surface. They are connected via the layer 19. As a result, the plurality of resin layers 6 are separated from the plurality of resin layers 6 and the inorganic insulating layer 7 disposed on the lower surface thereof by partially entering the inorganic insulating layer 7 disposed on the lower surface thereof. Can be reduced. Then, the plurality of resin layers 6 are provided with the plurality of resin layers 6 and the inorganic insulating layer 7 disposed on the upper surface thereof by interposing the adhesive resin layer 19 between the plurality of resin layers 6 and the inorganic insulating layer 7 disposed on the upper surface thereof. The adhesive strength can be improved. Therefore, peeling between the plurality of resin layers 6 and the plurality of inorganic insulating layers 7 can be reduced.

(Manufacturing method of mounting structure)
Next, the manufacturing method of the mounting structure 1 of the second embodiment described above will be described. In addition, description is abbreviate | omitted regarding the method similar to 1st Embodiment mentioned above.

In the same process as the process (2) of the first embodiment described above, after applying or laminating the adhesive resin precursor layer containing the uncured second resin and the second filler particles to the metal foil 16, the adhesive resin precursor The inorganic insulating sol 7x is applied to the main surface of the body layer opposite to the metal foil 16. Then (5
In the same step as in step), a laminated sheet 17 including the metal foil 16, the adhesive resin precursor layer, the inorganic insulating layer 7 and the resin precursor layer 6x is formed. Next, in the same step as the step (6), after laminating the laminated sheet 17 on the support 18, the uncured first resin 11x is thermally cured to make the resin precursor layer 6x the resin layer 6, The uncured second resin is thermally cured to form the adhesive resin precursor layer as the adhesive resin layer 19. Next, in a step similar to the step (7), the via conductor 10 penetrating the resin layer 6, the inorganic insulating layer 7 and the adhesive resin layer 19 in the thickness direction is formed, and the wiring layer 9 is formed on the lower surface of the adhesive resin layer 19. Form. Then, in the same step as the step (8), the laminated wiring board 3 is manufactured by repeating (6) and (7) for the desired number of laminated layers of the laminated wiring board 3.

  The present invention is not limited to the above-described embodiments, and various modifications, improvements, combinations, and the like can be made without departing from the spirit of the present invention.

  For example, in the above-described embodiment of the present invention, the laminated body 8 has been described as an example of the configuration in which the plurality of resin layers 6 and the plurality of inorganic insulating layers 7 are alternately stacked. For example, the third inorganic insulating layer 7C may be replaced with the resin layer 6, and the resin layer 6 may be used as a whole between the first inorganic insulating layer 7A and the second inorganic insulating layer 7B. In this case, in the method for manufacturing the mounting structure 1, the single resin precursor layer 6x may be laminated on the lower surface of the third wiring layer 9c in the step (8).

  In the embodiment of the present invention described above, the laminate 8 includes the four resin layers 6 and the three inorganic insulating layers 7, and the resin layers 6 and the inorganic insulating layers 7 are alternately laminated. However, the laminate 8 may include four or more resin layers 6 and three or more inorganic insulating layers 7, which may be alternately laminated.

  Further, in the above-described embodiment of the present invention, the configuration in which the first wiring layer 9A is disposed on the upper surface of the first resin layer 6A has been described as an example. However, the first wiring layer 9A is connected to the first resin layer 6A and the first resin layer 6A. The first pad 9x for external connection provided in the first wiring layer 9A may be exposed by forming a through hole in the first resin layer 6A. I do not care.

  In the above-described embodiment of the present invention, the second wiring layer 9B has been described as an example of the configuration in which the second wiring layer 9B is disposed between the second inorganic insulating layer 7B and the second resin layer 6B. May be disposed on the lower surface of the second resin layer 6B.

  Moreover, although embodiment of this invention mentioned above demonstrated the structure from which the thickness of the 1st resin layer 6A and 2nd resin layer 6B in the laminated body 8 differs as an example, the thickness of the resin layer 6 is all other resin. It may be the same as the thickness of the layer 6. In that case, since the variation in the thermal expansion amount of each of the plurality of resin layers 6 can be reduced, the thermal expansion coefficient of the entire multilayer wiring board 3 can be balanced, and the warpage of the multilayer wiring board 3 can be reduced. can do.

  Further, the above-described embodiment of the present invention is described by taking, as an example, a configuration in which the content ratio of the first resin portion 11 in the resin layer 6 and the content ratio of the first filler particles 12 in the resin layer 6 are different in the plurality of resin layers 6. However, the content ratio of the first resin portion 11 in the resin layer 6 and the content ratio of the first filler particles 12 in the resin layer 6 may be the same in all the resin layers 6. As a result, since the variation in the thermal expansion coefficient of each of the plurality of resin layers 6 can be reduced, the thermal expansion coefficient of the entire multilayer wiring board 3 can be balanced, and the warpage of the multilayer wiring board 3 can be reduced. Can do.

In the embodiment of the present invention described above, the inorganic insulating sol 7x is applied to one main surface of the metal foil 16 in the step (2). The application of the inorganic insulating sol 7x is, for example, polyethylene, polyethylene terephthalate. Or you may apply | coat to one main surface of the support sheet which consists of resin materials, such as a polyethylene naphthalate. In this case, the support sheet may be mechanically peeled off before the wiring layer 9 is formed.

  Moreover, although embodiment of this invention mentioned above demonstrated the structure which heats solid content 7 'after evaporating the solvent 15 in the process of (3) as an example, evaporation of the solvent 15 and heating of solid content 7' were demonstrated. Can be performed simultaneously.

DESCRIPTION OF SYMBOLS 1 Mounting structure 2 Electronic component 3 Laminated wiring board 4 External circuit board 5A 1st bump 5B 2nd bump 6 Resin layer 6A 1st resin layer 6B 2nd resin layer 6C 3rd resin layer 6x resin precursor layer 7 Inorganic insulating layer 7 'solid content 7A first inorganic insulating layer 7B second inorganic insulating layer 7C third inorganic insulating layer 7x inorganic insulating sol 8 laminate 9 wiring layer 9A first wiring layer 9B second wiring layer 9C third wiring layer 9x first Pad 9y second pad 9z first conductive portion 9w second conductive portion 10 via conductor 10A first via conductor 10B second via conductor 11 first resin portion 11x uncured first resin 12 first filler particles 13 first inorganic insulation Particle 14 Second inorganic insulating particle 15 Solvent 16 Metal foil 17 Laminated sheet 18 Support 19 Adhesive resin layer C1 First corner C2 Second corner G Gap G1 First gap G2 Second gap V1 1st through hole V2 2nd through hole

Claims (9)

A laminate in which a plurality of resin layers and a plurality of inorganic insulating layers are laminated with the resin layers arranged on the uppermost layer and the lowermost layer, and a first wiring layer arranged on the upper surface or the lower surface of the uppermost resin layer And a second wiring layer disposed on the upper surface or the lower surface of the lowermost resin layer,
The first wiring layer includes a first pad for external connection that is disposed on the upper surface of the resin layer or is disposed so as to close a through hole on the lower surface of the resin layer and the upper surface is exposed.
The second wiring layer includes a second pad for external connection disposed on the lower surface of the resin layer or disposed on the upper surface of the resin layer so as to close a through hole and exposing the lower surface. Laminated wiring board. The multilayer wiring board according to claim 1,
The distance from the center in the thickness direction of the laminate to the second wiring layer is smaller than the distance from the center in the thickness direction of the laminate to the first wiring layer,
The multilayer wiring board, wherein an area of the second wiring layer is larger than an area of the first wiring layer. The multilayer wiring board according to claim 1,
The first wiring layer is disposed on the upper surface of the resin layer,
The multilayer wiring board, wherein the second wiring layer is disposed on an upper surface of the resin layer. The multilayer wiring board according to claim 1,
In the multilayer body, the plurality of resin layers and the plurality of inorganic insulating layers are alternately arranged. The multilayer wiring board according to claim 1,
The plurality of inorganic insulating layers includes a first inorganic insulating layer disposed immediately below the uppermost resin layer,
The first wiring layer is disposed on the upper surface of the uppermost resin layer,
The plurality of resin layers include a plurality of filler particles in the resin portion,
A laminated wiring board, wherein a content ratio of the filler particles in the uppermost resin layer increases from the upper side to the lower side. The multilayer wiring board according to claim 1,
The thickness of the uppermost resin layer is smaller than the thickness of the lowermost resin layer. The multilayer wiring board according to claim 1,
The plurality of resin layers include a plurality of filler particles in the resin portion,
A laminated wiring board, wherein a content ratio of the filler particles in the uppermost resin layer is larger than a content ratio of the filler particles in the lowermost resin layer. The multilayer wiring board according to claim 1,
The inorganic insulating layer is connected to a plurality of first inorganic insulating particles connected to a part of each other, and connected to the plurality of first inorganic insulating particles at a part of each other, and has a particle diameter larger than that of the first inorganic insulating particles. And a plurality of second inorganic insulating particles are formed, and a gap surrounded by the plurality of first inorganic insulating particles and between the plurality of first inorganic insulating particles and the second inorganic insulating particles is formed. And
A laminated wiring board, wherein a part of the resin layer enters the gap. A mounting structure comprising: the multilayer wiring board according to claim 1; and an electronic component mounted on an upper surface of the multilayer wiring board and electrically connected to the first pad.

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