JP2014026999A5 - - Google Patents

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Publication number
JP2014026999A5
JP2014026999A5 JP2012163605A JP2012163605A JP2014026999A5 JP 2014026999 A5 JP2014026999 A5 JP 2014026999A5 JP 2012163605 A JP2012163605 A JP 2012163605A JP 2012163605 A JP2012163605 A JP 2012163605A JP 2014026999 A5 JP2014026999 A5 JP 2014026999A5
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Japan
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layer
base substrate
inp layer
inp
bonded
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JP2012163605A
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JP2014026999A (en
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Priority to JP2012163605A priority Critical patent/JP2014026999A/en
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次に、図3(b)に示すように、積層体のInP層12と下地基板11とを加熱圧着し、下地基板11とInP層12とを加熱接合する。
たとえば、InP基板21、GaInAs層22、InP層12、下地基板11からなる積層体を450〜500℃で加熱しながら、積層方向に沿って挟圧する。
これにより、下地基板11とInP層12とが圧着することとなる。下地基板11とInP層12の界面には、数原子層の厚さの遷移層(下地基板11を構成する原子と、InP層12を構成する原子とが混ざり合った層)が形成されている。ただし、この遷移層以外の領域においては、遷移層は存在せず、InP層12本来の結晶格子の形状が維持されている。
Next, as illustrated in FIG. 3B, the InP layer 12 and the base substrate 11 of the stacked body are thermocompression bonded, and the base substrate 11 and the InP layer 12 are heat bonded.
For example, a laminated body composed of the InP substrate 21, the GaInAs layer 22, the InP layer 12, and the base substrate 11 is pressed along the laminating direction while being heated at 450 to 500 ° C.
Thereby, the base substrate 11 and the InP layer 12 are pressure-bonded . A transition layer (a layer in which atoms constituting the base substrate 11 and atoms constituting the InP layer 12 are mixed) having a thickness of several atomic layers is formed at the interface between the base substrate 11 and the InP layer 12. . However, in regions other than the transition layer, there is no transition layer, and the original crystal lattice shape of the InP layer 12 is maintained.

その後、窒素雰囲気下で、積層体のInP層12と下地基板11とを加熱圧着し、下地基板11とInP層12とを加熱接合した。積層体のInP層12と下地基板11とを加熱圧着する際の圧力は、8.3N/cmとした。また、加熱温度は、450℃であり、前記加圧力をかけながら、1時間加熱した。
これにより、下地基板11とInP層12とが圧着接合された。下地基板11とInP層12の界面には、数原子層の厚さの遷移層(下地基板11を構成する原子と、InP層12を構成する原子とが混ざり合った層)が形成されていることが確認できた。ただし、この遷移層以外の領域においては、遷移層は存在せず、InP層12本来の結晶格子の形状が維持されている。
Thereafter, the InP layer 12 and the base substrate 11 of the laminate were heat-pressed in a nitrogen atmosphere, and the base substrate 11 and the InP layer 12 were heat-bonded. The pressure when thermocompression bonding the InP layer 12 and the base substrate 11 of the laminate was 8.3 N / cm 2 . Moreover, the heating temperature was 450 degreeC, and it heated for 1 hour, applying the said pressurizing force.
Thereby, the base substrate 11 and the InP layer 12 were bonded by pressure bonding . A transition layer (a layer in which atoms constituting the base substrate 11 and atoms constituting the InP layer 12 are mixed) having a thickness of several atomic layers is formed at the interface between the base substrate 11 and the InP layer 12. I was able to confirm. However, in regions other than the transition layer, there is no transition layer, and the original crystal lattice shape of the InP layer 12 is maintained.

JP2012163605A 2012-07-24 2012-07-24 Semiconductor device, template substrate, and method of manufacturing semiconductor device Pending JP2014026999A (en)

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JP2012163605A JP2014026999A (en) 2012-07-24 2012-07-24 Semiconductor device, template substrate, and method of manufacturing semiconductor device

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Application Number Priority Date Filing Date Title
JP2012163605A JP2014026999A (en) 2012-07-24 2012-07-24 Semiconductor device, template substrate, and method of manufacturing semiconductor device

Publications (2)

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JP2014026999A JP2014026999A (en) 2014-02-06
JP2014026999A5 true JP2014026999A5 (en) 2015-08-13

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Families Citing this family (1)

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CN112531459B (en) * 2020-12-04 2022-04-19 苏州长光华芯光电技术股份有限公司 Distributed feedback laser and preparation method thereof

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0864911A (en) * 1994-08-24 1996-03-08 Hitachi Ltd Etching method for compound semiconductor
JP3215297B2 (en) * 1995-07-18 2001-10-02 沖電気工業株式会社 Method for manufacturing semiconductor light emitting device
JPH0963951A (en) * 1995-08-25 1997-03-07 Matsushita Electric Works Ltd Manufacture of semiconductor substrate and manufacture of semiconductor device
US6316332B1 (en) * 1998-11-30 2001-11-13 Lo Yu-Hwa Method for joining wafers at a low temperature and low stress
JP2000332302A (en) * 1999-05-19 2000-11-30 Rohm Co Ltd Semiconductor light emitting element
JP2004260109A (en) * 2003-02-27 2004-09-16 Shin Etsu Handotai Co Ltd Method of manufacturing light-emitting element, composite translucent substrate, and light-emitting element
JP2008235318A (en) * 2007-03-16 2008-10-02 Oki Data Corp Nitride semiconductor wafer and method of manufacturing thin-film semiconductor device
US8716042B2 (en) * 2010-03-31 2014-05-06 Cssolution Co., Ltd. Semiconductor template substrate, light-emitting device using a semiconductor template substrate, and manufacturing method therefor
JP2012089828A (en) * 2010-09-22 2012-05-10 Toshiba Corp Semiconductor device manufacturing method
JP2012104740A (en) * 2010-11-12 2012-05-31 Stanley Electric Co Ltd Semiconductor light-emitting device and method for manufacturing the same
JP5051319B2 (en) * 2011-12-14 2012-10-17 ソニー株式会社 Semiconductor light emitting device, method for manufacturing semiconductor light emitting device, and semiconductor light emitting device

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