JP2013516767A5 - - Google Patents

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Publication number
JP2013516767A5
JP2013516767A5 JP2012547160A JP2012547160A JP2013516767A5 JP 2013516767 A5 JP2013516767 A5 JP 2013516767A5 JP 2012547160 A JP2012547160 A JP 2012547160A JP 2012547160 A JP2012547160 A JP 2012547160A JP 2013516767 A5 JP2013516767 A5 JP 2013516767A5
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JP
Japan
Prior art keywords
layer
silicon
implanted
ions
insulator
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JP2012547160A
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English (en)
Japanese (ja)
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JP2013516767A (ja
JP5591949B2 (ja
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Priority claimed from PCT/US2010/061858 external-priority patent/WO2011082079A1/en
Publication of JP2013516767A publication Critical patent/JP2013516767A/ja
Publication of JP2013516767A5 publication Critical patent/JP2013516767A5/ja
Application granted granted Critical
Publication of JP5591949B2 publication Critical patent/JP5591949B2/ja
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JP2012547160A 2009-12-30 2010-12-22 多層結晶構造体の製造方法 Active JP5591949B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US29096109P 2009-12-30 2009-12-30
US61/290,961 2009-12-30
PCT/US2010/061858 WO2011082079A1 (en) 2009-12-30 2010-12-22 Method for the preparation of a multi-layered crystalline structure

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2013116607A Division JP2013175787A (ja) 2009-12-30 2013-06-03 多層結晶構造体の製造方法

Publications (3)

Publication Number Publication Date
JP2013516767A JP2013516767A (ja) 2013-05-13
JP2013516767A5 true JP2013516767A5 (enExample) 2013-07-18
JP5591949B2 JP5591949B2 (ja) 2014-09-17

Family

ID=43587555

Family Applications (2)

Application Number Title Priority Date Filing Date
JP2012547160A Active JP5591949B2 (ja) 2009-12-30 2010-12-22 多層結晶構造体の製造方法
JP2013116607A Pending JP2013175787A (ja) 2009-12-30 2013-06-03 多層結晶構造体の製造方法

Family Applications After (1)

Application Number Title Priority Date Filing Date
JP2013116607A Pending JP2013175787A (ja) 2009-12-30 2013-06-03 多層結晶構造体の製造方法

Country Status (8)

Country Link
US (2) US8367519B2 (enExample)
EP (2) EP2733735A3 (enExample)
JP (2) JP5591949B2 (enExample)
KR (1) KR20120117843A (enExample)
CN (1) CN103026460A (enExample)
SG (1) SG181986A1 (enExample)
TW (2) TW201330062A (enExample)
WO (1) WO2011082079A1 (enExample)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8853054B2 (en) 2012-03-06 2014-10-07 Sunedison Semiconductor Limited Method of manufacturing silicon-on-insulator wafers
US8796054B2 (en) * 2012-05-31 2014-08-05 Corning Incorporated Gallium nitride to silicon direct wafer bonding
JP6024400B2 (ja) 2012-11-07 2016-11-16 ソニー株式会社 半導体装置、半導体装置の製造方法、及びアンテナスイッチモジュール
US9281233B2 (en) * 2012-12-28 2016-03-08 Sunedison Semiconductor Limited Method for low temperature layer transfer in the preparation of multilayer semiconductor devices
TWI509681B (zh) * 2013-11-15 2015-11-21 All Ring Tech Co Ltd Method and apparatus for processing on wafers
US9496128B1 (en) 2015-10-15 2016-11-15 International Business Machines Corporation Controlled spalling utilizing vaporizable release layers
EP3785293B1 (en) 2018-04-27 2023-06-07 GlobalWafers Co., Ltd. Light assisted platelet formation facilitating layer transfer from a semiconductor donor substrate

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FR2773261B1 (fr) * 1997-12-30 2000-01-28 Commissariat Energie Atomique Procede pour le transfert d'un film mince comportant une etape de creation d'inclusions
US7076042B1 (en) 2000-09-06 2006-07-11 Cisco Technology, Inc. Processing a subscriber call in a telecommunications network
FR2816445B1 (fr) * 2000-11-06 2003-07-25 Commissariat Energie Atomique Procede de fabrication d'une structure empilee comprenant une couche mince adherant a un substrat cible
FR2819099B1 (fr) 2000-12-28 2003-09-26 Commissariat Energie Atomique Procede de realisation d'une structure empilee
US6686630B2 (en) * 2001-02-07 2004-02-03 International Business Machines Corporation Damascene double-gate MOSFET structure and its fabrication method
US6897084B2 (en) 2001-04-11 2005-05-24 Memc Electronic Materials, Inc. Control of oxygen precipitate formation in high resistivity CZ silicon
KR20040037031A (ko) 2001-06-22 2004-05-04 엠이엠씨 일렉트로닉 머티리얼즈 인코포레이티드 이온 주입에 의한 고유 게터링을 갖는 실리콘 온인슐레이터 구조 제조 방법
WO2003046993A1 (fr) * 2001-11-29 2003-06-05 Shin-Etsu Handotai Co.,Ltd. Procede de production de plaquettes soi
US20040224482A1 (en) * 2001-12-20 2004-11-11 Kub Francis J. Method for transferring thin film layer material to a flexible substrate using a hydrogen ion splitting technique
US6833322B2 (en) 2002-10-17 2004-12-21 Applied Materials, Inc. Apparatuses and methods for depositing an oxide film
CN100483666C (zh) 2003-01-07 2009-04-29 S.O.I.Tec绝缘体上硅技术公司 施主晶片以及重复利用晶片的方法和剥离有用层的方法
US6911375B2 (en) * 2003-06-02 2005-06-28 International Business Machines Corporation Method of fabricating silicon devices on sapphire with wafer bonding at low temperature
JP4407384B2 (ja) * 2004-05-28 2010-02-03 株式会社Sumco Soi基板の製造方法
FR2876841B1 (fr) * 2004-10-19 2007-04-13 Commissariat Energie Atomique Procede de realisation de multicouches sur un substrat
DE102004054564B4 (de) * 2004-11-11 2008-11-27 Siltronic Ag Halbleitersubstrat und Verfahren zu dessen Herstellung
US10374120B2 (en) * 2005-02-18 2019-08-06 Koninklijke Philips N.V. High efficiency solar cells utilizing wafer bonding and layer transfer to integrate non-lattice matched materials
US20070117350A1 (en) 2005-08-03 2007-05-24 Memc Electronic Materials, Inc. Strained silicon on insulator (ssoi) with layer transfer from oxidized donor
FR2889887B1 (fr) * 2005-08-16 2007-11-09 Commissariat Energie Atomique Procede de report d'une couche mince sur un support
EP1763069B1 (en) 2005-09-07 2016-04-13 Soitec Method for forming a semiconductor heterostructure
US7608521B2 (en) * 2006-05-31 2009-10-27 Corning Incorporated Producing SOI structure using high-purity ion shower
FR2906078B1 (fr) * 2006-09-19 2009-02-13 Commissariat Energie Atomique Procede de fabrication d'une structure micro-technologique mixte et une structure ainsi obtenue
FR2913528B1 (fr) 2007-03-06 2009-07-03 Soitec Silicon On Insulator Procede de fabrication d'un substrat comportant une couche d'oxyde enterree pour la realisation de composants electroniques ou analogues.
FR2917235B1 (fr) * 2007-06-06 2010-09-03 Soitec Silicon On Insulator Procede de realisation de composants hybrides.
JP5386856B2 (ja) * 2008-06-03 2014-01-15 株式会社Sumco 貼り合わせウェーハの製造方法
SG159484A1 (en) * 2008-09-05 2010-03-30 Semiconductor Energy Lab Method of manufacturing soi substrate
JP5364345B2 (ja) * 2008-11-12 2013-12-11 株式会社半導体エネルギー研究所 Soi基板の作製方法
US8679942B2 (en) * 2008-11-26 2014-03-25 Soitec Strain engineered composite semiconductor substrates and methods of forming same
US20100216295A1 (en) * 2009-02-24 2010-08-26 Alex Usenko Semiconductor on insulator made using improved defect healing process
US8198172B2 (en) * 2009-02-25 2012-06-12 Micron Technology, Inc. Methods of forming integrated circuits using donor and acceptor substrates

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