JP2013510376A - プローブアクティビティレベルの追跡による性能状態の制御 - Google Patents

プローブアクティビティレベルの追跡による性能状態の制御 Download PDF

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Publication number
JP2013510376A
JP2013510376A JP2012538025A JP2012538025A JP2013510376A JP 2013510376 A JP2013510376 A JP 2013510376A JP 2012538025 A JP2012538025 A JP 2012538025A JP 2012538025 A JP2012538025 A JP 2012538025A JP 2013510376 A JP2013510376 A JP 2013510376A
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probe
performance state
probe activity
activity level
threshold
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JP2013510376A5 (enExample
Inventor
ブラノーバー アレキサンダー
ビー. スタインマン モーリス
ディー. ハウケ ジョナサン
エム. オーウェン ジョナサン
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Advanced Micro Devices Inc
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Advanced Micro Devices Inc
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Publication of JP2013510376A publication Critical patent/JP2013510376A/ja
Publication of JP2013510376A5 publication Critical patent/JP2013510376A5/ja
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    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0806Multiuser, multiprocessor or multiprocessing cache systems
    • G06F12/0808Multiuser, multiprocessor or multiprocessing cache systems with cache invalidating means
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26Power supply means, e.g. regulation thereof
    • G06F1/32Means for saving power
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26Power supply means, e.g. regulation thereof
    • G06F1/32Means for saving power
    • G06F1/3203Power management, i.e. event-based initiation of a power-saving mode
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0806Multiuser, multiprocessor or multiprocessing cache systems
    • G06F12/0815Cache consistency protocols
    • G06F12/0831Cache consistency protocols using a bus scheme, e.g. with bus monitoring or watching means
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/10Providing a specific technical effect
    • G06F2212/1028Power efficiency
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Power Sources (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
JP2012538025A 2009-11-06 2010-11-05 プローブアクティビティレベルの追跡による性能状態の制御 Pending JP2013510376A (ja)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US25879809P 2009-11-06 2009-11-06
US61/258,798 2009-11-06
US12/623,997 2009-11-23
US12/623,997 US20110112798A1 (en) 2009-11-06 2009-11-23 Controlling performance/power by frequency control of the responding node
PCT/US2010/055598 WO2011057059A1 (en) 2009-11-06 2010-11-05 Controlling performance state by tracking probe activity level

Publications (2)

Publication Number Publication Date
JP2013510376A true JP2013510376A (ja) 2013-03-21
JP2013510376A5 JP2013510376A5 (enExample) 2013-09-26

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JP2012538025A Pending JP2013510376A (ja) 2009-11-06 2010-11-05 プローブアクティビティレベルの追跡による性能状態の制御

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US (2) US20110112798A1 (enExample)
EP (1) EP2497001A1 (enExample)
JP (1) JP2013510376A (enExample)
KR (1) KR20120102629A (enExample)
CN (1) CN102667665A (enExample)
WO (1) WO2011057059A1 (enExample)

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Publication number Publication date
EP2497001A1 (en) 2012-09-12
US20110113202A1 (en) 2011-05-12
US9021209B2 (en) 2015-04-28
CN102667665A (zh) 2012-09-12
US20110112798A1 (en) 2011-05-12
KR20120102629A (ko) 2012-09-18
WO2011057059A1 (en) 2011-05-12

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