JP2013258549A - Driver circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a driver circuit that reduces current consumption irrespective of transistor size depending on a process.SOLUTION: The driver circuit includes: a driver transistor for driving a load connected to a drain thereof; a first reference voltage generation circuit having a plurality of reference transistors having respective gates connected in common to a gate of the driver transistor; and a comparator for outputting as an overcurrent detection signal a signal depending on a result of comparison of a drain voltage of the driver transistor with a drain voltage at an end portion of the plurality of reference transistors.

Description

  The present invention relates to a driver circuit, and more particularly to a driver circuit capable of detecting an overcurrent flowing through a load.

  Power semiconductors such as power MOSFETs and IGBTs (insulated gate bipolar transistors) are known as components used in inverters that affect the performance of electric vehicles (EV) and hybrid vehicles (HEV). The power semiconductor is used for a driver IC that drives a load exemplified by a starter motor of a vehicle. Such a driver IC needs an overcurrent detection circuit to drive a load through which a large current flows.

  FIG. 1 is a diagram illustrating an example of a configuration of a driver circuit including an overcurrent detection circuit 80. The driver circuit shown in FIG. 1 includes an overcurrent detection circuit 80 including a comparator 81 and a current control switch 82, a capacitor 83, and a diode 84. One end of the capacitor 83 is connected to the power supply (power supply voltage VD) via the diode 84, is connected to the input terminal of the comparator 81, and the other end is connected to GND. The other end of the load 85 whose one end is connected to the power supply (power supply voltage VD) is connected to the other input terminal of the comparator 81. The control switch 82 controls the current flowing through the load 85. The comparator 81 detects a signal having a magnitude corresponding to the comparison result between the voltage at one end of the capacitor 83 (the cathode of the diode 84) and the voltage at the other end of the load 85, and indicates a detection signal OC indicating whether or not an overcurrent flowing through the load 85 is detected. Output as.

  For example, Japanese Patent Application Laid-Open No. 2004-140423 describes a load drive circuit that uses a power MOSFET as an output stage and is equipped with a current detection circuit that detects an overcurrent flowing through the power MOSFET (see Patent Document 1).

  Referring to FIG. 2, the load drive circuit described in Patent Document 1 includes two MOSFETs (driver transistor M10 and reference transistor M20) having a determined size ratio. The drain of the driver transistor M10 has one end connected to the other end (node 71: voltage Vd) of the load 50 connected to the first power supply (power supply voltage VD1), and the source connected to GND. The drain of the reference transistor M20 has one end connected to the other end (node 72: voltage Vr2) of the constant current source 78 connected to the third power supply (power supply voltage VD3), and the source connected to GND. The comparator 40 outputs a comparison result between the drain voltage of the driver transistor M10 (the voltage Vd at the node 71) and the drain voltage of the reference transistor M20 (the voltage Vr2 at the node 72) as the overcurrent detection signal OC. A current flows through the load 50 through the load 50, and a voltage Vd corresponding to the on-resistance of the driver transistor M10 is supplied to the node 71. A constant current Iref2 flows through the node 72 and corresponds to the on-resistance of the reference transistor M20. A voltage Vr2 is supplied.

  The size ratio and constant current Iref2 are set so that the drain voltages (voltages Vd and Vr2) of the two transistors M10 and M20 are the same with respect to the detected overcurrent. The comparator 40 can detect an overcurrent by comparing the drain voltages Vd and Vr2 of the two MOSFETs.

  Japanese Patent Laid-Open No. 3-75572 outputs a comparison result between a current value flowing through the first transistor through the first transistor and a current value flowing through the second transistor from the constant current source as an output signal detection signal. An output current detection circuit is described (see Patent Document 2). The output current detection circuit described in Patent Document 2 includes a comparator that outputs a comparison result between the voltage of the output terminal and the drain of the first transistor and the voltage of the drain of the second transistor and the current supply terminal of the constant current source. The comparator outputs a detection signal corresponding to a comparison result between the current value set by the constant current source and the variable current value flowing through the output terminal.

JP-A-2004-140423 JP 3-75572

  In the driver circuit shown in FIG. 2, the value of the constant current Iref2 flowing through the reference transistor M20 is determined from the size ratio between the overcurrent value to be detected and the driver transistor M10. For example, if the overcurrent to be detected is Ioc and the size ratio of the driver transistor M10 and the reference transistor M20 is n: 1, the value of the constant current Iref2 is Ioc / n. At this time, if the size of the driver transistor M10 is small, the reference transistor M20 also needs to be small. However, since the MOSFET has a minimum size, in that case, the constant current Iref2 has to be increased, and it is difficult to reduce the constant current Iref2.

  In order to solve the above problems, the present invention employs the means described below. In the description of technical matters constituting the means, in order to clarify the correspondence between the description of [Claims] and the description of [Mode for Carrying Out the Invention] The number / symbol used in [Form] is added. However, the added numbers and symbols should not be used to limit the technical scope of the invention described in [Claims].

  An overcurrent flowing through a load connected to the driver transistor is detected based on a current flowing through a plurality of transistors connected in series.

  According to the present invention, the current consumption of the driver circuit can be reduced regardless of the transistor size according to the process.

FIG. 1 is a diagram illustrating an example of a configuration of a driver circuit according to a related technique. FIG. 2 is a diagram illustrating another example of the configuration of the load driving circuit according to the related art. FIG. 3 is a diagram illustrating a configuration of the driver circuit according to the first embodiment. FIG. 4 is a diagram illustrating a configuration of the driver circuit according to the second embodiment. FIG. 5 is a diagram illustrating a specific example of the configuration of the driver circuit according to the second embodiment.

  Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings. In the drawings, the same or similar reference numerals indicate the same, similar, or equivalent components.

(First embodiment)
FIG. 3 is a diagram illustrating a configuration of the driver circuit according to the first embodiment. The driver circuit shown in FIG. 3 is a semiconductor integrated circuit that drives a load 50 exemplified by a starter motor of a vehicle. The operation of this driver circuit is controlled by a drive control signal CTRL input from a control circuit (not shown), and outputs an overcurrent detection signal OC indicating whether or not an overcurrent is detected to a control circuit (not shown). A control circuit (not shown) controls the operation of the driver circuit with a drive control signal CTRL having a signal level corresponding to the overcurrent detection signal OC.

  The driver circuit shown in FIG. 3 includes a driver transistor M10 (example: N-channel MOSFET), a reference voltage generation circuit 30, a comparator 40, and a constant current source 88. The driver transistor M10 drives a load 50 connected to the outside of the driver circuit. The drain of the driver transistor M10 has one end connected to the other end (node 71: voltage Vd) of the load 50 connected to the first power supply (power supply voltage VD1), and the source connected to GND. An N-channel power MOSFET is preferably used as the driver transistor M10.

  A node 71 to which the load 50 is connected is connected to the non-inverting input terminal of the comparator 40 and the drain of the driver transistor M10. The magnitude of the voltage Vr1 at the node 71 is determined according to the current flowing through the load 50 and the on-resistance and capacitance value of the driver transistor M10.

  The reference voltage generation circuit 30 includes a plurality of reference MOSFETs (reference transistors M31 to M3m, where m is a natural number) connected in series via respective drains and sources. The gates of the reference transistors M31 to M3m are commonly connected to the gate of the driver transistor M10 to which the drive control signal CTRL is supplied. The source of the reference transistor M31 is connected to a second power supply (GND as an example here), and the drain is connected to one end (node 73) of a constant current source 88 via serially connected reference transistors M32 to M3m. The As the reference transistors M31 to M3m, N-channel power MOSFETs are preferably used.

  One end of the constant current source 88 is connected to the reference voltage generation circuit 30 (the drain of the reference transistor M3m) and the inverting input terminal of the comparator 40 via the node 73, and the other end is connected to the second power supply (power supply voltage VD2). Connected. A constant current Iref1 is supplied from the constant current source 88 to the node 73, and the magnitude of the voltage Vr1 at the node 73 is determined according to the on-resistance and the capacitance value of the reference voltage generation circuit 30.

  The comparator 40 compares the voltage Vd generated at the node 71 with the voltage Vr1 generated at the node 73, that is, the drain voltage Vd of the driver transistor M10 and the end portions of the reference transistors M31 to M3m connected in series ( A signal corresponding to the comparison result of the drain voltage Vr1 of the reference transistor M3m) is output as the overcurrent detection signal OC.

  By connecting a plurality of reference transistors M31 to M3m in series, the gate length of the entire reference voltage generation circuit 30 is substantially increased and the on-resistance is also increased. The gate length of the transistor cannot exceed the length depending on the process. However, the reference transistors M31 to M3m to which the same gate voltage is supplied are connected in series, so that the length can be substantially increased. For example, when the size (gate length, gate width) of each of the reference transistors M31 to M3m is the same as that of the reference transistor M20 shown in FIG. 2, the resistance value of the entire reference voltage generation circuit 30 is m of the reference transistor M20. Doubled.

  When the high-level drive control signal CTRL is supplied, the driver transistor M10 and the reference transistors M31 to M3m are turned on. The load 50 is driven by an on-current flowing through the driver transistor M10.

  The comparator 40 outputs a signal corresponding to the comparison result of the voltages Vd and Vr1 generated at the nodes 71 and 73 when the load 50 is driven as the overcurrent detection signal OC. Here, when an overcurrent of a predetermined magnitude (threshold value) or more flows through the load 50, the voltage Vr1 of the node 73 becomes smaller than the voltage Vd of the node 71, and an overcurrent detection signal OC indicating that the overcurrent has flown is output. Is done. The voltage Vr1 at the node 73 is determined by the constant current Iref1 and the on-resistance and capacitance of the reference voltage generation circuit 30. For example, when the threshold for detecting the overcurrent is the same as that of the circuit shown in FIG. 2, the magnitude of the constant current Iref1 can be made smaller than the constant current Iref2. Specifically, if the overcurrent (threshold) to be detected is Ioc and the size ratio (gate length ratio) of each of the driver transistor M10 and the reference transistors M31 to M3m is n: 1, the value of the constant current Iref1 is Ioc. / (N * m). That is, when the size (gate length) of each of the reference transistors M31 to M3m is the same as that of the reference transistor M20 shown in FIG. 2, the magnitude of the constant current Iref1 is set to 1 / m of the constant current Iref2. It becomes possible to detect an overcurrent having the same magnitude as that in FIG.

  A control circuit (not shown) to which an overcurrent detection signal OC indicating detection of overcurrent is input negates the drive control signal CTRL and turns off the driver transistor M10 and the reference transistors M31 to M3m. As a result, the driving operation and the overcurrent detection operation for the load 50 by the driver circuit are stopped.

  If the number m of the reference transistors 31 to 3m connected in series increases, the voltage between the source and the gate becomes unstable, and the overcurrent detection accuracy decreases. Therefore, the number m of the reference transistors 31 to 3m is preferably 30 or less, and m is more preferably about 15 in consideration of the detection accuracy and the current consumption reduction effect. In addition, when the gate lengths are matched in order to make the characteristics of the reference transistors M31 to M3m uniform, considering the gate length control, the size ratio n: 1 of each of the reference transistors M31 to M3m and the driver transistor M10 is: A ratio of about 4000: 1 is preferable.

  When the size ratio n: 1 of each of the reference transistors M31 to M3m and the driver transistor M10 is 4000: 1 and the overcurrent Ioc to be detected is 8A, the number m of the reference transistors M31 to M3m is 1. Then, the constant current Iref1 is set to 2 mA. On the other hand, if the number m of the reference transistors M31 to M3m is 20 under the same conditions, the current flowing through each of the reference transistors M31 to M3m can be 100 μA.

  As described above, in this embodiment, the magnitude (threshold value) of the overcurrent detected by the comparator 40 can be arbitrarily set by adjusting the gate length and the constant current Iref1 of the driver transistor M10 and the reference transistors M31 to M3m. Can be set to In the present embodiment, the overcurrent is detected using the voltage Vr1 generated by using the reference transistors M31 to M3m connected in series as a reference voltage. For this reason, even when the gate length of the transistor is determined in advance, a large overcurrent can be detected without increasing the constant current Iref1. As a result, according to the overcurrent detection circuit in the present embodiment, the constant current Iref1 can be reduced (for example, 1 / m times the constant current Iref2 shown in FIG. 2), and the current consumption of the entire circuit can be reduced.

  In this example, although the load 50 illustrated the inductor as a starter motor of a car, it is not restricted to this. As the second power source (power supply voltage VD2) for the reference system, a capacitor 83 (for example, a capacitor of about 47 μF) charged with electric charge as shown in FIG. 1 is preferably used. For example, when a starter (not shown) is activated, the battery voltage drop increases. For this reason, the overcurrent detection circuit in the present embodiment performs overcurrent detection using the power supply voltage VD2 using the electric charge charged in a capacitor (not shown). That is, it is preferable that the first power supply (power supply voltage VD1) for the driver system and the second power supply (power supply voltage VD2) for the reference system are different power supply systems.

(Second Embodiment)
FIG. 4 is a diagram illustrating a configuration of the driver circuit according to the second embodiment. In addition to the driver circuit shown in FIG. 3, the driver circuit shown in FIG. 4 includes a switch circuit 60 that switches a reference voltage generation circuit for detecting an overcurrent. Specifically, the driver circuit shown in FIG. 4 includes a switch circuit 60, a reference voltage generation circuit 20, and a constant current source 78 in addition to the driver circuit shown in FIG. The driver circuit shown in FIG. 4 includes the reference voltage generation circuit 20 shown in FIG. 2 and the reference voltage generation circuit 30 shown in FIG. 3. Supplied to the inverting input terminal.

  In the following, the configuration and operation of the driver circuit shown in FIG. 4 will be described with respect to differences from the configuration of the driver circuit in the first embodiment.

  The reference voltage generation circuit 20 includes a reference transistor M20. The gate of the reference transistor M20 is commonly connected to the gate of the driver transistor M10 to which the drive control signal CTRL is supplied, the source is connected to the second power source (here, GND), and the drain is connected to the node 72. The

  The switch circuit 60 includes switches SW11, SW12, SW21, and SW22. The switch SW11 controls connection between the drain (node 72) of the reference transistor M20 (reference voltage generation circuit 20) and the inverting input terminal of the comparator 40. The switch SW12 controls connection between the other end of the constant current source 78, one end of which is connected to the third power supply (power supply voltage VD3), and the drain (node 72) of the reference transistor M20 (reference voltage generation circuit 20). . The switch SW21 controls connection between the drain (node 73) of the reference transistor M3m in the reference voltage generation circuit 30 and the inverting input terminal of the comparator 40. The switch SW22 controls connection between the other end of the constant current source 88 whose one end is connected to the second power supply (power supply voltage VD2) and the drain (node 73) of the reference transistor M3m in the reference voltage generation circuit 30.

  The switch circuit 60 is controlled according to the switch control signal SEL, and the high-precision detection mode in which the switches SW11 and SW12 are turned on and the switches SW21 and SW22 are turned off, and the switches SW21 and SW22 are turned on and the switches SW11 and SW12 are turned off. Switch to one of the low power consumption modes.

  In the high accuracy detection mode, the reference voltage generation circuit 30 and the constant current source 88 are disconnected from the driver circuit, and the reference voltage generation circuit 20 and the constant current source 78 are connected to the comparator 40 as an overcurrent detection circuit. In this case, it operates in the same manner as the driver circuit shown in FIG. 2, and an overcurrent flowing through the load 50 is detected. On the other hand, in the low power consumption mode, the reference voltage generation circuit 20 and the constant current source 78 are disconnected from the driver circuit, and the reference voltage generation circuit 30 and the constant current source 88 are connected to the comparator 40 as an overcurrent detection circuit. In this case, it operates in the same manner as the driver circuit shown in FIG. 3, and an overcurrent flowing through the load 50 is detected.

  In the driver circuit according to the present embodiment, an overcurrent detection circuit capable of detecting an overcurrent with high accuracy by the switch circuit 60, an overcurrent detection circuit capable of detecting an overcurrent while reducing power consumption, although the accuracy is inferior. Can be used.

  FIG. 5 is a diagram illustrating a specific example of the switch circuit 60 according to the second embodiment. Referring to FIG. 5, the switch circuit 60 includes a transistor 61 as a switch SW11, a transistor 63 as a switch SW12, a transistor 62 as a switch SW21, and a transistor 64 as a switch SW22. Here, a switch control signal SEL is supplied to the gates of the transistors 62 and 64, and an inverted signal of the switch control signal SEL is supplied to the gates of the transistors 63 and 64 via the inverter 65. Here, a P-channel MOS transistor is taken as an example of the switches SW11, SW12, SW21, and SW22. However, the present invention is not limited to this, and an N-channel MOS transistor or another switching element (for example, a transfer gate) may be used. .

  The embodiment of the present invention has been described in detail above, but the specific configuration is not limited to the above-described embodiment, and changes within a scope not departing from the gist of the present invention are included in the present invention. . For example, the reference transistors M31 to M3m are not limited to N-channel MOSFETs but may be P-channel transistors. Further, the constant current sources 78 and 88 in FIGS. 4 and 5 may be connected to a common power source. However, the power source is preferably different from the power source to which the load is connected.

20: Reference voltage generation circuit 30: Reference voltage generation circuit M10: Driver transistors M31 to M3m: Reference transistor 40: Comparator 50: Load 60: Switch circuits 61 to 64: Transistor 65: Inverters 71 to 73: Nodes 78 and 88 : Constant current source 83: Capacitor CTRL: Drive control signal Iref1, Iref2: Constant current OC: Overcurrent detection signal SEL: Switch control signals SW11, SW12, SW21, SW22: Switches VD1, VD2, VD3: Power supply voltage

Claims (3)

A driver transistor for driving a load connected to the drain;
A first reference voltage generation circuit including a plurality of reference transistors connected in series via a drain and a source and having a gate commonly connected to a gate of the driver transistor;
A driver circuit comprising: a comparator that outputs, as an overcurrent detection signal, a signal corresponding to a comparison result between a drain voltage of the driver transistor and a drain voltage at an end of the plurality of reference transistors. The driver circuit according to claim 1,
The drain of the driver transistor is connected to the other end of the load, one end of which is connected to the first power source,
The first reference voltage generation circuit is a driver circuit connected at one end to a second end of a constant current source connected to a second power source different from the first power source. The driver circuit according to claim 1 or 2,
A first reference transistor having one end connected to a third power source different from the first power source and a drain connected to the other end of the constant current source;
A driver circuit further comprising: a switch circuit that selects one of the drain voltage of the end portions of the plurality of reference transistors and the drain voltage of the first reference transistor and inputs the selected one to the comparator.

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