JP2013179141A - Transistor, manufacturing method of the same, display device and electronic apparatus - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a transistor having high electrical characteristics, a manufacturing method of the transistor, a display device and an electronic apparatus.SOLUTION: A transistor manufacturing method comprises: a step of forming an oxide semiconductor film having a channel region and a gate electrode opposite to the channel region on a substrate; and a step of forming an insulation film which covers the gate electrode and the oxide semiconductor film. Immersion of moisture from the insulation film to the oxide semiconductor film is inhibited by the substrate.

Description

  The present technology relates to a transistor using an oxide semiconductor, a manufacturing method thereof, and a display device and an electronic device including the transistor.

  In recent years, with the increase in size and definition of displays, thin film transistors (TFTs) as driving elements are also required to have high mobility, such as zinc (Zn), indium (In), gallium (Ga), TFTs using oxide semiconductors such as tin (Sn), aluminum (Al), titanium (Ti) oxides, or mixtures thereof have been developed. In particular, a TFT using a complex oxide of Zn, In, and Ga has an electron mobility compared to a TFT using amorphous silicon (a-Si: H) generally used for a liquid crystal display or the like. Is known to exhibit large electrical properties.

  By the way, in the active drive type liquid crystal display device or organic EL (Electroluminescence) display device as described above, the TFT is used as a drive element, and the charge corresponding to the signal voltage for writing video is held in the holding capacitor. Yes. However, when the parasitic capacitance generated in the intersection region between the gate electrode and the source / drain electrode of the TFT is increased, the signal voltage may fluctuate, which may cause deterioration in image quality.

  In particular, in an organic EL display device, there is a possibility that the manufacturing yield may be reduced in association with the problem of the parasitic capacitance. Therefore, some attempts have been made to reduce the parasitic capacitance (for example, Patent Documents 1 to 3, Non-Patent Document 1, Patent Documents 1 and 2). In Patent Documents 1 to 3 and Non-Patent Document 1, after a gate electrode and a gate insulating film are provided at the same position in a plan view on a channel region of an oxide semiconductor film, the gate electrode and the gate insulating film of the oxide semiconductor film are provided. A method of forming a source / drain region by reducing the resistance of a region exposed from a film, that is, a top gate TFT formed by so-called self-alignment (self-alignment) is described. On the other hand, Non-Patent Document 2 discloses a bottom-gate TFT having a self-aligned structure.

JP 2011-228622 A JP 2012-015436 A JP 2007-220817 A

J. Park, 11 others, “Self-aligned top-gate amorphous gallium indium zinc oxide thin film transistors”, Applied Physics Letters, American Institute of Physics, 2008, Vol. 93, 053501 R. Hayashi, 6 others, "Improved Amorphous In-Ga-Zn-O TFTs", SID 08 DIGEST, 2008, 42.1, p. 621-624

  In TFTs using an oxide semiconductor film, including those having such a self-aligned structure, it is desired to prevent the diffusion of impurities such as moisture into the channel region and improve the electrical characteristics.

  The present technology has been made in view of such problems, and an object of the present technology is to provide a transistor, a manufacturing method thereof, a display device, and an electronic device which have improved electrical characteristics by reducing moisture intrusion into the oxide semiconductor film. It is to provide.

  A method for manufacturing a transistor according to an embodiment of the present technology includes a step of forming an oxide semiconductor film having a channel region on a substrate and a gate electrode facing the channel region, and an insulating film covering the gate electrode and the oxide semiconductor film. And the step of suppressing moisture from entering the oxide semiconductor film from the insulating film by the substrate.

  A transistor according to the present technology includes an oxide semiconductor film having a channel region on a substrate, a gate electrode facing the channel region, and an insulating film covering the gate electrode and the oxide semiconductor film. Intrusion of moisture into the substrate is suppressed by the substrate.

  A display device according to the present technology includes the transistor as a transistor for driving the display element.

  An electronic apparatus according to the present technology includes the display device.

  In the transistor of the present technology or the manufacturing method thereof, for example, moisture intrusion from the insulating film to the oxide semiconductor film through the substrate, which may be caused by heat treatment in the manufacturing process, is blocked.

  According to the transistor of the present technology, the manufacturing method thereof, the display device, and the electronic device, since the insulating film and the oxide semiconductor film are provided over the substrate that suppresses the intrusion of moisture, the insulating film is oxidized through the substrate. It is possible to prevent moisture from permeating into the physical semiconductor film. Therefore, high electrical characteristics can be obtained.

It is a sectional view showing the composition of the display concerning a 1st embodiment of this art. FIG. 6 is a diagram illustrating a modification of the storage capacitor element illustrated in FIG. 1. It is a figure showing the whole structure containing the peripheral circuit of the display apparatus shown in FIG. FIG. 4 is a diagram illustrating a circuit configuration of a pixel illustrated in FIG. 3. FIG. 3 is a cross-sectional view illustrating a method of manufacturing the display device illustrated in FIG. 1 in order of steps. FIG. 6 is a cross-sectional view illustrating a process following FIG. 5. FIG. 7 is a cross-sectional view illustrating a process following FIG. 6. It is sectional drawing showing the structure of the principal part of the display apparatus which concerns on a comparative example. FIG. 9 is a diagram illustrating transfer characteristics of the transistor illustrated in FIG. 8. It is sectional drawing for demonstrating the effect of the board | substrate shown in FIG. It is a figure showing the transfer characteristic of the transistor shown in FIG. It is a figure showing the result of the stress test of the transistor shown in FIG. 11 is a cross-sectional view illustrating a configuration of a display device according to Modification 1. FIG. 11 is a cross-sectional view illustrating a configuration of a display device according to Modification 2. FIG. It is sectional drawing showing the structure of the display apparatus which concerns on the 2nd Embodiment of this technique. FIG. 16 is a cross-sectional view illustrating a method of manufacturing the display device illustrated in FIG. 15 in order of steps. It is a top view showing schematic structure of the module containing display apparatuses, such as the said embodiment. It is a perspective view showing the external appearance of the application example 1 of display apparatuses, such as the said embodiment. 12 is a perspective view illustrating an appearance of application example 2. FIG. 12 is a perspective view illustrating an appearance of application example 3. FIG. (A) is a perspective view showing the external appearance seen from the front side of the application example 4, (B) is a perspective view showing the external appearance seen from the back side. 14 is a perspective view illustrating an appearance of application example 5. FIG. 16 is a perspective view illustrating an appearance of application example 6. FIG. (A) is a front view of the application example 7 in an open state, (B) is a side view thereof, (C) is a front view in a closed state, (D) is a left side view, and (E) is a right side view, (F) is a top view and (G) is a bottom view.

Hereinafter, embodiments of the present technology will be described in detail with reference to the drawings. The description will be given in the following order.
1. First embodiment (an example of an organic EL display device in which a substrate is composed only of a plate-like member)
2. Modification 1 (Example of liquid crystal display device)
3. Modification 2 (example of electronic paper)
4). Second embodiment (example in which the substrate has a diffusion prevention film)
5. Application examples

<First Embodiment>
FIG. 1 illustrates a cross-sectional configuration of a display device (display device 1) according to a first embodiment of the present technology. The display device 1 is an active matrix organic EL (Electroluminescence) display device, and includes a transistor 10T and a plurality of organic EL elements 20 driven by the transistor 10T. FIG. 1 shows a region (subpixel) corresponding to one transistor 10 </ b> T and the organic EL element 20.

  The display device 1 includes a storage capacitor element 10C sharing the oxide semiconductor film 12 of the transistor 10T, and an organic EL element 20 is provided on the transistor 10T and the storage capacitor element 10C with a planarization layer 18 therebetween. ing. The transistor 10T is a staggered (top gate type) TFT having the substrate 11, the oxide semiconductor film 12, the gate insulating film 13T, and the gate electrode 14T in this order. The oxide semiconductor film 12 and the gate electrode 14T are covered with an interlayer insulating film 16 (insulating film). The source / drain electrode 17 is electrically connected to the oxide semiconductor film 12 through the connection hole H 1 of the interlayer insulating film 16.

(Transistor 10T)
The substrate 11 is made of a plate-like member such as quartz, glass, silicon, or a plastic film. Here, since the oxide semiconductor film 12 is in contact with the substrate 11, a material having a relatively low moisture permeability, such as glass, is used for the substrate 11.

  In the display device 1, a transistor 10T (oxide semiconductor film 12) is provided in contact with the substrate 11. Thus, moisture diffusion from the interlayer insulating film 16 of the transistor 10T to the oxide semiconductor film 12 can be suppressed.

  The oxide semiconductor film 12 is provided in a selective region on the substrate 11 and has a function as an active layer of the transistor 10T. The oxide semiconductor film 12 includes, for example, an oxide of at least one element selected from indium (In), gallium (Ga), zinc (Zn), and tin (Sn) as a main component. Specifically, indium tin zinc oxide (ITZO) or indium gallium zinc oxide (IGZO: InGaZnO) such as an amorphous one is zinc oxide (ZnO) or indium zinc oxide (IZO (registered trademark), such as a crystalline one. )), Indium gallium oxide (IGO), indium tin oxide (ITO), indium oxide (InO), or the like. The thickness of the oxide semiconductor film 12 (thickness in the stacking direction, hereinafter simply referred to as thickness) is, for example, about 50 nm.

  The oxide semiconductor film 12 has a channel region 12T facing the upper gate electrode 14T, and is adjacent to the channel region 12T, and has a low resistance region 12B (source / drain region) having a lower electrical resistivity than the channel region 12T. ). The low resistance region 12B is provided in a part in the thickness direction from the surface (upper surface) of the oxide semiconductor film 12. For example, a metal (dopant) is formed by reacting an oxide semiconductor material with a metal such as aluminum (Al). ) Is diffused. A source / drain electrode 17 is electrically connected to the low resistance region 12B. The self-aligned structure of the transistor 10T is realized by the low resistance region 12B. The low resistance region 12B also has a role of stabilizing the characteristics of the transistor 10T.

The gate electrode 14T is provided on the channel region 12T with the gate insulating film 13T interposed therebetween. The gate electrode 14T and the gate insulating film 13T have the same shape in plan view. The gate insulating film 13T has a thickness of about 300 nm, for example, and is formed of a single type of silicon oxide film (SiO), silicon nitride film (SiN), silicon nitride oxide film (SiON), aluminum oxide film (AlO), or the like. It is comprised by the laminated film which consists of a layer film or 2 or more types of them. For the gate insulating film 13T, a material that is difficult to reduce the oxide semiconductor film 12, for example, a silicon oxide film or an aluminum oxide film is preferably used.

The gate electrode 14T controls the carrier density in the oxide semiconductor film 12 (channel region 12T) by the gate voltage (Vg) applied to the transistor 10T and has a function as a wiring for supplying a potential. . The gate electrode 14T is made of, for example, a single element made of molybdenum (Mo), titanium (Ti), aluminum, silver (Ag), neodymium (Nd), or copper (Cu), or an alloy thereof. . A laminated structure using a plurality of simple substances or alloys may be used. The gate electrode 14T is preferably made of a low resistance metal such as aluminum or copper. For example, a layer made of titanium or molybdenum (barrier layer) may be laminated on a layer made of a low resistance metal (low resistance layer), or an alloy containing a low resistance metal, such as an alloy of aluminum and neodymium ( Al-Nd) may be used. The gate electrode 14T may be made of a transparent conductive film such as ITO. The thickness of the gate electrode 14T is, for example, 10 nm to 500 nm.

  A high resistance film 15 is provided between the gate electrode 14T and the oxide semiconductor film 12 (low resistance region 12B) and the interlayer insulating film 16. The high resistance film 15 also covers the storage capacitor element 10C. The high resistance film 15 is a film in which a metal film serving as a supply source of metal diffused into the low resistance region 12B of the oxide semiconductor film 12 remains as an oxide film in a manufacturing process described later. For example, the high resistance film 15 has a thickness of 20 nm or less and is made of titanium oxide, aluminum oxide, indium oxide, tin oxide, or the like. Such a high resistance film 15 has a function of reducing the influence of oxygen and moisture that change the electrical characteristics of the oxide semiconductor film 12 in the transistor 10T, that is, a barrier function, in addition to the above-described process role. doing. Therefore, by providing the high resistance film 15, the electrical characteristics of the transistor 10T and the storage capacitor element 10C can be stabilized, and the effect of the interlayer insulating film 16 can be further enhanced.

  The interlayer insulating film 16 is provided on the high resistance film 15 and extends to the outside of the oxide semiconductor film 12 similarly to the high resistance film 15 and covers the oxide semiconductor film 12 together with the gate electrode 14T. The interlayer insulating film 16 is made of, for example, an organic material such as acrylic resin, polyimide, or siloxane, or an inorganic material such as a silicon oxide film, a silicon nitride film, a silicon oxynitride film, or aluminum oxide. Such an organic material and an inorganic material may be laminated. The interlayer insulating film 16 containing an organic material can be easily thickened to about 2 μm, for example. The interlayer insulating film 16 thus thickened can sufficiently cover a step such as between the gate insulating film 13T and the gate electrode 14T to ensure insulation. Further, the interlayer insulating film 16 containing an organic material can reduce the wiring capacitance formed by the metal wiring, and can increase the size and the high frame rate of the display device 1. Therefore, in the self-aligned transistor 10T, it is preferable to use the interlayer insulating film 16 containing an organic insulating material.

  The source / drain electrodes 17 are patterned on the interlayer insulating film 16 and connected to the low resistance region 12B of the oxide semiconductor film 12 through the connection holes H1 that penetrate the interlayer insulating film 16 and the high resistance film 15. ing. It is desirable that the source / drain electrode 17 be provided so as to avoid the position directly above the gate electrode 14T. This is to prevent parasitic capacitance from being formed in the intersection region between the gate electrode 14T and the source / drain electrode 17. The source / drain electrode 17 has a thickness of about 500 nm, for example, and is made of the same material as the metal or transparent conductive film mentioned for the gate electrode 14T. The source / drain electrodes 17 are also preferably made of a low resistance metal material such as aluminum or copper, and more preferably a laminated film of a low resistance layer and a barrier layer. This is because by configuring the source / drain electrode 17 with such a laminated film, it is possible to drive with less wiring delay.

(Retention capacitance element 10C)
The storage capacitor element 10C is provided on the substrate 11 together with the transistor 10T, and is, for example, a capacitor element that holds charges in the pixel circuit 50A described later. The storage capacitor element 10C includes an oxide semiconductor film 12, a capacitor insulating film 13C, and a capacitor electrode 14C in this order from the substrate 11 side in common with the transistor 10T. A high resistance film 15 and an interlayer insulating film 16 are provided in this order on the storage capacitor element 10C. In the oxide semiconductor film 12, the region facing the capacitor electrode 14C (capacitor region 12C) does not have the low resistance region 12B like the channel region 12T, and the electric resistance in the thickness direction is constant. In other words, in the oxide semiconductor film 12, the low resistance region 12B is provided in addition to the channel region 12T and the capacitor region 12C. In the capacitor region 12C, for example, a metal material is used between the substrate 11 and the oxide semiconductor film 12 (FIG. 2A) or between the oxide semiconductor film 12 and the capacitor insulating film 13C (FIG. 2B). A conductive film (conductive film 19) may be provided. As a result, the dependency of the capacitance value on the applied voltage can be eliminated, and a sufficient capacitance can be secured and display characteristics can be maintained regardless of the magnitude of the gate voltage. By configuring the capacitor insulating film 13C with an inorganic insulating material, a large storage capacitor element 10C can be obtained. The capacitive insulating film 13C is formed, for example, in the same process as the gate insulating film 13T, is made of the same material as the gate insulating film 13T, and has the same film thickness. The capacitor electrode 14C is also configured by the same process as the gate electrode 14T, for example, is configured by the same material as the gate electrode 14T, and has the same film thickness. The capacitor insulating film 13C and the gate insulating film 13T, and the capacitor electrode 14C and the gate electrode 14T may be formed in different processes, or may be formed of different materials and different film thicknesses.

The organic EL element 20 is provided on the planarization layer 18. The organic EL element 20 includes a first electrode 21, a pixel separation film 22, an organic layer 23, and a second electrode 24 in this order from the planarization layer 18 side, and is sealed with a protective layer 25. A sealing substrate 27 is bonded on the protective layer 25 with an adhesive layer 26 made of a thermosetting resin or an ultraviolet curable resin interposed therebetween. The display device 1 may be a bottom emission method (lower surface emission method) in which light generated in the organic layer 23 is extracted from the substrate 11 side, or a top emission method (upper surface emission method) in which light is generated from the sealing substrate 27 side. May be.

  The planarizing layer 18 is provided on the source / drain electrodes 17 and the interlayer insulating film 16 over the entire display region of the substrate 11 (display region 50 described later in FIG. 3), and has a connection hole H2. The connection hole H2 is for connecting the source / drain electrode 17 of the transistor 10T and the first electrode 21 of the organic EL element 20. The planarization layer 18 is made of, for example, polyimide or acrylic resin.

  The first electrode 21 is provided on the planarization layer 18 so as to fill the connection hole H2. The first electrode 21 functions as an anode, for example, and is provided for each element. When the display device 1 is a bottom emission system, the first electrode 21 is made of a transparent conductive film such as indium tin oxide (ITO), indium zinc oxide (IZO), indium zinc oxide (InZnO), or the like. It is composed of a single layer film or a laminated film composed of two or more of these. On the other hand, when the display device 1 is a top emission system, the first electrode 21 is made of at least one of reflective metals, for example, aluminum, magnesium (Mg), calcium (Ca), and sodium (Na). Or a single layer film made of an alloy containing at least one of them, or a multilayer film in which single metals or alloys are laminated.

  The pixel separation film 22 is for ensuring insulation between the first electrode 21 and the second electrode 24 and for partitioning and separating the light emitting regions of each element. Have. The pixel separation film 22 is made of, for example, a photosensitive resin such as polyimide, acrylic resin, or novolac resin.

  The organic layer 23 is provided so as to cover the opening of the pixel isolation film 22. The organic layer 23 includes an organic electroluminescent layer (organic EL layer), and emits light when a driving current is applied. The organic layer 23 has, for example, a hole injection layer, a hole transport layer, an organic EL layer, and an electron transport layer in this order from the substrate 11 (first electrode 21) side, and recombination of electrons and holes. Is generated in the organic EL layer to generate light. The constituent material of the organic EL layer may be a general low molecular or high molecular organic material, and is not particularly limited. For example, an organic EL layer that emits red, green, and blue may be applied separately for each element, or an organic EL layer that emits white (for example, a stack of red, green, and blue organic EL layers). May be provided over the entire surface of the substrate 11. The hole injection layer is for increasing hole injection efficiency and preventing leakage, and the hole transport layer is for increasing hole transport efficiency to the organic EL layer. A layer other than the organic EL layer such as a hole injection layer, a hole transport layer, or an electron transport layer may be provided as necessary.

  The second electrode 24 functions as, for example, a cathode and is made of a metal conductive film. When the display device 1 is a bottom emission method, the second electrode 24 is made of a reflective metal, for example, at least one of aluminum, magnesium (Mg), calcium (Ca), and sodium (Na). A single layer film made of a single metal or an alloy containing at least one of them, or a multilayer film in which single metals or alloys are laminated. On the other hand, when the display device 1 is a top emission system, a transparent conductive film such as ITO or IZO is used for the second electrode 24. The second electrode 24 is provided in common with each element, for example, while being insulated from the first electrode 21.

The protective layer 25 may be made of either an insulating material or a conductive material. Examples of the insulating material include amorphous silicon (a-Si), amorphous silicon carbide (a-SiC), amorphous silicon nitride (a-Si _(1-X) N _x ), and amorphous carbon (a-C). Can be mentioned.

  The sealing substrate 27 is disposed so as to face the substrate 11 with the transistor 10T, the storage capacitor element 10C, and the organic EL element 20 therebetween. A material similar to that of the substrate 11 can be used for the sealing substrate 27. When the display device 1 is a top emission method, a transparent material may be used for the sealing substrate 27 and a color filter or a light shielding film may be provided on the sealing substrate 27 side. When the display device 1 is a bottom emission system, the substrate 11 is made of a transparent material, and for example, a color filter or a light shielding film is provided on the substrate 11 side.

(Configuration of peripheral circuit and pixel circuit)
As shown in FIG. 3, the display device 1 has a plurality of pixels PXLC including such organic EL elements 20, and the pixels PXLC are arranged in a display area 50 on the substrate 11 in a matrix, for example. Around the display area 50, a horizontal selector (HSEL) 51 as a signal line driving circuit, a write scanner (WSCN) 52 as a scanning line driving circuit, and a power scanner 53 as a power line driving circuit are provided.

  In the display region 50, a plurality (n integers) of signal lines DTL1 to DTLn are arranged in the column direction, and a plurality (integer m) of scanning lines WSL1 to WSLm are arranged in the row direction. A pixel PXLC (any one of pixels corresponding to R, G, and B) is provided at each intersection of the signal line DTL and the scanning line DSL. Each signal line DTL is electrically connected to the horizontal selector 51, and a video signal is supplied from the horizontal selector 51 to each pixel PXLC via the signal line DTL. On the other hand, each scanning line WSL is electrically connected to the write scanner 52, and a scanning signal (selection pulse) is supplied from the light scanner 52 to each pixel PXLC via the scanning line WSL. Each power supply line DSL is connected to a power supply scanner 53, and a power supply signal (control pulse) is supplied from the power supply scanner 53 to each pixel PXLC via the power supply line DSL.

  FIG. 4 illustrates a specific circuit configuration example in the pixel PXLC. Each pixel PXLC has a pixel circuit 50 </ b> A including the organic EL element 20. The pixel circuit 50A is an active driving circuit having a sampling transistor Tr1 and a driving transistor Tr2, a storage capacitor element 10C, and an organic EL element 20. Note that at least one of the sampling transistor Tr1 and the driving transistor Tr2 corresponds to the transistor 10T in the above-described embodiment or the like.

  The sampling transistor Tr1 has its gate connected to the corresponding scanning line WSL, one of its source and drain connected to the corresponding signal line DTL, and the other connected to the gate of the driving transistor Tr2. The drain of the driving transistor Tr2 is connected to the corresponding power supply line DSL, and the source is connected to the anode of the organic EL element 20. The cathode of the organic EL element 20 is connected to the ground wiring 5H. The ground wiring 5H is wired in common to all the pixels PXLC. The storage capacitor element 10C is disposed between the source and gate of the driving transistor Tr2.

  The sampling transistor Tr1 conducts according to the scanning signal (selection pulse) supplied from the scanning line WSL, thereby sampling the signal potential of the video signal supplied from the signal line DTL and holding it in the holding capacitor element 10C. Is. The driving transistor Tr2 is supplied with a current from a power supply line DSL set to a predetermined first potential (not shown), and drives the driving current according to the signal potential held in the holding capacitor element 10C as an organic EL element. 20 is supplied. The organic EL element 20 emits light with a luminance corresponding to the signal potential of the video signal by the driving current supplied from the driving transistor Tr2.

  In such a circuit configuration, the sampling transistor Tr1 is turned on according to the scanning signal (selection pulse) supplied from the scanning line WSL, whereby the signal potential of the video signal supplied from the signal line DTL is sampled and held. It is held by the capacitive element 10C. In addition, a current is supplied from the power supply line DSL set to the first potential to the driving transistor Tr2, and the driving current is changed to the organic EL element 20 (red, green and red) according to the signal potential held in the holding capacitor element 10C. To each blue organic EL element). Each organic EL element 20 emits light with a luminance corresponding to the signal potential of the video signal by the supplied drive current. Thereby, the display device 1 performs video display based on the video signal.

  The display device 1 can be manufactured as follows, for example.

(Process of forming transistor 10T and storage capacitor element 10C)
First, as shown in FIG. 5A, the oxide semiconductor film 12 made of the above-described material is formed in contact with the substrate 11 made of a plate-like member. Specifically, an oxide semiconductor material film (not shown) is formed to a thickness of about 50 nm, for example, by sputtering, for example, over the entire surface of the substrate 11. At this time, a ceramic having the same composition as the oxide semiconductor to be formed is used as a target. In addition, since the carrier concentration in the oxide semiconductor greatly depends on the oxygen partial pressure during sputtering, the oxygen partial pressure is controlled so as to obtain desired transistor characteristics. When the oxide semiconductor film 12 is made of a crystalline material such as ZnO, IZO, or IGO, the etching selectivity can be easily improved in the etching process of the gate insulating film 13T (or the capacitive insulating film 13C) described later. Can be made. Next, the formed oxide semiconductor material film is patterned into a predetermined shape by, for example, photolithography and etching. In that case, it is preferable to process by wet etching using a mixed solution of phosphoric acid, nitric acid and acetic acid. The mixed solution of phosphoric acid, nitric acid and acetic acid can have a sufficiently large selection ratio with the base, and can be processed relatively easily.

  Subsequently, as shown in FIG. 5B, over the entire surface of the substrate 11, for example, an insulating film 13 made of a silicon oxide film or an aluminum oxide film having a thickness of 200 nm and a metal material such as molybdenum, titanium or aluminum having a thickness of 500 nm. A conductive film 14 is formed in this order. The insulating film 13 can be formed by, for example, a plasma CVD (Chemical Vapor Deposition) method. The insulating film 13 made of a silicon oxide film can be formed not only by the plasma CVD method but also by a reactive sputtering method. When an aluminum oxide film is used for the insulating film 13, an atomic layer film forming method can be used in addition to the reactive sputtering method and the CVD method. The conductive film 14 can be formed by, for example, a sputtering method.

  After the conductive film 14 is formed, the conductive film 14 is patterned by, for example, photolithography and etching to form the gate electrode 14T and the capacitor electrode 14C in selective regions on the oxide semiconductor film 12. Next, the insulating film 13 is etched using the formed gate electrode 14T and capacitor electrode 14C as a mask. Thus, the gate insulating film 13T and the capacitor insulating film 13C are patterned in substantially the same shape in plan view (FIG. 5C). In the case where the oxide semiconductor film 12 is made of the above crystalline material, a chemical solution such as hydrofluoric acid can be used in this etching step, so that it can be easily processed while maintaining a very large etching selectivity. . The capacitor insulating film 13C and the capacitor electrode 14C of the storage capacitor element 10C may be formed using a material different from that of the insulating film 13 and the conductive film 14 after the gate electrode 14T and the gate insulating film 13T are formed. .

  Subsequently, as shown in FIG. 6A, a metal film 15A made of, for example, titanium, aluminum, tin, or indium is formed on the entire surface of the substrate 11 by, for example, sputtering. The film is formed. The metal film 15A is made of a metal that reacts with oxygen at a relatively low temperature, and is formed in contact with the oxide semiconductor film 12 other than the portion where the gate electrode 14T and the capacitor electrode 14C are formed.

  Next, as shown in FIG. 6B, the heat treatment (first heat treatment) is performed at a temperature of about 200 ° C., for example, to oxidize the metal film 15A, whereby the high resistance film 15 made of a metal oxide film is formed. It is formed. At this time, in regions other than the channel region 12T and the capacitor region 12C of the oxide semiconductor film 12, a low resistance region 12B (including a source / drain region) is formed in a part on the high resistance film 15 side in the thickness direction. The Since a part of oxygen contained in the oxide semiconductor film 12 is used for the oxidation reaction of the metal film 15A, the metal film 15A is used in the oxide semiconductor film 12 as the oxidation of the metal film 15A progresses. The oxygen concentration decreases from the surface (upper surface) side in contact with the surface. On the other hand, a metal such as aluminum diffuses into the oxide semiconductor film 12 from the metal film 15A. This metal element functions as a dopant, and the resistance of the region on the upper surface side of the oxide semiconductor film 12 in contact with the metal film 15A is reduced. As a result, a low resistance region 12B having a lower electrical resistance than the channel region 12T and the capacitance region 12C is formed.

  As the heat treatment of the metal film 15A, it is preferable to anneal at a temperature of about 200 ° C. as described above. At that time, by performing annealing in an oxidizing gas atmosphere containing oxygen or the like, it is possible to suppress the oxygen concentration in the low resistance region 12B from becoming too low and supply sufficient oxygen to the oxide semiconductor film 12. Become. Thereby, it becomes possible to simplify the process by reducing the annealing process to be performed in the subsequent process.

  The high resistance film 15 may be formed by, for example, setting the temperature of the substrate 11 when the metal film 15A is formed on the substrate 11 to be relatively high instead of the annealing step. For example, in the process of FIG. 6A, when the metal film 15A is formed while the temperature of the substrate 11 is maintained at about 200 ° C., a predetermined region of the oxide semiconductor film 12 is reduced in resistance without performing heat treatment. Can do. In this case, the carrier concentration of the oxide semiconductor film 12 can be reduced to a level necessary for a transistor.

  The metal film 15A is preferably formed with a thickness of 10 nm or less as described above. This is because if the thickness of the metal film 15A is 10 nm or less, the metal film 15A can be completely oxidized (the high resistance film 15 is formed) by heat treatment. When the metal film 15A is not completely oxidized, a process of removing the unoxidized metal film 15A by etching is required. This is because leakage current may occur if the metal film 15A that is not sufficiently oxidized remains on the gate electrode 14T and the capacitor electrode 14C. When the metal film 15A is completely oxidized and the high resistance film 15 is formed, such a removal process becomes unnecessary, and the manufacturing process can be simplified. That is, the generation of leakage current can be prevented without performing the removal step by etching. When the metal film 15A is formed with a thickness of 10 nm or less, the thickness of the high resistance film 15 after the heat treatment is about 20 nm or less.

  As a method for oxidizing the metal film 15A, in addition to the heat treatment as described above, a method such as oxidation in a water vapor atmosphere or plasma oxidation may be used. In particular, the plasma oxidation has the following advantages. After the formation of the high-resistance film 15, an interlayer insulating film 16 is formed by plasma CVD (FIG. 7A described later), but after the plasma oxidation process is performed on the metal film 15A, continuously (continuously) ), The interlayer insulating film 16 can be formed. Therefore, there is an advantage that it is not necessary to increase the number of steps. For example, plasma oxidation is preferably performed by setting the temperature of the substrate 11 to about 200 ° C. to 400 ° C. and generating plasma in a gas atmosphere containing oxygen such as a mixed gas of oxygen and oxygen dinitride. By such a process, the high resistance film 15 having a function of reducing the influence of oxygen and moisture can be formed.

  Further, as a technique for reducing the resistance of a predetermined region of the oxide semiconductor film 12, in addition to the technique based on the reaction between the metal film 15A and the oxide semiconductor film 12 as described above, the resistance is reduced by plasma treatment. For example, a silicon nitride film may be formed by a plasma CVD method, and a resistance may be reduced by hydrogen diffusion from the silicon nitride film.

  After the high resistance film 15 is formed, an interlayer insulating film 16 is formed over the entire surface of the high resistance film 15 as shown in FIG. When the interlayer insulating film 16 includes an inorganic insulating material, for example, plasma CVD, sputtering, or atomic layer deposition is used. When the interlayer insulating film 16 includes an organic insulating material, for example, spin coating or slitting is used. A coating method such as a coating method can be used. The thickened interlayer insulating film 16 can be easily formed by a coating method. Subsequently, exposure and development processes are performed to form connection holes H1 at predetermined positions of the interlayer insulating film 16. In the case where a photosensitive resin is used for the interlayer insulating film 16, it is possible to perform exposure and development with this photosensitive resin to form the connection hole H1 at a predetermined location.

  Subsequently, a conductive film (not shown) to be the source / drain electrode 17 made of the above-described material or the like is formed on the interlayer insulating film 16 by, eg, sputtering, and the contact hole H1 is filled with this conductive film. After that, this conductive film is patterned into a predetermined shape by, for example, photolithography and etching. Thereby, the source / drain electrode 17 is formed on the interlayer insulating film 16, and the source / drain electrode 17 is electrically connected to the low resistance region 12B of the oxide semiconductor film 12 through the connection hole H1 (see FIG. FIG. 7 (B)). Through the above steps, the transistor 10T and the storage capacitor element 10C are formed over the substrate 11.

(Annealing process of transistor 10T and storage capacitor element 10C)
After the transistor 10T and the storage capacitor element 10C are formed, an annealing process (second heat treatment) is performed. In this embodiment, moisture intrusion from the interlayer insulating film 16 to the oxide semiconductor film 12 is suppressed by the substrate 11, and thus the electrical characteristics of the transistor 10T can be improved in this step. This will be described below.

  FIG. 8 illustrates a cross-sectional configuration of the transistor 100T and the storage capacitor element 100C of the display device (display device 100) according to the comparative example. The substrate 111 of the transistor 100T has an insulating film 111A made of, for example, a silicon oxide film, a silicon nitride film, or a silicon oxynitride film on the surface of a plate-like member made of, for example, glass or a resin material. The oxide semiconductor film 12 is in contact. The insulating film 111A is formed by a plasma CVD method.

  After the transistor 100T is annealed in an oxygen atmosphere, measured transfer characteristics are shown in FIGS. 9A and 9B. FIG. 9 (A) is annealed at 200 ° C. and FIG. 9 (B) is annealed at 300 ° C., respectively. This is a result of measuring 12 points in the plane of the substrate 111 with a drain voltage of 10 V, the vertical axis represents the drain current (Id), and the horizontal axis represents the gate voltage (Vg). The transistor 100T used for measurement has a channel length of 4 μm and a channel width of 10 μm. A 300 nm thick silicon oxide film formed by plasma CVD is used as the insulating film 111A.

  From this result, in-plane TFT characteristics are uniform in 200 ° C. annealing (FIG. 9A), but in 300 ° C. annealing (FIG. 9B), there is a tendency to change in the negative direction. I know that there is. This is because the insulating film 111A formed by the plasma CVD method has a high moisture permeability, and annealing is performed at a relatively high temperature of 300 ° C. so that the moisture contained in the interlayer insulating film 16 is outside the oxide semiconductor film 12. This is considered to be caused by diffusion from the oxide film 12 to the oxide semiconductor film 12 through the insulating film 111A (FIG. 8). Moisture diffused in the oxide semiconductor film 12 causes a reduction reaction and deteriorates TFT characteristics. In particular, the interlayer insulating film 16 made of an organic insulating material is preferably used for the transistor 100T having a self-aligned structure, but the organic insulating material may contain more moisture than the inorganic insulating material.

  In addition, since the source gas used in the plasma CVD method contains hydrogen, the insulating film 111A formed thereby contains a large amount of hydrogen. When this hydrogen diffuses from the insulating film 111A to the oxide semiconductor film 12, the hydrogen acts as a donor, which may increase the carrier concentration in the channel region 12C and degrade the TFT characteristics.

  On the other hand, in the transistor 10T of this embodiment, the oxide semiconductor film 12 is in contact with the substrate 11 including only a plate member such as glass having low transmittance. That is, the substrate 11 does not have an insulating film formed by the plasma CVD method. Accordingly, moisture in the interlayer insulating film 16 is blocked by the substrate 11, and diffusion of moisture into the oxide semiconductor film 12 can be prevented (FIG. 10).

  11A and 11B show transfer characteristics of the transistor 10T measured under the same conditions as the transistor 100T. FIG. 11A shows the result of annealing at 200 ° C., and FIG. 11B shows the result of annealing at 300 ° C. From this result, it is understood that the in-plane TFT characteristics are maintained uniformly even in the annealing process at 300 ° C. in the transistor 10T.

  9 and 11, the transfer characteristics after annealing at 200 ° C. and 300 ° C. were examined. The temperature of such an annealing process affects the reliability of the transistor 10T. This will be described below. FIG. 12 shows the results of a stress test of the transistors 10T and 100T, where the vertical axis represents the amount of change in threshold voltage (Vth) and the horizontal axis represents the stress time. After the transistors 10T and 100T were annealed at 200 ° C. or 300 ° C. in an oxygen atmosphere, the stress temperature was 50 ° C., and the bias voltage was measured at a gate voltage of 15V. When the broken line is annealed at 200 ° C., the solid line shows the case where annealing is performed at 300 ° C. From this result, it is understood that the amount of change in Vth is reduced by annealing the transistors 10T and 100T at a higher temperature (300 ° C.). Therefore, the transistor 10T can maintain the in-plane TFT characteristics uniformly and can obtain high reliability by annealing at a higher temperature. Further, since it is not necessary to form an insulating film on the substrate 11, the manufacturing process can be simplified.

(Step of forming the planarization layer 18)
After the transistor 10T and the storage capacitor element 10C are annealed, a planarizing film 18 made of the above-described material is formed by, for example, spin coating or slit coating so as to cover the interlayer insulating film 16 and the source / drain electrodes 17. Then, a connection hole H 2 is formed in a part of the region facing the source / drain electrode layer 17.

(Step of forming organic EL element 20)
Subsequently, an organic EL element 20 is formed on the planarizing film 18. Specifically, the first electrode 21 made of the above-described material is formed on the planarizing film 18 by, for example, sputtering so as to fill the connection hole H2, and then patterned by photolithography and etching. Thereafter, after forming a pixel separation film 22 having an opening on the first electrode 21, an organic layer 23 is formed by, for example, a vacuum evaporation method. Subsequently, the second electrode 24 made of the above-described material is formed on the organic layer 23 by, for example, a sputtering method. Next, after forming a protective layer 25 on the second electrode 24 by, for example, a CVD method, a sealing substrate 27 is bonded onto the protective layer 25 using an adhesive layer 26. Thus, the display device 1 shown in FIG. 1 is completed.

  In the display device 1, for example, when a driving current corresponding to a video signal of each color is applied to each pixel PXLC corresponding to any of R, G, and B, the organic material is transmitted through the first electrode 21 and the second electrode 24. Electrons and holes are injected into the layer 23. These electrons and holes are recombined in the organic EL layer included in the organic layer 23 to emit light. In this way, the display device 1 displays, for example, R, G, B full color video. In addition, when a potential corresponding to the video signal is applied to one end of the storage capacitor element 10C during the video display operation, charges corresponding to the video signal are accumulated in the storage capacitor element 10C.

  Here, since the substrate 11 is composed only of a plate-like member, diffusion of moisture from the interlayer insulating film 16 to the oxide semiconductor film 12 can be suppressed.

  As described above, in this embodiment, the substrate 11 suppresses diffusion of moisture from the interlayer insulating film 16 to the oxide semiconductor film 12, so that the electrical characteristics of the transistor 10T can be improved.

  Even if the transistor 10T is annealed at a higher temperature, the TFT characteristics in the plane of the substrate 11 are maintained uniformly. Therefore, the change amount of the threshold voltage can be reduced and the reliability of the transistor 10T can be improved.

  Hereinafter, modifications of the present embodiment and other embodiments will be described. In the following description, the same components as those of the above-described embodiment will be denoted by the same reference numerals, and description thereof will be omitted as appropriate.

<Modification 1>
FIG. 13 illustrates a cross-sectional configuration of a display device (display device 1A) according to Modification 1 of the first embodiment. The display device 1 </ b> A has a liquid crystal display element 30 instead of the organic EL element 20 of the display device 1. Except for this point, the display device 1A has the same configuration as the display device 1 of the above-described embodiment, and the operation and effect thereof are also the same.

  The display device 1A includes a transistor 10T and a storage capacitor element 10C similar to those of the display device 1, and a liquid crystal display element 30 is provided above the transistor 10T and the storage capacitor element 10C with a planarizing layer 18 therebetween. ing.

  The liquid crystal display element 30 has, for example, a liquid crystal layer 33 sealed between a pixel electrode 31 and a counter electrode 32. An alignment film is formed on each surface of the pixel electrode 31 and the counter electrode 32 on the liquid crystal layer 33 side. 34A and 34B are provided. The pixel electrode 31 is disposed for each pixel and is electrically connected to, for example, the source / drain electrode 17 of the transistor 10T. The counter electrode 32 is provided on the counter substrate 35 as a common electrode for a plurality of pixels, and is held at, for example, a common potential. The liquid crystal layer 33 is made of, for example, liquid crystal driven in a VA (Vertical Alignment) mode, a TN (Twisted Nematic) mode, an IPS (In Plane Switching) mode, or the like.

  Further, a backlight 36 is provided below the substrate 11, and polarizing plates 37 </ b> A and 37 </ b> B are bonded to the backlight 36 side of the substrate 11 and the counter substrate 35.

  The backlight 36 is a light source that emits light toward the liquid crystal layer 33 and includes, for example, a plurality of LEDs (Light Emitting Diodes), CCFLs (Cold Cathode Fluorescent Lamps), and the like. The backlight 36 is controlled to be turned on and off by a backlight driving unit (not shown).

  The polarizing plates 37A and 37B (polarizers and analyzers) are arranged, for example, in a crossed Nicols state, so that, for example, the illumination light from the backlight 36 is cut off when no voltage is applied (off state). In the applied state (on state), the light is transmitted.

  In the display device 1 </ b> A, similarly to the display device 1 of the above-described embodiment, the substrate 11 can prevent moisture from entering the oxide semiconductor film 12 from the interlayer insulating film 16. Thereby, also in this modification, the electrical characteristics of the transistor 10T can be improved.

<Modification 2>
FIG. 14 illustrates a cross-sectional configuration of a display device (display device 1B) according to the second modification of the first embodiment. The display device 1 </ b> B is so-called electronic paper, and includes an electrophoretic display element 40 instead of the organic EL element 20 of the display device 1. Except for this point, the display device 1B has the same configuration as the display device 1 of the above-described embodiment, and the operation and effect thereof are also the same.

  The display device 1B includes a transistor 10T and a storage capacitor element 10C similar to those of the display device 1, and the electrophoretic display element 40 is disposed above the transistor 10T and the storage capacitor element 10C with a planarizing layer 18 therebetween. Is provided.

  In the electrophoretic display element 40, for example, a display layer 43 made of an electrophoretic display body is sealed between the pixel electrode 41 and the common electrode 42. The pixel electrode 41 is provided for each pixel and is electrically connected to, for example, the source / drain electrode 17 of the transistor 10T. The common electrode 42 is provided on the counter substrate 44 as a common electrode for a plurality of pixels.

  In the display device 1 </ b> B, similarly to the display device 1 of the above embodiment, the substrate 11 can prevent moisture from entering the oxide semiconductor film 12 from the interlayer insulating film 16. Thereby, also in this modification, the electrical characteristics of the transistor 10T can be improved.

<Second Embodiment>
FIG. 15 illustrates a cross-sectional configuration of a display device (display device 2) according to the second embodiment of the present technology. In the display device 2, the substrate (substrate 71) has a diffusion prevention film 71A on the surface thereof. Except for this point, the display device 2 has the same configuration as the display device 1 of the first embodiment, and the operation and effect thereof are also the same.

  The transistor (transistor 70T) of the display device 2 is a top-gate TFT having the oxide semiconductor film 12, the gate insulating film 13T, and the gate electrode 14T in this order on the substrate 71. The oxide semiconductor film 12 is formed on the substrate 71. It is in contact with the diffusion preventing film 71A. The substrate 71 has a diffusion preventing film 71A on the surface of the plate-like member 71B. The diffusion prevention film 71A is for preventing the permeation of moisture from the interlayer insulating film 16 to the oxide semiconductor film 12 in the annealing process, and is composed of a film having a low moisture permeability. The plate-like member 71B is made of, for example, quartz, glass, silicon, or a resin film. As described in the first embodiment, since the oxide semiconductor film 12 can be formed by sputtering without heating the substrate 71, an inexpensive resin material can be used for the plate-like member 71B. Examples of the resin material include PET (polyethylene terephthalate) or PEN (polyethylene naphthalate). The plate-like member 71B may be configured by a metal substrate such as stainless steel (SUS) according to the purpose. Here, for example, a resin material having a moisture permeability higher than that of glass can be used for the plate-like member 71B.

  The diffusion prevention film 71A is composed of an inorganic insulating film such as a silicon oxide film, a silicon nitride film, or an aluminum oxide film formed by, for example, a sputtering method or an ion beam sputtering method. The organic EL element 20 is provided over the transistor 70T and the storage capacitor element 70C sharing the oxide semiconductor film 12 with the transistor 70T with the planarization layer 18 therebetween. Instead of the organic EL element 20, a liquid crystal display element 30 (FIG. 13) or an electrophoretic display element 40 (FIG. 14) may be provided.

  In such a display device 2, first, a plate-like member 71B is prepared (FIG. 16A), and diffusion is prevented on the surface of the plate-like member 71B by a physical thin film forming method such as a sputtering method or an ion beam sputtering method. A film 71A is formed (FIG. 16B). By using the sputtering method or the ion beam sputtering method, the amount of hydrogen contained in the diffusion preventing film 71A is suppressed as compared with the case where the plasma CVD method is used, and diffusion of hydrogen into the oxide semiconductor film 12 in addition to moisture is performed. Can also prevent. After the formation of the diffusion prevention film 71A, the oxide semiconductor film 12 is formed over the diffusion prevention film 71A in the same manner as the transistor 10T (FIG. 16C). Thereafter, similarly to the first embodiment, the gate insulating film 13T, the gate electrode 14T, the high resistance film 15, the interlayer insulating film 16, and the source / drain electrode 17 are provided to form the transistor 70T. In addition, after forming the storage capacitor element 70 </ b> C together with the transistor 70 </ b> T, the organic EL element 20 is formed to complete the display device 2.

  In the display device 2, even when the plate-like member 71B is made of a material having a relatively high moisture permeability such as a resin material, moisture from the interlayer insulating film 16 to the oxide semiconductor film 12 is prevented by the diffusion preventing film 71A. Diffusion can be prevented. Thereby, also in this embodiment, the electrical characteristics and reliability of the transistor 70T can be improved.

(Application example)
Hereinafter, application examples of the display devices (display devices 1, 1A, 1B, 2) as described above to electronic devices will be described. Examples of the electronic device include a television device, a digital camera, a notebook personal computer, a mobile terminal device such as a mobile phone, or a video camera. In other words, the display device can be applied to electronic devices in various fields that display a video signal input from the outside or a video signal generated inside as an image or video.

(module)
The display device is, for example, a module as shown in FIG.
Embedded in various electronic devices. In this module, for example, an area 61 exposed from the sealing substrate 27 or the counter substrates 35 and 44 is provided on one side of the substrate 11, and the horizontal selector 51, the light scanner 52, and the power scanner 53 are provided in the exposed area 61. The wiring is extended to form an external connection terminal (not shown). The external connection terminal may be provided with a flexible printed circuit (FPC) 62 for signal input / output.

(Application example 1)
18A and 18B each illustrate the appearance of an electronic book to which the display device of the above embodiment is applied. The electronic book has, for example, a display unit 210 and a non-display unit 220, and the display unit 210 is configured by the display device of the above embodiment.

(Application example 2)
FIG. 19 illustrates an appearance of a smartphone to which the display device of the above embodiment is applied. This smartphone has, for example, a display unit 230 and a non-display unit 240, and the display unit 230 is configured by the display device of the above embodiment.

(Application example 3)
FIG. 20 illustrates an appearance of a television device to which the display device of the above embodiment is applied. This television apparatus has, for example, a video display screen unit 300 including a front panel 310 and a filter glass 320, and the video display screen unit 300 is configured by the display device of the above embodiment.

(Application example 4)
FIG. 21 shows the appearance of a digital camera to which the display device of the above embodiment is applied. The digital camera includes, for example, a flash light emitting unit 410, a display unit 420, a menu switch 430, and a shutter button 440, and the display unit 420 is configured by the display device of the above embodiment.

(Application example 5)
FIG. 22 shows an appearance of a notebook personal computer to which the display device of the above embodiment is applied. The notebook personal computer has, for example, a main body 510, a keyboard 520 for inputting characters and the like, and a display unit 530 for displaying an image. The display unit 530 is constituted by the display device of the above embodiment. Has been.

(Application example 6)
FIG. 23 shows the appearance of a video camera to which the display device of the above embodiment is applied. This video camera includes, for example, a main body 610, a subject photographing lens 620 provided on the front side surface of the main body 610, a start / stop switch 630 at the time of photographing, and a display 640. And this display part 640 is comprised by the display apparatus of the said embodiment.

(Application example 7)
FIG. 24 illustrates an appearance of a mobile phone to which the display device of the above embodiment is applied. For example, the mobile phone is obtained by connecting an upper housing 710 and a lower housing 720 with a connecting portion (hinge portion) 730, and includes a display 740, a sub-display 750, a picture light 760, and a camera 770. Yes. Of these, the display 740 or the sub-display 750 is configured by the display device of the above embodiment.

  As described above, the present technology has been described with the embodiment and the modified examples, but the present technology is not limited to the embodiment and the like, and various modifications are possible. For example, in the embodiment and the like, the structure provided with the high resistance film 15 has been described as an example. However, the high resistance film 15 can be removed after the low resistance region 12B is formed. However, as described above, the case where the high resistance film 15 is provided is preferable because the electrical characteristics of the transistor 10T and the storage capacitor element 10C can be stably maintained.

  In the above embodiment and the like, the top gate transistor 10T (or the transistor 70T) including the oxide semiconductor film 12, the gate insulating film 13T, and the gate electrode 14T in this order on the substrate 11 (or the substrate 71) has been described. However, the present technology can also be applied to a bottom-gate transistor having the gate electrode 14T, the gate insulating film 13T, and the oxide semiconductor film 12 in this order on the substrate 11. However, according to the present technology, in the case where the oxide semiconductor film 12 is disposed at a position closer to the substrate 11, that is, in the top-gate transistor 10T, it is possible to more effectively prevent moisture from entering.

  Further, in the above-described embodiment and the like, the case where moisture diffusion from the interlayer insulating film 16 to the oxide semiconductor film 12 occurs due to the annealing process in the manufacturing process has been described. Can be prevented.

  In addition, in the above embodiment and the like, the case where the low resistance region 12B is provided in a part of the thickness direction from the surface (upper surface) of the region other than the channel region 12C of the oxide semiconductor film 12 has been described. The low resistance region 12B can also be provided from the surface (upper surface) of the oxide semiconductor film 12 in the entire thickness direction.

  In addition, the material and thickness of each layer described in the above embodiments and the like, or the film formation method and film formation conditions are not limited, and may be other materials and thicknesses, or may be other film formation methods and components. It is good also as film | membrane conditions.

  Furthermore, in the above-described embodiment and the like, the configuration of the organic EL element 20, the liquid crystal display element 30, the electrophoretic display element 40, the transistor 10T, and the storage capacitor element 10C has been specifically described. It is not necessary to provide, and other layers may be further provided.

  In addition, the present technology can also be applied to a display device using other display elements such as an inorganic electroluminescence element in addition to the organic EL element 20, the liquid crystal display element 30, and the electrophoretic display element 40.

  Furthermore, for example, the configuration of the display device has been specifically described in the above embodiment, but it is not necessary to include all the components, and other components may be further included.

In addition, this technique can also take the following structures.
(1) including a step of forming an oxide semiconductor film having a channel region on a substrate and a gate electrode facing the channel region, and a step of forming an insulating film covering the gate electrode and the oxide semiconductor film. A method for manufacturing a transistor in which moisture penetration from the insulating film into the oxide semiconductor film is suppressed by the substrate.
(2) The method for producing a transistor according to (1), wherein the substrate is made of glass.
(3) The method for producing a transistor according to (1) or (2), wherein the insulating film contains an organic insulating material.
(4) The method for manufacturing a transistor according to any one of (1) to (3), wherein the oxide semiconductor film is formed in contact with the substrate.
(5) forming a metal film in contact with a region other than the channel region of the oxide semiconductor film, performing a first heat treatment on the metal film to form a high resistance film, and forming a low resistance region in the oxide semiconductor film; The method for manufacturing a transistor according to any one of (1) to (4).
(6) The method for producing a transistor according to (5), wherein source / drain electrodes are electrically connected to the low resistance region.
(7) The method for manufacturing a transistor according to (6), wherein a second heat treatment is performed after forming the source / drain electrodes.
(8) The method for manufacturing a transistor according to (7), wherein the second heat treatment is performed at 200 ° C. or higher.
(9) The method for producing a transistor according to (7) or (8), wherein the second heat treatment is performed at 300 ° C. or higher.
(10) The method for manufacturing a transistor according to (1), wherein the substrate has a moisture diffusion prevention film on a surface thereof.
(11) The method for manufacturing a transistor according to (10), wherein the oxide semiconductor film is formed in contact with the diffusion prevention film.
(12) The method for producing a transistor according to (10) or (11), wherein the diffusion prevention film is formed by sputtering or ion beam sputtering.
(13) The method of manufacturing a transistor according to any one of (10) to (12), wherein the substrate is formed by forming the diffusion prevention film on a plate-like member made of a resin material. (14) The method for manufacturing a transistor according to any one of (10) to (13), wherein the diffusion prevention film includes any one of a silicon oxide film, a silicon nitride film, and an aluminum oxide film. .
(15) An oxide semiconductor film having a channel region on a substrate, a gate electrode facing the channel region, and an insulating film covering the gate electrode and the oxide semiconductor film, and the oxide semiconductor from the insulating film A transistor that suppresses intrusion of moisture into the film by the substrate.
(16) A display element and a transistor for driving the display element are provided, the transistor including an oxide semiconductor film having a channel region on a substrate, a gate electrode facing the channel region, the gate electrode, and the oxide semiconductor And a display device that suppresses intrusion of moisture from the insulating film into the oxide semiconductor film by the substrate.
(17) The above (1) having a storage capacitor element sharing the oxide semiconductor film of the transistor.
6) The display device as described.
(18) The display device according to (16) or (17), wherein the oxide semiconductor film has a pair of low resistance regions adjacent to the channel region.
(19) A display device including a display element and a transistor for driving the display element, the transistor including an oxide semiconductor film having a channel region on a substrate, a gate electrode facing the channel region, the gate electrode, And an insulating film that covers the oxide semiconductor film, wherein the substrate suppresses intrusion of moisture from the insulating film into the oxide semiconductor film.

  DESCRIPTION OF SYMBOLS 1,1A, 1B, 2 ... Display apparatus, 10T, 70T ... Transistor, 10C, 70C ... Retention capacity element, 11, 71 ... Substrate, 12 ... Oxide semiconductor film, 12T. ..Channel region, 12C ... low resistance region, 13T ... gate insulating film, 14T ... gate electrode, 15 ... high resistance film, 15A ... metal film, 16 ... interlayer insulating film , 17 ... Source / drain electrodes, 18 ... Planarization film, 20 ... Organic EL element, 21 ... First electrode, 22 ... Pixel separation film, 23 ... Organic layer, 24 ... 2nd electrode, 25 ... Protective layer, 26 ... Adhesive layer, 27 ... Substrate for sealing, H1, H2 ... Connection hole, 50 ... Display area, 51 ... Horizontal selector, 52 ... light scanner, 53 ... power scanner, DSL ... scan line, D L ... signal line, 50A ... pixel circuit, 30 ... liquid crystal display element, 31, 41 ... pixel electrode, 32 ... counter electrode, 33 ... liquid crystal layer, 34A, 34B ... Alignment film 35, 44 ... counter substrate, 36 ... backlight, 37A, 37B ... polarizing plate, 40 ... electrophoretic display element, 42 ... common electrode, 43 ... Display layer.

Claims (19)

Forming an oxide semiconductor film having a channel region on a substrate and a gate electrode facing the channel region;
Forming an insulating film covering the gate electrode and the oxide semiconductor film,
A method for manufacturing a transistor, which prevents moisture from entering the oxide semiconductor film from the insulating film by the substrate. The method for manufacturing a transistor according to claim 1, wherein the substrate is made of glass. The method for manufacturing a transistor according to claim 1, wherein the insulating film includes an organic insulating material. The method for manufacturing a transistor according to claim 1, wherein the oxide semiconductor film is formed in contact with the substrate. Forming a metal film in contact with a region other than the channel region of the oxide semiconductor film;
The method for manufacturing a transistor according to claim 1, wherein a first heat treatment is performed on the metal film to form a high resistance film, and a low resistance region is formed in the oxide semiconductor film. The method for manufacturing a transistor according to claim 5, wherein source / drain electrodes are electrically connected to the low resistance region. The method for manufacturing a transistor according to claim 6, wherein a second heat treatment is performed after forming the source / drain electrodes. The method for manufacturing a transistor according to claim 7, wherein the second heat treatment is performed at 200 ° C. or higher. The method for manufacturing a transistor according to claim 7, wherein the second heat treatment is performed at 300 ° C. or higher. The method for manufacturing a transistor according to claim 1, wherein the substrate has a moisture diffusion preventing film on a surface thereof. The method for manufacturing a transistor according to claim 10, wherein the oxide semiconductor film is formed in contact with the diffusion prevention film. The method for manufacturing a transistor according to claim 10, wherein the diffusion preventing film is formed by a sputtering method or an ion beam sputtering method. The method for manufacturing a transistor according to claim 10, wherein the substrate is formed by forming the diffusion prevention film on a plate-shaped member made of a resin material. The method of manufacturing a transistor according to claim 10, wherein the diffusion prevention film includes any one of a silicon oxide film, a silicon nitride film, and an aluminum oxide film. An oxide semiconductor film having a channel region on a substrate and a gate electrode facing the channel region;
An insulating film covering the gate electrode and the oxide semiconductor film,
A transistor in which moisture penetration from the insulating film into the oxide semiconductor film is suppressed by the substrate. A display element and a transistor for driving the display element,
The transistor is
An oxide semiconductor film having a channel region on a substrate and a gate electrode facing the channel region;
An insulating film covering the gate electrode and the oxide semiconductor film,
The display device suppresses intrusion of moisture from the insulating film into the oxide semiconductor film by the substrate. The display device according to claim 16, further comprising a storage capacitor element sharing an oxide semiconductor film of the transistor. The display device according to claim 16, wherein the oxide semiconductor film has a pair of low-resistance regions adjacent to the channel region. A display device having a display element and a transistor for driving the display element;
The transistor is
An oxide semiconductor film having a channel region on a substrate and a gate electrode facing the channel region;
An insulating film covering the gate electrode and the oxide semiconductor film,
An electronic device in which moisture penetration from the insulating film into the oxide semiconductor film is suppressed by the substrate.

Images