JP2011014761A - Method of manufacturing thin film transistor of bottom gate structure - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method for manufacturing a thin film transistor which has an active layer formed of an amorphous metal oxide semiconductor as a principal component, an improved TFT characteristic feature even if a TFT is applied with heat treatment at a relatively low temperature of 200°C or lower, a small shift in a threshold value for driving, and high reliability.SOLUTION: The method for manufacturing a thin film transistor 20 of a bottom gate structure having an active layer 16 formed of an amorphous metal oxide semiconductor as the principal component comprises a step for forming a film formed of an amorphous metal oxide semiconductor as the principal component as the active layer so as to have a specific resistance value of not lower than 1.5 Ω cm and not higher than 1,500 Ω cm by a sputtering in an atmosphere containing oxygen; and a step for performing heat treatment at a temperature of not lower than 100°C and not higher than 200°C in the atmosphere containing oxygen after forming the film formed of an amorphous metal oxide semiconductor as the principal component.

Description

  The present invention relates to a method for manufacturing a bottom gate thin film transistor.

  2. Description of the Related Art In recent years, flat and thin image display devices (Flat Panel Displays: FPD) have been put into practical use due to advances in liquid crystal and electroluminescence (EL) technologies. For example, organic electroluminescent devices (organic EL devices) that use materials that emit light when excited by passing current can emit light with high brightness at low voltage. Development is progressing in a wide range of fields such as digital assistants (PDAs), computer displays, automobile information displays, and TV monitors.

  When manufacturing an active matrix type organic EL display that controls driving of a pixel by a field effect thin film transistor (TFT), generally, a TFT and a wiring (gate wiring) connected to the TFT on a glass substrate. , Data wiring, etc.), pixel electrodes, common electrodes, and the like are formed. As a material constituting the semiconductor layer (active layer) of the TFT, amorphous silicon or polycrystalline silicon is generally used.

  On the other hand, attempts have been made to use a lightweight and flexible resin substrate instead of a glass substrate in order to improve the flexibility, thinning, weight reduction, and breakage resistance of the FPD. However, when amorphous silicon or polycrystalline silicon is used as the active layer of the TFT, a high-temperature process of 300 ° C. or higher is required, so that it is difficult to form it on a resin substrate having lower heat resistance than a glass substrate.

  As a TFT that can be manufactured at a low temperature, a TFT using an oxide semiconductor as an active layer has been developed. For example, an amorphous oxide semiconductor containing In, Ga, and Zn (referred to as “IGZO” as appropriate) can be formed at room temperature by sputtering and can be formed over a resin substrate. Therefore, a TFT for flexible display Expectations are growing as a material constituting the active layer.

If an active layer is formed of an oxide semiconductor, a TFT can be formed on a resin substrate at a relatively low temperature. However, the on / off ratio is small, threshold voltage change (threshold shift) is likely to occur, etc. There is a point to be improved in TFT characteristics.
Therefore, it is disclosed that TFT characteristics are improved by forming an active layer with an oxide semiconductor and then performing heat treatment. For example, it has been proposed to form an indium oxide film as an active layer under a condition that the specific resistance value is less than 1 Ωcm, and then heat-treat the indium oxide film at 150 ° C. to 450 ° C. in an oxidizing atmosphere (Patent Literature). 1).

Further, in a bottom gate TFT, after an active layer made of an oxide containing In, Ga, and Zn is formed by a sputtering method, heat treatment is performed at 350 ° C. for 1 hour in a nitrogen atmosphere, whereby off current It has been reported that the device characteristics are improved as the N is smaller and the on / off ratio exceeds 10 ⁸ (see Non-Patent Document 1).

JP 2008-130814 A

IDW'07 Proceedings AMD9-1, pp. 1775-1778

  If an active layer made of an amorphous oxide semiconductor such as IGZO is formed, a TFT can be fabricated on the resin substrate at a relatively low temperature. However, if heat treatment is performed to improve TFT characteristics, the resin substrate Even if the heat resistance is high, it is 200 ° C. or lower, so it is necessary to perform heat treatment at 200 ° C. or lower. However, when the heat treatment temperature is lowered, there is a problem that the threshold shift amount at the time of driving the TFT is increased and the reliability is lowered.

  The present invention has an active layer mainly composed of an amorphous oxide semiconductor, effectively improves TFT characteristics even at a relatively low temperature of 200 ° C. or lower, has a small threshold shift during driving, and has high reliability. It is an object to provide a method capable of manufacturing a thin film transistor.

In order to achieve the above object, the following invention is provided.
<1> A method for producing a bottom gate thin film transistor having an active layer mainly composed of an amorphous oxide semiconductor,
Forming, as the active layer, a film mainly composed of the amorphous oxide semiconductor so that the specific resistance value is 1.5 Ωcm or more and 1500 Ωcm or less by a sputtering method in an oxygen-containing atmosphere;
A step of performing a heat treatment at a temperature of 100 ° C. or higher and 200 ° C. or lower in an oxygen-containing atmosphere after forming a film containing the amorphous oxide semiconductor as a main component;
A method of manufacturing a thin film transistor having a bottom gate structure including:
<2> The method for producing a bottom-gate thin film transistor according to <1>, wherein the amorphous oxide semiconductor is an amorphous oxide semiconductor containing In, Ga, and Zn.
<3> The method for producing a bottom-gate thin film transistor according to <1> or <2>, wherein the temperature of the heat treatment is 150 ° C. or lower.

  The present invention has an active layer mainly composed of an amorphous oxide semiconductor, effectively improves TFT characteristics even at a relatively low temperature of 200 ° C. or lower, has a small threshold shift during driving, and is reliable. A method capable of manufacturing a thin film transistor having a high thickness is provided.

It is a figure which shows the relationship between the specific resistance value of an active layer (IGZO layer), and a threshold value shift. It is a figure which shows an example of the change of the threshold voltage before and behind heat processing. It is a figure which shows an example of the process of manufacturing the thin-film transistor of the bottom gate structure concerning this invention. It is a figure which shows the change of the specific resistance value and threshold voltage of the active layer (IGZO layer) before and behind heat processing. It is a schematic block diagram which shows the other example of the thin film transistor of the bottom gate structure concerning this invention.

Hereinafter, a method for manufacturing a TFT having a bottom gate structure according to the present invention will be described in detail with reference to the accompanying drawings.
When manufacturing a TFT having a bottom gate structure, if an amorphous oxide semiconductor film is formed on the gate insulating film as an active layer by sputtering in an oxygen-containing atmosphere, oxygen ions at the time of sputtering deposition hit the underlying gate insulating film and cause damage. In addition, the damage of the gate insulating film is considered to be one of the causes of the deterioration of the threshold shift. Therefore, the present inventor controls the oxygen concentration during film formation, specifically, reduces the damage to the gate insulating film during sputter film formation of the active layer by reducing the oxygen concentration, It was considered that the threshold shift can be improved by recovering the damage of the gate insulating film by heat treatment after the sputter deposition of the active layer.

For example, when an amorphous oxide semiconductor film is formed by sputtering, the specific resistance value is reduced by suppressing the oxygen concentration low, and the threshold shift is improved. However, if the oxygen concentration is lowered, the threshold voltage (Von) becomes negative and normally on.
Accordingly, the present inventor formed active layers made of an oxide semiconductor containing In, Ga, and Zn and having different specific resistance values by sputtering, and investigated the relationship between the specific resistance value and the threshold shift, and as shown in FIG. Thus, it was found that the threshold shift amount (ΔVth) differs depending on the specific resistance value.
Further, the inventor forms an amorphous oxide semiconductor film so that the specific resistance value falls within a specific range, and then performs heat treatment at a relatively low temperature that can withstand a resin substrate in an oxygen-containing atmosphere. As shown in FIG. 2, the inventors have found that the threshold voltage recovers to a positive value, resulting in a normally-off TFT.
The present invention has been completed based on these findings.

  FIG. 3 schematically shows an example of the steps of a method for manufacturing a TFT having a bottom gate structure according to the present invention.

<Formation of gate electrode>
First, the gate electrode 12 is formed over the substrate 10 (FIG. 3A).
As the substrate (support) 10 for forming the thin film transistor 20, a substrate (support) having at least the surface on which the TFT 20 is formed has insulating properties, and has dimensional stability, solvent resistance, workability, and the like. In the present invention, the amorphous oxide film to be the active layer 16 is formed and then heat treatment is performed. However, the amorphous oxide film can be formed at a low temperature, and the heat treatment after the film formation is also performed at a relatively low temperature (100 ° C. to 200 ° C. The resin substrate can be used preferably.

  Examples of the resin substrate include polyesters such as polyethylene terephthalate, polybutylene terephthalate, and polyethylene naphthalate, polystyrene, polycarbonate, polyethersulfone, polyarylate, allyl diglycol carbonate, polyimide, polycycloolefin, norbornene resin, and poly (chlorotriethylene). And organic materials such as synthetic resins (fluoroethylene).

When a resin substrate made of these organic materials is used, it is preferable to provide a moisture permeation preventing layer or a gas barrier layer on one or both sides of the substrate in order to suppress moisture and oxygen permeation. As a material for the moisture permeation preventive layer or the gas barrier layer, inorganic materials such as silicon nitride, silicon oxide, silicon oxynitride, and aluminum oxide, and laminates of these inorganic materials and organic materials such as acrylic resins can be preferably used. The moisture permeation preventing layer or the gas barrier layer can be formed by, for example, a high frequency sputtering method.
Further, if necessary, a hard coat layer, an undercoat layer or the like may be provided.

  The shape, structure, size, etc. of the substrate 10 are not particularly limited, and may be appropriately selected according to the application, purpose, etc. of the device to be finally produced. In general, the shape of the substrate 10 is preferably a plate shape from the viewpoints of weight reduction, thickness reduction, handleability, ease of formation of the TFT 20, and the like. The structure of the substrate 10 may be a single layer structure or a laminated structure. Moreover, the board | substrate may be comprised by the single member and may be comprised by two or more members.

  If flexibility is not required, a substrate other than a resin substrate may be used. For example, a substrate made of an inorganic material such as glass or zirconia stabilized yttrium oxide (YSZ) can be used. Also, for example, when manufacturing an organic EL display, if it is not necessary to extract light from the substrate side, for example, a metal substrate such as stainless steel, Fe, Al, Ni, Co, Cu, or an alloy thereof, or a semiconductor substrate such as Si And an insulating film for ensuring electrical insulation may be provided on the substrate 10.

  The gate electrode 12 is made of, for example, a metal such as Al, Mo, Cr, Ta, Ti, Au, or Ag, an alloy such as Al—Nd, APC, tin oxide, zinc oxide, indium oxide, indium tin oxide (ITO), or oxide. A metal oxide conductive film such as zinc indium (IZO) can be used.

For example, suitability for materials used from wet methods such as printing methods, coating methods, physical methods such as vacuum deposition methods, sputtering methods, ion plating methods, chemical methods such as CVD and plasma CVD methods, etc. The film is formed on the substrate 10 according to a method appropriately selected in consideration of the above. The thickness of the gate electrode 12 is, for example, not less than 10 nm and not more than 1000 nm.
After film formation, patterning is performed into a predetermined shape by photolithography. At this time, it is preferable to pattern the gate electrode 12 and the gate wiring (not shown) at the same time.
Further, patterning may be performed together with film formation through a metal mask (shadow mask) having an opening corresponding to the pattern of the gate electrode 12 to be formed.

<Formation of gate insulating film>
After the gate electrode 12 is formed over the substrate 10, a gate insulating film 14 that covers the gate electrode 12 is formed (FIG. 3B).
The gate insulating film 14 may be an insulating film containing two or more kinds of insulators such as SiO ₂ , SiN _x , SiON, Al ₂ O ₃ , Y ₂ O ₃ , Ta ₂ O ₅ , and HfO _2. Good. A polymer insulator such as polyimide or acrylic resin can also be used as the gate insulating film.

  The gate insulating film 14 needs to have a thickness for suppressing leakage current and improving voltage resistance. On the other hand, if the thickness of the gate insulating film 14 is too large, the driving voltage is increased. Although depending on the material of the gate insulating film 14, the thickness of the gate insulating film 14 is, for example, 50 nm to 1000 nm for an inorganic insulator, and 0.5 μm to 5 μm for a polymer insulator.

  The gate insulating film 14 is a material used from a wet method such as a printing method and a coating method, a physical method such as a vacuum deposition method, a sputtering method, and an ion plating method, and a chemical method such as a CVD method and a plasma CVD method. The film is formed in accordance with a method selected in consideration of the suitability of the film and patterned into a predetermined shape by a photolithography method as necessary.

<Formation of active layer>
Next, an active layer 16 containing an amorphous oxide semiconductor as a main component is formed over the gate insulating film 14 (FIG. 3C).

-Film formation process-
First, as the active layer 16, a film containing an amorphous oxide semiconductor as a main component so as to have a specific resistance value of 1.5 Ωcm or more and 1500 Ωcm or less by sputtering in an oxygen-containing atmosphere (appropriately, an “amorphous oxide semiconductor film” Form). Here, the “main component” is a component having the largest content (mass ratio) among the components constituting the active layer 16, and is preferably 50% by mass or more, more preferably 90% by mass or more. Preferably, it is most preferable to form the active layer 16 made of an amorphous oxide semiconductor excluding inevitable impurities.

As the amorphous oxide semiconductor constituting the active layer 16, an amorphous oxide semiconductor containing at least one of In, Ga, and Zn is preferable, and an amorphous oxide semiconductor containing In, Ga, and Zn is particularly preferable. As the composition structure, those of InGaO ₃ (ZnO) _m (m is a natural number of less than 6) are preferable, and these are n-type semiconductors whose carriers are electrons. Note that a p-type oxide semiconductor such as ZnO.Rh ₂ O ₃ , CuGaO ₂ , or SrCu ₂ O ₂ may be used for the active layer, or an oxide semiconductor disclosed in Japanese Patent Application Laid-Open No. 2006-165529. It may be used.

The specific resistance value of the amorphous oxide semiconductor film can be controlled by film formation conditions during sputtering film formation, such as oxygen concentration, pressure in the film formation chamber, and power. Sputter deposition may be performed under deposition conditions such that the specific resistance value of the amorphous oxide semiconductor film is 1.5 Ωcm or more and 1500 Ωcm or less. Here, the specific resistance value of the amorphous oxide semiconductor film is a value obtained by calculating from the sheet resistance and the film thickness. That is, when the sheet resistance is ρ (Ω / □) and the film thickness is d (cm), the specific resistance value A (Ωcm) is calculated as A = ρ × d. Incidentally, the measurement of the sheet resistance, the sheet resistance 10 ⁷ Ω / □ of less than the area Loresta -GP (manufactured by Mitsubishi Chemical Corporation), sheet resistance 10 ⁷ Ω / □ or more in an area HiTESTER -UP (manufactured by Mitsubishi Chemical Corp.) Each was used in an environment of 20 ° C. A stylus type surface shape measuring device DekTak-6M (manufactured by ULVAC) was used for the film thickness measurement.

  For example, when performing sputter deposition in a mixed atmosphere of argon and oxygen, the lower the oxygen concentration, the lower the oxygen content in the film and the lower the specific resistance value. The oxygen concentration in the sputtering atmosphere depends on other conditions such as temperature and power, but is 0.3% by volume from the viewpoint of more reliably setting the specific resistance value of the amorphous oxide semiconductor film to 1.5Ωcm to 1500Ωcm. It is preferably 5% by volume or less and more preferably 4% by volume or more and 4.5% by volume or less.

The patterning method of the active layer 16 is not particularly limited, and a method of patterning together with film formation by sputtering through a shadow mask having an opening corresponding to the pattern to be formed, a film formation method by sputtering, a photolithography method, and Examples include a patterning method using an etching method and a patterning method using a lift-off method.
Note that in the case where patterning is performed by a photolithography method or the like after film formation, patterning may be performed after film formation and before the following heat treatment step, or may be performed after heat treatment.

-Heat treatment process-
After a film containing an amorphous oxide semiconductor as a main component is formed as the active layer 16, heat treatment is performed at a temperature of 100 ° C. or higher and 200 ° C. or lower in an oxygen-containing atmosphere.

FIG. 4 shows the specific resistance value after forming the IGZO film as the active layer, and the change in the threshold voltage (Von) before and after performing heat treatment at 180 ° C. for 1 hour after the film formation. As shown in FIG. 4, if the specific resistance value of the IGZO film after sputter deposition is 1.5 Ωcm or more and 1500 Ωcm or less, Von is shifted to the plus side by the heat treatment, and the recovery effect of Von is obtained. On the other hand, when the specific resistance value of the IGZO film after sputter deposition is less than 1.5 Ωcm, the specific resistance hardly changes even when heat treatment is performed, and an effective Von recovery effect cannot be obtained. Will remain. Further, when the specific resistance value of the IGZO film after sputter deposition exceeds 1500 Ωcm, the threshold shift is large (see FIG. 1), and the threshold voltage (Von) is shifted to the negative side by the heat treatment, and Von recovery is performed. The effect is not obtained.
Note that the specific resistance value of the IGZO film after the sputter deposition is preferably 2.0 Ωcm or more and 1200 Ωcm or less, particularly preferably 3.0 Ωcm or more, from the viewpoint of suppression of threshold shift and realization of normally-off by recovery of Von. 500 Ωcm or less.

  After the amorphous oxide semiconductor film is formed as the active layer 16, the heat treatment temperature in the oxygen-containing atmosphere recovers Von by the heat treatment, although it depends on other conditions such as the specific resistance value and the oxygen concentration before the heat treatment. In view of suppressing the threshold shift and heat resistance when using a resin substrate, it is preferably 120 ° C. or higher and 200 ° C. or lower, and particularly when using a resin substrate, 120 ° C. or higher and 150 ° C. or lower is preferable. Note that the temperature at the time of heat treatment may be controlled by regarding the surface temperature of the substrate 10 as the temperature of the amorphous oxide semiconductor film.

The heat treatment time depends on other conditions such as the specific resistance value, the oxygen concentration, the heat treatment temperature, etc. before the heat treatment, but from the viewpoint of recovering Von by the heat treatment, suppressing the threshold shift, productivity and the like. The time is preferably from 12 minutes to 12 hours, particularly preferably from 30 minutes to 2 hours.
The oxygen concentration in the heat treatment atmosphere is preferably 3% by volume or more and 95% by volume or less, more preferably 5% by volume or more and 80% by volume or less, although it depends on other conditions such as specific resistance value, temperature and power before the heat treatment. .

−Source / drain electrode−
After the active layer 16 mainly composed of an amorphous oxide semiconductor is formed, source / drain electrodes 18A and 18B are formed (FIG. 3D).
The material constituting the source / drain electrodes 18A, 18B is a material having conductivity as an electrode, specifically, a metal such as Al, Mo, Cr, Ta, Ti, Au, Ag, Al-Nd, APC. Alloys such as tin oxide, zinc oxide, indium oxide, indium tin oxide (ITO), metal oxides such as indium zinc oxide (IZO), organic conductive compounds such as polyaniline, polythiophene, polypyrrole, or mixtures thereof It can be formed of a conductive material.

  The source / drain electrodes 18 </ b> A and 18 </ b> B may be formed so as to be conductive through the active layer 16 with a gap therebetween. The formation method of the source / drain electrodes 18A and 18B is not particularly limited, and may be a printing method, a wet method such as a coating method, a physical method such as a vacuum deposition method, a sputtering method, or an ion plating method, a CVD method, a plasma CVD method, or the like. A film may be formed according to a method selected from chemical methods and the like in consideration of suitability for the material. For example, when ITO is selected, the film can be formed according to a direct current or high frequency sputtering method, a vacuum deposition method, an ion plating method, or the like. Further, when an organic conductive compound is selected as a material for the source electrode 18A and the drain electrode 18B, it can be performed according to a wet film forming method.

  As a patterning method for the source / drain electrodes 18A and 18B, for example, a method of patterning together with a film through a metal mask (shadow mask) having an opening corresponding to a pattern to be formed, a photolithography after film formation Examples thereof include a patterning method by a method and an etching method, and a patterning method by a lift-off method.

  The thickness of the source / drain electrodes 18A and 18B varies depending on the material, required conductivity, etc., but considering the film formability, conductivity (reduction in resistance), etc., the source / drain electrodes 18A and 18B and the source / drain electrodes 18A and 18B are connected thereto. The total thickness of the conductive film serving as the wiring is, for example, not less than 10 nm and not more than 1000 nm.

Through the above-described steps, a highly reliable bottom gate TFT 20 with a small threshold shift, high mobility, and normally off can be manufactured.
After the TFT is manufactured, an interlayer insulating film, a pixel electrode, or the like may be further formed according to the final product (display device, imaging device, etc.). For example, when manufacturing an organic EL display, after sequentially forming an interlayer insulating film and a pixel electrode, after forming an upper electrode (common electrode) sequentially with an organic electroluminescence layer including at least a light emitting layer and ITO, Al, etc. A sealing resin film is attached. Thereby, a flexible organic EL display can be manufactured.

Hereinafter, examples and comparative examples will be described.
<Example 1>
On the thermally oxidized SiO ₂ (thickness 100 nm) film formed on the surface of the n ⁺ -Si substrate, an IGZO film having a thickness of 50 nm is formed by DC sputtering using a Shibaura Electronics Co., Ltd. magnetron sputtering apparatus: CFS-8EP-55. Formed. The conditions for forming the IGZO film are as follows.
Target: In ₂ Ga ₂ ZnO ₇ (purity: 4N, target size: 3 inches Φ)
DC power = 200W
Gas flow rate Ar / O ₂ = 100 / 4.2 (sccm)
Deposition chamber pressure: 0.37 Pa

Next, Al (thickness: 200 nm) was deposited on the IGZO film as a source / drain electrode by thermal resistance heating using a shadow mask.
After forming the source / drain electrodes, a heat treatment at 180 ° C. was performed for 1 hour in an oxygen-containing atmosphere (oxygen concentration: 8%).

After the film formation, the sheet resistance of the IGZO film was measured using Loresta GP (Mitsubishi Chemical Co., Ltd.) and Hitester UP (Mitsubishi Chemical Co., Ltd.), and the film thickness was measured using a stylus type surface shape measuring instrument DekTak-6M (ULVAC). The measurement was performed using When calculated from these measured values, the specific resistance value was 4.1 Ωcm.
Moreover, as a result of evaluating TFT characteristics after the heat treatment at Vd = 10 V, Von = −1V and mobility = 5.3 cm ² / Vs. Note that Von = −4.8 V in the TFT that was not heat-treated at 180 ° C. in an oxygen-containing atmosphere.
A stress of 1000 seconds was applied under stress conditions of Vg = 25V and Vd = 0.01V. The threshold shift amount after the stress application was 1.59V.

<Comparative Example 1>
A TFT was produced in the same manner as in Example 1 except that the IGZO film forming conditions were set as follows.
DC power = 200W
Gas flow rate Ar / O ₂ = 100 / 6.0 (sccm)
Deposition chamber pressure: 0.37 Pa

The specific resistance value of the IGZO film after film formation was 40000 Ωcm.
As a result of evaluating the TFT characteristics after the heat treatment at Vd = 10 V, Von = −0.8 V and mobility = 5.2 cm ² / Vs. Note that Von = −0.2 V in a TFT that was not heat-treated at 180 ° C. in an oxygen-containing atmosphere.
A stress of 1000 seconds was applied under stress conditions of Vg = 25V and Vd = 0.01V. The threshold shift amount after the stress application was 3.20V.

<Example 2>
A TFT was fabricated in the same manner as in Example 1 except that the IGZO film formation conditions were set such that DC power = 200 W, gas flow rate Ar / O ₂ = 100 / 4.5 (sccm), and film formation chamber pressure = 0.37 Pa.
The specific resistance value of the IGZO film after film formation was 410 Ωcm.
As a result of evaluating the TFT characteristics after the heat treatment at Vd = 10 V, Von = −0.8 V and mobility = 5.6 cm ² / Vs. Note that Von = −1.4 V for TFTs that were not heat-treated at 180 ° C. in an oxygen-containing atmosphere.
A stress of 1000 seconds was applied under stress conditions of Vg = 25V and Vd = 0.01V. The threshold shift amount after the stress application was 1.97V.

<Comparative Example 2>
A TFT was fabricated in the same manner as in Example 1 except that the IGZO film deposition conditions were set such that DC power = 200 W, gas flow rate Ar / O ₂ = 100 / 3.5 (sccm), and deposition chamber pressure = 0.37 Pa. .
The specific resistance value of the IGZO film after film formation was 0.5 Ωcm.
As a result of evaluating the TFT characteristics after the heat treatment at Vd = 10 V, Von = −6 V and mobility = 10.4 cm ² / Vs. Note that Von = −6.2 V for TFTs that were not heat-treated at 180 ° C. in an oxygen-containing atmosphere.
A stress of 1000 seconds was applied under stress conditions of Vg = 25V and Vd = 0.01V. The threshold shift amount after the stress application was 1.95V.

<Comparative Example 3>
A TFT was fabricated in the same manner as in Example 1 except that the IGZO film deposition conditions were DC power = 200 W, gas flow rate Ar / O ₂ = 100 / 4.9 (sccm), and deposition chamber pressure = 0.37 Pa.
The specific resistance value of the IGZO film after film formation was 16000 Ωcm.
As a result of evaluating the TFT characteristics after the heat treatment at Vd = 10 V, Von = −0.8 V and mobility = 5.3 cm ² / Vs. Note that Von = −0.4 V in the TFT that was not subjected to the heat treatment at 180 ° C.
A stress of 1000 seconds was applied under stress conditions of Vg = 25V and Vd = 0.01V. The threshold shift amount after the stress application was 2.94V.

<Comparative example 4>
A TFT was fabricated in the same manner as in Example 1 except that the temperature of the heat treatment in an oxygen-containing atmosphere (oxygen concentration 8%) was set to 80 ° C.
The specific resistance value of the IGZO film after film formation was 4.3 Ωcm.
As a result of evaluating TFT characteristics after the heat treatment at Vd = 10 V, Von = −4.0 V and mobility = 7.8 cm ² / Vs. Note that Von = −4.2V in the TFT that was not subjected to the heat treatment at 80 ° C. in an oxygen-containing atmosphere.
A stress of 1000 seconds was applied under stress conditions of Vg = 25V and Vd = 0.01V. The threshold shift amount after the stress application was 3.06V.

<Example 3>
A TFT was produced in the same manner as in Example 1 except that the temperature of the heat treatment in an oxygen-containing atmosphere (oxygen concentration: 8%) was 120 ° C.
The specific resistance value of the IGZO film after film formation was 4.1 Ωcm.
As a result of evaluating the TFT characteristics after the heat treatment at Vd = 10 V, Von = −1.0 V and mobility = 5.6 cm ² / Vs. Note that Von = −4.8 V in the TFT that was not subjected to the heat treatment at 120 ° C.
A stress of 1000 seconds was applied under stress conditions of Vg = 25V and Vd = 0.01V. The threshold shift amount after the stress application was 1.98V.

<Example 4>
A TFT was produced in the same manner as in Example 1 except that the temperature of the heat treatment in an oxygen-containing atmosphere (oxygen concentration: 8%) was 200 ° C.
The specific resistance value of the IGZO film after film formation at this time was 4.1 Ωcm.
As a result of evaluating TFT characteristics after the heat treatment at Vd = 10 V, Von = −0.8 V and mobility = 4.6 cm ² / Vs. Note that Von = −4.8 V in the TFT that was not subjected to the heat treatment at 200 ° C.
A stress of 1000 seconds was applied under stress conditions of Vg = 25V and Vd = 0.01V. The threshold shift amount after the stress application was 1.67V.

<Example 5>
A TFT was fabricated in the same manner as in Example 1 except that the IGZO film formation conditions were DC power = 50 W, gas flow rate Ar / O ₂ = 100 / 2.5 (sccm), and film formation chamber pressure = 0.37 Pa.
The specific resistance value of the IGZO film after film formation was 1200 Ωcm.
As a result of evaluating the TFT characteristics after the heat treatment at Vd = 10 V, Von = −0.6 V and mobility = 6.7 cm ² / Vs. Note that Von = −0.8 V in the TFT that was not subjected to the heat treatment at 180 ° C.
A stress of 1000 seconds was applied under stress conditions of Vg = 25V and Vd = 0.01V. The threshold shift amount after the stress application was 2.23V.

<Comparative Example 5>
A TFT was produced in the same manner as in Example 1 except that the IGZO film formation conditions were DC power = 250 W, gas flow rate Ar / O ₂ = 100 / 5.0 (sccm), and film formation chamber pressure = 0.37 Pa.
The specific resistance value of the IGZO film after film formation was 2300 Ωcm.
As a result of evaluating TFT characteristics after heat treatment at Vd = 10 V, Von = −0.8 V and mobility = 6.9 cm ² / Vs. Note that Von = −0.6 V in the TFT that was not subjected to the heat treatment at 180 ° C.
A stress of 1000 seconds was applied under stress conditions of Vg = 25V and Vd = 0.01V. The threshold shift amount after the stress application was 2.68V.

<Result>
The results of Examples and Comparative Examples are summarized in Table 1.

In Example 1, Example 2, and Example 5, the TFT characteristics of the threshold voltage (Von) and mobility after 180 ° C. annealing were almost the same as in Comparative Example 1 by making IGZO low resistance during film formation. There is a significant improvement in threshold shifts due to stress tests.
In Comparative Example 2, the film was formed under the condition of lower resistance than Example 2. The threshold shift by the stress test is improved as compared with Comparative Example 1, but Von does not return after annealing and remains normally on.

  In Comparative Example 3 and Comparative Example 5, the specific resistance value of IGZO was larger than 1500 Ωcm, and Von after annealing moved to the negative side with respect to Von before annealing. If the specific resistance value during film formation is higher than the specific resistance value of IGZO of Comparative Example 3, the Von recovery effect (plus shift) due to annealing is lost.

Comparative Example 4 shows that the temperature of the heat treatment is 80 ° C., but the Von recovery effect by annealing does not have the effect of improving the threshold shift.
In Examples 3 and 4, the annealing temperatures were 120 ° C. and 200 ° C., respectively. In this temperature range, the Von recovery effect and the threshold shift improvement effect by annealing are shown.

The present invention is not limited to the above embodiment and examples. In this embodiment, the elements are all fabricated on the Si substrate. However, for example, the elements may be fabricated by sequentially forming a gate electrode and a gate insulating film on a glass substrate. Of course, a flexible substrate using a resin substrate may be used instead of the glass substrate. In particular, in the present invention, a resin substrate is preferably used as the substrate because the temperature of the heat treatment can be as low as 200 ° C. or lower.
Further, for example, as shown in FIG. 5, a bottom gate TFT 22 in which source / drain electrodes 18A and 18B are formed on a gate insulating film 14 and then an active layer 16 is formed between the source / drain electrodes 18A and 18B. Also good.
In addition, other layers can be provided on the TFTs 20 and 22. For example, a protective layer may be provided on the active layer 16, or a contact layer for realizing ohmic contact may be provided between the active layer 16 and the source / drain electrodes 18 A and 18 B.
Moreover, what is necessary is just to select the electronic device to manufacture according to the objective, For example, this invention can be applied suitably also to manufacture of a liquid crystal display, an X-ray detector, etc.

DESCRIPTION OF SYMBOLS 10 Substrate 12 Gate electrode 14 Gate insulating film 16 Active layer 18A Source electrode 18B Drain electrodes 20 and 22 Thin film transistor (bottom gate type)

Claims (3)

A method of manufacturing a bottom gate thin film transistor having an active layer mainly composed of an amorphous oxide semiconductor,
Forming, as the active layer, a film mainly composed of the amorphous oxide semiconductor so that the specific resistance value is 1.5 Ωcm or more and 1500 Ωcm or less by a sputtering method in an oxygen-containing atmosphere;
A step of performing a heat treatment at a temperature of 100 ° C. or higher and 200 ° C. or lower in an oxygen-containing atmosphere after forming a film containing the amorphous oxide semiconductor as a main component;
A method of manufacturing a thin film transistor having a bottom gate structure including:   The method for manufacturing a thin film transistor having a bottom gate structure according to claim 1, wherein the amorphous oxide semiconductor is an amorphous oxide semiconductor containing In, Ga, and Zn.   3. The method of manufacturing a thin film transistor having a bottom gate structure according to claim 1, wherein a temperature of the heat treatment is 150 ° C. or less.