JP2013162013A - Laminate capacitor - Google Patents

Laminate capacitor Download PDF

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JP2013162013A
JP2013162013A JP2012024004A JP2012024004A JP2013162013A JP 2013162013 A JP2013162013 A JP 2013162013A JP 2012024004 A JP2012024004 A JP 2012024004A JP 2012024004 A JP2012024004 A JP 2012024004A JP 2013162013 A JP2013162013 A JP 2013162013A
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electrode
internal electrode
internal
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element body
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Koichi Okada
浩一 岡田
Sanshiro Ama
三四郎 阿滿
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TDK Corp
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Abstract

PROBLEM TO BE SOLVED: To provide a laminate capacitor capable of reliably securing a desired breakdown-voltage characteristic.SOLUTION: The laminate capacitor comprises: an element assembly 2 formed by laminating plural dielectric layers 7; a first terminal electrode and a second terminal electrode arranged on an outer surface of the element assembly; a first internal electrode 11 arranged in the element assembly 2 and connected to the first terminal electrode; a second internal electrode 13 arranged in the element assembly 2 opposite to the first internal electrode 11 in a lamination direction of the plural dielectric layers 7, and connected to the second terminal electrode; and an intermediate electrode 15 arranged in the element assembly 2 between the first internal electrode 11 and the second internal electrode 13 in the lamination direction, and not connected to the first terminal electrode and the second terminal electrode. An area of the intermediate electrode 15 is larger than that of a region 17, in which the first internal electrode 11 and the second internal electrode 13 are overlaid on each other in the lamination direction. An outer edge of the intermediate electrode 15 is positioned on an outer side than the outer edge of the region 17 when seen in the lamination direction.

Description

本発明は、積層コンデンサに関する。   The present invention relates to a multilayer capacitor.

積層コンデンサとして、複数の誘電体層が積層されてなる素体と、素体の外表面に配置された第一端子電極及び第二端子電極と、素体内に配置され、第一端子電極に接続された第一内部電極と、複数の誘電体層の積層方向で第一内部電極と対向するように素体内に配置され、第二端子電極に接続された第二内部電極と、を備えるものが知られている（たとえば、特許文献１参照）。特許文献１には、中高圧領域で使用される積層コンデンサにおいて、耐電圧特性を高める手段として、内部電極間の距離を大きくすることや、内部電極を複数の直列接続容量が形成されるような電極構造とすることが示されている。   As a multilayer capacitor, an element body in which a plurality of dielectric layers are laminated, a first terminal electrode and a second terminal electrode disposed on the outer surface of the element body, disposed in the element body, and connected to the first terminal electrode And a second internal electrode disposed in the element body so as to face the first internal electrode in the stacking direction of the plurality of dielectric layers and connected to the second terminal electrode. It is known (for example, refer to Patent Document 1). Patent Document 1 discloses that in a multilayer capacitor used in a medium-high voltage region, as a means for improving withstand voltage characteristics, the distance between the internal electrodes is increased, or a plurality of series-connected capacitances are formed for the internal electrodes. An electrode structure is shown.

特開２０００−３０６７６１号公報JP 2000-306761 A

複数の直列接続容量が形成されるような電極構造として、第一内部電極と第二内部電極との間に、第一端子電極と第二端子電極とに接続されない中間電極が配置された電極構造が考えられる。この場合、第一内部電極と中間電極とで形成されるコンデンサ部分と第二内部電極と中間電極とで形成されるコンデンサ部分とが直列接続されることにより、耐電圧特性が向上する。   An electrode structure in which an intermediate electrode that is not connected to the first terminal electrode and the second terminal electrode is disposed between the first internal electrode and the second internal electrode as an electrode structure in which a plurality of series connection capacitors are formed. Can be considered. In this case, the withstand voltage characteristic is improved by connecting the capacitor portion formed by the first internal electrode and the intermediate electrode and the capacitor portion formed by the second internal electrode and the intermediate electrode in series.

ところで、製造工程において、第一及び第二内部電極や中間電極などに積層ずれが生じると、第一内部電極と第二内部電極とが対向して、上述した第一内部電極と中間電極とで形成されるコンデンサ部分及び第二内部電極と中間電極とで形成されるコンデンサ部分以外に、第一内部電極と第二内部電極とで形成されるコンデンサ部分が生じてしまう。   By the way, in the manufacturing process, when stacking shift occurs in the first and second internal electrodes and the intermediate electrode, the first internal electrode and the second internal electrode face each other, and the first internal electrode and the intermediate electrode described above In addition to the capacitor portion formed and the capacitor portion formed by the second internal electrode and the intermediate electrode, a capacitor portion formed by the first internal electrode and the second internal electrode is generated.

耐電圧特性を高めるためには、上述したように、内部電極間の距離（内部電極間の誘電体層の厚み）を大きくすればよいが、誘電体層の厚みを２倍にしても、絶縁破壊電圧は２倍にはならない。絶縁破壊電圧は、誘電体層の厚みを大きくするにしたがって徐々に飽和していく。単位厚みあたりの破壊電界強度は、誘電体層の厚みが小さいほど大きく、内部電極間の距離が大きくなるにしたがい徐々に低下していく。このため、第一内部電極と第二内部電極とで形成されるコンデンサ部分における絶縁破壊電圧は、第一内部電極と中間電極とで形成されるコンデンサ部分と第二内部電極と中間電極とで形成されるコンデンサ部分とにおける絶縁破壊電圧よりも低い。したがって、第一及び第二内部電極や中間電極などに積層ずれが生じた場合、局所的に、耐電圧特性が低下して、所望の耐電圧特性を確保することが困難となってしまう。   In order to improve the withstand voltage characteristics, as described above, the distance between the internal electrodes (the thickness of the dielectric layer between the internal electrodes) may be increased. However, even if the thickness of the dielectric layer is doubled, the insulation is improved. The breakdown voltage does not double. The dielectric breakdown voltage gradually saturates as the thickness of the dielectric layer is increased. The breakdown electric field strength per unit thickness increases as the thickness of the dielectric layer decreases, and gradually decreases as the distance between the internal electrodes increases. Therefore, the dielectric breakdown voltage in the capacitor portion formed by the first internal electrode and the second internal electrode is formed by the capacitor portion formed by the first internal electrode and the intermediate electrode, the second internal electrode, and the intermediate electrode. It is lower than the breakdown voltage in the capacitor part. Therefore, when a misalignment occurs in the first and second internal electrodes, the intermediate electrode, and the like, the withstand voltage characteristics are locally lowered, and it becomes difficult to ensure the desired withstand voltage characteristics.

本発明は、所望の耐電圧特性を確実に確保することが可能な積層コンデンサを提供することを目的とする。   An object of this invention is to provide the multilayer capacitor which can ensure a desired withstand voltage characteristic reliably.

本発明に係る積層コンデンサは、複数の誘電体層が積層されてなる素体と、素体の外表面に配置された第一端子電極及び第二端子電極と、素体内に配置され、第一端子電極に接続された第一内部電極と、複数の誘電体層の積層方向で第一内部電極と対向するように素体内に配置され、第二端子電極に接続された第二内部電極と、積層方向で第一内部電極と第二内部電極とで挟まれるように素体内に配置され、第一端子電極と第二端子電極とに接続されない中間電極と、を備え、中間電極の面積が、第一内部電極と第二内部電極とが積層方向で重なり合う領域の面積よりも大きく、中間電極の外縁が、積層方向から見て、領域の外縁よりも外側に位置していることを特徴とする。   The multilayer capacitor in accordance with the present invention includes an element body in which a plurality of dielectric layers are laminated, a first terminal electrode and a second terminal electrode disposed on the outer surface of the element body, and a first capacitor disposed in the element body. A first internal electrode connected to the terminal electrode, a second internal electrode disposed in the element body so as to face the first internal electrode in the stacking direction of the plurality of dielectric layers, and connected to the second terminal electrode; An intermediate electrode that is disposed in the element body so as to be sandwiched between the first internal electrode and the second internal electrode in the stacking direction and is not connected to the first terminal electrode and the second terminal electrode, and the area of the intermediate electrode is The first internal electrode and the second internal electrode are larger than the area of the overlapping region in the stacking direction, and the outer edge of the intermediate electrode is located outside the outer edge of the region when viewed from the stacking direction. .

本発明に係る積層コンデンサでは、第一端子電極と第二端子電極とに接続されない中間電極が、積層方向で第一内部電極と第二内部電極とで挟まれるように素体内に配置されている。これにより、第一内部電極と中間電極とで形成されるコンデンサ部分と第二内部電極と中間電極とで形成されるコンデンサ部分とが直列接続されることとなり、耐電圧特性が向上する。   In the multilayer capacitor according to the present invention, the intermediate electrode not connected to the first terminal electrode and the second terminal electrode is arranged in the element body so as to be sandwiched between the first internal electrode and the second internal electrode in the stacking direction. . Thereby, the capacitor portion formed by the first internal electrode and the intermediate electrode and the capacitor portion formed by the second internal electrode and the intermediate electrode are connected in series, and the withstand voltage characteristic is improved.

本発明では、中間電極の面積が、第一内部電極と第二内部電極とが積層方向で重なり合う領域の面積よりも大きく、中間電極の外縁が、積層方向から見て、上記領域の外縁よりも外側に位置している。これにより、第一及び第二内部電極や中間電極などに積層ずれが生じた場合でも、第一内部電極と第二内部電極とで形成されるコンデンサ部分が生じ難く、耐電圧特性が局所的に低下するのを防ぐことができる。したがって、本発明によれば、所望の耐電圧特性を確実に確保することができる。   In the present invention, the area of the intermediate electrode is larger than the area of the region where the first internal electrode and the second internal electrode overlap in the stacking direction, and the outer edge of the intermediate electrode is larger than the outer edge of the region as viewed from the stacking direction. Located on the outside. Thereby, even when a laminating shift occurs in the first and second internal electrodes, the intermediate electrode, etc., a capacitor portion formed by the first internal electrode and the second internal electrode hardly occurs, and the withstand voltage characteristic is locally It can be prevented from lowering. Therefore, according to the present invention, a desired withstand voltage characteristic can be reliably ensured.

本発明によれば、所望の耐電圧特性を確実に確保することが可能な積層コンデンサを提供することができる。   ADVANTAGE OF THE INVENTION According to this invention, the multilayer capacitor which can ensure a desired withstand voltage characteristic reliably can be provided.

本実施形態に係る積層コンデンサの断面構成を示す図である。It is a figure showing the section composition of the multilayer capacitor concerning this embodiment. 本実施形態に係る積層コンデンサが備える素体の断面構成を示す図である。It is a figure showing the section composition of the element with which the multilayer capacitor concerning this embodiment is provided. 本実施形態の変形例に係る積層コンデンサの断面構成を示す図である。It is a figure which shows the cross-sectional structure of the multilayer capacitor which concerns on the modification of this embodiment.

以下、添付図面を参照して、本発明の好適な実施形態について詳細に説明する。なお、説明において、同一要素又は同一機能を有する要素には、同一符号を用いることとし、重複する説明は省略する。   Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings. In the description, the same reference numerals are used for the same elements or elements having the same function, and redundant description is omitted.

図１及び図２を参照して、本実施形態に係る積層コンデンサ１の構成を説明する。図１は、本実施形態に係る積層コンデンサの断面構成を示す図である。図２は、本実施形態に係る積層コンデンサが備える素体の断面構成を示す図である。   With reference to FIG.1 and FIG.2, the structure of the multilayer capacitor 1 which concerns on this embodiment is demonstrated. FIG. 1 is a diagram illustrating a cross-sectional configuration of the multilayer capacitor in accordance with the present embodiment. FIG. 2 is a diagram illustrating a cross-sectional configuration of an element body included in the multilayer capacitor in accordance with the present embodiment.

積層コンデンサ１は、素体２と、素体２の外表面に配置される第一端子電極３及び第二端子電極４と、を備えている。   The multilayer capacitor 1 includes an element body 2, and a first terminal electrode 3 and a second terminal electrode 4 disposed on the outer surface of the element body 2.

素体２は、図１及び図２に示されるように、略直方体形状を呈しており、その外表面として、互いに対向する略長方形状の第一及び第二主面２ａ，２ｂと、互いに対向する第一及び第二側面２ｃ，２ｄと、互いに対向する第三及び第四側面２ｅ，２ｆと、を有している。第一及び第二側面２ｃ，２ｄは、第一及び第二主面２ａ，２ｂの間を連結するように第一及び第二主面２ａ，２ｂの短辺方向に伸びている。第三及び第四側面２ｅ，２ｆは、第一及び第二主面２ａ，２ｂ間を連結するように第一及び第二主面２ａ，２ｂの長辺方向に伸びている。   As shown in FIGS. 1 and 2, the element body 2 has a substantially rectangular parallelepiped shape, and has substantially rectangular first and second main surfaces 2 a and 2 b opposed to each other as outer surfaces thereof. And first and second side surfaces 2c and 2d, and third and fourth side surfaces 2e and 2f facing each other. The first and second side surfaces 2c and 2d extend in the short side direction of the first and second main surfaces 2a and 2b so as to connect the first and second main surfaces 2a and 2b. The third and fourth side surfaces 2e and 2f extend in the long side direction of the first and second main surfaces 2a and 2b so as to connect the first and second main surfaces 2a and 2b.

素体２は、第一及び第二主面２ａ，２ｂの対向方向に複数の誘電体層７が積層されて構成されている。素体２では、複数の誘電体層７の積層方向（以下、単に「積層方向」と称する。）が第一及び第二主面２ａ，２ｂの対向方向と一致する。各誘電体層７は、例えば誘電体材料（ＢａＴｉＯ３系、Ｂａ(Ｔｉ，Ｚｒ)Ｏ３系、又は（Ｂａ，Ｃａ）ＴｉＯ３系などの誘電体セラミック）を含むセラミックグリーンシートの焼結体から構成される。実際の素体２では、各誘電体層７の間の境界が視認できない程度に一体化されている。 The element body 2 is configured by laminating a plurality of dielectric layers 7 in the opposing direction of the first and second main surfaces 2a and 2b. In the element body 2, the stacking direction of the plurality of dielectric layers 7 (hereinafter simply referred to as “stacking direction”) coincides with the opposing direction of the first and second main surfaces 2 a and 2 b. Each dielectric layer 7 is a sintered body of a ceramic green sheet containing a dielectric material (dielectric ceramic such as BaTiO 3 series, Ba (Ti, Zr) O 3 series, or (Ba, Ca) TiO 3 series), for example. Consists of The actual element body 2 is integrated so that the boundary between the dielectric layers 7 is not visible.

第一端子電極３は、素体２の第一側面２ｃに配置されている。第一端子電極３は、第一側面２ｃ全面を覆うように、第一及び第二主面２ａ，２ｂ並びに第三及び第四側面２ｅ，２ｆの端部（第一側面２ｃ側の端部）にわたって形成されている。第二端子電極４は、素体２の第二側面２ｄに配置されている。第二端子電極４は、第二側面２ｄ全面を覆うように、第一及び第二主面２ａ，２ｂ並びに第三及び第四側面２ｅ，２ｆの端部（第二側面２ｄ側の端部）に亘って形成されている。第一及び第二端子電極３，４は、第一及び第二側面２ｃ，２ｄの対向方向に対向している。   The first terminal electrode 3 is disposed on the first side surface 2 c of the element body 2. The first terminal electrode 3 covers the entire first side surface 2c so that the first and second main surfaces 2a and 2b and the end portions of the third and fourth side surfaces 2e and 2f (the end portion on the first side surface 2c side). Is formed over. The second terminal electrode 4 is disposed on the second side surface 2 d of the element body 2. The second terminal electrode 4 has ends of the first and second main surfaces 2a, 2b and the third and fourth side surfaces 2e, 2f (ends on the second side surface 2d side) so as to cover the entire surface of the second side surface 2d. It is formed over. The first and second terminal electrodes 3 and 4 face each other in the facing direction of the first and second side faces 2c and 2d.

第一及び第二端子電極３，４は、たとえば導電性金属粉末及びガラスフリットを含む導電性ペーストを素体２の外表面に付与し、焼き付けることによって形成される。必要に応じて、焼き付けられた端子電極の上にめっき層が形成されることもある。端子電極３，４は、素体２の表面上においては互いに電気的に絶縁されて形成されている。   The first and second terminal electrodes 3 and 4 are formed, for example, by applying a conductive paste containing conductive metal powder and glass frit to the outer surface of the element body 2 and baking it. If necessary, a plating layer may be formed on the baked terminal electrode. The terminal electrodes 3 and 4 are formed on the surface of the element body 2 so as to be electrically insulated from each other.

積層コンデンサ１は、図１及び図２に示されるように、内部電極として、複数の第一内部電極１１、複数の第二内部電極１３、及び、複数の中間電極１５を備えている。内部電極（第一内部電極１１、第二内部電極１３、及び中間電極１５）は、積層型の電気素子の内部電極として通常用いられる導電性材料（たとえば、ＮｉやＣｕなど）からなる。内部電極は、上記導電性材料を含む導電性ペーストの焼結体として構成される。   As shown in FIGS. 1 and 2, the multilayer capacitor 1 includes a plurality of first internal electrodes 11, a plurality of second internal electrodes 13, and a plurality of intermediate electrodes 15 as internal electrodes. The internal electrodes (first internal electrode 11, second internal electrode 13, and intermediate electrode 15) are made of a conductive material (for example, Ni or Cu) that is usually used as an internal electrode of a laminated electrical element. The internal electrode is configured as a sintered body of a conductive paste containing the conductive material.

第一内部電極１１と第二内部電極１３とは、積層方向（第一主面２ａと第二主面２ｂとの対向方向）において異なる位置（層）に配置されている。すなわち、第一内部電極１１と第二内部電極１３とは、素体２内において、積層方向に間隔を有して対向するように交互に配置されている。第一内部電極１１と第二内部電極１３とは、その一部が積層方向から見て重なり合うように、素体２内に配置されている。すなわち、第一内部電極１１と第二内部電極１３とは、積層方向で互いに重なり合う領域１７を含んでいる。   The first internal electrode 11 and the second internal electrode 13 are arranged at different positions (layers) in the stacking direction (opposite direction of the first main surface 2a and the second main surface 2b). That is, the first internal electrodes 11 and the second internal electrodes 13 are alternately arranged in the element body 2 so as to face each other with a gap in the stacking direction. The 1st internal electrode 11 and the 2nd internal electrode 13 are arrange | positioned in the element body 2 so that the part may overlap, seeing from a lamination direction. That is, the first internal electrode 11 and the second internal electrode 13 include a region 17 that overlaps with each other in the stacking direction.

第一内部電極１１は、略矩形形状を呈しており、その一端が第一側面２ｃに引き出されて露出している。第一端子電極３は、第一内部電極１１の第一側面２ｃに露出した部分をすべて覆うように形成されている。これにより、第一内部電極１１は、第一端子電極３に直接的に接続されることとなる。第二内部電極１３は、略矩形形状を呈しており、その一端が第二側面２ｄに引き出されて露出している。第二端子電極４は、第二内部電極１３の第二側面２ｄに露出した部分をすべて覆うように形成されている。これにより、第二内部電極１３は、第二端子電極４に直接的に接続されることとなる。第一内部電極１１と第二内部電極１３とは、互いに極性が異なる。   The first internal electrode 11 has a substantially rectangular shape, and one end thereof is drawn out to the first side surface 2c and exposed. The 1st terminal electrode 3 is formed so that all the parts exposed to the 1st side surface 2c of the 1st internal electrode 11 may be covered. As a result, the first internal electrode 11 is directly connected to the first terminal electrode 3. The second internal electrode 13 has a substantially rectangular shape, and one end thereof is drawn out to the second side surface 2d and exposed. The second terminal electrode 4 is formed so as to cover all portions exposed to the second side surface 2d of the second internal electrode 13. As a result, the second internal electrode 13 is directly connected to the second terminal electrode 4. The first internal electrode 11 and the second internal electrode 13 have different polarities.

中間電極１５は、積層方向で第一内部電極１１と第二内部電極１３とで挟まれるように、素体２内に配置されている。中間電極１５は、積層方向において、一方面側で第一内部電極１１と隣り合い、他方面側で第二内部電極１３と隣り合っている。すなわち、第一内部電極１１と第二内部電極１３とは、中間電極１５を間に挟んだ状態で互いに対向している。中間電極１５は、その端部が素体２の外表面に露出しておらず、第一端子電極３及び第二端子電極４のいずれにも接続されていない。   The intermediate electrode 15 is disposed in the element body 2 so as to be sandwiched between the first internal electrode 11 and the second internal electrode 13 in the stacking direction. The intermediate electrode 15 is adjacent to the first internal electrode 11 on one surface side and adjacent to the second internal electrode 13 on the other surface side in the stacking direction. That is, the first internal electrode 11 and the second internal electrode 13 face each other with the intermediate electrode 15 interposed therebetween. The end of the intermediate electrode 15 is not exposed on the outer surface of the element body 2 and is not connected to either the first terminal electrode 3 or the second terminal electrode 4.

中間電極１５は、略矩形形状を呈している。中間電極１５の面積は、第一内部電極１１と第二内部電極１３とが積層方向で重なり合う領域１７の面積よりも大きく設定されている。中間電極１５の外縁は、積層方向から見て、領域１７の外縁よりも全周にわたって外側に位置している。中間電極１５の外縁と領域１７の外縁との間隔Ｌａ，Ｌｂは、製造工程にて管理される積層ずれの許容値以上に設定されることが好ましい。このように、間隔Ｌａ，Ｌｂは、積層ずれの許容値を考慮して決定されることが好ましい。たとえば、積層ずれの許容値が１００μｍである場合には、間隔Ｌａ，Ｌｂは１００μｍ以上に設定される。   The intermediate electrode 15 has a substantially rectangular shape. The area of the intermediate electrode 15 is set larger than the area of the region 17 where the first internal electrode 11 and the second internal electrode 13 overlap in the stacking direction. The outer edge of the intermediate electrode 15 is located outside the entire periphery of the outer edge of the region 17 when viewed from the stacking direction. The distances La and Lb between the outer edge of the intermediate electrode 15 and the outer edge of the region 17 are preferably set to be equal to or greater than the allowable stacking deviation managed in the manufacturing process. As described above, the intervals La and Lb are preferably determined in consideration of an allowable value of stacking deviation. For example, when the allowable value of the stacking deviation is 100 μm, the intervals La and Lb are set to 100 μm or more.

以上のように、積層コンデンサ１では、第一端子電極３と第二端子電極４とに接続されない中間電極１５が、積層方向で第一内部電極１１と第二内部電極１３とで挟まれるように素体２内に配置されている。これにより、第一端子電極３と第二端子電極４との間で、第一内部電極１１と中間電極１５とで形成されるコンデンサ部分と第二内部電極１３と中間電極１５とで形成されるコンデンサ部分とが直列接続されることとなり、耐電圧特性が向上する。   As described above, in the multilayer capacitor 1, the intermediate electrode 15 that is not connected to the first terminal electrode 3 and the second terminal electrode 4 is sandwiched between the first internal electrode 11 and the second internal electrode 13 in the stacking direction. It is arranged in the element body 2. Thus, a capacitor portion formed by the first internal electrode 11 and the intermediate electrode 15, the second internal electrode 13, and the intermediate electrode 15 are formed between the first terminal electrode 3 and the second terminal electrode 4. The capacitor portion is connected in series, and the withstand voltage characteristics are improved.

積層コンデンサ１では、中間電極１５の面積が、第一内部電極１１と第二内部電極１３とが積層方向で重なり合う領域１７の面積よりも大きく、中間電極１５の外縁が、積層方向から見て、領域１７の外縁よりも外側に位置している。これにより、第一及び第二内部電極１１，１３や中間電極１５などに積層ずれが生じた場合でも、第一内部電極１１と第二内部電極１３とが中間電極１５を間に挟むことなく対向することはない。したがって、第一内部電極１１と中間電極１５とで形成されるコンデンサ部分と第二内部電極１３と中間電極１５とで形成されるコンデンサ部分以外に、第一内部電極１１と第二内部電極１３とで形成されるコンデンサ部分が生じ難い。この結果、耐電圧特性が局所的に低下するのを防ぐことができ、所望の耐電圧特性を確実に確保することができる。   In the multilayer capacitor 1, the area of the intermediate electrode 15 is larger than the area of the region 17 where the first internal electrode 11 and the second internal electrode 13 overlap in the stacking direction, and the outer edge of the intermediate electrode 15 is viewed from the stacking direction. It is located outside the outer edge of the region 17. Thereby, even when a laminating shift occurs in the first and second internal electrodes 11, 13 and the intermediate electrode 15, the first internal electrode 11 and the second internal electrode 13 face each other without interposing the intermediate electrode 15 therebetween. Never do. Therefore, in addition to the capacitor portion formed by the first internal electrode 11 and the intermediate electrode 15 and the capacitor portion formed by the second internal electrode 13 and the intermediate electrode 15, the first internal electrode 11 and the second internal electrode 13 The capacitor portion formed by As a result, it is possible to prevent the withstand voltage characteristics from being locally lowered and to ensure the desired withstand voltage characteristics.

ところで、積層コンデンサでは、内部電極が形成されていない余白領域と内部電極が形成された電極領域との間で、内部電極の厚みによる段差が生じることがある。特に、内部電極と当該内部電極が引き出された側面と対向する側面の間隔が大きく設定された場合、段差が生じ易い。   By the way, in the multilayer capacitor, a step due to the thickness of the internal electrode may occur between the blank area where the internal electrode is not formed and the electrode area where the internal electrode is formed. In particular, when the distance between the internal electrode and the side surface opposite to the side surface from which the internal electrode is drawn is set large, a step is likely to occur.

積層コンデンサ１では、図３に示されるように、第一内部電極１１との第二側面２ｄとの間隔Ｌｃ、及び、第二内部電極１３との第一側面２ｃとの間隔Ｌｃが大きい場合でも（たとえば、間隔Ｌｃが１５０μｍ以上である。）、中間電極１５が存在することにより、内部電極１１，１３の厚みに起因する段差が生じ難い。これにより、積層コンデンサ１では、素体２の変形を抑制することができる。   In the multilayer capacitor 1, even when the distance Lc between the first inner electrode 11 and the second side surface 2d and the distance Lc between the second inner electrode 13 and the first side surface 2c are large, as shown in FIG. (For example, the distance Lc is 150 μm or more.) The presence of the intermediate electrode 15 makes it difficult for a step due to the thickness of the internal electrodes 11 and 13 to occur. Thereby, in the multilayer capacitor 1, the deformation of the element body 2 can be suppressed.

図示は省略するが、第一及び第二内部電極１１，１３と第三側面２ｅとの間隔、並びに、第一及び第二内部電極１１，１３と第四側面２ｆとの間隔が大きい場合でも（たとえば、これらの間隔が１５０μｍ以上である。）、中間電極１５が存在することにより、内部電極１１，１３の厚みに起因する段差が生じ難い。これによっても、積層コンデンサ１において、素体２の変形を抑制することができる。   Although illustration is omitted, even when the distance between the first and second inner electrodes 11, 13 and the third side surface 2e and the distance between the first and second inner electrodes 11, 13 and the fourth side surface 2f are large ( For example, the distance between them is 150 μm or more.) Due to the presence of the intermediate electrode 15, a step due to the thickness of the internal electrodes 11 and 13 hardly occurs. This also can suppress deformation of the element body 2 in the multilayer capacitor 1.

以上、本発明の好適な実施形態について説明してきたが、本発明は必ずしも上述した実施形態に限定されるものではなく、その要旨を逸脱しない範囲で様々な変更が可能である。   The preferred embodiments of the present invention have been described above. However, the present invention is not necessarily limited to the above-described embodiments, and various modifications can be made without departing from the scope of the present invention.

たとえば、第一及び第二内部電極１１，１３並びに中間電極１５の数量（積層数）や形状などは、上記実施形態のものに限られない。また、本発明は、貫通型積層コンデンサや積層コンデンサアレイなどにも適用できる。   For example, the number (number of stacked layers) and the shapes of the first and second internal electrodes 11 and 13 and the intermediate electrode 15 are not limited to those in the above embodiment. The present invention can also be applied to feedthrough multilayer capacitors and multilayer capacitor arrays.

１…積層コンデンサ、２…素体、３…第一端子電極、４…第二端子電極、７…誘電体層、１１…第一内部電極、１３…第二内部電極、１５…中間電極、１７…第一内部電極と第二内部電極とが誘電体層の積層方向で重なり合う領域。   DESCRIPTION OF SYMBOLS 1 ... Multilayer capacitor, 2 ... Element, 3 ... 1st terminal electrode, 4 ... 2nd terminal electrode, 7 ... Dielectric layer, 11 ... 1st internal electrode, 13 ... 2nd internal electrode, 15 ... Intermediate electrode, 17 ... A region where the first internal electrode and the second internal electrode overlap in the stacking direction of the dielectric layers.

Claims (1)

複数の誘電体層が積層されてなる素体と、
前記素体の外表面に配置された第一端子電極及び第二端子電極と、
前記素体内に配置され、前記第一端子電極に接続された第一内部電極と、
前記複数の誘電体層の積層方向で前記第一内部電極と対向するように前記素体内に配置され、前記第二端子電極に接続された第二内部電極と、
前記積層方向で前記第一内部電極と前記第二内部電極とで挟まれるように前記素体内に配置され、前記第一端子電極と前記第二端子電極とに接続されない中間電極と、を備え、
前記中間電極の面積が、前記第一内部電極と前記第二内部電極とが前記積層方向で重なり合う領域の面積よりも大きく、
前記中間電極の外縁が、前記積層方向から見て、前記領域の外縁よりも外側に位置していることを特徴とする積層コンデンサ。 An element body formed by laminating a plurality of dielectric layers;
A first terminal electrode and a second terminal electrode disposed on the outer surface of the element body;
A first internal electrode disposed in the element body and connected to the first terminal electrode;
A second internal electrode disposed in the element body so as to face the first internal electrode in the stacking direction of the plurality of dielectric layers, and connected to the second terminal electrode;
An intermediate electrode disposed in the element body so as to be sandwiched between the first internal electrode and the second internal electrode in the stacking direction, and not connected to the first terminal electrode and the second terminal electrode;
The area of the intermediate electrode is larger than the area of the region where the first internal electrode and the second internal electrode overlap in the stacking direction;
A multilayer capacitor, wherein an outer edge of the intermediate electrode is located outside an outer edge of the region as viewed from the stacking direction.
JP2012024004A 2012-02-07 2012-02-07 Laminate capacitor Pending JP2013162013A (en)

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JPS63137927U (en) * 1987-03-03 1988-09-12
JPH01220421A (en) * 1988-02-27 1989-09-04 Mitsubishi Mining & Cement Co Ltd Laminated ceramic capacitor
JP2005136011A (en) * 2003-10-28 2005-05-26 Kyocera Corp Laminated electronic part
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JP2011018758A (en) * 2009-07-08 2011-01-27 Tdk Corp Laminated electronic component

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JPS52118558A (en) * 1976-03-31 1977-10-05 Nichicon Capacitor Ltd Capacitor element
JPS5476945U (en) * 1977-11-11 1979-05-31
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JPH01220421A (en) * 1988-02-27 1989-09-04 Mitsubishi Mining & Cement Co Ltd Laminated ceramic capacitor
JP2005136011A (en) * 2003-10-28 2005-05-26 Kyocera Corp Laminated electronic part
JP2009130247A (en) * 2007-11-27 2009-06-11 Fdk Corp Lamination chip capacitor
JP2011018758A (en) * 2009-07-08 2011-01-27 Tdk Corp Laminated electronic component

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Publication number Priority date Publication date Assignee Title
WO2023214504A1 (en) * 2022-05-02 2023-11-09 株式会社村田製作所 Electronic component

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