JP2013161932A - Method of manufacturing semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method of manufacturing a semiconductor device capable of forming a single crystal semiconductor layer at a plurality of places spaced apart each other on a substrate.SOLUTION: In a method of manufacturing a semiconductor device, firstly, a master substrate 50 is prepared where a plurality of single crystal Si layers 52a-52h are formed spaced apart each other, and an amorphous Si layer 12 is formed on a substrate 11. Then, CeOfilms 61 and 62 are formed on at least one of the master substrate 50 and the substrate 11. After that, the single crystal Si layers 52a-52h on the master substrate 50 and the amorphous Si layer 12 on the substrate 11 are contacted through the CeOfilms 61 and 62 and heated. The CeOfilm 62 and the amorphous Si layer 12 are crystallized to match crystal structure and crystal orientation with those of the single crystal Si layers 52a-52h, thereby single crystal Si layers 12a-12h are formed. Then, while the single crystal Si layers 52a-52h and the single crystal Si layers 12a-12h are left out, the CeOfilms 61 and 62 are removed, thus the master substrate 50 is separated from the substrate 11.

Description

  Embodiments described herein relate generally to a method for manufacturing a semiconductor device.

Conventionally, a CeO ₂ film having a predetermined crystal orientation is deposited on an amorphous first semiconductor layer, an amorphous second semiconductor layer is further formed thereon, and then solid phase growth is performed to change the crystal orientation of the CeO ₂ film. A technique is known in which a single crystal or polycrystalline first semiconductor layer and second semiconductor layer oriented in a predetermined crystal orientation are inherited by a first semiconductor layer and a second semiconductor layer. A field effect transistor is formed on an SOI (Silicon-On-Insulator) substrate using such a technique.

However, in the prior art, the CeO ₂ film is formed on the amorphous first semiconductor layer. Therefore, in order to form a single crystal semiconductor layer at a plurality of positions separated in the plane of the first semiconductor layer, a solid phase is used. There has been a problem that processing must be performed using a lithography technique and an etching technique after the growth. In the prior art, since the CeO ₂ film is formed on the amorphous first semiconductor layer, the crystal orientation is constant regardless of the position in the plane of the first semiconductor layer. Therefore, for example, there is a problem that a plurality of single crystal semiconductor layers having different crystal orientations cannot be formed in one substrate.

JP 2003-168647 A

  An object of one embodiment of the present invention is to provide a method for manufacturing a semiconductor device in which a single crystal semiconductor layer can be formed at a plurality of spaced locations on a substrate.

  According to one embodiment of the present invention, first, in the first substrate preparation step, an insulating first substrate in which a plurality of first single crystal semiconductor layers are formed apart from each other is prepared. Next, in the first amorphous semiconductor layer forming step, a first amorphous semiconductor layer made of the same material as that of the first single crystal semiconductor layer is formed on the insulating second substrate. Thereafter, in the first medium film forming step, the first single crystal semiconductor layer and the first amorphous semiconductor layer can be selectively removed on at least one of the first base or the second base, and the underlying crystal structure To form a first medium film made of a material that crystallizes. Next, in the contacting step, the first single crystal semiconductor layer of the first substrate and the first amorphous semiconductor layer of the second substrate are brought into contact with each other through the first medium film. Thereafter, in the crystallization step, the first single crystal semiconductor layer and the first amorphous semiconductor layer are heated in contact with each other via the first medium film, and the first medium film and the first amorphous semiconductor layer are heated. Are aligned with the crystal structure and crystal orientation of the first single crystal semiconductor layer to form a second single crystal semiconductor layer in a region corresponding to the formation region of the first single crystal semiconductor layer. Then, in the first medium film removal step, the first medium film is removed while leaving the first single crystal semiconductor layer and the second single crystal semiconductor layer, and the first base and the second base are separated. To do.

FIG. 1 is a perspective view schematically showing an example of the configuration of the semiconductor device according to the first embodiment. FIG. 2-1 is a perspective view schematically showing an example of a procedure of the method for manufacturing the semiconductor device according to the first embodiment (part 1). FIG. 2-2 is a perspective view schematically showing an example of a procedure of the method for manufacturing the semiconductor device according to the first embodiment (part 2). FIG. 2-3 is a perspective view schematically showing an example of a procedure of the method of manufacturing the semiconductor device according to the first embodiment (No. 3). 2-4 is a perspective view schematically showing one example of a procedure of the method for manufacturing the semiconductor device according to the first embodiment (No. 4). FIG. 2-5 is a perspective view schematically showing an example of a procedure of the method of manufacturing the semiconductor device according to the first embodiment (No. 5). FIG. FIG. 3 is a perspective view schematically showing another example of the structure of the original substrate. FIGS. 4-1 is a figure which shows typically an example of the procedure of the manufacturing method of the semiconductor device by 2nd Embodiment (the 1). FIGS. 4-2 is a figure which shows typically an example of the procedure of the manufacturing method of the semiconductor device by 2nd Embodiment (the 2). FIG. 5 is a diagram schematically showing a configuration of a semiconductor device manufacturing system according to the third embodiment. FIG. 6 is a cross-sectional view schematically showing an example of the procedure of the semiconductor device manufacturing method according to the fourth embodiment. FIG. 7 is a perspective view schematically showing an example of the procedure of the semiconductor device manufacturing method according to the fifth embodiment.

  Exemplary embodiments of a method for manufacturing a semiconductor device will be described below in detail with reference to the accompanying drawings. Note that the present invention is not limited to these embodiments. In addition, the perspective view and cross-sectional view of the semiconductor device used in the following embodiments are schematic, and the relationship between the thickness of the layer and the width, the ratio of the thickness of each layer, and the like may be different from the actual ones. .

(First embodiment)
FIG. 1 is a perspective view schematically showing an example of the configuration of the semiconductor device according to the first embodiment. In this semiconductor device, a plurality of single crystal semiconductor layers are formed in a mesa shape on a base 11 made of an insulating material. That is, each single crystal semiconductor layer is arranged on the base 11 so as to be separated from each other, and the adjacent single crystal semiconductor layers are electrically separated. Here, rectangular parallelepiped single crystal Si layers 12a to 12h are used as the single crystal semiconductor layers. In each single crystal Si layer 12a to 12h, an element such as a field effect transistor is formed. Further, the upper surfaces of the single crystal Si layers 12a to 12h are not necessarily required to have the same crystal plane, and crystals suitable for device characteristics such as field effect transistors formed on the single crystal Si layers 12a to 12h. It can be set to have a surface. In the example of FIG. 1, single crystal Si layers 12 a to 12 h having different crystal orientations are formed in the regions R <b> 1 to R <b> 3 on the substrate 11.

  In the region R1, rectangular parallelepiped single crystal Si layers 12a to 12c whose upper surface is the {100} plane and whose plane normal to the longitudinal direction is the {110} plane are arranged on the substrate 11 at predetermined intervals. ing. Also, in the region R2, rectangular parallelepiped single crystal Si layers 12d and 12e whose upper surface is the {111} plane and whose plane normal to the longitudinal direction is {101} are arranged on the substrate 11 at a predetermined interval. In the region R3, rectangular parallelepiped single-crystal Si layers 12f to 12h whose upper surface is the {110} plane and whose plane normal to the longitudinal direction is {110} are arranged at predetermined intervals. Yes.

  As the substrate 11, an insulating substrate made of an inorganic material such as a glass substrate or a ceramic substrate, an insulating substrate made of an organic material such as polyimide, or the like can be used. Further, as the single crystal semiconductor layer, other semiconductor materials such as Ge, GaAs, and GaN may be used instead of Si.

  Next, a method for manufacturing the semiconductor device having such a configuration will be described. 2A to 2E are perspective views schematically illustrating an example of the procedure of the method for manufacturing the semiconductor device according to the first embodiment. First, as shown in FIG. 2A, an original substrate 50 (Master Substrate) is prepared. In such an original substrate 50, for example, a plurality of single crystal Si layers 52a to 52h, which are single crystal semiconductor layers, are disposed on a substrate 51 made of an insulating material such as silicon oxide. The upper surfaces (horizontal planes) of the single crystal Si layers 52a to 52h are not necessarily required to have the same crystal plane. In this example, three regions R11 to R13 are provided on the base 51, and the upper surface of the region R11 is a {100} plane, and a plane whose normal is the longitudinal direction is a {110} plane. -Shaped single crystal Si layers 52a to 52c are arranged at predetermined intervals, and in the region R12, the upper surface is a {111} plane, and the plane whose normal is the longitudinal direction is {101}. Si layers 52d and 52e are arranged at predetermined intervals, and in the region R13, the upper surface is a {110} plane, and the plane whose normal is the longitudinal direction is {110}. 52h are arranged at a predetermined interval. The single crystal Si layers 52a to 52h are arranged so as to be mirror-symmetric with respect to the arrangement shown in FIG.

  The size of the original substrate 50 can be, for example, 1 cm × 1 cm, and the size of the single crystal Si layers 52a to 52h varies depending on the number of elements to be formed and the arrangement method, for example, several μm to sub μm × several mm. It can be. However, this is only an example, and an arbitrary size can be used. In FIG. 1, the original substrate 50 has a square shape, but may have an arbitrary shape such as a rectangle.

Such an original substrate 50 can be formed by, for example, a known method shown below. First, the single crystal Si layer on the SOI substrate is shown in a desired shape, for example, a region R11 in FIG. 2-1 (a) by using an etching technique such as a photolithography technique or an RIE (Reactive Ion Etching) method. Process into a shape like this. The lower oxide films of the single crystal Si layers 52a to 52c processed into a desired shape are isotropically eroded with an HF solution or the like. Thereafter, the processed single crystal Si layers 52a to 52c are adsorbed to a material having excellent flexibility and adhesion, such as PDMS (Polydimethylsiloxane), and only the single crystal Si layers 52a to 52c are separated from the SOI substrate. . Subsequently, the PDMS adsorbing the single crystal Si layers 52 a to 52 c is brought into contact with the base 51 so that the single crystal Si layers 52 a to 52 c and the base 51 are in close contact with each other. Note that it is desirable to form a thin oxide film below the single crystal Si layers 52a to 52c by processing in an HCl / H ₂ O ₂ mixed solution or the like. At this time, the contacted single crystal Si layers 52a to 52c and the base 51 are joined by hydrogen bonding by OH groups present on the hydrophilic surface. Thereafter, the single crystal Si layers 52 a to 52 c are formed on the base 51 by peeling only the PDMS. When forming the original substrate 50 having only the single crystal Si layers 52a to 52c having a single crystal orientation, the processing is completed as described above, but the original having a plurality of single crystal Si layers 52a to 52h having different crystal orientations. In order to obtain the substrate 50, the above-described process may be repeated for the other regions R12 and R13 using SOI substrates having different crystal orientations. Thus, the original substrate 50 is completed. The original substrate 50 is used as an original for forming the substrate 11 shown in FIG. 1 and is used repeatedly.

Next, as shown in FIG. 2B, an amorphous Si layer 12 that is an amorphous semiconductor layer is formed on a base 11 made of an insulating material such as silicon oxide, which is a target for forming the semiconductor device of FIG. Form. The amorphous Si layer 12 is formed by, for example, a CVD (Chemical Vapor Deposition) method using SiH ₄ gas as a raw material, a pressure of 0.2 Torr, and a temperature of 400 ° C.

Thereafter, as shown in FIGS. 2-1 (c) and 2-2 (a), the upper surfaces of the single crystal Si layers 52 a to 52 h of the original substrate 50 and the amorphous Si layer 12 formed on the substrate 11. CeO ₂ films 61 and 62 which are medium films that mediate crystal information (hereinafter referred to as crystal information mediation medium films) are formed on the entire surface. The CeO ₂ film 61 may be formed on at least the upper surfaces of the single crystal Si layers 52a to 52h, but here, the CeO ₂ film is formed on the entire surface of the original substrate 50 on the side where the single crystal Si layers 52a to 52h are formed. 61 is formed.

The crystal information mediating medium film prevents oxidation of the single crystal Si layers 52a to 52h on the original substrate 50 and the amorphous Si layer 12 on the substrate 11 (suppresses the formation of a natural oxide film) and also forms the underlying single crystal Si layer 52a. It is made of a material that can grow in lattice matching with ~ 52h. In the case where Si is used for the single crystal semiconductor layer, Ce (a cubic crystal having a lattice constant of 5.430 Å) and CeO ₂ (cerium dioxide, cubic having a lattice constant of 5.411 Å) having a lattice constant close to that of Si (lattice constant of 5.411 Å). The constant difference is 0.35%). The films 61 and 62 are used as the crystal information mediating medium films.

The CeO ₂ films 61 and 62 can be formed with a thickness of 10 nm by a method such as sputtering, MBE (Molecular Beam Epitaxy), or MOCVD (Metal-Organic CVD). When the CeO ₂ films 61 and 62 are in contact with the single crystal Si layers 52a to 52h, the crystal structures and crystal orientations matched with the crystal structures and crystal orientations of the underlying single crystal Si layers 52a to 52h, even at low temperatures. Grow to have. Therefore, as shown in FIG. 2C, when the CeO ₂ film 61 is formed on the entire surface of the original substrate 50, the upper surface becomes the {100} plane on the single crystal Si layers 52a to 52c, and The single-crystal CeO ₂ film 61a is formed so that the plane whose direction is normal is the {110} plane, and the upper surface is the {111} plane on the single-crystal Si layers 52d and 52e, and the longitudinal direction is normal. The single crystal CeO ₂ film 61b is formed to be {101}. The upper surface is the {110} plane on the single crystal Si layers 52f to 52h, and the plane whose normal is the longitudinal direction is { A single crystal CeO ₂ film 61c to be 110} is formed.

In addition, as shown in FIG. 2A, the CeO ₂ film 62 formed on the surface of the amorphous Si layer 12 formed on the substrate 11 takes over the structure of the underlying amorphous Si layer 12 and is crystallized. It becomes amorphous (amorphous) without becoming.

Note that CeO ₂ itself is a stable oxide and does not change even when exposed to an oxygen-containing atmosphere (for example, air). That is, the surface of the single crystal Si layers 52a to 52h of the original substrate 50 and the surface of the amorphous Si layer 12 of the substrate 11 also function as an oxidation-resistant film that prevents oxidation. Prior to the deposition of the CeO ₂ films 61 and 62, the surfaces of the single crystal Si layers 52a to 52h on the original substrate 50 and the surface of the amorphous Si layer 12 formed on the substrate 11 are treated with an HF solution or the like. It is desirable to remove the natural oxide film. Further, the Ce film may be thinly deposited before the CeO ₂ films 61 and 62 are deposited. By depositing the Ce film, generation of a natural oxide film can be suppressed. Here, the CeO ₂ films 61 and 62 are formed on both the original substrate 50 and the substrate 11, but the CeO ₂ films 61 and 62 may be formed only on one of them.

Next, as shown in FIG. 2B, the surfaces of the single crystal Si layers 52a to 52h on the original substrate 50 and the surface of the amorphous Si layer 12 on the substrate 11 are opposed to each other. As shown in FIG. 2A, these are physically brought into contact with each other through the CeO ₂ films 61 and 62.

  Thereafter, as shown in FIG. 2B, the original substrate 50 is made amorphous by a method such as current heating, laser irradiation, or microwave heating while maintaining the contact between the original substrate 50 and the substrate 11. Heating is performed for a predetermined time at a temperature at which the Si layer 12 does not crystallize. For example, it can be heated at a temperature of 600 ° C. for 30 minutes.

At this time, as shown in FIG. 2-4 (a), the amorphous CeO ₂ film 62 formed on the amorphous Si layer 12 of the substrate 11 is formed on the surfaces of the single crystal Si layers 52a to 52h of the original substrate 50. It formed in the contact portion thereof with the matching crystal structure and the single crystal CeO ₂ film 61a~61c having a crystal orientation, by heat energy propagating from the portion, of each of the single crystal CeO ₂ film 61a~61c structure Referring to FIG. 5, the single crystal CeO ₂ films 62a to 62c having crystal structures and crystal orientations consistent with these are changed.

Further, the amorphous Si layer 12 present in the lower portion of the single crystal CeO ₂ film 62a~62c also with reference to the structure of the single crystal CeO ₂ film 62a~62c its top, having a crystalline orientation as these consistent crystal structure It changes to single crystal Si layers 12a-12h. On the other hand, the CeO ₂ film 62 that is not in contact with the single crystal CeO ₂ films 61a to 61c remains amorphous without being crystallized, and the amorphous Si layer 12 below it remains amorphous.

The heat treatment process by bringing the original substrate 50 and the substrate 11 into contact with each other can be performed in a nitrogen atmosphere or in a reduced rare gas, but CeO ₂ has an oxidation resistance and is therefore performed in an air atmosphere. It is also possible.

Next, as shown in FIG. 2-4 (b), the original substrate 50 and the substrate 11 in physical contact with each other through the single crystal CeO ₂ films 61a to 61c and 62a to 62c are connected to the crystal information mediating medium film. Infiltrate the removal solution. In this case, for example, a mixed solution of sulfuric acid and hydrogen peroxide or a nitric acid solution can be used as the crystal information mediating medium film removing solution. As a result, the CeO ₂ films 61 and 62 (including the single crystal CeO ₂ films 61a to 61c and 62a to 62c) are quickly dissolved in the crystal information mediating medium film removing solution, and the single crystal CeO ₂ films 61a to 61c and 62a are dissolved. Are separated from the single crystal Si layers 52a to 52h of the original substrate 50 and the single crystal Si layers 12a to 12h formed in the amorphous Si layer 12 of the substrate 11. Is done. As a result, the amorphous Si layer 12 formed on the substrate 11 and the single crystal Si layers 12a to 12h formed therein are exposed. Further, the original substrate 50 also returns to the original state and can be reused.

Thus, CeO ₂ has a remarkable characteristic that it can be easily and selectively removed from Si by using a mixed solution of sulfuric acid and hydrogen peroxide or a nitric acid solution. If the single crystal Si layers 52a to 52h of the original substrate 50 and the amorphous Si layer 12 of the substrate 11 are brought into direct contact with each other to crystallize the amorphous Si layer 12, the single crystal Si layer 52a of the original substrate 50 is obtained. The single-crystal Si layers 12a to 12h of the base 11 formed in the region in contact with the -52h are completely integrated single-crystal Si, and there is no way to easily separate them. On the other hand, by propagating crystal information from the single crystal Si layers 12a to 12h to the amorphous Si layer 12 through the crystal information mediating medium film that can be easily selectively removed from the semiconductor material as in this embodiment. In addition, it is possible to easily separate the original substrate 50 and the substrate 11.

  The substrate 11 separated from the original substrate 50 is in a state where the single crystal Si layers 12a to 12h are embedded in the amorphous Si layer 12, as shown in FIG. 2-5 (a). . In this state, the process may proceed to the next step. However, heat treatment is performed here to crystallize the amorphous Si layer 12 around the single crystal Si layers 12a to 12h, so that regions of the single crystal Si layers 12a to 12h are formed. It may be further expanded.

  After that, as shown in FIG. 2-5 (b), the substrate 11 where the amorphous Si layer 12 and the single crystal Si layers 12a to 12h formed therein are exposed is mixed with hydrofluoric acid, nitric acid and acetic acid. Immerse in the liquid. Amorphous Si dissolves in a mixed solution of hydrofluoric acid, nitric acid and acetic acid at a speed of 5 times or more as compared with single crystal Si. Therefore, only the single crystal Si layers 12a to 12h can be adjusted by adjusting the immersion time. As a result, the amorphous Si layer 12 can be selectively removed. As a result, the single crystal Si layers 12a to 12h having a mirror image relationship with the single crystal Si layers 52a to 52h on the original substrate 50 are reproduced on the base 11 in a form in which the crystal structure and crystal orientation are preserved.

  Thereafter, an element such as a field effect transistor is formed on each single crystal Si layer 12 a to 12 h on the substrate 11. For example, in the case of an n-type field effect transistor, it is formed on the Si (100) surface, and in the case of a p-type field effect transistor, it is formed on the Si (110) surface, thereby achieving high speed and high function. An element can be obtained. As described above, a semiconductor device having a desired function can be obtained.

  In the above example, the case where silicon oxide is used as the substrate 51 of the original substrate 50 is illustrated, but the present invention is not limited to this, and the substrate 51 made of silicon nitride or other materials can be used. Further, when the original substrate 50 does not have a plurality of plane-oriented single crystal semiconductor layers but is formed of a single plane-oriented single crystal semiconductor layer, the semiconductor substrate is formed by using a lithography technique and an etching technique. The patterned substrate can be used as the original substrate 50 as it is.

Further, when the substrate 11 and the original substrate 50 in FIG. 2-4 (b) are separated, the substrate 51 is provided with a structure in which the crystal information mediating medium film removing liquid easily infiltrates the CeO ₂ films 61 and 62. Also good. FIG. 3 is a perspective view schematically showing another example of the structure of the original substrate. In this figure, the case where the through-hole 55 which penetrates to the base | substrate 51 in a thickness direction is provided is shown. By providing the through hole 55 in this way, when removing the CeO ₂ films 61 and 62 in FIG. 2-4 (b), the crystal information mediating medium film removing solution passes through the other hole 11 through the through hole 55. The CeO ₂ films 61 and 62 can be easily removed in contact with the surface of the film. The diameter of the through hole 55 may be a size that does not cause any trouble when the single crystal Si layers 52a to 52h are formed on the substrate 51, and can be set to about 100 nm, for example.

  In the example described above, the amorphous Si layer 12 is shown to be deposited on the entire surface of the substrate 11. However, prior to contact with the original substrate 50 in FIG. You may process to have. For example, in order to facilitate the removal of the amorphous Si layer 12 in FIG. 2-4 (b), the groove structure that promotes the infiltration of the chemical solution is formed in the amorphous Si layer 12 in which the single crystal Si layers 12a to 12h are not formed. It may be formed in advance in this area.

  Further, before the original substrate 50 and the substrate 11 are brought into contact with each other in FIG. 2-3B, the amorphous Si layer 12 in the region to be crystallized is left and the amorphous Si layer 12 in the other region is removed in advance. May be. In this case, the step of removing the amorphous Si layer 12 in FIG.

Furthermore, it is desirable that the crystal information mediating medium film is a substance that has a crystal structure consistent with Si (epitaxial growth) and can be selectively removed from Si. Examples of such materials include BaTiO ₃ , SrTiO ₃ , ZrO ₂ , Y ₂ O ₃ , SrO, BaO, SrRuO ₃ , Bi ₂ Sr ₂ CuO, and SrBi ₂ Ta ₂ O in addition to CeO ₂ mentioned in the above example. ₉ , MgO, a mixed crystal of Ge and Si can be used. These can be epitaxially grown on the single crystal Si layer and at the same time can be easily removed selectively from Si with sulfuric acid or hydrofluoric acid.

Further, in the above description, the case where the crystal orientation of the single crystal Si layers 52a to 52h is transferred to the amorphous Si layer 12 through the crystal information mediating medium film is exemplified. Crystal information can be propagated from the crystalline semiconductor layer to the amorphous semiconductor layer. For example, when Ge or GaAs is used as the single crystal semiconductor layer, MgO can be used as the crystal information mediating medium film. MgO can be easily and selectively removed from Ge or GaAs by hydrofluoric acid, ammonia, or the like. In addition, when GaAs is used as the single crystal semiconductor layer, a Ga ₂ O ₃ film can be used as the crystal information mediating medium film, and when GaN is used as the single crystal semiconductor layer, crystal information mediation is used. A ZnO film can be used as the medium film.

  As described above, in the first embodiment, crystal information mediation is performed on at least one of the master substrate 50 having a plurality of single crystal semiconductor layers arranged separately from each other and the substrate 11 on which the amorphous semiconductor layer is formed. A medium film is formed, the two are brought into contact with each other through a crystal information mediating medium film, heat treatment is performed, and crystal information of the single crystal semiconductor layer of the original substrate 50 is transferred to the amorphous semiconductor layer of the substrate 11 through the crystal information mediating medium film. The crystal information mediating medium film was removed. Thus, an inexpensive process such as photolithography is not used, and a single crystal semiconductor layer arranged separately from the original master substrate 50 is inexpensively formed on the substrate 11 on which an amorphous semiconductor layer is deposited in a self-aligning manner. Replanted in the transplant. As a result, the single crystal semiconductor layer having a mirror image relationship with the single crystal semiconductor layer of the original substrate 50 is reproduced on the substrate 11 having an arbitrary shape congruent with the original substrate with its crystal structure and crystal orientation controlled. Can do.

  Further, since the crystal information mediating medium film and the single crystal semiconductor layer can be selectively separated, there is also an effect that the original substrate 50 can be reused. Then, by repeating the above steps, it is only necessary to supply the base 11 on which an amorphous semiconductor layer is deposited, and an expensive SOI semiconductor substrate is not required, and a single crystal with a controlled crystal orientation is equivalent to that of an SOI substrate. A large amount of the base body 11 having a crystalline semiconductor layer can be manufactured at a low cost.

Further, by using an oxide such as CeO ₂ as the crystal information mediating medium, it functions as an oxidation resistant film for the single crystal semiconductor layer of the original substrate 50 and the amorphous semiconductor layer on the substrate 11. 11 can be performed in the atmosphere. As a result, facilities such as a clean room are not required, and the manufacturing cost of the semiconductor device can be further reduced.

  Further, when the original substrate 50 is manufactured, it is also possible to form the substrate 11 having a compound orientation single crystal region by providing single crystal semiconductor layers having different crystal orientations. This eliminates the need for an expensive large-diameter SOI semiconductor substrate, and allows a high-speed and high-performance semiconductor device to have a plurality of crystal planes (for example, Si (100) plane in the case of an n-type field effect transistor) most suitable for element characteristics In the case of a p-type field effect transistor, it has the effect that it can be manufactured at low cost on Si (110).

(Second Embodiment)
In the first embodiment, a case has been described in which a single crystal semiconductor layer having a mirror image relationship with the single crystal semiconductor layer formed on the original substrate is formed on another substrate, but in the second embodiment, the original substrate A method for manufacturing a semiconductor device in which the crystallinity of a single crystal semiconductor layer can be transplanted onto a semiconductor layer on another substrate will be described.

  FIG. 4A to FIG. 4B are schematic diagrams illustrating an example of the procedure of the semiconductor device manufacturing method according to the second embodiment. First, as shown in FIG. 4A, an original substrate 50A having a single crystal Si layer 53 that serves as a reference for crystal growth (seed) is formed. The original substrate 50A can be formed by the same method as in the first embodiment. Further, here, for example, the single crystal Si layer 53 having a shape extending in the X direction on the base 51, the upper surface being {110}, and the surface having the X direction as a normal line is {110}, It is assumed that they are formed at a predetermined interval in the Y direction.

  Next, as shown in FIG. 4B, an amorphous Si layer is formed on a substrate 11 different from the original substrate 50A, and further patterned into a predetermined shape using a lithography technique and an etching technique. . Here, the rectangular parallelepiped amorphous Si layer 12 extending in the Y direction has a predetermined interval in the X direction and the Y direction so as to come into contact with a part of the single crystal Si layer 53 when being overlapped with the original substrate 50A. It is arranged with.

Thereafter, as shown in FIG. 4C, CeO ₂ films 61 and 62 as crystal information mediating medium films are formed on the upper surfaces of the original substrate 50A and the substrate 11, and the single crystal Si layer 53 of the original substrate 50A is formed. Are brought into contact with each other through CeO ₂ films 61 and 62 so that the amorphous Si layer 12 of the substrate 11 faces each other. At this time, as described in the first embodiment, the CeO ₂ film 61 formed on the single crystal Si layer 53 takes over the underlying crystal structure and becomes a single crystal CeO ₂ film, which is formed on the amorphous Si layer 12. The CeO ₂ film 62 to be formed is an amorphous CeO ₂ film. Further, the amorphous Si layer 12 of the substrate 11 is in a state where only a part is in contact with the single crystal Si layer 53 of the original substrate 50 </ _b > A via the CeO ₂ films 61 and 62. Here, CeO ₂ films 61 and 62 are formed on both the original substrate 50A and the substrate 11, but a CeO ₂ film may be formed only on one of them.

Next, as shown in FIG. 4-2 (a), heat treatment is performed in a state where both are brought into contact with each other. Thereby, in the portion of the amorphous Si layer 12 in contact with the single crystal Si layer 53, the crystal information of the single crystal Si layer 53 is transferred to the amorphous Si layer 12 through the CeO ₂ films 61 and 62, and the single crystal Si layer 12i is formed. Then, by further heat treatment, crystallization proceeds throughout the amorphous Si layer 12 with the portion as a nucleus.

As a result, as shown in FIG. 4B, each amorphous Si layer 12 on the substrate 11 has a top surface of {110} and a surface whose normal to the X direction is {110}. A crystalline Si layer 12i is formed. Thereafter, as illustrated in FIG. 4C, as described in the first embodiment, the original substrate 50A and the substrate 11 are separated by removing the CeO ₂ films 61 and 62. As a result, a semiconductor device in which the single crystal Si layer 12i having a shape different from that of the single crystal Si layer 53 of the original substrate 50A is formed on the base 11 can be obtained.

  Moreover, such a method can be applied to the manufacture of solar cells. For example, an amorphous semiconductor composed of a single crystal semiconductor layer such as a single crystal Si layer that functions as a solar cell in one place on the original substrate and the same material as the single crystal semiconductor layer on the entire surface of the substrate on which electrodes are arranged A layer is formed, the single crystal semiconductor layer and the amorphous semiconductor layer are brought into contact with each other through the crystal information mediating medium film, and heat treatment is performed. During this heat treatment, the region that first contacts the single crystal semiconductor layer through the crystal information mediating medium film is crystallized using the crystal information mediating medium film as a seed, and the surrounding amorphous semiconductor layer is also crystallized by this crystallized portion. Crystallize as seed. In this way, the entire amorphous semiconductor layer formed over the base body becomes a single crystal semiconductor layer. And a solar cell can be manufactured by forming a diffusion layer, an electrode, etc. in the single crystal semiconductor layer on a base | substrate, for example.

  In the second embodiment, the amorphous semiconductor layer formed on the substrate 11 is bonded through a crystal information mediating medium film so that a part of the single crystal semiconductor layer of the original substrate 50A is in contact with the heat treatment, The amorphous semiconductor layer in the contact portion was first crystallized, and then the entire amorphous semiconductor layer was crystallized from there. Accordingly, when the single crystal semiconductor layer on the substrate 11 is formed, the single crystal semiconductor layer having the same size is not required, so that the processing step of the original substrate 50A can be simplified.

(Third embodiment)
In the third embodiment, there is provided a method for manufacturing a semiconductor device having a single crystal semiconductor layer in which a large amount of crystal information of the single crystal semiconductor layer of the original substrate is transferred using the method described in the first and second embodiments. explain.

  FIG. 5 is a diagram schematically showing a configuration of a semiconductor device manufacturing system according to the third embodiment. The manufacturing system 100 includes an original substrate conveyance line 110 that conveys an original substrate 50 and a substrate conveyance line 120 that conveys a substrate 11 on which a single crystal semiconductor layer is to be formed. In the original substrate transport line 110, a support 111 that conveys the original substrate 50 forms a loop, and the original substrate 50 is moved in a predetermined direction by three rotating bodies 112 to 114. One substrate transport line 120 is connected by a support 121 that transports the substrate 11 from a region where the substrate 11 is loaded to a region where the substrate 11 on which the single crystal semiconductor layer is formed is unloaded. It has become. The support 121 is moved in a predetermined direction by a drive mechanism (not shown).

A plurality of original substrate 50 is supported on the support 111 of the original substrate transport line 110 at a predetermined interval and moved in a predetermined direction. Then, the CeO ₂ film application unit 131 applies the CeO ₂ film 61 to the upper surface of the original substrate 50. On the other hand, the base 11 supported on the support 121 of the base transport line 120 is first transported to the amorphous Si layer forming unit 132, and the amorphous Si layer 12 is formed on the top surface of the base 11. Thereafter, the CeO ₂ film is applied to the CeO ₂ film application unit 133, and the CeO ₂ film 62 is applied on the amorphous Si layer 12.

Next, the surface of the substrate transport line 120 on which the CeO ₂ film 62 is applied and the surface of the original substrate transport line 110 on which the CeO ₂ film 61 is applied face each other so that they are in contact with each other. In addition, the supports 111 and 121 of the two lines merge. Thereafter, the original substrate 50 and the substrate 11 are conveyed to the heating unit 134 in contact with each other, and the single crystal CeO ₂ film formed on the single crystal Si layer of the original substrate 50 as described in the first embodiment. The crystal information is transferred to the CeO ₂ film 62 on the substrate 11, the crystal information is further transferred to the amorphous Si layer 12 on the substrate 11, and a single crystal Si layer 12 j is formed in the amorphous Si layer 12. .

Then, the original substrate 50 and the base 11 of the contact state is conveyed to the CeO ₂ film removing unit 135, and the base 11 and the original substrate 50 is immersed in a mixture of sulfuric acid and hydrogen peroxide, CeO ₂ film 61 62 are dissolved and removed. The mixed solution of sulfuric acid and hydrogen peroxide solution in which CeO ₂ is dissolved in the CeO ₂ film removing unit 135 is sent to the CeO ₂ regeneration unit 136. In CeO ₂ reproduction unit 136, and cerium oxalate by adding like oxalic acid in a mixture of sulfuric acid and hydrogen peroxide which CeO ₂ is dissolved, which was filtered off and fired, and CeO ₂ again, CeO ₂ The film application units 131 and 133 are reused.

Since the substrate 11 and the original substrate 50 from which the CeO ₂ films 61 and 62 have been removed are no longer bonded and can be easily separated, after passing through the CeO ₂ film removing section 135, the support of the original substrate transport line 110 is supported. The body 111 travels along a path separated from the support 121 of the substrate transport line 120 and transports the original substrate 50 to the CeO ₂ film coating unit 131 again. On one substrate transport line 120, the substrate 11 is transported to the amorphous Si layer removal unit 137. In this amorphous Si layer removing section 137, the base 11 is infiltrated into a mixed solution of hydrofluoric acid, nitric acid and acetic acid, the remaining amorphous Si layer 12 is selectively removed, and the single crystal Si layer 12j is left on the base 11. . Then, the substrate 11 in which the single crystal Si layer 12j remains is unloaded from the support 121 at a substrate unloading portion (not shown) and transferred to the next process to form an element on each single crystal Si layer 12j of the substrate 11. Thus, a semiconductor device is obtained.

  In the above description, the manufacturing system 100 describes the case of manufacturing the base body 11 having a single crystal Si layer. However, the manufacturing system 100 may manufacture the base body 11 having a single crystal semiconductor layer made of another semiconductor material. The manufacturing system 100 can have the same configuration.

  In the third embodiment, since the single crystal semiconductor layer can be easily formed on the base 11 having an arbitrary shape in a form in which the crystal structure and crystal orientation are controlled, the unit base having a small area provided with the single crystal semiconductor layer. A number of them are arranged in parallel, for example, as in letterpress printing technology. Accordingly, there is an effect that a large number of bases 11 in which single crystal semiconductor layers whose crystal orientations are controlled are separated can be continuously formed without using an expensive SOI semiconductor substrate.

(Fourth embodiment)
In the first embodiment, a case where a semiconductor device having a plurality of separated single crystal semiconductor layers is formed on a substrate has been shown. In the fourth embodiment, a method for manufacturing a semiconductor device in the first embodiment is used. A case where a semiconductor device having a structure in which a plurality of single crystal semiconductor layers are stacked is formed by applying the above will be described.

FIG. 6 is a cross-sectional view schematically showing an example of the procedure of the semiconductor device manufacturing method according to the fourth embodiment. First, as shown in FIG. 6A, an amorphous Si layer was formed on an insulating substrate 11 by the method described in the first embodiment, and was formed on an original substrate via a CeO ₂ film. A single crystal Si layer having a mirror image relationship with the single crystal Si layer is formed. Then, an element such as a field effect transistor is formed on the single crystal Si layer, and the first semiconductor layer 13 is formed.

  Next, as shown in FIG. 6B, an interlayer insulating film 14 such as a silicon oxide film is formed on the substrate 11 on which the first semiconductor layer 13 is formed, and a method such as a CMP (Chemical Mechanical Polishing) method is applied to the upper surface. To flatten.

  Thereafter, as shown in FIG. 6C, an amorphous GaN layer is formed on the interlayer insulating film 14 by a method similar to that described in the first embodiment, and becomes a crystal information mediating medium film for GaN. A single crystal GaN layer having a mirror image relationship with the single crystal GaN layer formed on the original substrate is formed through the ZnO film. Then, an element such as a field effect transistor is formed on the single crystal GaN layer, and the second semiconductor layer 15 is formed. Next, as shown in FIG. 6D, an interlayer insulating film 16 such as a silicon oxide film is formed on the substrate 11 on which the second semiconductor layer 15 is formed, and the upper surface is planarized by a method such as CMP.

  After that, as shown in FIG. 6E, an amorphous GaAs layer is formed on the interlayer insulating film 16 by the same method as described in the first embodiment, and becomes a crystal information mediating medium film for GaAs. A single crystal GaAs layer having a mirror image relation with the single crystal GaAs layer formed on the original substrate is formed through the MgO film. Then, an element such as a field effect transistor is formed on the single crystal GaAs layer, and the third semiconductor layer 17 is formed. Then, as shown in FIG. 6F, an interlayer insulating film 18 such as a silicon oxide film is formed on the base 11 on which the third semiconductor layer 17 is formed, and the upper surface is planarized by a method such as a CMP method.

  Through the above, a semiconductor device having a structure in which a plurality of single crystal semiconductor layers is stacked is obtained. Here, the case where the three semiconductor layers 13, 15, and 17 are stacked is shown as an example, but the number of stacked layers is not limited to this.

  In the first embodiment, the case where an element is formed in one kind of single crystal semiconductor layer is shown. In the fourth embodiment, a semiconductor device including an element having a different material for a single crystal semiconductor layer is also used as an interlayer insulating film. It has the effect that it can manufacture by laminating | stacking via. This makes it possible to manufacture composite electronic devices that have integrated electronic circuits with significantly different functions such as memory function (memory), calculation function (logic), sensing function (sensor), display function (display), and communication function. can do.

(Fifth embodiment)
In the fourth embodiment, a case has been described in which a semiconductor device is manufactured by laminating a plurality of single crystal semiconductor layers made of different materials with an interlayer insulating film interposed therebetween. However, in the fifth embodiment, the main substrate of the same substrate is described. The case where a plurality of single crystal semiconductor layers made of different materials are formed in the plane will be described.

FIG. 7 is a perspective view schematically showing an example of the procedure of the semiconductor device manufacturing method according to the fifth embodiment. First, as shown in FIG. 7A, an amorphous Si layer was formed on an insulating substrate 11 by the method described in the first embodiment, and was formed on an original substrate via a CeO ₂ film. A single crystal Si layer 21 having a mirror image relationship with the single crystal Si layer is formed. Then, the CeO ₂ film is removed, and the amorphous Si layer is selectively removed. Thereby, for example, the single crystal Si layer 21 is formed in the region R21 of the base 11. Although not shown, the original substrate is formed with a single crystal Si layer only in a region corresponding to the region R21, and no single crystal Si layer is formed in other regions.

  Next, as shown in FIG. 7B, a single crystal GaN layer 22 is formed on the region R22 of the base 11 by the same method as described in the first embodiment. Specifically, first, an amorphous GaN layer is formed on the substrate 11 on which the single crystal Si layer 21 is formed. Next, a ZnO film serving as a crystal information mediating medium film for GaN is formed on an original substrate having a plurality of single crystal GaN layers and a substrate 11 on which an amorphous GaN layer is formed, and both are brought into contact with each other through the ZnO film. The single crystal GaN layer 22 is formed in the amorphous GaN layer by performing heat treatment to transfer the crystal information of the single crystal GaN layer of the original substrate to the amorphous GaN layer through the ZnO film. Then, the ZnO film is removed, and the amorphous GaN layer is selectively removed. Although not shown, the original substrate is formed with a single crystal GaN layer only in a region corresponding to the region R22, and no single crystal GaN layer is formed in other regions.

  Thereafter, as shown in FIG. 7C, a single crystal GaAs layer 23 is formed on the region R23 of the substrate 11 by the same method as described in the first embodiment. Specifically, first, an amorphous GaAs layer is formed on the substrate 11 on which the single crystal Si layer 21 and the single crystal GaN layer 22 are formed. Next, an MgO film serving as a crystal information mediating medium film for GaAs is formed on an original substrate having a plurality of single crystal GaAs layers and a substrate 11 on which an amorphous GaAs layer is formed, and both are brought into contact with each other through the MgO film. The single crystal GaAs layer 23 is formed in the amorphous GaAs layer by performing heat treatment to transfer the crystal information of the single crystal GaAs layer of the original substrate to the amorphous GaAs layer through the MgO film. Then, the MgO film is removed, and the amorphous GaAs layer is selectively removed. Although not shown, the single-crystal GaAs layer is formed only in the region corresponding to the region R23 on the original substrate, and no single-crystal GaAs layer is formed in the other regions. After that, an element such as a field effect transistor is formed on each single crystal semiconductor layer.

  Through the above steps, a semiconductor device is obtained in which single-crystal semiconductor layers made of a plurality of semiconductor materials are spaced apart from each other in the upper surface of a single substrate 11. Note that, here, the case where a single crystal semiconductor layer made of three kinds of semiconductor materials is formed on the main surface of one base 11 is shown as an example, but the types of semiconductor materials formed on one base 11 are It is not limited to.

  In the fifth embodiment, there is an effect that elements having different materials for the single crystal semiconductor layer can also be formed on the single substrate 11. For example, a high-speed and high-performance semiconductor device can be manufactured at low cost on a semiconductor material (for example, Si for an n-type field effect transistor or Ge for a p-type field effect transistor) most suitable for element characteristics. It becomes possible to do. As a result, an electronic circuit having greatly different functions such as a storage function (memory), a calculation function (logic), a detection sensation function (sensor), a display function (display), and a communication function can be provided on one main surface of the same substrate 11. A composite electronic device can be manufactured.

  Although several embodiments of the present invention have been described, these embodiments are presented by way of example and are not intended to limit the scope of the invention. These novel embodiments can be implemented in various other forms, and various omissions, replacements, and changes can be made without departing from the scope of the invention. These embodiments and modifications thereof are included in the scope and gist of the invention, and are included in the invention described in the claims and the equivalents thereof.

DESCRIPTION OF SYMBOLS 11 ... Base | substrate, 12 ... Amorphous Si layer, 12a-12j, 21, 52a-52h, 53 ... Single-crystal Si layer, 13 ... 1st semiconductor layer, 14, 16, 18 ... Interlayer insulation film, 15 ... 2nd semiconductor layer , 17 ... third semiconductor layer, 22 ... single crystal GaN layer, 23 ... single crystal GaAs layer, 50, 50A ... original substrate, 51 ... base, 55 ... through hole, 61, 62 ... CeO ₂ film, 61 a to 61 c, 62 a - 62 c ... monocrystalline CeO ₂ film, 100 ... semiconductor device manufacturing system, 110 ... master substrate transfer line, 111, 121 ... support, 120 ... substrate transfer line, 131 and 133 ... CeO ₂ film coating unit, 132 ... Amorphous Si layer forming part, 134... Heating part, 135... CeO ₂ film removing part, 136... CeO ₂ regeneration part, 137... Amorphous Si layer removing part.

Claims (11)

A first substrate preparation step of preparing an insulating first substrate formed by separating a plurality of first single crystal semiconductor layers;
An amorphous semiconductor layer forming step of forming an amorphous semiconductor layer made of the same material as the first single crystal semiconductor layer on an insulating second substrate;
A medium film made of a material that can be selectively removed from the first single crystal semiconductor layer and the amorphous semiconductor layer and crystallizes by taking over the underlying crystal structure on at least one of the first base and the second base. A medium film forming step to be formed;
Contacting the first single crystal semiconductor layer of the first substrate with the amorphous semiconductor layer of the second substrate via the medium film;
The first single crystal semiconductor layer and the amorphous semiconductor layer are heated while being in contact with each other through the medium film, and the medium film and the amorphous semiconductor layer are heated to have a crystal structure and a crystal orientation of the first single crystal semiconductor layer. And a crystallization step of forming a second single crystal semiconductor layer in a region corresponding to the formation region of the first single crystal semiconductor layer,
A medium film removing step of removing the medium film while leaving the first single crystal semiconductor layer and the second single crystal semiconductor layer, and separating the first base and the second base;
An amorphous semiconductor layer removing step of removing the amorphous semiconductor layer of the second substrate;
Including
The first single crystal semiconductor layer and the amorphous semiconductor layer are made of Si,
The medium film is composed CeO _2,
In the medium film removal step, the medium film is removed by infiltrating the first substrate and the second substrate in contact with a mixed solution or nitric acid solution of sulfuric acid and hydrogen peroxide solution,
In the amorphous semiconductor layer removing step, the amorphous semiconductor layer is removed by infiltrating the second substrate with a mixed solution of hydrofluoric acid, nitric acid and acetic acid. . A first substrate preparation step of preparing an insulating first substrate formed by separating a plurality of first single crystal semiconductor layers;
A first amorphous semiconductor layer forming step of forming a first amorphous semiconductor layer made of the same material as the first single crystal semiconductor layer on an insulating second substrate;
At least one of the first base and the second base is made of a material that can be selectively removed from the first single crystal semiconductor layer and the first amorphous semiconductor layer and that crystallizes by taking over the underlying crystal structure. A first medium film forming step of forming one medium film;
Contacting the first single crystal semiconductor layer of the first substrate with the first amorphous semiconductor layer of the second substrate via the first medium film;
The first single crystal semiconductor layer and the first amorphous semiconductor layer are heated in contact with each other via the first medium film, and the first medium film and the first amorphous semiconductor layer are heated to the first single crystal. A crystallization step of crystallizing in conformity with the crystal structure and crystal orientation of the semiconductor layer and forming a second single crystal semiconductor layer in a region corresponding to the formation region of the first single crystal semiconductor layer;
A first medium film removing step of removing the first medium film while leaving the first single crystal semiconductor layer and the second single crystal semiconductor layer and separating the first base and the second base;
A method for manufacturing a semiconductor device, comprising:   3. The method of manufacturing a semiconductor device according to claim 2, further comprising a first amorphous semiconductor layer removing step of removing the first amorphous semiconductor layer of the second substrate after the first medium film removing step. .   After the first medium film removal step, the first substrate is reused, and the processing from the first substrate preparation step to the first medium film removal step is repeatedly performed on the new second substrate. The method for manufacturing a semiconductor device according to claim 2, wherein the method is a semiconductor device manufacturing method. The first single crystal semiconductor layer and the first amorphous semiconductor layer are made of Si,
The method of manufacturing a semiconductor device according to claim ₂ , wherein the first medium film is made of CeO ₂ . The first single crystal semiconductor layer and the first amorphous semiconductor layer are made of Si,
The first medium film is made of a mixed crystal of BaTiO ₃ , SrTiO ₃ , ZrO ₂ , Y ₂ O ₃ , SrO, BaO, SrRuO ₃ , Bi ₂ Sr ₂ CuO, SrBi ₂ Ta ₂ O ₉ , MgO, Ge and Si. 5. The method of manufacturing a semiconductor device according to claim 2, wherein the material is one material selected from the group consisting of:   The method for manufacturing a semiconductor device according to claim 2, wherein the plurality of first single crystal semiconductor layers include a plurality of single crystal semiconductor layers having different crystal orientations in a surface direction.   The method for manufacturing a semiconductor device according to claim 2, wherein the second base is provided with a plurality of through holes penetrating in a thickness direction of the second base. . After the first amorphous semiconductor layer removing step, forming an interlayer insulating film covering the second single crystal semiconductor layer and having a planarized upper surface on the second substrate;
Preparing an insulating third substrate formed by separating a plurality of third single crystal semiconductor layers made of a material different from the first single crystal semiconductor layer;
Forming a second amorphous semiconductor layer made of the same material as the third single crystal semiconductor layer on the second substrate on which the interlayer insulating film is formed;
At least one of the second base and the third base is made of a material that can be selectively removed from the third single crystal semiconductor layer and the second amorphous semiconductor layer and that crystallizes by taking over the underlying crystal structure. Forming a two-media film;
Contacting the third single crystal semiconductor layer of the third substrate and the second amorphous semiconductor layer of the second substrate via the second medium film;
The third single crystal semiconductor layer and the second amorphous semiconductor layer are heated while being in contact with each other via the second medium film, and the second medium film and the second amorphous semiconductor layer are heated to the third single crystal. Crystallizing in conformity with the crystal structure and crystal orientation of the semiconductor layer, and forming a fourth single crystal semiconductor layer in a region corresponding to the formation region of the third single crystal semiconductor layer;
Removing the second medium film while leaving the third single crystal semiconductor layer and the fourth single crystal semiconductor layer, and separating the third base and the second base;
Removing the second amorphous semiconductor layer of the second substrate;
The method of manufacturing a semiconductor device according to claim 3, further comprising: A plurality of third single crystal semiconductor layers made of a material different from that of the first single crystal semiconductor layer are separated from each other, and an insulating first electrode formed at a position different from the formation position of the first single crystal semiconductor layer is formed. Preparing three substrates;
Forming a second amorphous semiconductor layer made of the same material as the third single crystal semiconductor layer on the second substrate on which the second single crystal semiconductor layer is formed;
At least one of the second base and the third base is made of a material that can be selectively removed from the third single crystal semiconductor layer and the second amorphous semiconductor layer and that crystallizes by taking over the underlying crystal structure. Forming a two-media film;
Contacting the third single crystal semiconductor layer of the third substrate and the second amorphous semiconductor layer of the second substrate via the second medium film;
The third single crystal semiconductor layer and the second amorphous semiconductor layer are heated while being in contact with each other via the second medium film, and the second medium film and the second amorphous semiconductor layer are heated to the third single crystal. Crystallizing in conformity with the crystal structure and crystal orientation of the semiconductor layer, and forming a fourth single crystal semiconductor layer in a region corresponding to the formation region of the third single crystal semiconductor layer;
Removing the second medium film while leaving the third single crystal semiconductor layer and the fourth single crystal semiconductor layer, and separating the third base and the second base;
Removing the second amorphous semiconductor layer of the second substrate;
The method of manufacturing a semiconductor device according to claim 3, further comprising: A first substrate preparation step of preparing an insulating first substrate formed by separating a plurality of first single crystal semiconductor layers;
An amorphous semiconductor layer forming step of forming an amorphous semiconductor layer made of the same material as the first single crystal semiconductor layer on the insulating second substrate;
A patterning step of patterning the amorphous semiconductor layer into a predetermined shape;
A medium made of a material that can be selectively removed from the first single crystal semiconductor layer and the amorphous semiconductor layer on at least one of the first base and the second base and crystallizes by taking over the underlying crystal structure. A medium film forming step of forming a film;
Contacting the first single crystal semiconductor layer of the first substrate with the amorphous semiconductor layer of the second substrate via the medium film;
The first single crystal semiconductor layer and the amorphous semiconductor layer are heated in a state of being in contact with each other through the medium film, and the medium film and the patterned amorphous semiconductor layer are crystallized to form a first layer. Crystallization step of forming two single crystal semiconductor layers;
A first medium film removing step of removing the medium film while leaving the first single crystal semiconductor layer and the second single crystal semiconductor layer, and separating the first base and the second base;
A method for manufacturing a semiconductor device, comprising:

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