JP2013135105A - Power semiconductor device - Google Patents

Power semiconductor device Download PDF

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JP2013135105A
JP2013135105A JP2011284875A JP2011284875A JP2013135105A JP 2013135105 A JP2013135105 A JP 2013135105A JP 2011284875 A JP2011284875 A JP 2011284875A JP 2011284875 A JP2011284875 A JP 2011284875A JP 2013135105 A JP2013135105 A JP 2013135105A
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substrate
power semiconductor
semiconductor device
circuit board
printed circuit
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JP5665729B2 (en
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Shingo Sudo
進吾 須藤
Shinsuke Asada
晋助 浅田
Junji Fujino
純司 藤野
Jun Tokumaru
準 徳丸
Takanobu Kajiwara
孝信 梶原
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Mitsubishi Electric Corp
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Mitsubishi Electric Corp
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/45124—Aluminium (Al) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
    • H01L2224/48472—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/71—Means for bonding not being attached to, or not being formed on, the surface to be connected
    • H01L2224/72—Detachable connecting means consisting of mechanical auxiliary parts connecting the device, e.g. pressure contacts using springs or clips
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1305—Bipolar Junction Transistor [BJT]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1305—Bipolar Junction Transistor [BJT]
    • H01L2924/13055—Insulated gate bipolar transistor [IGBT]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

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  • Inverter Devices (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide a power semiconductor device which achieves higher productivity compared to conventional power semiconductor devices and ensures operation reliability over a long time period.SOLUTION: A power semiconductor device includes: an insulation substrate 1 where a power semiconductor element 3 is mounted; a printed circuit board 7 that is disposed facing the insulation substrate and has wiring on both surfaces; a resin housing 9 holding the insulation substrate and the printed circuit board; and an external terminal 8 connected with a circuit of the printed circuit board 7. The power semiconductor device further includes a flexible terminal 6 which electrically connects the power semiconductor element with a circuit of the printed circuit board and has flexibility.

Description

本発明は、電力用半導体素子を組み合わせてインバータ回路などを構成する電力用半導体装置に関する。   The present invention relates to a power semiconductor device that constitutes an inverter circuit or the like by combining power semiconductor elements.

一般的に電力用半導体装置は、放熱性に優れた絶縁基板上に電力用半導体素子を実装し、電力用半導体素子から例えばアルミワイヤなどで配線を行うことで回路を構成し、この回路と、絶縁基板を支持する樹脂筐体に設けられた外部端子とが電気的に接続されている。   In general, a power semiconductor device is configured by mounting a power semiconductor element on an insulating substrate excellent in heat dissipation and wiring the power semiconductor element with, for example, an aluminum wire. An external terminal provided on a resin casing that supports the insulating substrate is electrically connected.

このような構造にあっては、絶縁基板上で配線し、かつ樹脂筐体の外部端子へ配線を行うため、高価である絶縁基板の面積が大きくなりコストアップすると共に、電力用半導体装置の外形も大きくなるという課題がある。よって、電力用半導体装置の小型化が検討されてきた。   In such a structure, since wiring is performed on the insulating substrate and wiring is performed to the external terminal of the resin housing, the area of the expensive insulating substrate is increased, the cost is increased, and the outer shape of the power semiconductor device is increased. There is also a problem of becoming larger. Therefore, downsizing of power semiconductor devices has been studied.

装置小型化の手法として、例えば、絶縁基板上の配線パターンに外部端子を実装し、この外部端子の先端面を露出させるように樹脂封止することで、外部端子を絶縁基板面積内から取り出す構造が提案されている（特許文献１）。   As a method for downsizing the device, for example, a structure in which an external terminal is mounted on a wiring pattern on an insulating substrate, and the external terminal is taken out from the area of the insulating substrate by resin sealing so as to expose the end surface of the external terminal. Has been proposed (Patent Document 1).

また、アルミワイヤの配線面積を削減する構造として、半導体素子の面に固着され、かつプリント基板に固着されたインプラントピンを用い、かつインプラントピンと電気的に接続された外部端子を取り出す構造が提案されている（特許文献２）。   In addition, as a structure for reducing the wiring area of the aluminum wire, a structure using an implant pin fixed to the surface of a semiconductor element and fixed to a printed circuit board and taking out an external terminal electrically connected to the implant pin is proposed. (Patent Document 2).

特開２００１−２８４５２４号公報（図１）JP 2001-284524 A (FIG. 1) 特開２０１１−１４２１２４号公報（図２）Japanese Patent Laying-Open No. 2011-142124 (FIG. 2)

しかしながら、上述の各特許文献に開示される構造では、特に多数の半導体素子が搭載される３相インバータ回路などの複雑な回路構成の装置にあっては、絶縁基板上へはんだ付けしたときに生じた半導体素子の傾きや、絶縁基板の反りに起因して、外部端子の高さにバラツキが発生する。このようなバラツキを吸収するために、はんだなどの接合材を多く供給する、あるいはピンの高さを調整する等の手当が必要となり、電力用半導体装置の生産性向上に対して問題があった。
また、プリント基板を用いた場合には、半導体素子が実装されその動作中に高温になる絶縁基板と、比較的温度上昇が起こり難いプリント基板との熱変形差に起因した応力が端子接続部に作用することから、電力用半導体装置の高温環境での使用や、長期の動作信頼性の確保に対しても問題があった。 However, in the structure disclosed in each of the above-mentioned patent documents, particularly in an apparatus having a complicated circuit configuration such as a three-phase inverter circuit on which a large number of semiconductor elements are mounted, it occurs when soldered onto an insulating substrate. Due to the inclination of the semiconductor element and the warp of the insulating substrate, the height of the external terminal varies. In order to absorb such variations, it is necessary to supply a large amount of bonding material such as solder or to adjust the height of the pins, which has a problem in improving the productivity of power semiconductor devices. .
In addition, when a printed circuit board is used, stress due to a thermal deformation difference between the insulating substrate that is mounted with the semiconductor element and becomes high temperature during operation and the printed circuit board that is relatively difficult to rise in temperature is applied to the terminal connection portion. As a result, there are problems in using the power semiconductor device in a high temperature environment and ensuring long-term operation reliability.

本発明は、このような問題点を解決するためになされたもので、従来に比べて生産性が高く、長期にわたる動作信頼性を確保可能な電力用半導体装置を提供することを目的とする。   The present invention has been made to solve such a problem, and an object of the present invention is to provide a power semiconductor device that is higher in productivity than conventional ones and can ensure long-term operation reliability.

上記目的を達成するため、本発明は以下のように構成する。
即ち、本発明の第１態様における電力用半導体装置は、放熱板に絶縁層を介して形成した回路パターンに電力用半導体素子を実装した第１基板と、両面に配線回路を形成した第２基板と、上記放熱板を一側面に露出させて第１基板を保持しかつ上記電力用半導体素子に対向して配置した上記第２基板を保持する樹脂筐体と、第２基板における上記配線回路に接続され樹脂筐体外部へ導出される外部端子と，を備えた電力用半導体装置において、樹脂筐体内に充填される絶縁性樹脂と、樹脂筐体内にて第１基板と第２基板との間に設けられる基板間接続端子と、をさらに備え、基板間接続端子は、第１基板における上記回路パターン及び上記電力用半導体素子の少なくとも一方と、これらに対向する第２基板における上記配線回路とを電気的に接続し、かつ可撓性を有する屈伸部を有することを特徴とする。 In order to achieve the above object, the present invention is configured as follows.
That is, the power semiconductor device according to the first aspect of the present invention includes a first substrate in which a power semiconductor element is mounted on a circuit pattern formed on a heat sink via an insulating layer, and a second substrate in which wiring circuits are formed on both sides. And a resin casing that holds the first substrate with the heat dissipation plate exposed on one side surface and holds the second substrate disposed to face the power semiconductor element, and the wiring circuit on the second substrate. In a power semiconductor device having an external terminal connected and led out to the outside of the resin casing, an insulating resin filled in the resin casing and between the first substrate and the second substrate in the resin casing The board-to-board connection terminal further includes at least one of the circuit pattern and the power semiconductor element on the first board, and the wiring circuit on the second board facing the board. Electrically It continued to, and characterized by having a bending portion having flexibility.

本発明の第１態様における電力用半導体装置によれば、互いに対向する第１基板と第２基板との間に基板間接続端子が設けられ、この基板間接続端子は屈伸部を有する。よって、第１基板の反りや電力用半導体素子の傾きが存在する場合でも、屈伸部がこれらを吸収可能なことから、これらの影響を受けることなく、第１基板における回路パターン及び電力用半導体素子の少なくとも一方と第２基板における配線回路とは、電気的に接続可能となる。よって、電力用半導体装置の組み立てが容易になり、生産性を向上させることができる。さらに、第１基板と第２基板との間の熱変形差を基板間接続端子の屈伸部で吸収することができ、電力用半導体装置の長期にわたる電気接続の信頼性向上も達成することができる。また、第１基板に電力用半導体素子が実装され、第１基板の回路パターンと第２基板の配線回路とが基板間接続端子によって電気的に接続され、配線回路から外部端子を樹脂筐体の外部へ導出したことから、第１基板の面積を縮小でき、電力用半導体装置の小型化を図ることができる。   According to the power semiconductor device of the first aspect of the present invention, the inter-substrate connection terminal is provided between the first substrate and the second substrate facing each other, and the inter-substrate connection terminal has the bending portion. Therefore, even when there is a warp of the first substrate or an inclination of the power semiconductor element, the bending portion can absorb them, so that the circuit pattern and the power semiconductor element on the first substrate are not affected by these. At least one of these and the wiring circuit on the second substrate can be electrically connected. Therefore, assembly of the power semiconductor device is facilitated, and productivity can be improved. Furthermore, the thermal deformation difference between the first substrate and the second substrate can be absorbed by the bent portion of the inter-substrate connection terminal, and the reliability improvement of the electrical connection over a long period of the power semiconductor device can also be achieved. . In addition, the power semiconductor element is mounted on the first substrate, the circuit pattern on the first substrate and the wiring circuit on the second substrate are electrically connected by the inter-substrate connection terminal, and the external terminal is connected to the resin housing from the wiring circuit. Since it is derived to the outside, the area of the first substrate can be reduced, and the power semiconductor device can be miniaturized.

本発明の実施の形態１にかかる電力用半導体装置の断面図である。It is sectional drawing of the semiconductor device for electric power concerning Embodiment 1 of this invention. 図１に示す絶縁基板に形成した回路パターンを示す平面図である。It is a top view which shows the circuit pattern formed in the insulating substrate shown in FIG. 図１に示すプリント基板に形成した配線回路のパターンを示す平面図である。It is a top view which shows the pattern of the wiring circuit formed in the printed circuit board shown in FIG. 図１に示す可撓性端子の側面図である。It is a side view of the flexible terminal shown in FIG. 図１に示す可撓性端子の変形例における側面図である。It is a side view in the modification of the flexible terminal shown in FIG. 図１に示す可撓性端子の別の変形例における側面図である。It is a side view in another modification of the flexible terminal shown in FIG. 本発明の実施の形態２にかかる電力用半導体装置の断面図である。It is sectional drawing of the semiconductor device for electric power concerning Embodiment 2 of this invention. 本発明の実施の形態３にかかる電力用半導体装置の断面図である。It is sectional drawing of the semiconductor device for electric power concerning Embodiment 3 of this invention. 本発明の実施の形態４にかかる電力用半導体装置の断面図である。It is sectional drawing of the semiconductor device for electric power concerning Embodiment 4 of this invention.

本発明の実施形態である電力用半導体装置について、図を参照しながら以下に説明する。尚、各図において、同一又は同様の構成部分については同じ符号を付している。   A power semiconductor device according to an embodiment of the present invention will be described below with reference to the drawings. In each figure, the same or similar components are denoted by the same reference numerals.

実施の形態１．
図１は、本発明の実施の形態１にかかる電力用半導体装置１００の断面図であり、また図２は、電力用半導体装置１００の絶縁基板１に構成された回路の平面図であり、図３は、プリント基板７に構成された配線回路７ａのパターンを示す平面図である。尚、絶縁基板１は、第１基板の一例に相当し、プリント基板７は、第２基板の一例に相当する。第１基板及び第２基板は、実施形態のものに限定されるものではなく、特に熱膨張率に差がある２種類の基板が相当し、以下に説明するように、このような基板の場合に本発明はさらに効果的となる。しかしながら、第１基板及び第２基板は、熱膨張率にほとんど差がないような基板であってもよい。 Embodiment 1 FIG.
FIG. 1 is a cross-sectional view of a power semiconductor device 100 according to a first embodiment of the present invention, and FIG. 2 is a plan view of a circuit configured on an insulating substrate 1 of the power semiconductor device 100. 3 is a plan view showing a pattern of the wiring circuit 7 a formed on the printed circuit board 7. The insulating substrate 1 corresponds to an example of a first substrate, and the printed circuit board 7 corresponds to an example of a second substrate. The first substrate and the second substrate are not limited to those of the embodiment, and particularly two types of substrates having a difference in thermal expansion coefficient correspond to the case of such a substrate as described below. In addition, the present invention is further effective. However, the first substrate and the second substrate may be substrates that have almost no difference in thermal expansion coefficient.

電力用半導体装置１００に用いられる絶縁基板１は、主面の面積８０ｍｍ×４０ｍｍであり、厚み２ｍｍの放熱板としてのＡｌ板１ａ、高熱伝導のセラミックフィラーを混合した厚み０．１５ｍｍの絶縁層１ｂ、厚み７０μｍのアルミニウムからなる回路パターン１ｃが積層されて形成された、所謂メタルベース基板である。   The insulating substrate 1 used for the power semiconductor device 100 has a main surface area of 80 mm × 40 mm, an Al plate 1a as a heat sink having a thickness of 2 mm, and an insulating layer 1b having a thickness of 0.15 mm mixed with a high thermal conductive ceramic filler. This is a so-called metal base substrate formed by laminating circuit patterns 1c made of aluminum having a thickness of 70 μm.

回路パターン１ｃには、図２に示すような配置形態にて、はんだ２を用いて、ＩＧＢＴ３（絶縁ゲート型バイポーラトランジスタ）及びＦＷＤｉ４（フリーホイーリングダイオード）がそれぞれ接合されている。尚、ＩＧＢＴ３及びＦＷＤｉ４は、電力用半導体素子の一例に相当する。   An IGBT 3 (insulated gate bipolar transistor) and an FWDi 4 (free wheeling diode) are joined to the circuit pattern 1c using the solder 2 in the arrangement shown in FIG. The IGBT 3 and FWDi 4 correspond to an example of a power semiconductor element.

ＩＧＢＴ３は、主面の面積７ｍｍ×７ｍｍ、厚み２５０μｍからなり、その表面には、制御電極であるゲート電極と主電極であるエミッタ電極とを有し、その裏面には、回路パターン１ｃとはんだ付けされる主電極であるコレクタ電極を有する。ＩＧＢＴ３のゲート電極は、Ａｌワイヤ５を用いて回路パターン１ｃに電気的に接続されている。
ＦＷＤｉ４は、主面の面積７ｍｍ×５ｍｍ、厚み２５０μｍからなり、その表面には、主電極であるアノード電極を、その裏面には、回路パターン１ｃとはんだ付けされる主電極であるカソード電極を有する。 The IGBT 3 has a main surface area of 7 mm × 7 mm and a thickness of 250 μm, and has a gate electrode as a control electrode and an emitter electrode as a main electrode on its front surface, and a circuit pattern 1c and solder on its back surface. A collector electrode which is a main electrode to be formed. The gate electrode of the IGBT 3 is electrically connected to the circuit pattern 1 c using an Al wire 5.
FWDi4 has a main surface area of 7 mm × 5 mm and a thickness of 250 μm, and has an anode electrode as a main electrode on its surface and a cathode electrode as a main electrode soldered to the circuit pattern 1c on its back surface. .

図１に示すように、絶縁基板１に実装されたＩＧＢＴ３等の電力用半導体素子に平行または略平行にプリント基板７が配置される。プリント基板７は、本実施形態では面積９０ｍｍ×５０ｍｍの材質ＦＲの基材７ｂの両面に配線回路が形成され、ＩＧＢＴ３等の電力用半導体素子に対面した表面には、図３に示すようなパターンの配線回路７ａが形成されている。   As shown in FIG. 1, a printed circuit board 7 is arranged in parallel or substantially parallel to a power semiconductor element such as an IGBT 3 mounted on an insulating substrate 1. In the present embodiment, the printed circuit board 7 has a wiring circuit formed on both surfaces of the base material 7b of material FR having an area of 90 mm × 50 mm, and has a pattern as shown in FIG. 3 on the surface facing the power semiconductor element such as IGBT3. Wiring circuit 7a is formed.

互いに対向して配置される絶縁基板１とプリント基板７との間には、両者間の電気的接続を行い、基板間接続端子に相当する可撓性端子６が設けられる。このような可撓性端子６は、本実施形態では短冊状の板材で構成され、一例として厚み０．５ｍｍ、幅３ｍｍの黄銅板を、例えば図４に示すように、折り重ねるように屈曲させた屈伸部６１を形成した端子である。このような可撓性端子６の一端部６２（図４）は、回路パターン１ｃ、ＩＧＢＴ３のエミッタ電極、及びＦＷＤｉ４のアノード電極に、はんだ（図示せず）を用いて電気的、機械的に固定される。また、可撓性端子６の他端部６３（図４）は、プリント基板７の配線回路７ａに、Ａｇフィラーが混合されている導電性接着剤（図示せず）によって電気的に接続される。このようにして可撓性端子６は、絶縁基板１とプリント基板７との間で、屈伸部６１によって伸縮されて配置される。   Between the insulating substrate 1 and the printed circuit board 7 arranged to face each other, a flexible terminal 6 is provided which performs electrical connection therebetween and corresponds to an inter-substrate connection terminal. Such a flexible terminal 6 is formed of a strip-shaped plate material in the present embodiment. For example, a brass plate having a thickness of 0.5 mm and a width of 3 mm is bent so as to be folded as shown in FIG. This is a terminal in which a bent / extended portion 61 is formed. One end 62 (FIG. 4) of the flexible terminal 6 is electrically and mechanically fixed to the circuit pattern 1c, the emitter electrode of the IGBT 3, and the anode electrode of the FWDi 4 using solder (not shown). Is done. The other end 63 (FIG. 4) of the flexible terminal 6 is electrically connected to the wiring circuit 7a of the printed circuit board 7 by a conductive adhesive (not shown) mixed with Ag filler. . In this way, the flexible terminal 6 is disposed between the insulating substrate 1 and the printed circuit board 7 by being expanded and contracted by the bending / extending portion 61.

また、回路パターン１ｃ、ＩＧＢＴ３のエミッタ電極、及びＦＷＤｉ４のアノード電極と接続される可撓性端子６は、本実施形態ではそれぞれ同一形状である。一方、ＩＧＢＴ３のゲート電極に接続される可撓性端子６は、エミッタ電極用の端子に比べて小さい端子を使用している。勿論、このような構成に限定されず、例えば電流容量の小さい電力用半導体装置にあっては、ゲート電極及びエミッタ電極共に、同一形状の可撓性端子６を用いても構わない。   The flexible terminals 6 connected to the circuit pattern 1c, the emitter electrode of the IGBT 3, and the anode electrode of the FWDi 4 have the same shape in this embodiment. On the other hand, the flexible terminal 6 connected to the gate electrode of the IGBT 3 uses a terminal smaller than the terminal for the emitter electrode. Of course, the present invention is not limited to such a configuration. For example, in a power semiconductor device with a small current capacity, the flexible terminal 6 having the same shape may be used for both the gate electrode and the emitter electrode.

プリント基板７において、可撓性端子６が接続された配線回路７ａには、外部端子８がはんだ付けされ、配線回路７ａに対向する、プリント基板７の対向面側へ導出されている。   In the printed circuit board 7, the external terminal 8 is soldered to the wiring circuit 7a to which the flexible terminal 6 is connected, and is led out to the facing surface side of the printed circuit board 7 facing the wiring circuit 7a.

絶縁基板１及びプリント基板７の外縁部分には、図１に示すように、主にＰＰＳ（ポリフェニレンサルファイド）からなる樹脂筐体９が取り付けられ、樹脂筐体９と、絶縁基板１及びプリント基板７とは、シリコーン接着剤（図示せず）で接着される。絶縁基板１が取り付けられた状態において、樹脂筐体９の一側面９ａには、絶縁基板１のＡｌ板１ａが面一の状態で露出する。この露出したＡｌ板１ａには、装置外部への放熱のために放熱グリースを介してヒートシンク（共に図示せず）が接続される。このため樹脂筐体９には、ヒートシンク取付用のネジを通すための取付穴（図示せず）が形成されている。
また、樹脂筐体９の内側には、絶縁基板１とプリント基板７との隙間からプリント基板７の上面を覆う部分まで、空間放電、沿面放電に対する絶縁封止用のシリコーンゲル１１が注入される。さらに、樹脂筐体９の他方側面９ｂには、ＰＰＳからなり外部端子８の導出部を形成した蓋１０が取り付けられる。 As shown in FIG. 1, a resin housing 9 mainly made of PPS (polyphenylene sulfide) is attached to the outer edge portions of the insulating substrate 1 and the printed circuit board 7, and the resin housing 9, the insulating substrate 1, and the printed circuit board 7. Is bonded with a silicone adhesive (not shown). In a state where the insulating substrate 1 is attached, the Al plate 1a of the insulating substrate 1 is exposed on the one side surface 9a of the resin housing 9 in a flush state. A heat sink (both not shown) is connected to the exposed Al plate 1a via heat radiating grease for heat radiating to the outside of the apparatus. For this reason, the resin housing 9 is formed with an attachment hole (not shown) for passing a screw for attaching the heat sink.
In addition, a silicone gel 11 for insulating and sealing against space discharge and creeping discharge is injected into the inside of the resin housing 9 from the gap between the insulating substrate 1 and the printed circuit board 7 to a portion covering the upper surface of the printed circuit board 7. . Further, a lid 10 made of PPS and having a lead-out portion for the external terminal 8 is attached to the other side surface 9b of the resin casing 9.

絶縁基板１、プリント基板７、及び樹脂筐体９の接着工程は、次のように行う。つまり、絶縁基板１、ＩＧＢＴ３、ＦＷＤｉ４、及び可撓性端子６の一端部６２をはんだ付けし、ＩＧＢＴ３のゲート電極にアルミニウムワイヤ５を接続し、樹脂筐体９と、絶縁基板１及びプリント基板７との接着部にシリコーン接着剤を塗布し、さらに、可撓性端子６の他端部６３との接続部に導電性接着剤を塗布したプリント基板７を重ねて、これらを加熱硬化させることで接着される。その際、可撓性端子６の屈伸部６１による反発力でプリント基板７が撓まないように、可撓性端子６のばね定数、押しつけ量が選定される。
以下には、電力用半導体装置１００をこのような構造とした理由について説明する。 The bonding process of the insulating substrate 1, the printed circuit board 7, and the resin housing 9 is performed as follows. That is, the insulating substrate 1, the IGBT 3, FWDi 4, and one end 62 of the flexible terminal 6 are soldered, the aluminum wire 5 is connected to the gate electrode of the IGBT 3, and the resin housing 9, the insulating substrate 1, and the printed substrate 7. The printed circuit board 7 coated with a conductive adhesive is applied to the connecting portion with the other end portion 63 of the flexible terminal 6 and then cured by heating. Glued. At that time, the spring constant and the pressing amount of the flexible terminal 6 are selected so that the printed circuit board 7 is not bent by the repulsive force of the bending portion 61 of the flexible terminal 6.
Hereinafter, the reason why the power semiconductor device 100 has such a structure will be described.

即ち、従来技術説明で既に述べたように、絶縁基板１は、放熱性及び絶縁性を有する反面、電力用半導体装置の中では高価な部品であることから、その面積の縮小化が求められる。これには、配線面積の縮小化が効果的である。よって、本実施形態の電力用半導体装置１００では、絶縁基板１、及びＩＧＢＴ３等の電力用半導体素子の直上に配線を配置する方法、つまり絶縁基板１に積層するように、両面配線したプリント基板７を配置する方法が取られる。特に、本実施形態では、絶縁基板１における回路パターン１ｃの一部又は全部を、電力用半導体装置１００内のプリント基板７に形成することにより、絶縁基板１の面積を一層縮小する効果を得ている。また、プリント基板７を多層化することにより、プリント基板７の配線パターンと蓋１０とを変更するだけで、外部端子８の配置をニーズに合わせて変更することが可能となる。   That is, as already described in the description of the prior art, the insulating substrate 1 has heat dissipation and insulating properties, but is an expensive component in the power semiconductor device, so that the area thereof is required to be reduced. For this purpose, reduction of the wiring area is effective. Therefore, in the power semiconductor device 100 of the present embodiment, the printed circuit board 7 that is wired on both sides so as to be laminated on the insulating substrate 1, a method of arranging the wiring immediately above the insulating substrate 1 and the power semiconductor element such as the IGBT 3. The method of placing is taken. In particular, in the present embodiment, an effect of further reducing the area of the insulating substrate 1 can be obtained by forming part or all of the circuit pattern 1 c in the insulating substrate 1 on the printed circuit board 7 in the power semiconductor device 100. Yes. Further, by multilayering the printed circuit board 7, it is possible to change the arrangement of the external terminals 8 according to needs only by changing the wiring pattern of the printed circuit board 7 and the lid 10.

一方、このように絶縁基板１とプリント基板７とを重ねて配置した構成においても、主としてＳｉからなる電力用半導体素子を絶縁基板１にはんだ付けすることで、絶縁基板１の主材料であるＡｌとＳｉとの熱膨張率差に起因する反りが絶縁基板１に発生する。また、ＩＧＢＴ３等の電力用半導体素子をはんだ付けするとき、電力用半導体素子を完全な水平状態にて接続することは困難である。また特に、面積が大きい半導体素子や、図２に示すように多数の素子及び接続点を有する半導体装置にあっては、はんだなどの接合材だけで、絶縁基板１とプリント基板７との間の距離のばらつきを吸収することは、困難である。   On the other hand, even in the configuration in which the insulating substrate 1 and the printed circuit board 7 are arranged so as to overlap with each other, by soldering a power semiconductor element mainly made of Si to the insulating substrate 1, Al that is a main material of the insulating substrate 1 is used. Warp due to the difference in thermal expansion coefficient between Si and Si occurs in the insulating substrate 1. Further, when soldering power semiconductor elements such as IGBT3, it is difficult to connect the power semiconductor elements in a completely horizontal state. In particular, in a semiconductor element having a large area or a semiconductor device having a large number of elements and connection points as shown in FIG. 2, only a bonding material such as solder is used. It is difficult to absorb distance variations.

そこで、本実施形態では、絶縁基板１とプリント基板７とを電気的に接続する可撓性端子６に屈伸部６１を形成して可撓性を持たせた。屈伸部６１を設けることで、絶縁基板１とプリント基板７との距離を近付けるだけで、可撓性端子６が撓み、可撓性端子６自体の傾きを含めた高さのばらつきを吸収することができるとともに、すべての接点の接続を確実に行うことができる。よって、電力用半導体装置１００の組立性及び生産性の向上を図ることができる。   Therefore, in the present embodiment, the bending portion 61 is formed on the flexible terminal 6 that electrically connects the insulating substrate 1 and the printed circuit board 7 to provide flexibility. By providing the bending / extending portion 61, the flexible terminal 6 bends only by bringing the insulating substrate 1 and the printed circuit board 7 closer to each other, and the height variation including the inclination of the flexible terminal 6 itself is absorbed. It is possible to connect all the contacts with certainty. Therefore, the assemblability and productivity of the power semiconductor device 100 can be improved.

また、電力用半導体装置１００では、ＩＧＢＴ３等の電力用半導体素子は発熱し、その放熱板として機能する、絶縁基板１のＡｌ板１ａは、上記発熱伴い熱膨張する。一方、絶縁基板１に積層して配置されるプリント基板７において発生する熱は、電流によるジュール熱が主である。よって、絶縁基板１とプリント基板７との間には温度差が発生し、かつ両者の熱膨張率も異なる。したがって、絶縁基板１とプリント基板７とを接続する可撓性端子６には、基板の主面平行方向、つまり絶縁基板１及びプリント基板７の板厚方向２０に直交する基板長手方向２１に熱応力が発生する。この熱応力は、可撓性端子６自体、及び可撓性端子６と、各基板１、７の回路との接続部における劣化を促進する原因になる。しかしながら、本実施形態では、可撓性端子６が屈伸部６１で変形可能なことから、上記劣化を効果的に緩和することができる。   In the power semiconductor device 100, the power semiconductor element such as the IGBT 3 generates heat, and the Al plate 1a of the insulating substrate 1 that functions as a heat radiating plate thereof thermally expands with the heat generation. On the other hand, the heat generated in the printed circuit board 7 stacked on the insulating substrate 1 is mainly Joule heat due to current. Therefore, a temperature difference is generated between the insulating substrate 1 and the printed board 7, and the thermal expansion coefficients of the two are also different. Accordingly, the flexible terminal 6 that connects the insulating substrate 1 and the printed circuit board 7 is heated in a direction parallel to the main surface of the substrate, that is, in a substrate longitudinal direction 21 orthogonal to the plate thickness direction 20 of the insulating substrate 1 and the printed circuit board 7. Stress is generated. This thermal stress causes the deterioration of the flexible terminal 6 itself and the connection portion between the flexible terminal 6 and the circuit of each of the substrates 1 and 7. However, in the present embodiment, since the flexible terminal 6 can be deformed by the bending / extending portion 61, the above deterioration can be effectively mitigated.

また、電力用半導体装置１００内のシリコーンゲル１１や基板間を接続する可撓性端子６の熱膨張によっても、絶縁基板１とプリント基板７との間の距離を離す方向、つまり板厚方向２０に応力が加わる。しかしながら、可撓性端子６が屈伸部６１で撓むことによって、回路との接続部に作用する引き剥し応力は、緩和され、電力用半導体装置１００の動作信頼性の向上にも寄与することができる。
したがって、本実施形態の電力用半導体装置１００は、高温環境下や長時間使用に適した電力用半導体装置である。 Further, due to the thermal expansion of the silicone gel 11 in the power semiconductor device 100 and the flexible terminal 6 connecting the substrates, the direction in which the distance between the insulating substrate 1 and the printed circuit board 7 is increased, that is, the plate thickness direction 20. Stress is applied. However, when the flexible terminal 6 bends at the bending / extending portion 61, the peeling stress acting on the connection portion with the circuit is alleviated, which contributes to the improvement of the operation reliability of the power semiconductor device 100. it can.
Therefore, the power semiconductor device 100 of the present embodiment is a power semiconductor device suitable for use in a high temperature environment or for a long time.

上述の効果を発揮する可撓性端子６の形状は、本実施形態における形状に限定されず、可撓性及び電気抵抗を阻害しない形状であればどのような形態も適用可能である。但し、可撓性端子６として板材を使用する場合、屈伸部６１は、本実施の形態で図４に示すＭ字のように、３個以上の折り曲げ回数を有する、つまり３個以上の折り曲げ部を有するのが望ましい。   The shape of the flexible terminal 6 that exhibits the above-described effect is not limited to the shape in the present embodiment, and any shape can be applied as long as the shape does not hinder flexibility and electrical resistance. However, when a plate material is used as the flexible terminal 6, the bending portion 61 has three or more folding times, that is, three or more folding portions, as in the M-shape shown in FIG. 4 in the present embodiment. It is desirable to have

その理由としては、折り曲げ回数が２回である例えばＺ字形状の場合には、先に一端を固定し、その後に他端を接続するときに、他端の平面方向における位置合わせが難しくなる、つまり他端において平面方向の位置ずれが生じやすいという欠点があるからである。   The reason for this is that, for example, in the case of a Z-shape that is bent twice, when one end is fixed first and then the other end is connected, it is difficult to align the other end in the planar direction. That is, there is a drawback that a positional deviation in the planar direction tends to occur at the other end.

また、図５に示すように、対向する２方向から曲げた形状、例えば２つのＭ字を結合させた形状を採ることもできる。このような可撓性端子では、例えば半導体素子上ではんだ付けするときの接合面積は増すが、はんだ付けするまでの可撓性端子の設置姿勢が安定し、かつ半導体素子内での電流が分散されることから、半導体素子の最大温度が抑制され、より高い電流で動作が可能となる。   Moreover, as shown in FIG. 5, the shape bent from two opposing directions, for example, the shape which couple | bonded two M-characters, can also be taken. In such a flexible terminal, for example, the bonding area when soldering on a semiconductor element is increased, but the installation posture of the flexible terminal until soldering is stable and the current in the semiconductor element is dispersed. Therefore, the maximum temperature of the semiconductor element is suppressed, and operation with a higher current becomes possible.

また、可撓性端子６がはんだ付けで接合される場合、図４及び図５に示すように、はんだ付けされる可撓性端子６の例えば一端部６２には、電極や回路パターンと接触する接触面６２ａに対して直交方向へ一端部６２から突出する突起６４を形成しておくのが好ましい。突起６４を設けることで、例えば一端部６２がはんだ付けされるとき、突起６４にフィレットが形成され、はんだのぬれ力が釣り合い、可撓性端子６が傾きにくくなるというメリットが得られる。   When the flexible terminal 6 is joined by soldering, as shown in FIGS. 4 and 5, for example, one end 62 of the flexible terminal 6 to be soldered is in contact with an electrode or a circuit pattern. It is preferable to form a protrusion 64 that protrudes from the one end 62 in a direction orthogonal to the contact surface 62a. By providing the protrusion 64, for example, when the one end 62 is soldered, a fillet is formed on the protrusion 64, and the wetting force of the solder is balanced so that the flexible terminal 6 is less likely to tilt.

さらには、可撓性端子６の一端部６２及び他端部６３に相当する接合部、特に、はんだ付けされる方のはんだ接合部には、図６に示すように、接合部を貫通する貫通穴６５を設けることができる。貫通穴６５を設けることで、はんだが貫通穴６５内に進入して、はんだの表面積が減少する。よって、接合部つまり一端部６２及び他端部６３と、電極や回路パターンとの隙間におけるはんだ厚が薄くなり、可撓性端子６の傾きを抑制する効果が発揮される。   Furthermore, in the joint corresponding to the one end 62 and the other end 63 of the flexible terminal 6, in particular, the solder joint to be soldered is penetrated through the joint as shown in FIG. 6. A hole 65 can be provided. By providing the through hole 65, the solder enters the through hole 65, and the surface area of the solder is reduced. Therefore, the solder thickness in the gap between the joint portion, that is, the one end portion 62 and the other end portion 63, and the electrode and the circuit pattern is reduced, and the effect of suppressing the inclination of the flexible terminal 6 is exhibited.

また、可撓性端子６の配置方向は、熱変形の影響を考慮すると変形が容易となるように、図１に示すように、絶縁基板１及びプリント基板７の基板長手方向２１へ、屈伸部６１の凸部６１ａ（図４）を突出させるのが好ましい。
一方、あらゆる方向への変形に対応するためには、図４に示すように屈伸部６１の第１部６１ｂ及び第２部６１ｃを同一面で折り返すのではなく、第１部６１ｂと第２部６１ｃとを互いに異なる方向へねじる形態、例えば９０度直交する方向へ第１部６１ｂ及び第２部６１ｃを折り返す形態が好ましい。このような形態を採ることで、可撓性を維持しつつ、絶縁基板１とプリント基板７との熱変形差を吸収することが可能となる。 In addition, as shown in FIG. 1, the flexible terminal 6 is bent and extended in the board longitudinal direction 21 of the insulating board 1 and the printed board 7 so as to be easily deformed in consideration of the influence of thermal deformation. It is preferable to project the convex portion 61a (FIG. 4) of 61.
On the other hand, in order to cope with the deformation in any direction, the first part 61b and the second part are not folded back on the same plane as shown in FIG. A configuration in which 61c is twisted in different directions, for example, a configuration in which the first portion 61b and the second portion 61c are folded back in a direction orthogonal to 90 degrees is preferable. By adopting such a form, it becomes possible to absorb the thermal deformation difference between the insulating substrate 1 and the printed circuit board 7 while maintaining flexibility.

また、可撓性端子６の材質としては、本実施の形態で示した黄銅の他、りん青銅も使用可能である。また、可撓性端子６を接合する構造であるため、充分な反発力が必要でない場合や、大電流を通電する場合には、無酸素銅を使用することも可能である。   In addition to the brass shown in the present embodiment, phosphor bronze can be used as the material of the flexible terminal 6. Moreover, since the flexible terminal 6 is joined, oxygen-free copper can be used when a sufficient repulsive force is not required or when a large current is applied.

本実施の形態で示した効果については、ここで示した材料の他、電力用半導体装置で一般的に用いられる材料を使用しても同様の効果が得られる。例えば、絶縁基板としてメタルベース基板の代わりに、ＡｌＮやＡｌ２Ｏ３などの放熱性に優れるセラミックスに、Ｃｕパターンを貼り付けたセラミック基板や、セラミック基板をＣｕやＡｌなどの高放熱金属ブロックにはんだ付けなどで固着し、放熱性を向上させたものを使用しても良い。 As for the effects shown in the present embodiment, the same effects can be obtained by using materials generally used in power semiconductor devices in addition to the materials shown here. For example, instead of a metal base substrate as an insulating substrate, a ceramic substrate with a Cu pattern affixed to ceramics with excellent heat dissipation such as AlN or Al 2 O 3, or a ceramic substrate with a high heat dissipation metal block such as Cu or Al You may use what fixed by soldering etc. and improved heat dissipation.

実施の形態２．
図７は、本発明の実施の形態２にかかる電力用半導体装置２００の断面図である。電力用半導体装置２００の基本的な構成は、実施の形態１の電力用半導体装置１００と同様であり、個々の構成の詳細な説明は省略する。
本実施の形態における電力用半導体装置２００と電力用半導体装置１００との相違点は、絶縁基板１がプリント基板７よりも大きい面積で構成される点である。具体的には、絶縁基板１は、本例では１００ｍｍ×６０ｍｍに拡大されている。
以下に、このような構造を採る理由について説明する。 Embodiment 2. FIG.
FIG. 7 is a cross-sectional view of the power semiconductor device 200 according to the second embodiment of the present invention. The basic configuration of power semiconductor device 200 is the same as that of power semiconductor device 100 of the first embodiment, and detailed description of each configuration is omitted.
The difference between power semiconductor device 200 and power semiconductor device 100 in the present embodiment is that insulating substrate 1 is configured with a larger area than printed circuit board 7. Specifically, the insulating substrate 1 is enlarged to 100 mm × 60 mm in this example.
The reason for adopting such a structure will be described below.

特に、電力用半導体装置の扱う電流が大きくなると、接続部の電気抵抗を抑制するため、可撓性端子６と、絶縁基板１及びＩＧＢＴ３やＦＷＤｉ４との接続と同様に、可撓性端子６とプリント基板７の配線回路７ａとの接続もはんだで接合されるほうが良い。このような構成において、実施の形態１の構造では、樹脂筐体９の耐熱性が不足し、可撓性端子６の両端のはんだ付けは困難である。   In particular, when the current handled by the power semiconductor device increases, the flexible terminal 6 and the flexible terminal 6 are connected to the insulating substrate 1 and the IGBT 3 or FWDi 4 in order to suppress the electrical resistance of the connection portion. The connection of the printed circuit board 7 to the wiring circuit 7a is preferably joined by solder. In such a configuration, in the structure of the first embodiment, the heat resistance of the resin casing 9 is insufficient, and it is difficult to solder both ends of the flexible terminal 6.

そこで、予め、可撓性端子６の両端部６２，６３を、それぞれ電極や配線回路７ａとはんだ付けして、絶縁基板１とプリント基板７とを積層した構造を作製する。ここで、プリント基板７は、絶縁基板１よりも小さいことから、積層構造を作製後、プリント基板７側から樹脂筐体９を被せることができ、実施の形態１の電力用半導体装置１００と同様の構造を容易に形成することができる。またこのとき、絶縁基板１とプリント基板７とは可撓性端子６で接続されていることから、絶縁基板１及びプリント基板７の各表面と、樹脂筐体９の平坦面とを接触させるだけで、絶縁基板１とプリント基板７との平行を保つことができ、さらに、外部端子８の先端の高さを揃えることも容易になる。このように、基板面積の変更と可撓性端子６とを組み合わせることによって、電力用半導体装置の組立性を向上させることができる。   Therefore, both ends 62 and 63 of the flexible terminal 6 are previously soldered to the electrodes and the wiring circuit 7a, respectively, so that a structure in which the insulating substrate 1 and the printed circuit board 7 are laminated is manufactured. Here, since the printed circuit board 7 is smaller than the insulating substrate 1, the resin housing 9 can be covered from the printed circuit board 7 side after producing the laminated structure, which is the same as the power semiconductor device 100 of the first embodiment. This structure can be easily formed. At this time, since the insulating substrate 1 and the printed circuit board 7 are connected by the flexible terminals 6, only the surfaces of the insulating substrate 1 and the printed circuit board 7 are brought into contact with the flat surface of the resin housing 9. Thus, it is possible to keep the insulating substrate 1 and the printed circuit board 7 parallel to each other, and it is easy to make the heights of the tips of the external terminals 8 uniform. Thus, by combining the change of the substrate area and the flexible terminal 6, the assemblability of the power semiconductor device can be improved.

また、絶縁基板１の面積を大きくする構成では、前述の実施の形態１で示した、樹脂筐体９に設けるヒートシンク用の取り付け穴を絶縁基板１に設けることもできる。これにより、絶縁基板１とヒートシンクとを直接に接続することができ、大きな締結力を得ることができる。よって、電力用半導体装置２００の放熱性を向上させることができる。かかる効果は、電力用半導体装置２００が扱う電流の拡大にも有効である。   Further, in the configuration in which the area of the insulating substrate 1 is increased, the heat sink mounting hole provided in the resin casing 9 described in the first embodiment can be provided in the insulating substrate 1. Thereby, the insulating substrate 1 and the heat sink can be directly connected, and a large fastening force can be obtained. Therefore, the heat dissipation of the power semiconductor device 200 can be improved. Such an effect is also effective in expanding the current handled by the power semiconductor device 200.

このような効果を発揮するために、絶縁基板１は、前述の実施の形態１で述べたようなセラミック基板を用いる構造でも構わない。その際、セラミック基板は、回路パターン１ｃを構成する最小限の面積としてプリント基板７の面積よりも小さくて良く、ヒートシンクに相当する高放熱金属ブロックをプリント基板７より大きくすれば良い。   In order to exhibit such an effect, the insulating substrate 1 may have a structure using the ceramic substrate as described in the first embodiment. At this time, the ceramic substrate may be smaller than the area of the printed circuit board 7 as a minimum area constituting the circuit pattern 1c, and a high heat dissipation metal block corresponding to a heat sink may be made larger than the printed circuit board 7.

実施の形態３．
図８は、本発明の実施の形態３にかかる電力用半導体装置３００の断面図である。電力用半導体装置３００の基本的な構成は、実施の形態１の電力用半導体装置１００と同様であり、個々の構成の詳細な説明は省略する。
本実施の形態における電力用半導体装置３００と電力用半導体装置１００との相違点は、絶縁封止のために樹脂筐体９内に注入する材料について、シリコーンゲル１１ではなく、曲げ弾性率１４ＭＰａのエポキシ樹脂１１ａを用いる点である。
以下に、このような構造を採る理由について説明する。 Embodiment 3 FIG.
FIG. 8 is a cross-sectional view of the power semiconductor device 300 according to the third embodiment of the present invention. The basic configuration of power semiconductor device 300 is the same as that of power semiconductor device 100 of the first embodiment, and detailed description of each configuration is omitted.
The difference between power semiconductor device 300 and power semiconductor device 100 in the present embodiment is that the material injected into resin housing 9 for insulation sealing is not silicone gel 11 but has a flexural modulus of 14 MPa. The point is that the epoxy resin 11a is used.
The reason for adopting such a structure will be described below.

封止樹脂としてのエポキシ樹脂１１ａは、熱伝導性フィラーを混合することで放熱性が向上すると共に、電力用半導体装置３００内の部品に対して強固に接着する。これにより、ＩＧＢＴ３やＦＷＤｉ４からの発熱の一部を樹脂筐体９内に放熱することができ、特に、瞬間的な過電流が流れたときのＩＧＢＴ３等の半導体素子の熱破壊を抑制する効果を発揮することができる。
さらには、プリント基板７と同等の弾性率を有するエポキシ樹脂１１ａを用いることにより、電力用半導体装置３００全体の温度上昇や、ＩＧＢＴ３等の半導体素子の発熱による温度上昇で発生する反りや熱応力を抑制することができる。よって、電力用半導体装置３００の温度サイクルなどの長期使用に関する信頼性が向上する。 The epoxy resin 11a as the sealing resin improves heat dissipation by mixing a thermally conductive filler, and adheres firmly to the components in the power semiconductor device 300. As a result, a part of the heat generated from the IGBT 3 and FWDi 4 can be radiated into the resin housing 9, and in particular, the effect of suppressing the thermal destruction of the semiconductor element such as the IGBT 3 when an instantaneous overcurrent flows. It can be demonstrated.
Further, by using an epoxy resin 11a having an elastic modulus equivalent to that of the printed circuit board 7, warpage and thermal stress generated due to a temperature rise of the power semiconductor device 300 as a whole and a temperature rise due to heat generation of a semiconductor element such as the IGBT 3 can be prevented. Can be suppressed. Therefore, reliability regarding long-term use such as a temperature cycle of the power semiconductor device 300 is improved.

また、本実施の形態３では、実施の形態１で説明した、絶縁基板１とプリント基板７とが板厚方向２０に離れることで接合部に作用する応力を可撓性端子６が緩和するという効果は、エポキシ樹脂１１ａの充填により失われる。しかしながら、可撓性端子６との接合部を含む構成部品は、エポキシ樹脂１１ａで拘束されることから、電力用半導体装置３００の信頼性への影響は無い。また、板材を折り曲げて形成される可撓性端子６は、その表面積が大きいことから、エポキシ樹脂１１ａが剥離しにくく、かつ剥離の影響を受けにくいことから、可撓性端子６との組み合せも信頼性向上には好適である。   Moreover, in this Embodiment 3, the flexible terminal 6 relieves | moderates the stress which acts on a junction part as the insulated substrate 1 and the printed circuit board 7 which were demonstrated in Embodiment 1 leave | separated in the plate | board thickness direction 20. The effect is lost by filling the epoxy resin 11a. However, since the component including the joint portion with the flexible terminal 6 is restrained by the epoxy resin 11a, the reliability of the power semiconductor device 300 is not affected. Further, the flexible terminal 6 formed by bending a plate material has a large surface area, so that the epoxy resin 11a is not easily peeled off and is not easily affected by the peeling. It is suitable for improving reliability.

実施の形態４．
図９は、本発明の実施の形態４にかかる電力用半導体装置４００の断面図である。電力用半導体装置４００の基本的な構成は、実施の形態１の電力用半導体装置１００と同様であり、個々の構成の詳細な説明は省略する。
本実施の形態における電力用半導体装置４００と電力用半導体装置１００との相違点は、蓋１０に、プリント基板７と当接する当接部１０ａを複数設けた点である。この構成によって、樹脂筐体９に蓋１０が取り付けられた状態において、各当接部１０ａはプリント基板７に接触し、プリント基板７を概ね平坦に維持することができる。
以下に、このような構造を採る理由について説明する。 Embodiment 4 FIG.
FIG. 9 is a cross-sectional view of the power semiconductor device 400 according to the fourth embodiment of the present invention. The basic configuration of power semiconductor device 400 is the same as that of power semiconductor device 100 of the first embodiment, and detailed description of each configuration is omitted.
The difference between the power semiconductor device 400 and the power semiconductor device 100 in the present embodiment is that a plurality of contact portions 10 a that contact the printed circuit board 7 are provided on the lid 10. With this configuration, in a state where the lid 10 is attached to the resin casing 9, each contact portion 10a can contact the printed circuit board 7, and the printed circuit board 7 can be maintained substantially flat.
The reason for adopting such a structure will be described below.

１本の可撓性端子６で扱う電流が大きくなると、可撓性端子６の断面積は増加し、それにより、可撓性端子６のばね定数は増加する。このような大きいばね定数を有する可撓性端子６が設けられた構成において、プリント基板７を、その外縁部分のみで樹脂筐体９に保持したときには、可撓性端子６の反発力によってプリント基板７に反りが発生して大きな歪みが生じる。よって、プリント基板７の配線回路７ａの剥離など、プリント基板７にダメージが発生することが懸念される。
このようなプリント基板７の反りに対して、蓋１０の全面でプリント基板７を支持することも可能であるが、プリント基板７の上面への封止材料の流入が阻害されることが懸念される。 When the current handled by one flexible terminal 6 increases, the cross-sectional area of the flexible terminal 6 increases, and thereby the spring constant of the flexible terminal 6 increases. In the configuration in which the flexible terminal 6 having such a large spring constant is provided, when the printed circuit board 7 is held on the resin casing 9 only by the outer edge portion thereof, the printed circuit board is caused by the repulsive force of the flexible terminal 6. 7 is warped and large distortion occurs. Therefore, there is a concern that the printed circuit board 7 may be damaged, such as peeling of the wiring circuit 7a of the printed circuit board 7.
Although it is possible to support the printed circuit board 7 on the entire surface of the lid 10 against the warp of the printed circuit board 7, there is a concern that the inflow of the sealing material to the upper surface of the printed circuit board 7 is hindered. The

そこで、蓋１０に部分的に設けた当接部１０ａをプリント基板７に接触させることによって、可撓性端子６を押し縮める方向へプリント基板７を押下し、プリント基板７の反りを抑制する。これにより、断面積の大きい可撓性端子６を使用することが可能となる。   Therefore, the printed circuit board 7 is pressed in the direction in which the flexible terminal 6 is compressed by bringing the contact portion 10a partially provided on the lid 10 into contact with the printed circuit board 7, and the warpage of the printed circuit board 7 is suppressed. Thereby, it becomes possible to use the flexible terminal 6 with a large cross-sectional area.

当接部１０ａの配置は、図９に示すように、基板長手方向２１において、可撓性端子６に対向する位置が好ましい。しかしながらこれに限定されず、プリント基板７の曲げ応力が低減できるように、可撓性端子６の周辺位置や、あるいは可撓性端子６の設置位置にかかわらず等ピッチでの均一配置など、自由に選択可能である。   As shown in FIG. 9, the contact portion 10 a is preferably disposed at a position facing the flexible terminal 6 in the substrate longitudinal direction 21. However, the present invention is not limited to this, so that the bending stress of the printed circuit board 7 can be reduced, such as a uniform arrangement at an equal pitch regardless of the peripheral position of the flexible terminal 6 or the installation position of the flexible terminal 6. Can be selected.

また、当接部１０ａは、プリント基板７に形成した回路パターン間の電気的絶縁を確保するため、それ自体を絶縁性材料で構成してもよいが、プリント基板７からの放熱性を付与するためにＡｌやＣｕなどの金属材料で形成して、その表面にポリイミドやエポキシなどの絶縁材料を塗布して絶縁性を確保する構成がより好ましい。
また、蓋１０は、比較的成形しやすい形状であるので、放熱性フィラーを多く充填した高熱伝導の樹脂材料を使用することが可能である。したがって、当接部１０ａを含めて蓋１０を高熱伝導の樹脂材料で成形することで、通電にてプリント基板７の回路から発生するジュール発熱を、蓋１０で構成される電力用半導体装置４００の表面から放熱することができる。その結果、プリント基板７の回路に通電可能な電流を増大することができるという効果も得られる。 Further, the abutting portion 10a may be made of an insulating material in order to ensure electrical insulation between circuit patterns formed on the printed circuit board 7, but imparts heat dissipation from the printed circuit board 7. Therefore, it is more preferable to use a metal material such as Al or Cu and to apply an insulating material such as polyimide or epoxy to the surface to ensure insulation.
Moreover, since the lid | cover 10 is a shape which is comparatively easy to shape | mold, it is possible to use the resin material of the high heat conductivity which filled many heat dissipation fillers. Therefore, by forming the lid 10 including the abutting portion 10a with a resin material having high thermal conductivity, Joule heat generated from the circuit of the printed circuit board 7 when energized is generated in the power semiconductor device 400 configured by the lid 10. Heat can be radiated from the surface. As a result, it is possible to increase the current that can be supplied to the circuit of the printed circuit board 7.

以上説明した各実施の形態を適宜組み合わせた構成を採ることもできる。このような構成では、各実施の形態にて奏する効果が組み合わされる。   A configuration in which the embodiments described above are appropriately combined may be employed. In such a configuration, the effects obtained in each embodiment are combined.

１ 絶縁基板、１ａ Ａｌ板、１ｂ 絶縁層、１ｃ 回路パターン、
３ ＩＧＢＴ、４ ＦＷＤｉ、
６ 可撓性端子、６１ 屈伸部、６２ 一端部、６３ 他端部、６５ 貫通穴、
７ プリント基板、７ａ 配線回路、８ 外部端子、９ 樹脂筐体、
１０ 蓋、１０ａ 当接部、１１ シリコーンゲル、１１ａ エポキシ樹脂、
２０ 板厚方向、
１００，２００，３００，４００ 電力用半導体装置。 1 Insulating substrate, 1a Al plate, 1b Insulating layer, 1c Circuit pattern,
3 IGBT, 4 FWDi,
6 flexible terminal, 61 bending portion, 62 one end, 63 other end, 65 through hole,
7 Printed circuit board, 7a Wiring circuit, 8 External terminal, 9 Resin housing,
10 lid, 10a contact part, 11 silicone gel, 11a epoxy resin,
20 Plate thickness direction,
100, 200, 300, 400 Semiconductor device for electric power.

Claims (5)

放熱板に絶縁層を介して形成した回路パターンに電力用半導体素子を実装した第１基板と、両面に配線回路を形成した第２基板と、上記放熱板を一側面に露出させて第１基板を保持しかつ上記電力用半導体素子に対向して配置した上記第２基板を保持する樹脂筐体と、第２基板における上記配線回路に接続され樹脂筐体外部へ導出される外部端子と，を備えた電力用半導体装置において、
樹脂筐体内に充填される絶縁性樹脂と、
樹脂筐体内にて第１基板と第２基板との間に設けられる基板間接続端子と、をさらに備え、
基板間接続端子は、第１基板における上記回路パターン及び上記電力用半導体素子の少なくとも一方と、これらに対向する第２基板における上記配線回路とを電気的に接続し、かつ可撓性を有する屈伸部を有する、
ことを特徴とする電力用半導体装置。 A first substrate in which a power semiconductor element is mounted on a circuit pattern formed through an insulating layer on a heat sink, a second substrate in which a wiring circuit is formed on both surfaces, and the heat sink is exposed on one side surface to form a first substrate. A resin casing that holds the second substrate disposed opposite to the power semiconductor element, and an external terminal that is connected to the wiring circuit on the second substrate and is led out of the resin casing. In the power semiconductor device provided,
An insulating resin filled in the resin case;
An inter-substrate connection terminal provided between the first substrate and the second substrate in the resin casing;
The inter-substrate connection terminal electrically connects at least one of the circuit pattern and the power semiconductor element on the first substrate and the wiring circuit on the second substrate opposite to the circuit pattern, and has flexibility. Having a part,
A power semiconductor device. 上記基板間接続端子は、板材で形成され、第１基板における回路パターン及び電力用半導体素子とはんだで接続される接合部であって、基板間接続端子の板厚方向に基板間接続端子を貫通する穴が形成されたはんだ接合部を有する、請求項１記載の電力用半導体装置。   The inter-substrate connection terminal is a joint formed by a plate material and connected to the circuit pattern and the power semiconductor element on the first substrate by solder, and penetrates the inter-substrate connection terminal in the thickness direction of the inter-substrate connection terminal. The power semiconductor device according to claim 1, further comprising a solder joint portion in which a hole to be formed is formed. 第２基板は、第１基板よりも小さい面積を有し、第２基板の全面で上記放熱板と対向する、請求項１又は２記載の電力用半導体装置。   The power semiconductor device according to claim 1, wherein the second substrate has an area smaller than that of the first substrate, and faces the heat radiating plate over the entire surface of the second substrate. 上記絶縁性樹脂は、硬質エポキシ樹脂である、請求項１から３のいずれか１項に記載の電力用半導体装置。   The power semiconductor device according to any one of claims 1 to 3, wherein the insulating resin is a hard epoxy resin. 上記絶縁性樹脂を覆って上記樹脂筐体の側面を形成する蓋をさらに備え、この蓋は、第２基板と接触する当接部を有する、請求項１から４のいずれか１項に記載の電力用半導体装置。   5. The lid according to claim 1, further comprising a lid that covers the insulating resin and forms a side surface of the resin casing, and the lid has a contact portion that contacts the second substrate. Power semiconductor device.
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