JP2013078469A - Game machine - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a game machine having no possibility of wrong notification of a jackpot status.SOLUTION: An image control unit for performing image performance has initial processing performed after the rest of a CPU, and infinite loop processing repeated at predetermined time intervals. The initial processing has first processing (ST10) for determining the storage contents of a plurality of regions of a volatile memory, and primarily determining whether or not to clear the volatile memory based on whether the contents have predetermined values or not, second processing (ST11) for functioning when a primary determination of clearing the volatile memory is not made to determine the value of an error counter, and third processing (ST18-ST21) for maintaining the storage contents of the volatile memory for managing the progress of the image performance without clearing the contents, when the error counter has a value of less than a predetermined value. The infinite loop processing has error correspondence processing (ST6, ST6) for resetting the CPU based on the determination of the CPU.

Description

  The present invention relates to a gaming machine that generates a big hit state by a lottery process caused by a gaming operation, and more particularly, to a gaming machine that does not erroneously notify a big hit state even when a hot start process is executed at the time of abnormal reset of a CPU. .

  A ball game machine such as a pachinko machine has a symbol start opening provided on the game board, a symbol display section for displaying a series of symbol variation patterns by a plurality of display symbols, and a big winning opening for opening and closing the opening and closing plate. Configured. When the detection switch provided at the symbol start port detects the passage of the game ball, the winning state is entered, and after the game ball is paid out as a prize ball, the display symbol is changed for a predetermined time in the symbol display section. Thereafter, when the symbol is stopped in a predetermined manner such as 7, 7, 7, etc., a big hit state is established, and the big winning opening is repeatedly opened to generate a gaming state advantageous to the player.

  Whether or not to generate such a gaming state is determined by a jackpot lottery executed on the condition that a game ball wins at the symbol start opening, and the above symbol variation operation is based on this lottery result. It has become a thing. For example, when the lottery result is in a winning state, an effect operation called reach action or the like is executed for about 20 seconds, and then the special symbols are aligned. On the other hand, a similar reach action may be executed even in the case of a lost state. In this case, the player pays close attention to the big hit state and pays close attention to the transition of the performance operation. When the predetermined symbols are aligned on the stop line at the end of the symbol variation operation, the player is guaranteed to be in the big hit state.

JP 2008-110251 A

  By the way, in recent gaming machines, the power consumption is increasing, so for example, when the AC power supply is unstable or the noise level around the control circuit is high due to insufficient capacity of the power supply facility, The CPU may be reset abnormally.

  In such a case, similar to when the power is turned on, a cold start process for clearing the entire area of the RAM may be executed and the effect operation may be started from the initial state. The operation will return to the initial state, and the feelings of the player who has been excited will be whitened, and the attachment to the gaming machine may be lost.

  Therefore, it is conceivable to execute a hot start process that maintains the stored contents of the RAM and continues the rendering operation as much as possible, instead of executing the cold start process uniformly even when the CPU is abnormally reset. . However, when executing the hot start process, there is a possibility that stop symbols inconsistent with the big hit lottery result may be prepared after the abnormal reset of the CPU unless an appropriate control method is adopted. For example, when the stop symbol is determined and stored in the RAM work area before the change starts and the stop symbol data in the work area is read and displayed when the change stops, the CPU starts hot during the storage process. If it is done, there is a possibility that the stop symbols in the hit state will be aligned even though they are in the disengaged state.

  By the way, such an unreasonable stop pattern alignment may occur not only when the hot start process is executed after an abnormal reset, but also when the stored contents of the RAM are garbled for some reason. is there. In other words, even though “5, 5, 4” is stored as a stop symbol in the work area of the RAM, it may be garbled into “5, 5, 5”. It is desirable to have a device configuration that can handle this. Also, if bit corruption is detected at one location, the same situation may have occurred at other locations, so it is safer to reset the production operation to its initial state without difficulty at an appropriate timing. is there.

  In addition, although the countermeasure for not misreporting a big hit state is proposed (for example, patent document 1), the conventional method cannot respond to said request | requirement.

  The present invention has been made in view of the above-described problems, and even if the CPU is abnormally reset, the production operation until then is continued as long as possible, while a serious abnormality is detected. An object of the present invention is to provide a gaming machine that can return the production operation to the initial state at an appropriate timing thereafter.

In order to achieve the above object, the present invention executes a lottery process caused by a predetermined switch signal, informs the lottery result by a symbol display after a series of image effects corresponding to the lottery result, and draws the lottery result. Is a winning state, the gaming machine is shifted to a gaming state advantageous to the player, and the image control unit that executes the image effect includes an initial process executed after the CPU reset, and a predetermined time interval after the initial process. And the infinite loop process repeated in the above process, and the initial process functions when the CPU is reset to determine the storage contents of one or a plurality of areas of the volatile memory. An abnormality counter that functions when the primary processing for determining whether or not to clear the volatile memory depending on whether or not it is a predetermined value and when the primary determination for clearing the volatile memory is not made. A second process for determining a value, and a third process for maintaining the storage contents of the volatile memory that manages the progress of the image production when the value of the abnormality counter is less than the predetermined value, without clearing the stored contents Configured,
The infinite loop process is provided with an abnormality handling process configured to be able to reset the CPU based on the determination of the CPU.

  Preferably, the present invention should further include a fourth process for clearing all stored contents of the volatile memory for managing the progress of the image effect when the value of the abnormality counter is a predetermined value. The value of the abnormality counter is preferably initialized at predetermined time intervals in the infinite loop process.

  In addition, the abnormality handling process, when notifying the lottery result, when the abnormality is detected in the memory content of the memory by the determination process for determining the abnormality of the memory content of the memory related to the notification operation of the lottery result, and the determination process, It is preferable to include a miss notification process for notifying a lottery result in a miss state and a reset process for resetting the CPU under a predetermined condition after the miss notification process is executed. Here, the reset process is preferably configured to function by setting the value of the abnormality counter to a predetermined value.

  On the other hand, before the lottery result is notified, the abnormality handling process is terminated when a serious abnormality is detected in the memory content of the memory by the determination process for determining the abnormality of the memory content related to the rendering operation and the determination process. It is also preferable to include a miss notification process for notifying the lottery result of the state and a reset process for resetting the CPU under a predetermined condition after the miss notification process is executed.

  As described above, according to the present invention, it is possible to realize a gaming machine that does not erroneously notify a big hit state even if a hot start process is executed after an abnormal reset of the CPU.

It is a perspective view of the pachinko machine shown in an example. It is the front view which illustrated the game board of the pachinko machine of FIG. It is a block diagram which shows the whole structure of the pachinko machine of FIG. It is a block diagram showing a circuit configuration of an effect control unit. It is a flowchart explaining the process of an effect control part. It is a flowchart explaining the process of an image control part. It is a flowchart explaining a part of FIG. 6 in detail.

  Hereinafter, the present invention will be described in detail based on examples. FIG. 1 is a perspective view showing a pachinko machine GM of the present embodiment. This pachinko machine GM includes a rectangular frame-shaped wooden outer frame 1 that is detachably mounted on an island structure, and a front frame 3 that is pivotably mounted via a hinge 2 fixed to the outer frame 1. It is configured. A game board 5 is detachably attached to the front frame 3 from the front side, not from the back side, and a glass door 6 and a front plate 7 are pivotally attached to the front side so as to be openable and closable.

  On the outer periphery of the glass door 6, an electric lamp such as an LED lamp is arranged in a substantially C shape. On the other hand, a speaker is disposed below the glass door 6.

  The front plate 7 is provided with an upper plate 8 for storing game balls for launching, and a lower plate 9 for storing game balls overflowing or extracted from the upper plate 8 and a launch handle at the lower part of the front frame 3. 10 are provided. The launch handle 10 is interlocked with the launch motor, and a game ball is launched by a striking rod that operates according to the rotation angle of the launch handle 10.

  A chance button 11 is provided on the outer peripheral surface of the upper plate 8. The chance button 11 is provided at a position where it can be operated with the left hand of the player, and the player can operate the chance button 11 without releasing the right hand from the firing handle 10. The chance button 11 does not function normally, but when the game state becomes the button chance state, the built-in lamp is turned on and can be operated. The button chance state is a game state provided as necessary.

  On the right side of the upper plate 8, an operation panel 12 for ball lending operation with respect to the card-type ball lending machine is provided, a frequency display unit for displaying the remaining amount of the card with a three-digit number, and a ball of game balls for a predetermined amount A ball lending switch for instructing lending and a return switch for instructing to return the card at the end of the game are provided.

  As shown in FIG. 2, a guide rail 13 made of a metal outer rail and an inner rail is provided in an annular shape on the surface of the game board 5, and a central opening HO extending toward the back side is provided in the approximate center. It has been. A display device DISP composed of a liquid crystal color display is arranged at the bottom of the central opening HO.

  A symbol starting port 15, a big winning port 16, a normal winning port 17, and a gate 18 are arranged at appropriate positions in the game area 5a. Each of these winning openings 15 to 18 has a detection switch inside, and can detect the passage of a game ball.

  The display device DISP is a device that variably displays a specific symbol related to the big hit state and displays a background image and various characters in an animated manner. This display device DISP has a special symbol display part Da to Dc in the center and a normal symbol display part 19 in the upper right part. And, in the special symbol display parts Da to Dc, a reach effect is executed that expects a big hit state to be invited, or in the special symbol display parts Da to Dc and the surroundings, a notice effect that informs the result of the success / failure is executed. Is done.

  The normal symbol display unit 19 displays a normal symbol. When a game ball that has passed through the gate 18 is detected, the normal symbol fluctuates for a predetermined time, and the lottery extracted at the time when the game ball passes through the gate 18 is extracted. The stop symbol determined by the random number for use is displayed and stopped.

  The symbol start opening 15 is configured to be opened and closed by an electric tulip having a pair of left and right opening and closing claws, and when the stop symbol after the fluctuation of the normal symbol display unit 19 hits and the symbol is displayed, the opening and closing claws are displayed. It is opened only for a predetermined time or until a predetermined number of game balls are detected.

  When a game ball wins at the symbol start opening 15, the previous stop symbol that has been stopped in the special symbol display portions Da to Dc starts to change, and after a predetermined time, the game ball wins at the symbol start timing 15 It stops at the stop symbol determined based on the corresponding lottery result. Note that a notice effect may be executed during a series of image effects in and around the special symbol display parts Da to Dc.

  The special winning opening 16 is controlled to be opened and closed by, for example, an opening / closing plate 16a that can be opened forward, but when the special symbol display portion Da to Dc has a big winning symbol such as "7. Then, a special game called “big hit game” is started, and the opening / closing plate 16a is opened.

  After the opening / closing plate 16a of the big prize opening 16 is opened, the opening / closing plate 16a is closed when a predetermined time elapses or when a predetermined number (for example, 10) of game balls wins. In such an operation, the special game is continued up to 15 times, for example, and is controlled in a state advantageous to the player. In addition, when the stop symbol after the change of the special symbol display parts Da to Dc is a specific symbol among the special symbols, there is a privilege that the game after the end of the special game becomes a high probability state (probability variation state). Is granted.

  FIG. 3 is a block diagram showing an overall circuit configuration of the pachinko machine GM that realizes the above-described operations. A dashed line in the figure mainly indicates a DC voltage line.

  As shown in the figure, this pachinko machine GM mainly receives a 24V AC and outputs various DC voltages, power supply abnormality signals ABN1, ABN2, a system reset signal (power reset signal) SYS, and the like, and a game control operation. Based on the main control board 21 that performs overall control, the effect control board 22 that executes the lamp effect and the sound effect based on the control command CMD received from the main control board 21, and the control command CMD ′ received from the effect control board 22 The image control board 23 for driving the display device DISP, the payout control board 24 for controlling the payout motor M based on the control command CMD "received from the main control board 21, and paying out the game balls. It is mainly composed of a launch control board 25 that responds and launches a game ball.

  However, in this embodiment, the control command CMD output from the main control board 21 is transmitted to the effect control board 22 via the command relay board 26 and the effect interface board 27. Further, the control command CMD ′ output from the effect control board 22 is transmitted to the image control board 23 via the effect interface board 27, and the control command CMD ″ output from the main control board 21 is the main board relay board. It is transmitted to the payout control board 24 via 28.

  The main control board 21, the effect control board 22, the image control board 23, and the payout control board 24 are each equipped with a computer circuit including a one-chip microcomputer. Thus, the circuits mounted on the control boards 21 to 24 and the operations realized by the circuits are collectively referred to as a function. In this specification, the main control unit 21, the effect control unit 22, and the image control unit 23 are used. , And the payout control unit 24. All or part of the effect control unit 22, the image control unit 23, and the payout control unit 24 is a sub-control unit.

  By the way, the pachinko machine GM is roughly divided into a frame side member GM1 surrounded by a broken line in FIG. 3 and a board side member GM2 fixed to the back of the game board 5. The frame side member GM1 includes a front frame 3 on which a glass door 6 and a front plate 7 are pivotally attached, and a wooden outer frame 1 on the outside thereof. Is fixedly installed. On the other hand, the board side member GM2 is replaced in response to the model change, and a new board side member GM2 is attached to the frame side member GM1 instead of the original board side member. All except the frame side member 1 is the panel side member GM2.

  As shown in the broken line frame in FIG. 3, the frame-side member GM1 includes a power supply board 20, a payout control board 24, a launch control board 25, and a frame relay board 32, and these circuit boards are Each is fixed in place on the front frame 3. On the other hand, on the back of the game board 5, a main control board 21, an effect control board 22, and an image control board 23 are fixed together with the display device DISP and other circuit boards. And the frame side member GM1 and the board | substrate side member GM2 are electrically connected by the connection connectors C1-C4 concentratedly arranged in one place.

  The power supply board 20 is connected to the main board relay board 28 through the connection connector C2, and is connected to the power supply relay board 30 through the connection connector C3. The power supply board 20 is provided with a power supply monitoring unit MNT that monitors whether AC power is turned on or off. When power supply monitoring unit MNT detects that AC power is turned on, it maintains system reset signal SYS at L level for a predetermined time, and then transitions it to H level.

  Further, when power supply monitoring unit MNT detects the interruption of the AC power supply, power supply abnormality signals ABN1 and ABN2 are immediately shifted to the L level. The power supply abnormality signals ABN1 and ABN2 quickly become H level after the power is turned on.

  Incidentally, the system reset signal of this embodiment is generated by a DC power supply based on an AC power supply. For this reason, after detecting the turning-on of the AC power supply (usually turning on the power switch) and increasing it to the H level, the H level is maintained unless the DC power supply voltage drops to an abnormal level. Therefore, even if the AC power supply is in an instantaneous power interruption state while the DC power supply voltage is maintained, the system reset signal SYS does not reset the CPU. The power supply abnormality signals ABN1 and ABN2 are also output even when the AC power supply is instantaneously stopped.

  The main board relay board 28 outputs the power abnormality signal ABN1, the backup power supply BAK, and DC5V, DC12V, and DC32V output from the power board 20 to the main control unit 21 as they are. On the other hand, the power relay board 30 outputs the system reset signal SYS received from the power board 20 and the AC and DC power supply voltages to the effect interface board 27 as they are. The production interface board 27 outputs the received system reset signal SYS to the production control unit 22 and the image control unit 23 as they are.

  On the other hand, the payout control board 24 is directly connected to the power supply board 20 without going through the relay board, and directly receives the same power abnormality signal ABN2 and backup power supply BAK as the main control unit 21 receives together with other power supply voltages. Is receiving.

  The system reset signal SYS output from the power supply board 20 is a power supply reset signal indicating that the AC power supply 24V has been turned on to the power supply board 20, and the one-chip microcomputer of the effect control unit 22 and the image control unit 23 by this power supply reset signal. The power is reset together with other IC elements.

  However, the system reset signal SYS is not supplied to the main control unit 21 and the payout control unit 24, and a power reset signal (CPU reset signal) is generated in the reset circuit RST of each of the circuit boards 21 and 24. ing. Therefore, for example, even if the connection connector C2 is rattled or noise is superimposed on the wiring cable, there is no possibility that the CPU of the main control unit 21 or the payout control unit 24 is abnormally reset. The effect control unit 22 and the image control unit 23 execute the effect operation in a dependent manner based on the control command from the main control unit 21, so that the power supply board 20 is avoided in order to avoid complication of the circuit configuration. The system reset signal SYS output from is used.

  By the way, the reset circuits RST provided in the main control unit 21 and the payout control unit 24 each have a built-in watchdog timer, and unless a regular clear pulse is received from the CPUs of the control units 21 and 24, Each CPU is forcibly reset.

  In this embodiment, the RAM clear signal CLR is generated by the main control unit 21 and transmitted to the one-chip microcomputer of the main control unit 21 and the payout control unit 24. Here, the RAM clear signal CLR is a signal for deciding whether or not to initialize all the areas of the built-in RAM of the one-chip microcomputer of each control unit 21 and 24. It has a value corresponding to the / OFF state.

  The main control unit 21 and the payout control unit 24 receive the power supply abnormality signals ABN1 and ABN2 from the power supply board 20 to start necessary end processing prior to a power failure or business end. The backup power supply BAK is a DC5V DC power source that retains data in the RAM of the one-chip microcomputer of the main control unit 21 and the payout control unit 24 even after the AC power supply 24V is shut off due to business termination or power failure. Therefore, the main control unit 21 and the payout control unit 25 can resume the game operation before power-off after power-on (power backup function). This pachinko machine is designed to retain the stored contents of the RAM of each one-chip microcomputer for at least several days.

  As shown in FIG. 3, the main control unit 21 transmits a control command CMD ″ to the payout control unit 25 via the main board relay board 28, while the payout control unit 25 indicates a game ball payout operation. A prize ball counting signal, a status signal CON relating to an abnormality in the payout operation, and an operation start signal BGN are received, and the status signal CON includes, for example, a replenishment signal, a payout shortage error signal, and a lower plate full signal. The operation start signal BGN is a signal for notifying the main control unit 21 that the initial operation of the payout control unit 21 has been completed after the power is turned on.

  The main control unit 21 is connected to each game component of the game board 5 via the game board relay board 29. And while receiving the switch signal of the detection switch built in each winning opening 16-18 on a game board, solenoids, such as an electric tulip, are driven. The solenoids and the detection switch are configured to operate with a power supply voltage VB (12 V) supplied from the main control unit 21. Each switch signal indicating a winning state to the symbol starting port 15 is converted to a TTL level switch signal by an interface IC that operates with the power supply voltage VB (12 V) and the power supply voltage Vcc (5 V). Then, the data is transmitted to the main control unit 21.

  As shown in FIG. 4, the effect control unit 22 stores a one-chip microcomputer 40 that executes processing such as a sound effect, a lamp effect, a notice effect by an effect movable body, and data transfer, a control program for the one-chip microcomputer 40, and the like. EPROM 41 to be played, an audio reproduction output circuit 42 for reproducing and outputting an audio signal based on an instruction from the one-chip microcomputer 40, and an audio memory 43 for storing compressed audio data which is original data of the audio signal to be reproduced And a watchdog timer WDT.

  The one-chip microcomputer 40 includes a parallel input / output port PIO. A control command CMD 'and a strobe signal STB' are output from the parallel port PIO.

  The watchdog timer WDT is reset by a clear pulse periodically supplied from the one-chip microcomputer 40. When the clear pulse is interrupted due to a program runaway or the like, a reset signal RESET is output. As a result, the one-chip microcomputer 40 is forcibly reset to the initial state, and the program runaway state is solved.

  As shown in FIG. 4, the control command CMD and the strobe signal (interrupt signal) STB output from the main control board 21 are sent to the one-chip microcomputer 40 of the effect control board 22 via the buffer 48 of the effect interface board 27. Is supplied. The interrupt signal STB is supplied to the interrupt terminal INT of the one-chip microcomputer. Then, the effect control unit 22 acquires the control command CMD by the reception interrupt process activated by the strobe signal STB.

  The control command CMD acquired by the effect control unit 22 includes (1) an abnormality notification and other notification control commands, and (2) a control command for specifying an outline of various effect operations resulting from winning at the symbol start opening. (Variation pattern command) and a control command (symbol designation command) for designating a symbol type are included. Here, the outline of the production operation specified by the variation pattern command includes the production total time from the production start to the production end and the result of winning or failing in the jackpot lottery. In addition, the symbol designating command includes information for identifying information on the jackpot type (15R probability variation, 2R probability variation, 15R normal, 2R normal, etc.) in the case of a jackpot according to the result of the jackpot lottery. In some cases, information for identifying a loss is included. The outline of the production operation specified by the variation pattern command includes the production total time from the production start to the production end, and the result of success or failure in the big hit lottery. In addition to these, the change pattern command including the presence or absence of the reach effect or the notice effect may be specified, but even in this case, the specific content of the effect content is not specified.

  Therefore, when the effect control unit 22 acquires the variation pattern command, the effect lottery is subsequently performed, and the effect outline specified by the acquired variation pattern command is further specified. The symbol designation command is acquired by the effect control unit 22 but is transferred to the image control unit 23 as it is.

  For example, the specific contents of the reach effect and the notice effect are determined. Then, in accordance with the determined specific game content, a lamp effect by blinking the LED group or the like and a sound effect preparation operation by the speaker are performed, and the liquid crystal control unit 23 is synchronized with the effect operation by the lamp or the speaker. The control command CMD ′ relating to the performed image effect is output.

  In order to realize such an image effect synchronized with the effect operation, the effect control unit 22 outputs a control command CMD ′ to the effect interface board 27 together with a strobe signal (interrupt signal) STB ′ for the liquid crystal control unit 23. To do. When the notification control command related to the display device or other control commands is received, the effect control unit 22 outputs the control command to the effect interface board 27 together with the interrupt signal STB ′. .

  Corresponding to the configuration of the effect control board 22, the effect interface board 27 is configured to receive an 8-bit control command CMD 'and a 1-bit interrupt signal STB'. These data CMD ′ and STB ′ are output to the liquid crystal control board 23 as they are via the buffer circuit 46. The effect interface board 27 receives a lamp driving signal output from the effect control unit 22 and supplies the signal to the LED lamp group via the lamp connection board 34. As a result, a lamp effect corresponding to the control command CMD output from the main control unit 21 is realized.

  The image control unit 23 receives a control command via the effect interface board 27 and executes an image control operation, and a VDP 51 that drives the display device DISP based on an instruction from the one-chip microcomputer 50. And a graphic ROM 52, a control ROM 53, and a watchdog timer WDT for forcibly resetting the one-chip microcomputer 50.

  When the CPU of the one-chip microcomputer 50 becomes in a runaway state due to the influence of noise or the like, the watchdog timer WDT is activated and the CPU is abnormally reset. In addition, the reset terminal of the CPU may drop to L level due to noise or the like, and the CPU may be abnormally reset.

  On the other hand, the system reset signal SYS is supplied to the reset terminal RESET of the built-in CPU of the effect control unit 22 and the image control unit 23 via the effect interface board 27. Each CPU is reset.

  FIG. 5 is a flowchart for explaining the operation of the effect control unit 22 that executes the effect operation based on the control command received from the main control unit 21. As shown in the figure, the effect control unit 22 includes a main process (a) that is started when the CPU is reset, a reception interrupt process (b) that is activated by a strobe signal STB, and a first timer interrupt that is activated every 10 mS. It includes a process (c) and a second timer interrupt process (d) started every 2 mS.

  As shown in FIG. 5 (d), in the second timer interrupt process, the lamp effect process (ST83) for driving the illumination lamp and the effect motor process (ST84) for driving the effect movable body AMU as necessary are 2 mS. It is executed every time.

  As shown in FIG. 5A, in the main process (CPU reset process), the initial setting in the one-chip microcomputer 40 is executed (ST60), and then the backup determination process is executed (ST61). The backup determination process is a process for determining the validity of the data stored in the backup process (ST78). Data stored in the backup process (ST78) is not particularly limited. For example, (1) a sum value of a checksum operation for predetermined data in the RAM area, (2) specific data discretely stored in the RAM area, (3) Backup data in which predetermined data in the RAM area is stored in another area can be exemplified.

  In the determination of such backup data, if the validity cannot be confirmed, the entire area of the RAM is initialized, and the effect control unit 22 is shifted to the process of step ST63 to cold start (ST62).

  By the way, unlike the main control unit 21 and the payout control unit 24, the effect control unit 22 is not provided with a backup power source, and therefore it may not be possible to detect legitimate data in the backup determination process (ST61). However, the CPU is reset not only at the time of power reset corresponding to power-on, but also at the time of abnormal reset when the CPU reset signal becomes an active level due to noise or a watchdog timer.

  Therefore, in this embodiment, at the time of abnormal reset of the CPU, a backup determination process (ST61 to ST62) is provided in order to continue the game operation so far and to hot start the operation of the effect control unit 22 as much as possible. Yes.

  However, since not all data is determined in the backup determination process (ST78), the operation of the effect control unit 22 should be returned to the initial state when the CPU is repeatedly abnormally reset. Therefore, the abnormality counter is incremented (+1) to count the number of abnormal resets (ST64), and if the value of the abnormality counter exceeds a predetermined value (for example, 2), the RAM clear process in step ST63 is performed to cold start. (ST65).

  As described above, even when the CPU is abnormally reset, if the validity is determined in the backup determination (ST61) and the number of abnormal resets is equal to or less than the predetermined value, the effect control unit 22 is hot-started, and the game until then Operation continues.

  Next, the effect control unit 22 initializes the operation position of the accessory that moves appropriately and executes the notice effect regardless of whether it is hot-started or cold-started (ST66). Then, necessary initial setting is executed for the audio reproduction output circuit (audio reproduction IC) 42 (ST67). Thereafter, the CPU of the one-chip microcomputer 40 is set to the interrupt permitting state (ST68), and the random number value is updated (ST69), and a timer interrupt at 10 mS intervals is waited (ST70). Note that the updated random value is used in the effect lottery process in order to randomize the effect operation.

  As shown in FIG. 5C, since an interrupt flag is set every time a timer interrupt occurs at an interval of 10 ms (ST82), it is repeatedly checked that the interrupt flag is turned on in step ST70 of the main process. . When the interrupt flag is turned ON, the timer update process is executed after resetting the interrupt flag to OFF (ST71).

  Subsequently, command analysis processing is executed for the control command (reception command) received in the reception interrupt processing (FIG. 5B) (ST72). In addition to the variation pattern command, the received command includes a stop command for defining the stop timing of the symbol variation operation.

  If the newly received control command is a variation pattern command, the effect lottery is executed, and the effect command specified by the lottery result is transmitted to the image control unit 23 and specified by the effect command. A flag setting process necessary to start the production operation is executed. On the other hand, when the stop command is received, it is transferred to the image control unit 23 and necessary flag setting processing for stopping the effect is executed.

  When the command analysis process (ST72) having such contents is completed, an error process (ST73) and an input process (ST74) for the chance button 11 are executed as necessary. Further, an effect scenario for the lamp effect (ST83), the effect motor process (ST84), and the sound effect (ST76) is created or updated (ST75). Next, an audio effect based on the created or updated effect scenario is executed (ST76).

  Subsequently, after clearing the watchdog timer WDT (ST77) and the backup process (ST78), the process proceeds to step ST68. Examples of the backup processing include not only checksum calculation but also processing for storing specific data discretely, processing for storing all data in the work area, and the like.

  Since the production control unit 22 has been described in detail above, the operation of the image control unit 23 will be described next. The image control unit 23 includes a main process (FIG. 6A) that is started when the CPU is reset, and a reception interrupt process (not shown) that is activated by a strobe signal STB ′.

  As shown in FIG. 6A, in the main process started after the CPU is reset, an initialization process is first executed (ST1). The CPU reset includes not only a power reset but also an abnormal reset in which the CPU reset signal becomes an active level due to noise or a watchdog timer WDT.

  The specific contents of the initialization process are as shown in FIG. 6B. First, it is determined whether or not the CPU reset is caused by power-on (ST10). The determination as to whether or not the power is turned on is appropriate. For example, it is determined based on whether or not a predetermined number of key data has been stored in the corresponding storage area of the RAM. Since the RAM value is indefinite when the power is turned on, the key data of the specified value cannot be detected. Therefore, in this embodiment, whether or not the power is turned on is determined based on whether or not key data of a predetermined value can be detected. Also, even if part of the key data is destroyed due to program runaway, etc., it is handled in the same way as when the power is turned on.

  On the other hand, if all of the key data are specified values, then the value of the abnormality counter is determined (ST11). If the value of the abnormality counter is 3 or more, the cold start process shown in steps ST12 to ST17. Is executed.

  Specifically, first, each part of the one-chip microcomputer 50 is initialized (ST12), and the CPU work area of the RAM is cleared to zero (ST13). Since a flag value and a counter value for managing a series of image effects (design variation operations) are secured in the work area of the CPU, the image effects are completely initialized by clearing them to zero.

  Next, all the VDP work areas that store the flag values and counter values that define the operation of the VDP 51 are cleared to zero, and the internal registers of the VDP 51, VRAM (Video RAM), and others are also initialized. (ST14 to ST17). As a result, the display device DISP has display contents in the same initial state as when the power is turned on.

  On the other hand, if it is determined in step ST11 that the value of the abnormality counter is less than 3, the hot start process shown in steps ST18 to ST22 is executed instead of the cold start process described above.

  In the hot start process, first, the abnormality counter is incremented (+1) (ST18), and each part of the one-chip microcomputer 50 is initialized (ST19). However, the CPU work area is not cleared to zero and the data before the CPU reset is maintained as it is.

  The same applies to the VDP 51, and the internal registers are initialized without clearing the VDP work area to zero (ST20). However, since the VRAM is initialized (ST21), for the display device DISP, the screen before the CPU reset disappears for a moment. However, when the image effect is resumed by the hot start, the image effect continued from the previous image effect is resumed, so that no particular problem occurs.

  Next, the value of the storage completion flag FG is acquired, and it is determined whether this is an ON state or an OFF state (ST22 to ST23). The storage completion flag FG is a predetermined symbol area WK1 obtained by dividing the left, middle and right stop symbol data determined by symbol lottery (ST41, ST43, ST44) in the image control unit 23 based on the symbol designation command into three sections. This indicates whether or not the data has been stored in WK3 (work area for CPU), and is set to ON in the process of step ST48 and set to OFF in the process of step ST51.

  Therefore, if the storage completion flag FG is in the OFF state, the CPU has been abnormally reset after the change stop process (ST35) and before the process of step ST48 is completed in the change start process (ST36). Therefore, in such a case, for safety, the stopped symbol data in the detached state is overwritten and stored in the symbol areas WK1 to WK3 (ST24). Although not particularly limited, stop symbol data of “2, 4, 6” is stored in this embodiment as left, middle, and right stop symbols.

  On the other hand, if the storage completion flag FG is ON, the stop symbol data in the symbol areas WK1 to WK3 can be trusted, and the initialization process is terminated without doing anything.

  When the initialization process (ST1) as described above is completed, the watchdog timer is cleared (ST2), various timers for managing the progress of the image effect are updated (ST3), and transmitted from the effect control unit 22 Command analysis processing is executed for the control command CMD ′ (ST4). The control command CMD ′ (including the effect command) transmitted from the effect control unit 22 is acquired by a reception interrupt process (not shown) and stored in the reception buffer.

  Therefore, after analyzing the type of the newly received control command CMD '(ST4), processing for each command corresponding to the control command type is executed (ST5). FIG. 7 (a) illustrates a part of the command-specific processing (ST5), and an effect command corresponding to the change stop process (ST35) and change pattern command (effect command) CMD executed when a stop command is received. A variation start process (ST36) executed at the time of reception, a notice process (ST37) executed at the time of reception of the notice command, a jackpot start process (ST38) for starting the effect of the big hit state, and the like are included.

  In the variation start process (ST36), based on the effect command CMD ′ received from the effect control unit 22, it is determined whether or not it is a big hit state (ST40) and whether or not it is a disengaged state with reach effect (ST42). The symbol lottery process corresponding to the result is executed (ST41, ST43, ST44).

  Specifically, if it is a big hit state, the same left, middle and right stop symbols are selected by lottery corresponding to the type of the big hit state (ST41). On the other hand, when the reach effect is executed in the disengaged state, the common left stop symbol and right stop symbol and the middle stop symbol that does not match these are determined by lottery (ST43), and the reach effect is not executed. In this case, a left stop symbol and a right stop symbol that do not match each other, and a random middle stop symbol are determined by lottery (ST44).

  After that, the left stop symbol, middle stop symbol, and right stop symbol determined by lottery are stored in the symbol areas WK1 to WK3, respectively (ST45 to ST47). Next, a symbol changing operation for changing the rotation of the three effect symbols is started (ST48). At the timing when step ST45 is finished or when step ST46 is finished (refer to the arrow), the symbol change motion stop symbol (stop symbol displayed on the display device at that time) that has ended first, and the symbol that starts from now on The stop symbol in the fluctuation operation is in a mixed state in the symbol regions WK1 to WK3.

  Therefore, if the CPU is abnormally reset at the timing of the arrow due to the influence of noise or the like, the command that has already been analyzed is effectively erased from the command buffer, and the stop symbol is not newly created again. Since stop symbols coexist, the conventional configuration may cause an unreasonable display state for the left, middle, and right stop symbols.

  However, in this embodiment, after the CPU is reset, the stop symbol data is reset to the out-of-game state based on the OFF state storage completion flag GF (ST24), so there is no possibility that an unreasonable display state will occur. . That is, in this embodiment, the storage completion flag FG remains in the OFF state until immediately before the start of the symbol changing operation. Therefore, even if the CPU is abnormally reset in this OFF state, the stop command is received. The display content only changes from the previous stop symbol to the predetermined outage stop symbol “2, 4, 6”.

  In addition, in the present embodiment, as will be described later, the consistency of the stored contents (stop symbol data) of the symbol areas WK1 to WK3 is re-determined at the final timing of the symbol variation operation, and if there is a problem, it is in a detached state. Since the stop symbol data is set (see ST28), there is no problem even if the stop symbol data is garbled after the symbol change operation is started.

  In any case, the symbol variation operation is started with the storage completion flag FG set to ON (ST48) (ST49). When the reach effect is executed, the left stop symbol and the right stop symbol in the symbol areas WK1 and WK3 are displayed in a pause state. Then, after further performing the symbol variation operation and the notice effect operation, when the pre-defined performance time is digested, the swing variation effect is performed for the three stop symbols, and at the timing when the stop command is received from the effect control unit 22, A variation stop process is executed (ST35).

  The fluctuation stop process (ST35) will be described later, and the description will be continued by returning to FIG. When the command-by-command processing (ST5) is completed, an effect scenario for the image effect (symbol changing operation) is created or updated (ST6), and a V blank interruption is waited (ST7). The V blank interrupt means an interrupt supplied from the VDP 51 to the one-chip microcomputer 50 in synchronization with the vertical synchronization signal of the display device DISP.

  If there is a V blank interrupt, the image effect is advanced by writing the necessary operation parameters in the register of the VDP 51 based on the effect scenario updated in the process of step ST6 (ST8). Next, after clearing the abnormality counter to zero (ST9), the process proceeds to step ST2.

  As described above, in this embodiment, since the abnormality counter is cleared for each V blank interrupt, the value of the abnormality counter may be 3 or more in the initialization process (ST1). Conceivable. That is, it is considered that the CPU is never abnormally reset three times without completing the processes of steps ST2 to ST8.

  However, in this embodiment, for example, the VDP 51 may hang up during the initialization process (ST1), and the watchdog timer may start multiple times. Thus, the process of step ST11 is provided.

  In the present embodiment, in the production scenario update process (ST6), the consistency of the stop symbol data is determined, and if an inconsistency is detected, an error flag ERR is set (ST30). The value of the abnormality counter is intentionally set to the upper limit value (= 3) (ST54). These series of processes correspond to the abnormality handling process of the present invention.

  FIG. 6C is a flowchart showing an operation at the final timing of the symbol variation operation (starting operation of the variation variation effect), which is a part of the effect scenario update process. The total effect time of the symbol change operation started by the process of step ST49 is defined by a change pattern command (effect command). Whether or not the production total time has been consumed is managed by a management timer updated in the process of step ST3.

  Therefore, when the end effect (swing fluctuation effect) timing just before the expiration of the management timer is reached, the stop symbol data of the symbol areas WK1 to WK3 are read, and the symbol change operation executed so far and the stop symbol are It is determined whether or not they match (ST26). In addition, the symbol change operation performed until then is specified by the effect command received from the effect control unit 22 and temporarily stored, and when the off effect with the reach effect is executed, the left stop symbol and the right stop symbol are displayed. Are confirmed, and it is confirmed that these and the intermediate stop symbols do not match.

  In addition, when the hit effect is executed, it is confirmed that all stop symbols are matched, and when the off effect without the reach effect is executed, the left stop symbol and the right stop symbol do not match. It is confirmed and determined.

  If a mismatch is detected, the stopped symbol data in the detached state is overwritten and stored in the symbol areas WK1 to WK3 for safety (ST28). As described above, in this embodiment, stop symbol data of “2, 4 and 6” is stored. Therefore, no problem occurs even if the stop symbol data is garbled during the symbol variation operation. That is, the stop symbols in the big hit state are not aligned even though they are in the disengaged state.

  The confirmation of consistency may be a comparison determination between the stop symbol stored in the end effect stage (swing fluctuation effect) and the winning type based on the symbol command.

  Next, it is determined whether or not there is a symbol variation operation scheduled to start after the symbol variation effect that is currently being ended (ST29). If there is no symbol variation operation scheduled to start, the error flag ERR is set to the ON state. Set (ST30). Whether or not there is a symbol variation operation scheduled to start continuously is determined based on whether or not an unprocessed effect command exists in the reception interrupt reception buffer.

  By the way, the determination of step ST29 is provided in order not to erase the symbol variation operation scheduled to start execution. That is, in the present embodiment, when the error flag ERR is set to the ON state, the cold start process is executed thereafter (ST54 to ST56, ST12 to ST17), so that the execution start is waited for. In order to give priority to the execution of the symbol variation operation, the determination process of step ST29 is provided.

  Regardless of whether or not the abnormality handling processing (ST28 to ST30) as described above is executed, when the end effect timing is reached, the stop symbol data of the symbol areas WK1 to WK3 are read out and based on this data. Then, the fluctuation variation effect is started (ST31). The fluctuation variation effect means an effect that does not stop the left, middle, and right stop symbols deterministically but maintains a floating state that moves lightly up and down.

  Note that the fluctuation variation effect started in this way continues until the variation stop process executed upon receipt of the stop command (ST25 → ST31).

  Therefore, next, the fluctuation stop process (ST35) will be described. When a stop command is received from the effect control unit 22, a variable stop process is executed in the command-specific process (ST5) (ST35).

  In the fluctuation stop process, the fluctuation fluctuation effect being executed at that time is terminated, and the stop symbol data of the symbol areas WK1 to WK3 is displayed deterministically on the display device DISP (ST50). Then, the storage completion flag GF is set to the OFF state (ST51), and other end processing is executed (ST52).

  Next, the error flag ERR is determined. The error flag ERR is set to the ON state when the stop symbol data is inconsistent prior to the end effect and when there is no continuously executed symbol variation effect. (ST30). Therefore, if the error flag ERR is ON, the error flag ERR is returned to the OFF state, and the abnormality counter is set to the upper limit value (= 3) (ST54). Then, after releasing the stack to erase the address data (return address data) and the like stacked for subroutine processing (ST55), a software reset instruction is executed (ST56).

  As a result, the CPU process shifts to the top address of the control program, and the initialization process (ST1) shown in FIG. 6 is executed. In this state, since the value of the abnormality counter is set to the upper limit value (= 3), the image control unit 23 is cold-started and enters an image display state when the power is turned on.

  However, the image effect being executed is completely finished, and it is considered that there is no particular problem because the initialization is performed without any image effect during standby. On the other hand, as long as inconsistency is detected in the determination in step ST27, it is impossible to deny the possibility that inconsistency has occurred in other areas of the RAM. Subsequent unreasonable performance based on the data is reliably avoided.

  As mentioned above, although the Example of this invention was described concretely, the concrete description content does not specifically limit this invention. For example, in the embodiment, when an inconsistency in stop symbol data is detected, the cold start process is uniformly executed on the condition that there is no image effect in standby. However, the present invention is not limited to this operation. For example, it is also preferable to execute the cold start processing only for extremely important inconsistencies.

  Further, in the embodiment, only inconsistency between the stop symbol data stored in the symbol areas WK1 to WK3 and the image effect content executed so far is determined, but instead of this, or in addition to this, It is also preferable to determine the inconsistency of the flag value and the timer value for managing the image effect and set the error flag ERR when a very important inconsistency is detected. When such a configuration is adopted, the effect operation is reset to the initial state immediately after the stop symbol is displayed through the fluctuation variation effect (end effect) (ST54 to ST56). If the degree of importance of inconsistency is not high, it is preferable to set the error flag ERR on the condition that there is no standby image effect.

  Moreover, it is not limited to what performs the process which determines inconsistency at the timing of a fluctuation fluctuation effect (end effect), for example, after a fluctuation | variation start, a 1st symbol (for example, left symbol) is displayed so that visual recognition is possible. Consistency may be confirmed at a high-speed fluctuation end timing immediately before starting, a stop timing of the first symbol, or the like.

  Of course, the second symbol (for example, the right symbol) may be checked for consistency at the same stop mode timing as the first symbol. If it is determined that there is an inconsistency at such timing, the stored data is replaced with a predetermined stop symbol (for example, “4, 2, 4” reach lose symbol), and the variation effect is continued. Is desirable. By doing so, it is possible to grasp the abnormal state at an early stage and to perform symbol variation with less discomfort to the player.

  Of course, the application of the present invention is not necessarily limited to a ball game machine.

GM gaming machine 23 image control unit ST10 first process ST11 second process ST18 to ST21 third process ST25 to ST30 abnormality handling process ST54 to ST56 abnormality handling process

Claims (6)

A lottery process caused by a predetermined switch signal is executed, and a lottery result is notified by a symbol display after a series of image effects corresponding to the lottery result. If the lottery result is in a winning state, it is advantageous to the player. A gaming machine for transition to a gaming state,
The image control unit that executes the image effect includes an initial process that is executed after the CPU reset, and an infinite loop process that is repeated at predetermined time intervals after the initial process.
The initial process includes
Functions when the CPU is reset, determines the stored contents of one or more areas of the volatile memory, and first determines whether or not to clear the volatile memory depending on whether or not these are predetermined values A first process to
A second process for determining the value of the abnormality counter, which functions when the primary determination of clearing the volatile memory is not performed;
When the value of the abnormality counter is less than a predetermined value, the third process for maintaining without clearing the storage content of the volatile memory for managing the progress of the image production,
The gaming machine characterized in that the infinite loop process is provided with an abnormality handling process configured to be able to reset the CPU based on the determination of the CPU.   The gaming machine according to claim 1, further comprising a fourth process of clearing all stored contents of the volatile memory that manages the progress of the image production when the value of the abnormality counter is a predetermined value.   The gaming machine according to claim 1 or 2, wherein the value of the abnormality counter is initialized at predetermined time intervals in an infinite loop process. Anomaly handling process
Before notifying the lottery result, a determination process for determining an abnormality in the memory content of the memory related to the lottery result notification operation;
When an abnormality is detected in the storage content of the memory by the determination process, a miss notification process for notifying a lottery result in a missed state,
After the disconnection notification process is executed, a reset process for resetting the CPU under a predetermined condition;
The gaming machine according to claim 1, comprising:   The gaming machine according to claim 4, wherein the reset process is configured to function by setting a value of an abnormality counter to a predetermined value. The error handling process
Before informing the lottery result, a determination process for determining an abnormality in the memory content of the production operation,
When a serious abnormality is detected in the stored contents of the memory by the determination process, a miss notification process for notifying a lottery result in a missed state,
After the disconnection notification process is executed, a reset process for resetting the CPU under a predetermined condition;
The gaming machine according to claim 1, comprising:

Images