JP2013044553A - Interface circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To adjust the signal level of each rotation signal of a secondary side and to facilitate an accuracy improvement of the signal, by adjusting the signal level of a primary side signal by the use of the rotation signal obtained from a rotation detector.SOLUTION: The interface circuit is constituted to adjust the signal level of the rotation signal (K×sinθ×F(t), K×cosθ×F(t)) by adjusting the signal level of the primary side signal (F(t)) which is an excitation signal of the rotation detector (101) by the use of the rotation signal (K×sinθ×F(t), K×cosθ×F(t)) to be obtained from the rotation detector (101).

Description

  The present invention relates to an interface circuit, and in particular, adjusts the signal level of each secondary rotation signal by adjusting the signal level of the primary signal using the rotation signal obtained from the rotation detector. The purpose is to improve the accuracy of.

Conventionally, a rotation detector and a rotation signal processor have electrical characteristics that affect the signal level, and the electrical characteristics usually vary in manufacturing.
For example, in order to improve the above-described characteristics, the configuration of Patent Document 1 can be cited as a proposal.

  That is, FIG. 4 is a block diagram of the resolver / digital conversion circuit. This resolver / digital conversion circuit obtains the transformation ratio of the resolver using the CPU 105 which is a calculation means, and automatically corrects the gain of the excitation circuit by software.

  In FIG. 4, when an excitation signal Asinωt having a constant frequency and a constant amplitude is input from the excitation circuit 106 to the resolver 101 having one-phase excitation and two-phase output, Ks · As · sinθ · sinωt and Ks · As · cos θ · sin ωt is obtained.

  As these two output signals, two data Ks · As · sinθ and Ks · As · cosθ obtained through the AD converter 102, the demodulator 103, and the digital filter 104 are input to the CPU 105.

  The CPU 105 finds Ks ^ 2 · As ^ 2 (sin ^ 2θ + cos ^ 2θ) by squaring and adding the two input Ks · As · sinθ and Ks · As · cosθ data, and the square root thereof. Thus, Ks · As is calculated and further divided by the carrier wave amplitude As acquired from the AD converter 108 to obtain the transformation ratio Ks.

  Next, the CPU 105 obtains the ratio γo of the transformation ratio by dividing the above transformation ratio Ks by the reference transformation ratio Ko preset in the nonvolatile memory 107. Further, the CPU 105 outputs the carrier wave amplitude Ac automatically corrected by dividing the carrier wave amplitude As acquired from the AD converter 108 by the ratio γo of the transformation ratio to the excitation circuit 106. Thereby, the resolver output can be kept constant.

  FIG. 5 shows an overall flow of the resolver processing in the present invention. In step 1, the resolver output signals sin, cos and carrier wave ref data are fetched into the CPU 105, and in step 2, reference amplitude correction calculation is performed. In step 3, fail-safe processing is performed. In the last step 4, the motor rotation angle θ is calculated. This will be described below with reference to a flowchart.

  FIG. 6 shows the details of the flow in the reference amplitude correction calculation (step 2) of FIG. 5 described above. The flow is composed of 6 steps, each of which is made 10 steps to 11 steps in order.

  First, the CPU 105 fetches resolver output signals Ks · As · sinθ, Ks · As · cosθ, and carrier wave signal As · sinωt data (step 10).

  Next, Ks ^ 2 · As ^ 2 · (sin ^ 2θ + cos ^ 2θ) is calculated from the received resolver output signal data (step 11).

  Subsequently, a square root operation of Ks ^ 2 · As ^ 2 is performed to obtain Ks · As (step 12). Ks · As obtained in step 12 is calculated by performing the peak detection of As · sinωt previously taken in, and Ks is obtained by dividing by As (step 13).

  By dividing this Ks by the reference transformation ratio Ko stored in the nonvolatile memory 107, the transformation ratio ratio γo is obtained (step 14). Finally, the carrier amplitude Ac automatically corrected is obtained by dividing the carrier amplitude As by the ratio γo of the transformation ratio (step 15). By outputting the automatically corrected carrier wave amplitude Ac to the excitation circuit 106, the resolver output can be kept constant even when resolvers having different transformation ratios are connected.

JP 2009-25068 A

Since the conventional resolver / digital conversion method and apparatus are configured as described above, the following problems exist.
That is, in the conventional method, since many conversion circuits and the like are controlled using the CPU circuit, it is considered that the burden on the CPU circuit becomes heavy.

  The present invention automatically adjusts the level of each rotation signal by adopting feedback control that keeps track of a reference value that is a signal level setting value that is a target value in advance without using the CPU circuit of the conventional device. An object is to provide an interface circuit.

  The interface circuit according to the present invention outputs a plurality of rotation signals corresponding to a rotation angle from the secondary side of the rotation detector by inputting a primary side signal to the primary side of the rotation detector, and detects the rotation. In the interface circuit for interfacing the rotation signal processor for processing each rotation signal, the signal level of each rotation signal is adjusted by adjusting the signal level of the primary side signal using the rotation signal. A configuration for adjusting, a configuration obtained by comparing a calculation signal obtained from each rotation signal with a reference value set in advance to a primary side of the rotation detector, and The operation signal is obtained by the sum of squares of the rotation signal, and the operation from the sum of squares to the level setting of the primary side signal is constituted by a digital circuit.

Since the interface circuit according to the present invention is configured as described above, the following effects can be obtained.
That is, by inputting a primary side signal to the primary side of the rotation detector, a plurality of rotation signals corresponding to the rotation angle are output from the secondary side of the rotation detector, and the rotation detector and each rotation In an interface circuit that interfaces with a rotation signal processor that processes a signal, by adjusting the signal level of the primary side signal using the rotation signal, by adjusting the signal level of each rotation signal, Without using a conventional CPU circuit, the signal level on the secondary side can be controlled by feedback control, so that changes in electrical characteristics are not taken into consideration, and the reliability of the rotation signal can be greatly improved.
Further, high reliability is obtained by simple feedback control by feeding back the difference obtained by comparing the calculation signal obtained from each rotation signal with a preset reference value to the primary side of the rotation detector. be able to.
Further, the arithmetic signal can be easily configured by a digital circuit by obtaining it as a square sum of the rotation signals.
Further, since the steps from the sum of squares to the level setting of the primary side signal are configured by a digital circuit, all the configurations of the rotation signal processor can be digitized, and the circuit formation can be greatly simplified.

It is a block diagram which shows the interface circuit of the circuit signal by this invention. It is a block diagram which shows the interface circuit of the other form of FIG. It is a wave form diagram which shows the rotation signal of the form of FIG. It is a block diagram which shows the conventional resolver / digital conversion method and circuit. It is a flowchart which shows the operation | movement of FIG. It is a flowchart which shows the detailed operation | movement of step 2 of FIG.

  According to the present invention, by adjusting the signal level of the primary side signal using the rotation signal obtained from the rotation detector, the signal level of each rotation signal on the secondary side is adjusted to improve the accuracy of the signal. An object of the present invention is to provide an interface circuit.

Hereinafter, preferred embodiments of an interface circuit according to the present invention will be described with reference to the drawings.
In addition, the same code | symbol is attached | subjected and demonstrated to a part the same as that of a prior art example, or an equivalent part.
In FIG. 1, what is indicated by reference numeral 101 is a rotation detector composed of a resolver, and a primary side signal F (t) is input to the primary side 101A. From the secondary side 101B of the rotation detector 101, , Rotation signal K · sin θ · F (t) and rotation signal K · cos θ · F (t) are output and input to the first rotation signal input circuit 110 and the second rotation signal input circuit 111 of the rotation signal processor 50, respectively. Has been.

  The first and second rotation signal input circuits 110 and 111 have a predetermined gain G, and the first and second rotation signals K · G · sin θ · F (t) from the respective rotation signal input circuits 110 and 111. , K · G · cos θ · F (t) are sent to a rotation signal processing 112 (not shown) and supplied to the first and second square circuits 113 and 114.

  The first and second square signals 115 and 116 from the first and second square circuits 113 and 114 are added by an adder 117 to be an absolute value square sum 118, and the absolute value square sum 118 is a peak detection circuit 119. The peak is detected (may not be used) and is input to the subtractor 121 as a sum-of-squares signal 120 that is an arithmetic signal.

  The subtracter 121 is supplied with a preset reference value 107 corresponding to the target values of the rotation signals K · sin θ · F (t) and K · cos θ · F (t). The square sum signal 120 is compared with the reference value 107 and the difference 122 is input to a known compensator 123.

  The output signal 124 from the compensator 123 and the primary side output level initial value 125 are added by an adder 126, and an addition signal 127 is passed through a signal generator 128 and an amplifier 129 that constitute the excitation circuit 106. The primary side signal F (t) is supplied to the primary side 101A of the rotation detector 101.

In the above-described configuration, when the rotation detector 101 inputs the primary side signal F (t) to the primary side 101A, the rotation side 101B receives K · F (t) sinθ, K · F ( t) A rotation detector 101 that can obtain an amplitude-modulated signal represented by cos θ.
In the rotation signal processor 50, first and second rotation signals K · G · sin θ · F (t) multiplied by G in the first and second rotation signal input circuits 110 and 111, K · G · cos θ · F (t) is configured to be used for the rotation signal processing 112.
Here, when the square sum of each rotation signal K · G · sin θ · F (t) and K · G · cos θ · F (t) multiplied by G is obtained, a signal independent of the rotation of the rotation detector 101 is obtained as follows. Obtainable.

  Here, even if the absolute value sum of squares is taken instead of the sum of squares, a signal independent of the rotation of the rotation detector 101 can be obtained.

This square sum signal (absolute value sum of squares) 120 is compared with a reference value 107 corresponding to a target value of each rotation signal K · sin θ · F (t), K · cos θ · F (t), and a difference 122 is obtained. It is introduced into a signal generator 128 for generating a primary side signal F (t) through a compensator 123 for stabilizing the feedback loop and improving the characteristics.
Since the square sum signal 120 includes the primary signal F (t) that is a carrier component, it may be compared with the reference value 107 after passing through the peak detection circuit 119 if necessary. Is not necessary if the bandwidth is sufficiently lower than the frequency of the primary signal F (t).
Further, the primary output level initial value is added to the output signal 124 which is the output of the compensator 123. This is because the circuit is started from a state close to the target value to some extent in order to quickly settle the feedback loop. It is what is used.
Since the feedback loop always operates so as to make the difference between the square sum signal 120, which is a control deviation, and the reference value 107 zero by adopting the above configuration, as a result, the rotation signal K · sin θ · F (t), K · cos θ · F (t) is automatically adjusted to a level corresponding to the set reference value 107.

FIG. 2 shows another embodiment of the present invention.
Comprising a digital circuit main body, the sum of squares of the rotation signal, that is, in the form of FIG. 2, the digital circuit performs from the respective square circuits 113 and 114 to the level setting of the primary side signal F (t). It is characterized by.
Therefore, the rotation signals K · G · sin θ · F (t) and K · G · cos θ · F (t) multiplied by G in the respective rotation signal input circuits 110 and 111 pass through the A / D converters 200 and 201, respectively. A / D conversion is performed to obtain a 2's complement code, which is digitally summed by the square of the absolute value by each of the square circuits 113 and 114. The digital reference value 107 corresponding to the target value of each rotation signal and the digital subtractor 121 To be compared. A difference 122 which is a control deviation obtained by digital subtraction is introduced into the signal generator 128 via an integrator which is a compensator 123. In this embodiment, since the feedback loop bandwidth can be set sufficiently lower than the frequency of F (t) by the compensator 123, the peak detection circuit shown in FIG. 1 is omitted.

  In the first squaring circuit 113 and the second squaring circuit 114, the digital outputs 200a and 201a from the respective A / D conversion circuits 200 and 201 are added by the adder 117 through the multipliers 200b and 201b and the MSB mask processes 200c and 201c. The signals are added and supplied to the subtractor 121 as the sum of squares signal 120. In addition, the same code | symbol is attached | subjected to the same part as FIG.

  FIG. 3 shows a result of simulating changes in the first and second rotation signals K · G · sin θ · F (t) and K · G · cos θ · F (t) in the embodiment of FIG. The initial values of the first and second rotation signals K · G · sin θ · F (t) and K · G · cos θ · F (t) are set to 1Vp− at the primary side output level initial value (digital) in FIG. The target value is set to 2 Vp-p with the digital reference value. Finally, the first and second rotation signals K · G · sin θ · F (t) and K · G · cos θ · F (t) are stable at the target signal level.

  The interface circuit according to the present invention improves the signal accuracy by adjusting the signal level of each secondary rotation signal by adjusting the signal level of the primary signal using the rotation signal obtained from the rotation detector. Can be achieved.

50 Rotation signal processor 101 Rotation detector (resolver)
101A Primary side 101B Secondary side 106 Excitation circuit 107 Reference value 110 First rotation signal input circuit 111 Second rotation signal input circuit K · sinθ · F (t), K · cosθ · F (t) Rotation signal K · G Sin θ · F (t), K · G · cos θ · F (t) first and second rotation signals 112 rotation signal processing 113 first square circuit 114 second square circuit 115 first square signal 116 second square signal 117 Adder 118 Absolute sum of squares 119 Peak detection circuit 120 Sum of squares signal 121 Subtractor 122 Difference 123 Compensator 124 Output signal 125 Primary output level initial value 126 Adder 127 Addition output 128 Signal generator 129 Amplifier F (t) Primary side signal

Claims (4)

By inputting the primary side signal (F (t)) to the primary side (101A) of the rotation detector (101), it corresponds to the rotation angle from the secondary side (101B) of the rotation detector (101). A plurality of rotation signals (K · sinθ · F (t), K · cosθ · F (t)) are output, and the rotation detector (101) and each rotation signal (K · sinθ · F (t), K In the interface circuit that interfaces with the rotation signal processor (50) that processes cosθ · F (t))
By adjusting the signal level of the primary side signal (F (t)) using the rotation signals (K · sin θ · F (t), K · cos θ · F (t)), the rotation signals (F An interface circuit that adjusts the signal level of K · sinθ · F (t) and K · cosθ · F (t).   The difference (122) obtained by comparing the calculation signal (120) obtained from each rotation signal (K · sin θ · F (t), K · cos θ · F (t)) with a preset reference value (107). 2 is fed back to the primary side (101A) of the rotation detector (101).   3. The interface circuit according to claim 1, wherein the arithmetic signal (120) is obtained by a sum of squares of the rotation signals (K · sin θ · F (t), K · cos θ · F (t)).   4. The interface circuit according to claim 3, wherein the steps from the sum of squares to the level setting of the primary side signal (F (t)) are configured by a digital circuit.

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