JP2013016754A - Semiconductor element mounting member, semiconductor element mounted substrate and semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device, especially a semiconductor device on which an LED semiconductor element is mounted, which is excellent in thermal conductivity and connection reliability, and capable of thinning to a higher degree.SOLUTION: A semiconductor element mounting member has a conductive metal layer pattern and an insulation part on a carrier substrate. The metal layer pattern is covered by the insulation part at least on a peripheral edge so as to have an exposed part in a portion of the metal layer pattern. The metal layer pattern has a cross sectional shape such that an outermost peripheral part of the metal layer pattern protrudes from a part where the metal layer pattern and the carrier substrate are in contact with each other to the insulation part side when viewed from the side of the metal layer pattern of the member.

Description

  The present invention relates to a semiconductor element mounting member, a semiconductor element mounting substrate, and a semiconductor device.

In recent years, in order to reduce the size of a semiconductor package, a method for manufacturing a semiconductor device using an electroforming (electroforming) manufacturing process has been proposed (see, for example, Patent Documents 1 and 2).
In Patent Document 1, a step of forming a plurality of two conductive members spaced apart from each other on a support substrate, a step of providing a base made of a light-shielding resin between the conductive members, and an optical semiconductor element mounted on the conductive member And a method of manufacturing an optical semiconductor device, including a step of covering the optical semiconductor element with a sealing member made of a translucent resin, and a step of separating the optical semiconductor device after removing the support substrate. .
In Patent Document 2, a method for manufacturing a light emitting device is disclosed in detail with reference to FIGS. 1C and 1D. According to Patent Documents 1 and 2, it is said that a thin light-emitting device having excellent heat resistance can be manufactured with high yield.

However, the semiconductor device manufactured by the above method has the following problems.
(1) Although a transfer mold method is mentioned as a method for forming a substrate made of a light-shielding resin (Patent Document 2, Paragraph 0031), it usually contains a release agent in order to impart releasability with a mold. The adhesiveness with the metal used as the conductive member is weak. In addition, since the distance from the lower surface of the conductive member to the plating on the uppermost layer of the conductive member is short, the moisture absorption resistance of the semiconductor device is lowered and the insulation reliability of the semiconductor device is poor. In particular, when Ag plating is applied to the uppermost layer of the conductive member, the Ag plating is easily discolored, and the deterioration of the light amount and the change in color are large.
(2) Since the adhesion between the substrate made of a light-shielding resin and the metal serving as the conductive member is weak, a protrusion is provided on the side surface of the conductive member in order to prevent the conductive member from falling off the semiconductor device (Patent Document 1). , Paragraphs [0032], [0036], [0061]). Therefore, it is necessary to increase the thickness of the plating from the lower surface of the conductive member to the protruding portion and to increase the protruding portion to increase the distance from the lower surface of the conductive member to the uppermost plating of the conductive member. There were limits to thinning and miniaturization. In addition, since there is a protrusion on the side surface of the conductive member, it is difficult to fill the resin material for forming the substrate when forming the substrate.
(3) Since the surface of the conductive member is a plating free precipitation surface, the surface is inferior in smoothness and the connection workability of the conductive wire is low. Moreover, since the smoothness of the surface of the conductive member is inferior, the mold sealing property is poor, and the resin material constituting the substrate oozes out from the upper surface of the conductive member when forming the substrate.
(4) Since the adhesion between the metal layer on the support substrate and the conductive member is weak, the resin material enters between the metal layer and the conductive member when the base is formed.
(5) Since it is necessary to apply a connection plating to the entire surface of the conductive member, the color change is large when an Ag plating that is easily discolored is applied to the connection plating.
(6) Since the lower surface of the conductive member to be externally connected does not protrude from the semiconductor device, the external connection portion after mounting the semiconductor device is weak against shearing force, and the reliability of external connection is limited.
(7) Since expensive connection plating needs to be applied to the entire outermost surface of the conductive member, the cost increases. In addition, the formation of the conductive member pattern is a photolithographic method, and it is necessary to form a pattern for each product, so that a great expense is required. Furthermore, it is difficult to handle roll-to-roll, resulting in poor productivity.

  Patent Documents 3 and 4 describe one method for improving the above problem (6).

JP 2010-239105 A JP 2011-35040 A JP 2010-10275 A JP 2010-10276 A

  In view of the above problems, an object of the present invention is to provide a semiconductor element mounting member, a semiconductor element mounting substrate, and a semiconductor device that are excellent in thermal conductivity and reliability and can be thinned.

  As a result of intensive studies to achieve the above object, the present inventors have found that the above-mentioned problems can be solved by adopting the following specific configuration, and have completed the present invention. .

That is, the present invention
(1) A semiconductor element mounting member having a conductive metal layer pattern and an insulating part on a carrier substrate, and the metal layer pattern is insulated at least at its peripheral part so as to partially have an exposed part. A cross-section in which the outermost peripheral portion of the metal layer pattern protrudes to the insulating portion side from the portion where the metal layer pattern and the carrier substrate are in contact in a plan view from the metal layer pattern side of the member A semiconductor element mounting member characterized by having a shape;
(2) The semiconductor element mounting member according to (1), wherein a surface of the exposed portion is substantially flat.
(3) The above (1) or (2), wherein the conductive metal layer pattern has a pedestal-shaped convex portion having a substantially flat surface on the inner side of the outermost periphery on the surface opposite to the carrier substrate side. A semiconductor element mounting member according to claim 1,
(4) The semiconductor element mounting member according to any one of (1) to (3), wherein the insulating portion is made of a thermosetting and / or active energy ray-curable solder resist.
(5) The above (1) to (4), wherein the carrier base material is composed of a peelable base material and an adhesive layer, and the conductive metal layer pattern and the insulating part are adhered to the peelable base material via the adhesive layer. ) A semiconductor element mounting member according to any one of
(6) The member for mounting a semiconductor element according to (5), wherein the conductive metal layer pattern is arranged so as to protrude toward a peeling surface when the carrier base material is peeled off,
(7) A semiconductor element mounting substrate comprising a reflector so as not to cover the exposed portion of the conductive metal layer pattern on the semiconductor element mounting member according to any one of (1) to (6),
(8) The reflector comprises a side wall, the surface comprising the conductive metal layer pattern and the insulating portion of the semiconductor element mounting member constitutes a bottom surface, and two or more conductive metal layers having an exposed portion in the bottom surface The semiconductor element mounting substrate according to the above (7), which has a pattern and forms a recess by the side wall and the bottom surface.
(9) A semiconductor device having a semiconductor element mounting member, a semiconductor element, and a sealing member according to any one of (1) to (6), wherein the semiconductor element mounting member forms an outer surface, A semiconductor device in which the semiconductor element is placed on the semiconductor element mounting member, and the sealing member seals the semiconductor element;
(10) The semiconductor device according to (9), wherein the semiconductor element is an LED semiconductor element,
(11) The semiconductor device according to (9) or (10), including a reflector on the semiconductor element mounting member so as not to cover an exposed portion of the conductive metal layer pattern.
(12) Two or more conductive metal layers including a side wall, a surface made of the conductive metal layer pattern and the insulating portion of the semiconductor element mounting member forming a bottom surface, and an exposed portion in the bottom surface. The semiconductor device according to (11), wherein the semiconductor device has a pattern, and is formed by filling the sealing material into a recess formed by the side wall and the bottom surface to form a sealing member.
Is to provide.

According to the present invention,
(1) Since the adhesion between the conductive metal layer pattern and the insulating portion is strong, the moisture absorption resistance of the semiconductor device is improved. Therefore, the reliability of the semiconductor device can be improved. Also, when Ag plating is applied to the uppermost layer of the conductive metal layer pattern, the Ag plating is difficult to discolor due to moisture absorption, and the deterioration of the light amount can be reduced. The color change can be reduced by suppressing the color change.
(2) In addition to the strong adhesion between the conductive metal layer pattern and the insulating part, since the peripheral part of the conductive metal layer pattern is covered with the insulating part, the conductive metal layer pattern from the semiconductor device Excellent drop-off prevention. Therefore, the plating thickness of the conductive metal layer pattern can be reduced, and the semiconductor device can be further reduced in thickness and the conductive metal layer pattern can be further refined.

It is a perspective view which shows an example of the electroconductive base material for plating. It is an end view of the AA 'cross section of FIG. FIG. 2 is an end view of a B-B ′ cross section in FIG. 1. It is a figure which shows the manufacturing process of the electroconductive base material for plating. It is a figure which shows the manufacturing process of the member for semiconductor element mounting. It is a figure which shows the manufacturing process of the member for semiconductor element mounting, a semiconductor element mounting substrate, and a semiconductor device. It is a figure which shows the manufacturing process of the semiconductor device separated into pieces. It is a figure which shows the process of mounting a semiconductor device. It is a top view which shows another example of the electroconductive base material for plating. It is a top view which shows another example of the electroconductive base material for plating. It is a top view which shows another example of the electroconductive base material for plating. It is a top view which shows another example of the electroconductive base material for plating. It is a top view which shows another example of the electroconductive base material for plating. It is a figure which shows the semiconductor device of this invention. It is a figure which shows the semiconductor device of this invention. It is a figure which shows the semiconductor device of this invention. It is a figure which shows the manufacturing process of the conventional member for semiconductor element mounting. It is a figure which shows the manufacturing process of the conventional semiconductor element mounting substrate and semiconductor device. It is a figure which shows the manufacturing process of the conventional semiconductor device separated into pieces. It is a figure which shows the process of mounting the conventional semiconductor device.

(Semiconductor element mounting member)
The semiconductor element mounting member of the present invention will be described below in detail with reference to the drawings.
The member for mounting a semiconductor element of the present invention has a configuration shown in FIGS. 6 (k) and 6 (k ′). That is, the semiconductor element mounting member 10 of the present invention has the conductive metal layer patterns 13 and 14 and the insulating portion 15 on the carrier substrate 37, and the metal layer patterns 13 and 14 are partially formed. At least the peripheral edge portion 17 is covered with the insulating portion 15 so as to have an exposed portion. In plan view from the metal layer patterns 13 and 14 side of the semiconductor element mounting member 10 of the present invention (a perspective view is shown in FIG. 6 (l ′)), the outermost peripheral portion of the metal layer pattern is the metal layer pattern. It is characterized in that it has a cross-sectional shape protruding to the insulating part side from the part where the carrier substrate contacts. Since the peripheral part of the metal layer pattern is covered with the insulating part, the exposed part of the conductive metal layer pattern is formed inside the outermost periphery of the conductive metal layer pattern.
Here, the insulating portion 15 is preferably made of a curable resin, and the insulating portion is formed so as to partially expose a part of the conductive metal layer pattern.
FIG. 6 (k ′) is an enlarged view of the peripheral edge 17 in FIG. 6 (k). In the embodiment shown in FIG. 6 (k ′), the peripheral edge portion 17 of the conductive metal layer patterns 13 and 14 is covered with the insulating portion 15.
Thus, by covering the periphery of the conductive metal layer pattern with a curable resin having strong adhesion to the conductive metal layer pattern, the moisture absorption resistance of the semiconductor device is improved and the insulation reliability of the semiconductor device is improved. I can plan. In addition, since the conductive metal layer pattern is excellent in prevention of falling off from the semiconductor device, the plating thickness of the conductive metal layer pattern can be reduced, the semiconductor device can be further thinned, and the conductive metal layer pattern can be further reduced. Miniaturization is possible.
The exposed portion of the semiconductor element mounting member according to the present invention is preferably substantially flat. When the portion is substantially flat, mounting of a semiconductor element or electrical connection using a conductive wire is facilitated.
Moreover, the member for mounting a semiconductor element according to the present invention has a pedestal-shaped convex portion having a substantially flat surface on the inner surface rather than the outermost periphery on the surface opposite to the peelable substrate side of the conductive metal layer pattern. It is preferable to have.
In the embodiment shown in FIGS. 6 (k) and 6 (k ′), the carrier substrate 37 is composed of the peelable substrate 11 and the pressure-sensitive adhesive layer 12, but the peelable substrate 11 itself is sticky. In some cases, the pressure-sensitive adhesive layer 12 is not always necessary. Therefore, in the present invention, the carrier substrate 37 means the release substrate 11 itself when it does not have the pressure-sensitive adhesive layer 12, and adheres on the release substrate 11 when it has the pressure-sensitive adhesive layer 12. What has the agent layer 12 is said.

(Peelable substrate)
The peelable substrate 11 has a sufficient adhesion to the conductive metal layer pattern formed thereon and the curable resin constituting the insulating portion in the process of manufacturing the semiconductor device, and peels off when peeling. It is required to be easy to do. In particular, in the reflector member installation step and the reflector member curing step, which will be described later, the thermal history is usually about 150 ° C. for about 30 minutes, and the sealing resin curing step is usually at least at a high temperature of 150 ° C. or higher. Although it receives a heat history of 10 minutes or more, it is necessary to peel the peelable substrate even after receiving such a heat history. For this purpose, the peelable substrate needs to have an appropriate adhesion strength to the conductive metal layer pattern formed thereon and the curable resin constituting the insulating portion.
In the present invention, the adhesiveness of the peelable substrate (including the pressure-sensitive adhesive layer provided as necessary) is such that the adhesion strength of the conductive metal layer pattern to the peelable substrate is 90 ° peel strength at 25 ° C. 0.05 to 5 kN / m, and more preferably 0.1 to 3 kN / m.
Here, the measurement of 90 degree peel strength at 25 ° C. is based on the JIS Z 0237 90 degree peeling method. Specifically, at 25 ° C., 270 to 330 mm per minute, preferably every hour. The 90-degree peel strength when the peelable substrate is peeled off at a speed of 300 mm can be measured. For example, a 90-degree peel tester (manufactured by Tester Sangyo) can be used.

The material of the peelable substrate in the present invention is not particularly limited as long as it has the above-described peelability, and examples thereof include a plate made of glass, plastic, a plastic film, a plastic sheet, and a metal sheet. .
As the glass, glass such as soda glass, non-alkali glass, and tempered glass can be used.

  Plastics include polystyrene resin, acrylic resin, polymethyl methacrylate resin, polycarbonate resin, polyvinyl chloride resin, polyvinylidene chloride resin, polyethylene resin, polypropylene resin, polyimide resin, polyamide resin, polyamideimide resin, polyetherimide resin. , Polyether ether ketone resin, polyarylate resin, polyacetal resin, polybutylene terephthalate resin, polyethylene terephthalate resin, polyethylene naphthalate resin and other thermoplastic polyester resins, cellulose acetate resin, fluororesin, polysulfone resin, polyethersulfone resin, poly Thermoplastic resins such as methylpentene resin, polyurethane resin, diallyl phthalate resin, epoxy resin, phenol resin, melamine resin Include thermosetting resins such as urea resins.

Moreover, as a metal used for a metal sheet, metals, such as copper, aluminum, stainless steel, nickel, iron, titanium, and these alloys (42 alloy etc.) are mentioned. Among these, stainless steel (SUS) is preferable, and various stainless steels such as austenite, ferrite, and martensite can be suitably used. Further, when the material constituting the conductive metal layer pattern is copper, SUS304, which is an austenitic stainless steel, is particularly preferable because its linear expansion coefficient is almost equal to copper (SUS304 linear expansion coefficient: 17.3). × 10 ⁻⁶ / K). This is because if the linear expansion coefficients are the same, distortion hardly occurs even when the thermal history is received.

  Although there is no restriction | limiting in particular about the thickness of a peelable base material, 10 micrometers-1 mm are preferable. When the thickness is 10 μm or more, when the semiconductor element mounting member is manufactured by a roll-to-roll method, it is advantageous in terms of handling in the transport process. On the other hand, when it is 1 mm or less, curling is unlikely to occur on the base material, and curling is difficult to occur in the case of a roll product. From the above viewpoint, the thickness of the peelable substrate is more preferably 20 μm to 0.5 mm. Further, when it is necessary to transport in a single wafer form, the peelable substrate is required to have a certain degree of rigidity, and therefore, the thickness of the substrate is more preferably 50 μm or more.

In order to reduce the warp after the peelable substrate is attached with the conductive metal layer pattern, the rate of change in the amount of shrinkage before and after receiving the thermal history in the sealing step is preferably 1% or less, More preferably, it is 0.1% or less. The linear expansion coefficient at 20 to 200 ° C. is preferably 3.0 × 10 ⁻⁵ / K or less, more preferably 2.5 × 10 ⁻⁵ / K or less. It is more preferably 0 × 10 ⁻⁵ / K or less, and particularly preferably equal to or substantially equal to the linear expansion coefficient of the conductive metal constituting the conductive metal layer pattern. From the viewpoint of the coefficient of linear expansion, selecting the metal material as the material of the peelable substrate makes it easy to bring the coefficient of linear expansion between the peelable substrate and the conductive metal layer pattern close, and the semiconductor element according to the present invention This is advantageous in that the warp of the wiring substrate for mounting connection can be reduced.
Further, the peelable base material may be subjected to slits, grooves, and corrugations in order to alleviate the warpage of the base material when manufacturing the semiconductor element mounting member or the semiconductor device.

(Adhesive layer)
Although the said peelable base material needs to have moderate adhesiveness and peelability, in other words, it needs to have moderate adhesiveness. For that purpose, the material constituting the peelable substrate itself may have the necessary adhesiveness, but an appropriate pressure-sensitive adhesive layer 12 is laminated on the peelable substrate 11 to provide appropriate tackiness. May be. Thus, when a peelable base material has an adhesive layer, an adhesive layer is also peeled with a peelable base material by the peeling process of the peelable base material mentioned later. Therefore, it is preferable that the peelable substrate has sufficiently high adhesion to the pressure-sensitive adhesive. This is because when the adhesiveness is low, only the peelable substrate is peeled while leaving the pressure-sensitive adhesive layer when the peelable substrate is peeled off in the process of manufacturing the semiconductor device described later.

  As a material used for the pressure-sensitive adhesive layer, a thermoplastic resin, a thermosetting resin, a resin that is cured by irradiation with active energy rays (hereinafter referred to as “active energy ray-curable resin”), or the like can be used. The active energy ray-curable resin can be used in combination with curing by heat. The thermoplastic resin, thermosetting resin, and active energy ray curable resin preferably have a weight average molecular weight of 500 or more. This is because when the molecular weight is 500 or more, sufficient cohesive strength of the resin is ensured and sufficient adhesion to the metal can be obtained. Hereinafter, the material used for an adhesive layer may be described as an adhesive.

  Examples of the thermoplastic resin used for the adhesive layer include natural rubber, polyisoprene, poly-1,2-butadiene, polyisobutene, polybutene, poly-2-heptyl-1,3-butadiene, and poly-2-t-butyl-1. (Di) enes such as 1,3-butadiene and poly-1,3-butadiene; polyethers such as polyoxyethylene, polyoxypropylene, polyvinyl ethyl ether, polyvinyl hexyl ether and polyvinyl butyl ether; polyvinyl acetate and polyvinyl propio Polyesters such as Nate; polyurethane; ethyl cellulose; polyvinyl chloride; poly (meth) acrylonitrile; polysulfone; polysulfide; phenoxy resin; polymethyl (meth) acrylate, polyethyl (meth) acrylate, polyisopropyl (meth) acrylic , Polybutyl (meth) acrylate, poly-t-butyl (meth) acrylate, poly-2-ethylhexyl (meth) acrylate, poly-3-ethoxypropyl (meth) acrylate, polyoxycarbonyltetra (meth) acrylate, polydodecyl (Meth) acrylate, polytetradecyl (meth) acrylate, poly-n-propyl (meth) acrylate, poly-3,3,5-trimethylcyclohexyl (meth) acrylate, poly-2-nitro-2-methylpropyl (meth) ) Poly (meth) acrylic acid esters such as acrylate and poly-1,1-diethylpropyl (meth) acrylate can be used. The monomers constituting these polymers may be used as a copolymer obtained by copolymerization of two or more, if necessary, or may be used by blending two or more of the above polymers or copolymers. .

  Examples of the thermosetting resin used for the pressure-sensitive adhesive layer include natural rubber, isoprene rubber, chloroprene rubber, polyisobutylene, butyl rubber, halogenated butyl, acrylonitrile-butadiene rubber, styrene-butadiene rubber, polyisobutene, carboxy rubber, neoprene, and polybutadiene. Some are used in combination with a resin and a crosslinking agent. Cross-linking agents include sulfur, aniline formaldehyde resin, urea formaldehyde resin, phenol formaldehyde resin, ligrin resin, xylene formaldehyde resin, melamine formaldehyde resin, epoxy resin, urea resin, aniline resin, melamine resin, phenol resin, formalin resin, metal oxide Products, metal chlorides, oximes, alkylphenol resins, and the like can be used. In addition, for these purposes, additives such as general-purpose vulcanization accelerators can be used for the purpose of increasing the crosslinking reaction rate.

Examples of thermosetting resins that use a curing agent include resins having a functional group such as a carboxyl group, a hydroxyl group, an epoxy group, an amino group, and an unsaturated hydrocarbon group. As the curing agent, a curing agent having a functional group such as epoxy group, hydroxyl group, amino group, amide group, carboxyl group, thiol group, or metal chloride, isocyanate, acid anhydride, metal oxide, peroxide, etc. A curing agent is mentioned.
In addition, for the purpose of increasing the curing reaction rate, additives such as general-purpose catalysts can be used.
Specific examples include curable acrylic resin compositions, unsaturated polyester resin compositions, diallyl phthalate resin compositions, epoxy resin compositions, polyurethane resin compositions, and the like.

Examples of the active energy ray-curable resin used for the pressure-sensitive adhesive layer include materials in which an acrylic resin, an epoxy resin, a polyester resin, a urethane resin, or the like is used as a base polymer, and a radically polymerizable or cationically polymerizable functional group is added to each. . As radically polymerizable functional groups, there are carbon-carbon double bonds such as acryl group (acryloyl group), methacryl group (methacryloyl group), vinyl group, and allyl group. Among these, acryl group (acryloyl) having good reactivity. Group) is preferably used. Moreover, as a cationically polymerizable functional group, an epoxy group (glycidyl ether group, glycidylamine group) is typical, and a highly reactive alicyclic epoxy group is preferably used. Specific materials include acrylic urethane, epoxy (meth) acrylate, epoxy-modified polybutadiene, epoxy-modified polyester, polybutadiene (meth) acrylate, and acrylic-modified polyester.
As the active energy rays, ultraviolet rays, electron beams and the like are used. When the active energy ray is ultraviolet ray, known photosensitizers or photoinitiators added at the time of ultraviolet curing include known materials such as benzophenone series, anthraquinone series, benzoin series, sulfonium salts, diazonium salts, onium salts, and halonium salts. Can be used. In addition to the above materials, a general-purpose thermoplastic resin may be blended.

Furthermore, what can use thermosetting together with an active energy ray curable resin can be used, and the adduct of acrylic acid or methacrylic acid can be illustrated as a preferable thing.
As an adduct of acrylic acid or methacrylic acid, epoxy acrylate (n = 1.48 to 1.60), urethane acrylate (n = 1.5 to 1.6), polyether acrylate (n = 1.48 to 1) .49), polyester acrylate (n = 1.48 to 1.54), and the like. Here, n represents the number of added moles.
As an adduct of acrylic acid or methacrylic acid, urethane acrylate, epoxy acrylate, and polyether acrylate are excellent from the viewpoint of adhesiveness. As epoxy acrylate, 1,6-hexanediol diglycidyl ether, neopentyl glycol Diglycidyl ether, allyl alcohol diglycidyl ether, resorcinol diglycidyl ether, adipic acid diglycidyl ester, phthalic acid diglycidyl ester, polyethylene glycol diglycidyl ether, trimethylolpropane triglycidyl ether, glycerin triglycidyl ether, pentaerythritol tetraglycidyl ether And (meth) acrylic acid adducts such as sorbitol tetraglycidyl ether. Further, a polymer having a hydroxyl group in the molecule such as epoxy acrylate is effective for improving the adhesiveness. These copolymer resins can be used in combination of two or more as required.

  The pressure-sensitive adhesive may contain additives such as a crosslinking agent, a curing agent, a diluent, a plasticizer, an antioxidant, a filler, a colorant, an ultraviolet absorber, and a tackifier as necessary. Good.

  As a method for forming the pressure-sensitive adhesive layer on the peelable substrate, it is preferable in terms of production to apply the pressure-sensitive adhesive to the peelable substrate. The method for applying the pressure-sensitive adhesive is not particularly limited, and examples thereof include die coating, roll coating, reverse roll coating, gravure coating, bar coating, and comma coating.

  As for the thickness of an adhesive layer, 0.5-100 micrometers is preferable. When the thickness is 0.5 μm or more, sufficient adhesion can be obtained in the semiconductor device manufacturing process. On the other hand, when it is 100 μm or less, the adhesion does not become too high, and in particular, no problem occurs in peeling after the heat history. From the above viewpoint, the thickness of the pressure-sensitive adhesive layer is preferably 3 to 30 μm, and more preferably 5 to 20 μm.

Moreover, it is preferable that the linear expansion coefficient in 20-200 degreeC of the said adhesive layer (the adhesive layer after hardening | curing when using curable resin) is 3.0 * 10 < ^-5 > / K or less. 2.5 × 10 ⁻⁵ / K or less, more preferably 2.0 × 10 ⁻⁵ / K or less. Further, it is particularly preferable that the coefficient of linear expansion of the metal constituting the conductive metal layer pattern is equal to or substantially equal.

(Conductive metal layer pattern)
The material constituting the conductive metal layer patterns 13 and 14 provided on the carrier substrate 37 is not particularly limited as long as it has conductivity, and copper, gold, silver, aluminum, tungsten, nickel, iron, Examples thereof include conductive metals such as chromium.
Of these, copper is preferably used. By using copper, thermal conductivity can be increased, and heat dissipation with respect to heat generated by the semiconductor element can be improved. Copper is also advantageous in terms of price and availability. The conductive metal layer pattern is appropriately designed so as to be applied to a semiconductor device or a manufacturing process thereof.

The thickness of the conductive metal layer pattern is not particularly limited, but is preferably in the range of 3 to 150 μm. When the thickness is 3 μm or more, sufficient adhesion strength of the conductive metal layer pattern to the insulating portion in the semiconductor device can be obtained, and when the thickness is 150 μm or less, the metal layer pattern can be formed in a short time, from the viewpoint of material cost. Is also advantageous. From the above viewpoint, the thickness of the conductive metal layer pattern is more preferably 5 to 100 μm, and particularly preferably 10 to 50 μm.
As a method for forming the conductive metal layer pattern, it is preferable to use a transfer method. The transfer method will be described in detail later.

6 (k) and (k ′), the conductive metal layer pattern is the outermost peripheral portion of the metal layer pattern in a plan view from the metal layer pattern side of the semiconductor element mounting member of the present invention. However, it has a cross-sectional shape protruding from the portion where the metal layer pattern and the carrier substrate are in contact to the insulating portion side. In other words, it means that the cross-sectional shape is a reverse taper shape that widens in the direction opposite to the carrier substrate 37.
The conductive metal layer patterns 13 and 14 preferably have a pedestal-shaped convex portion 19 having a substantially flat surface on the inner side of the outermost periphery on the surface opposite to the carrier substrate 37 (FIG. 6 ( i ′)). By taking such a shape, the adhesion between the conductive metal layer pattern and the insulating portion is improved, and the peeling of the conductive metal layer pattern can be further suppressed when the peelable substrate is peeled off.
Moreover, in the aspect which has an adhesive layer, it is preferable that the conductive metal layer pattern is partially embedded in the adhesive layer. The burying amount is preferably 0.5 μm or more in the thickness direction. If it is 0.5 micrometer or more, when apply | coating curable resin etc. for forming an insulating part later, it can prevent that curable resin etc. ooze out under a conductive metal layer pattern. From the above viewpoint, the burying amount of the conductive metal layer pattern is more preferably 1 μm or more, and particularly preferably 3 μm or more. The upper limit of the burying amount is preferably 1 μm smaller than the thickness of the conductive metal layer pattern, more preferably 1/2 of the thickness of the metal layer pattern, and particularly 1/3 of the thickness of the metal layer pattern. preferable.
Moreover, it is preferable that the conductive metal layer pattern protrudes toward the peeling surface when the carrier substrate is peeled off. By taking such an embodiment, good thermal conductivity can be obtained.

(Insulation part)
The semiconductor element mounting member 10 of the present invention has an insulating portion 15 that covers at least the peripheral edge portion 17 of the conductive metal layer patterns 13 and 14 described above, and the insulating portion 15 is thermosetting and / or active energy ray cured. 6 (k) and FIG. 6 (k ′), the peripheral portion 17 of the conductive metal layer pattern is covered with the insulating portion 15 as shown in FIGS.
In particular, the insulating portion 15 surrounds not only the side surface portions of the conductive metal layer patterns 13 and 14 but also at least a part thereof around the upper portion of the conductive metal layer pattern (hereinafter sometimes referred to as “metal layer”). The peripheral edge portion 17 is covered.

As described above, the conductive metal layer patterns 13 and 14 partially have exposed portions. The size and arrangement of the exposed portions may be appropriately determined according to the purpose. For example, the conductive metal layer pattern on which the semiconductor element is mounted needs to be large enough to mount the semiconductor element. On the conductive metal layer pattern to be wire-bonded, it is sufficient that the conductive wire can be connected. As long as the area of the insulating portion covering the peripheral edge portion 17 is large within the range that satisfies these requirements, that is, the opening of the insulating portion on the conductive metal layer pattern can be made as small as possible. It is preferable from the viewpoint that can be suppressed.
The insulating part is preferably formed of a curable resin. For example, a liquid resin can be applied on the conductive metal layer pattern and cured by heating and / or active energy rays. The close contact with is strong.
As the insulating portion, various curable resins can be used, and among them, it is particularly preferable to use a thermosetting and / or active energy ray-curable solder resist. The solder resist can suppress the bleed-out of the silver paste used when placing the semiconductor element on the metal layer. In addition, when the reflector described later is mounted, the poor adhesion between the reflector and the metal layer can be eliminated by the presence of the solder resist. This improves the reliability as a semiconductor element mounting substrate.
Moreover, the aspect using the thermosetting and / or active energy ray hardening resin containing a titanium oxide is also a preferable aspect as an insulation part. By containing titanium oxide, the insulating portion can be whitened and the ability of the light emitting element can be further extracted. When a white solder resist is used, the visible light reflectance of the resist is preferably 60% or more.

(Metal plating layer)
When manufacturing the member for mounting a semiconductor element of the present invention, it is preferable to have a metal plating layer 16 of a metal type different from the conductive metal layer pattern on the conductive metal layer pattern. By having such a metal plating layer, the adhesion to the semiconductor element can be improved and wire bonding can be easily performed, which is advantageous in terms of workability.
As a material constituting the metal plating layer, a combination of nickel and gold is preferably used from the viewpoint of adhesion and electrical conductivity. Moreover, silver or palladium can also be used instead of gold.

(Semiconductor element mounting board)
The semiconductor element mounting substrate of the present invention includes a reflector on the above-described semiconductor element mounting member so as not to cover the exposed portion of the conductive metal layer pattern. The semiconductor element mounting substrate 20 is manufactured using the semiconductor element mounting member 10 described above, and includes a peelable substrate, an adhesive layer, a conductive metal layer pattern, an insulating portion, and a metal plating layer. Details are as described above.

(Reflector)
The semiconductor element mounting substrate 20 of the present invention includes a reflector 18 on a semiconductor element mounting member as shown in FIG. 6 (l) in order to effectively exhibit the function of the semiconductor element. When using an LED semiconductor element as a semiconductor element, the reflector reflects light emitted from the LED semiconductor element, thereby preventing light diffusion and obtaining a high amount of light.
It is important to provide the reflector 18 so as not to cover the exposed portion of the conductive metal layer pattern at the peripheral edge portion 17 of the conductive metal layer patterns 13 and 14. In the embodiment shown in FIG. 6 (l), since the metal plating layer 16 is provided on the conductive metal layer patterns 13 and 14, the metal layer plating 16 indicates the exposed portion.
As described above, by maintaining the exposed portion of the conductive metal layer pattern, in the conductive metal layer pattern on which the semiconductor element is mounted, a region for mounting the semiconductor element is secured, and the conductive metal for wire bonding is used. In the layer pattern, the area of the wire bonding portion is secured.

As a material constituting the reflector, a thermosetting resin or a thermoplastic resin is preferable, and as the thermosetting resin, an epoxy resin including a white pigment, ceramic powder, a polyimide resin, a urethane resin, an acrylic resin, a polycarbonate resin, A resin having excellent heat resistance is preferred. Examples of the thermoplastic resin include polyolefin, polystyrene, polyvinyl chloride, nylon resin and the like. Among these, a thermosetting resin is preferable, and a thermosetting resin excellent in heat resistance including a white pigment, ceramic powder, and the like is particularly preferable.
As a manufacturing method of the reflector, when a thermosetting resin is used, a transfer molding method is preferable, and when a thermoplastic resin is used, an injection molding method or the like is used. Further, after forming the reflector, the surface thereof may be further subjected to metal vapor deposition or metal plating.

Although there is no restriction | limiting in particular as a shape of a reflector, It is preferable to install in the shape and aspect which become a dam in the case of sealing with the sealing material mentioned later. The shape is preferably trapezoidal in cross section so as to expand toward the opening, and may be square or rectangular depending on the installation location.
Moreover, in the semiconductor element mounting substrate of the present invention, as shown in FIG. 6L, the reflector 18 is formed on the insulating portion 15 and does not directly contact the conductive metal layer pattern.
In addition, a reflector constitutes a side wall, a surface composed of the conductive metal layer pattern and the insulating portion of the semiconductor element mounting member constitutes a bottom surface, and two or more conductive metal layer patterns including an exposed portion in the bottom surface. It is preferable that the recess is formed by the side wall and the bottom surface. The recess is preferably bowl-shaped, and may be oval, square or rectangular.
In addition, when mounting a light emitting element like LED as a semiconductor element to mount, it is preferable to provide a reflector from the point of the reflection of light, but mounting semiconductor elements other than LED, for example, QFN ( When using as a substrate for semiconductor packages such as Quad Flat No-Lead (BGA), BGA (Ball Grid Array), LGA (Land Grid Array), CSP (Chip Size Package), etc. It can be set as the structure which does not provide a reflector.

In the semiconductor element mounting substrate 20 of the present invention, it is preferable that a part of the conductive metal layer pattern protrudes in the thickness direction after the carrier base material 37 is peeled off. The amount of protrusion is preferably 0.5 μm or more in the thickness direction. When the protruding amount is 0.5 μm or more, the adhesiveness of the solder is improved during mounting. From the above viewpoint, the protrusion amount is more preferably 1 μm or more, and particularly preferably 3 μm or more. On the other hand, the upper limit of the amount of protrusion is preferably 1 μm smaller than the thickness of the metal layer.
In order to make mounting easier, it is preferable to provide exterior platings 24 and 24 '(FIG. 7 (o)). This is because the conductive metal layer pattern is protected by the exterior plating. As the exterior plating, tin plating or gold plating is usually performed, and as these platings, either electrolytic plating or electroless plating can be applied. In addition, exterior plating can also be performed after the dicing demonstrated below.

(Semiconductor device)
As shown in FIG. 6 (m), the semiconductor device 40 of the present invention includes a semiconductor element mounting member, a semiconductor element 21, and a sealing member 23. The semiconductor element mounting member forms an outer surface, The semiconductor element 21 is placed on the semiconductor element mounting member, and the sealing member 23 seals the semiconductor element 21. The semiconductor element 21 is usually bonded to a semiconductor element mounting member via a die bond material (not shown) as will be described in detail later.
The semiconductor element mounting member has the conductive metal layer patterns 13 and 14 and the insulating portion 15 on the carrier substrate 37, and the metal layer pattern has at least a peripheral portion so as to partially have an exposed portion. 17 is covered with the insulating portion 15, and the outermost peripheral portion of the metal layer pattern in a plan view from the metal layer pattern side of the semiconductor element mounting member is more than the portion where the metal layer pattern is in contact with the carrier substrate. It has a cross-sectional shape protruding to the insulating part side.
In the embodiment shown in FIG. 6 (m), the reflector 18 is provided on the semiconductor element mounting member, and the conductive wire 22 is arranged on the semiconductor element 21.
The carrier substrate 37 includes the peelable substrate 11 and the pressure-sensitive adhesive layer 12, and includes the conductive metal layer patterns 13 and 14 and the insulating portion 15 via the pressure-sensitive adhesive layer 12. A metal plating layer 16 is provided on each metal layer pattern. The insulating portion 15 is made of a thermosetting and / or active energy ray-curable solder resist, and at least a part of the peripheral edge portion 17 of the conductive metal layer pattern is covered with an insulating portion made of a curable resin. preferable.

In the semiconductor device 40, as shown in FIG. 6 (m), it is preferable that a region where a sealing material is to be injected is surrounded by a reflector 18 when sealing, but a dam portion (for example, instead of the reflector) Or a sealing material, a resist material, or a molded product) may be provided so as to surround a region where the sealing material is to be injected.
As the sealing material constituting the sealing member 23, a transparent resin is preferable, and transparent materials such as an epoxy resin, a polyimide resin, a urethane resin, an acrylic resin, a polycarbonate resin, and a silicone resin are used, and these resins are used in combination. It may also contain fillers such as glass, silica and titanium oxide, coupling agents, curing accelerators, antioxidants and the like.

The semiconductor device 40 of the present invention includes the semiconductor element mounting member 10, the semiconductor element 21, and the sealing member 23 of the present invention as shown in FIGS. 7 (p), (q), and FIGS. The semiconductor element mounting member 10 forms an outer surface, the semiconductor element 21 is placed on the semiconductor element mounting member 10, and the sealing member 23 seals the semiconductor element.
Here, various semiconductor elements 21 can be used. In the present invention, LED semiconductor elements are preferably used. Further, as an electrical connection method between the semiconductor element and the conductive metal layer pattern, there is a flip-chip method in addition to a method using the conductive wire 22 made of a gold wire or the like.
The semiconductor element 21 and the conductive metal layer pattern 13 are usually bonded via a die bond material 25. A conductive bonding agent can be used as the die bond material 25 so as to be conductive. Examples of such a bonding agent include silver paste using epoxy resin, polyimide resin, silicone resin, polyurethane resin, liquid crystal resin, etc .; conductive adhesive such as Ni paste or carbon paste: eutectic bonding sheet such as gold preform There is solder. On the other hand, the semiconductor element 21 and the conductive metal layer pattern 13 can be joined by an adhesive such as an epoxy adhesive, and conduction with the other conductive metal layer pattern can be performed by wire bonding.
In addition, in the drawing of FIG. 6 (m), the semiconductor elements 21 are mounted side by side at an appropriate interval in a direction perpendicular to the paper surface. The pitch interval of the semiconductor 21 is preferably 100 to 5000 μm, and more preferably 300 to 5000 μm.
Note that the semiconductor device shown in FIGS. 7 (p) and 7 (q) has a reflector 18, and FIG. 14 shows a case without a reflector. FIG. 15 shows a mode in which the semiconductor element 21 does not have a reflector and is connected to a plurality of other conductive metal layer patterns. FIG. 16 shows another conductive metal without using a conductive wire. The aspect connected to the layer pattern is shown.
As shown in FIG. 7, the semiconductor device is formed by peeling the carrier base material and providing outer layer platings 24 and 24 ′ as necessary, and then dicing or cutting, or after dicing, outer layer platings 24 and 24 ′. Is used. This dicing is performed so as to divide the reflector in the direction perpendicular to and parallel to the paper surface and the metal layer therebelow if there is a reflector serving as a dicing unit.
In this way, the obtained semiconductor device 40 is mounted on a semiconductor device mounting wiring board 50 (including a mother board and a multilayer wiring board) and used for end use (or further downstream products) (FIG. 8). .

(Method for manufacturing semiconductor element mounting member)
The manufacturing method of the member for mounting a semiconductor element of the present invention includes a process by a transfer method, and specifically includes the following processes.
(A) Step of forming a resist pattern on the conductive substrate (b) Step of providing an insulating layer on the entire surface of the conductive substrate including the resist pattern (c) Removing the resist and the insulating layer on the resist to form a mask pattern (D) A step of forming a metal layer pattern by a plating method on the removed portion of the insulating layer and obtaining a conductive substrate having the metal layer pattern (e) ) The pressure-sensitive adhesive layer side of the carrier base material comprising the peelable base material and the pressure-sensitive adhesive layer is pressed against the metal layer pattern side of the conductive base material having the metal layer pattern, and then the conductive base material for plating. (F) providing a solder resist opening on the metal layer pattern, wherein at least part of the edge of the metal layer pattern is the solder layer. A step of forming a solder resist layer patterned so as to be covered with a resist on the metal layer pattern side of the carrier substrate (g) a step of plating a metal species different from the metal layer pattern on the exposed metal layer pattern ( h) A step of placing a semiconductor element on any of the metal layer patterns plated with the metal species in the previous step (i) A step of electrically connecting the semiconductor element and another metal layer pattern plated with the metal species ( j) Step of integrating the semiconductor element, the metal layer pattern, the part electrically connected in the previous step, and the solder resist with a sealing material (k) The carrier substrate is peeled off and the exposed surface of the metal layer pattern is plated And dicing into individual pieces, or (k ′) peeling the carrier base material, dicing into individual pieces, and then plating the exposed surface of the metal layer pattern here The step by the transfer method is a step of obtaining a conductive substrate for plating (step c), a step of forming a metal layer pattern by a plating method on this (step d), the metal layer as a peelable substrate and necessary The process (e process) which mainly transfers to the base material (carrier base material 37) which has the adhesive layer provided according to it is pointed out.
By using the transfer method, as shown in FIGS. 6 (k) and (k ′), the outermost peripheral portion of the conductive metal layer pattern has the conductive metal layer pattern and the carrier substrate. And the exposed portion of the conductive metal layer pattern is formed on the inner side of the outermost periphery of the conductive metal layer pattern. There is an effect that it becomes difficult to drop off from the part. In addition, since the surface of the conductive metal layer pattern on the side without the peelable substrate can be substantially flattened, it is easy to mount the semiconductor element and wire bonding and to obtain high connection reliability.
In addition, although the conductive metal pattern is connected to one by the connecting metal layer, the metal layer pattern is separated by a dicing process, and at least two or more conductive metal layer patterns are formed in one semiconductor device. It is arranged to have.

Next, the plating base material will be described with reference to FIG.
In the conductive base material 30 for plating, an insulating layer 33 is formed on the surface of the conductive base material 31, and a concave portion 32 (plating forming portion) opened to form plating is formed together with the insulating layer. ing. It is necessary that the conductive material is exposed on the bottom surface of the concave portion, and it is preferable that the concave portion has a wide shape in the opening direction.

  The conductive material used for the conductive substrate 31 is not particularly limited as long as it has sufficient conductivity for depositing a metal on the exposed surface by electrolytic plating, and a metal is particularly preferable. . In addition, the conductive base material has a low adhesive force with the metal layer formed on the surface so that the metal layer formed by electrolytic plating on the surface can be transferred to the transfer base material. It is preferable that it can be peeled off. As the material for such a conductive substrate, stainless steel, chrome-plated cast iron, chrome-plated steel, titanium, titanium-lined material, nickel and the like are preferable. Particularly preferred is a material whose surface is coated with a conductive inorganic material.

Examples of the shape of the conductive substrate 31 include a sheet shape, a plate shape, a roll shape, and a hoop shape. In the case of a roll, a sheet or plate attached to a rotating body (roll) may be used. In the case of a hoop shape, a configuration in which rolls are installed at two to several locations inside the hoop and a hoop-shaped conductive base material is passed through the roll can be considered. Since it is possible to continuously produce a metal foil in both a roll shape and a hoop shape, the production efficiency is higher than that in a sheet shape or a plate shape, which is preferable.
In the case of obtaining a substrate with a conductor layer pattern as a roll while continuously peeling the pattern formed by electrolytic plating using the drum electrode, the metal is continuously deposited by electrolytic plating while rotating the drum electrode. In addition, since the deposited metal can be continuously peeled, the production efficiency can be dramatically improved.

  The thickness of the insulating layer 33 corresponds to the depth of the recess. The depth of the recess is also determined appropriately depending on the purpose because it is related to the thickness of the plating to be deposited, but the thickness of the insulating layer is usually preferably in the range of 0.1 to 100 μm. When the thickness of the insulating layer is 0.1 μm or more, pinholes are hardly generated in the insulating layer. On the other hand, the thickness of 100 μm or less is advantageous in terms of shortening the formation time of the insulating layer and reducing the cost. From the above viewpoint, the thickness of the insulating layer is more preferably in the range of 0.5 to 10 μm, and particularly preferably 1 to 7 μm.

The insulating layer 33 can be formed of a carbon thin film similar to diamond, that is, a so-called diamond-like carbon (DLC) thin film having insulating properties. The DLC thin film is particularly preferable because it is excellent in durability and chemical resistance.
Further, the insulating layer can be formed of an inorganic material such as an inorganic compound such as Al ₂ O ₃ or SiO ₂ .

  The shape of the recess or the insulating layer is appropriately determined according to the purpose, but corresponds to the conductive metal layer pattern.

An example of the conductive substrate for plating according to the present invention will be described with reference to the drawings.
FIG. 1 is a partial perspective view showing an example of a conductive substrate for plating according to the present invention. 2 is an end view taken along the line AA ′ of FIG. 1 (end view of the AA ′ section), and FIG. 3 is an end view of BB ′ (BB ′ section of FIG. 1). ) Shows an end view when cut at. FIG. 3A shows a case where the side surface of the recess is flat, while FIG. 3B shows a case where the side surface of the recess has gentle unevenness.
In the conductive base material 30 for plating, an insulating layer 33 is laminated on a conductive base material 31, and a recess 32 is formed in the insulating layer 33. The bottom of the recess 32 may be a conductive layer in which the conductive base material 31 is exposed or connected to the conductive base material.
In this example, the pattern composed of the insulating layer 33 and the recess 32 is repeated in the direction of BB ′ in FIG. 1, but the number of repetitions is appropriately determined. In addition, in the direction of AA ′ in FIG. 1, the insulating layer 33 or the recess 32 extends so as to have a predetermined length. There is no restriction | limiting in particular about the shape of the recessed part 32, According to the objective, it determines suitably. For example, the shape may be a groove shape (planar shape is linear, rectangular, or other shape), or the planar shape may be a rectangle such as a square, a circle, or a hole having another shape.
A conductive or insulating intermediate layer (not shown) may be laminated between the conductive substrate 31 and the insulating layer 33 for the purpose of improving the adhesiveness of the insulating layer 33 or the like. Or it is preferable that the side surface of the recessed part 32 has spread as a whole toward the opening direction. The size of the recesses (such as d at the opening and d ′ at the bottom in FIG. 3A) and the interval between the recesses are determined according to the purpose. If the conductive substrate for plating with d> d ′ is used, the deposited metal layer can be more easily separated from the conductive substrate for plating.

  In addition, it is preferable that one side of the concave portion 32 is opposite to the opposite side, and a portion perpendicular to the bottom surface does not have a portion that continues for 1 μm or more in the height direction. If it is such a conductive substrate for plating, after plating using it, when peeling the deposited metal layer from the conductive substrate for plating, friction between the metal layer and the insulating layer or The resistance can be reduced, and the peeling becomes easier.

  The side surface of the recess is not necessarily a flat surface. In this case, as shown in FIG. 3B, the gradient α is determined by the height h of the recess (in this drawing, the thickness of the insulating layer) and the width s of the side surface of the recess (the recess in the horizontal direction). ), And α is determined by the following equation.

[Equation 1]
tan α = h / s

α is preferably 30 ° or more and less than 90 °, more preferably 30 ° or more and 80 ° or less, and particularly preferably 30 ° or more and 60 ° or less. If this angle is small, the production tends to be difficult, and if it is large, the resistance increases when the metal layer (metal layer pattern) formed by plating in the concave portion is peeled off or transferred to the carrier substrate. Tend.

  Moreover, the depth of the opening 32 in the conductive substrate for plating of the present invention is adjusted by the thickness of the insulating layer, and is preferably 0.1 to 100 μm, more preferably 0.1 to 20 μm. Preferably, it is 0.5-10 micrometers, and it is especially preferable that it is 1-7 micrometers.

  As a preferred method for producing the conductive substrate for plating in the present invention, an insulating layer is formed on the surface of the conductive substrate so that a specific conductive metal layer pattern is drawn by the recesses exposing the conductive substrate. Forming. As a method for forming the insulating layer, there are a method using a photoresist and a patterning method using a laser beam.

An example of the manufacturing method of the electroconductive base material 30 for plating in this invention is demonstrated using FIG.
A photosensitive resist layer (photosensitive resin layer) 34 is formed on the conductive substrate 31 (FIG. 4A). The photosensitive resist layer 34 is patterned by applying a photolithographic method to the photosensitive resist layer (photosensitive resin layer) 34 of the laminate (FIG. 4B). Patterning is performed by placing a photomask on which a pattern has been formed on the photosensitive resist layer 34, exposing it, developing it, removing unnecessary portions of the photosensitive resist layer 34, and leaving protrusions 39. Done. The shape of the protrusion 39 and the convex pattern formed therefrom are considered to correspond to the concave 32 on the conductive substrate 31 and the pattern.

Next, the process of removing the convex pattern to which the insulating layer is attached will be described. In a state where the insulating layer 33 is attached (FIG. 4C), the convex pattern composed of the protrusions 39 is removed (FIG. 4D).
A commercially available resist stripping solution, inorganic, organic alkali, organic solvent, or the like can be used to remove the resist to which the insulating layer is attached. In addition, if there is a dedicated stripping solution corresponding to the resist used to form the pattern, it can be used. Further, there is a method of removing using ultrasonic waves.
As a peeling method, for example, it is possible to remove the resist after it has been swelled, broken or dissolved by immersion in a chemical solution. In order to sufficiently impregnate the resist with the solution, techniques such as ultrasonic waves, heating, and stirring may be used in combination. In addition, the liquid can be applied with a shower, a jet or the like in order to promote peeling, and can be rubbed with a soft cloth or cotton swab.
In addition, when the heat resistance of the insulating layer is sufficiently high, a method of baking at a high temperature to carbonize the resist and removing it, or irradiating with a laser to burn off can be used.
As the stripping solution, for example, a 3% NaOH solution is used, and showering or dipping can be applied as the stripping method.

  As the plating method in the present invention, a known method can be employed. Specifically, an electrolytic plating method, an electroless plating method, and other plating methods can be applied.

As a metal that appears or precipitates by plating, conductive metals such as silver, copper, gold, aluminum, tungsten, nickel, iron, and chromium are used, but the volume resistivity (specific resistance) at 20 ° C. is used. It is desirable to include at least one kind of metal of 20 μΩ · cm or less. Such metals include silver (1.62 μΩ · cm), copper (1.72 μΩ · cm), gold (2.4 μΩ · cm), aluminum (2.75 μΩ · cm), tungsten (5.5 μΩ · cm). ), Nickel (7.24 μΩ · cm), iron (9.0 μΩ · cm), chromium (17 μΩ · cm, all values at 20 ° C.), etc., but are not particularly limited thereto. If possible, the volume resistivity is more preferably 10 μΩ · cm, and further preferably 5 μΩ · cm.
Of the above metals, it is most preferable to use copper in consideration of the fact that the thermal conductivity can be increased in the semiconductor device and the price and availability of the metal. These metals may be used alone, or may be an alloy with another metal or a metal oxide for imparting functionality. However, from the viewpoint of conductivity, it is preferable that a metal having a volume resistivity of 20 μΩ · cm or less is contained in the largest amount as a component.

  The thickness (plating thickness) of the metal layer formed by plating on the plating forming portion of the conductive substrate is appropriately determined according to the purpose. The plating thickness is preferably 3 μm or more, more preferably 5 μm or more in order to reduce the possibility of pinholes being formed in the conductor layer, and in order to exhibit sufficient volume resistivity. The thickness is particularly preferably 10 μm or more. Moreover, since the formed metal layer will spread also in the width direction when the plating thickness is too large, the plating thickness is appropriately adjusted according to the purpose.

  The degree of plating is performed so that the deposited metal layer protrudes from the recess. As a result, the metal layer on the electroconductive substrate for plating is used as the transfer substrate (peelable substrate) so that the maximum width portion in the cross-sectional shape is not buried in the transfer substrate (peelable substrate). Can be transferred. The thickness of the metal protruding from the recess is preferably 5 to 50 μm (FIG. 5 (f ′)).

FIG. 5 is a cross-sectional view showing an example of manufacturing a semiconductor element mounting member.
Through the above-described plating step, plating is performed in the plating forming portion (recess 32) of the conductive base material 30 for plating having the insulating layer 33 on the conductive base material 31 to form the metal layer pattern 36 (FIG. 5). (E)).
The metal layer pattern 36 forms a metal layer by plating on the plating formation portion (recess 32). The plating is plated so as to overflow from the plating formation portion (recess 32), and FIG. As shown in FIG. 2, the insulating layer 33 is deposited so as to cover it. This is because the plating grows almost isotropically, so that the deposition of the plating starting from the exposed portion of the conductive base material is deposited so as to overflow from the recess and cover the insulating layer as it progresses.

Next, a carrier base material 37 (transfer base material) in which the adhesive layer 12 is separately laminated on the peelable base material 11 is prepared, and the plating conductive base material 30 on which the metal layer pattern 36 is formed. Preparation for pressure-bonding the carrier base material 37 toward the pressure-sensitive adhesive layer 12 is performed (FIG. 5F).
Subsequently, the carrier base material 37 is pressure-bonded to the conductive base material 30 for plating on which the metal layer pattern 36 is formed with the pressure-sensitive adhesive layer 12 facing (FIG. 5G). At this time, it is preferable not to embed all of the reverse taper-shaped portion of the metal layer pattern 36 having a reverse taper shape whose cross-sectional shape extends in the direction opposite to the peelable substrate 11 in the adhesive layer 12. In some cases, the pressure-sensitive adhesive layer 12 may contact the insulating layer 33.
Next, when the carrier substrate 37 is peeled off, the metal layer pattern 36 adheres to the pressure-sensitive adhesive layer 12 and is peeled off from the plating forming portion of the plating conductive substrate 30 and transferred to the carrier substrate. As a result, the semiconductor element mounting member 10 that can be said to be a base material with a conductor layer pattern is obtained (FIG. 5H). Here, the conductive metal layer patterns 13 and 14 have a pedestal-shaped convex portion 19 having a substantially flat surface on the inner side of the outermost periphery on the surface opposite to the peelable substrate 11.

  The pressure-sensitive adhesive layer 12 used for the carrier base material 37 may be a conventionally known one. However, when it is composed of a light / heat combination curable resin, it is obtained by transferring the metal layer pattern 36 to the carrier base material. It is preferable to use a method of irradiating the semiconductor element mounting member with active energy rays from the peelable substrate side and curing the pressure-sensitive adhesive layer on the portion irradiated with the active energy rays. The pressure-sensitive adhesive between the conductive metal layer pattern and the peelable substrate has adhesiveness in an uncured or partially cured state, and the curable resin and the conductive metal layer pattern are formed during the subsequent formation of the insulating portion. It is effective in preventing undesired intrusion between the peelable substrates. After the transfer, the pressure-sensitive adhesive layer is sufficiently cured by heating to reduce the pressure-sensitive adhesiveness or to eliminate the pressure-sensitive adhesiveness, thereby improving workability such as a peeling step of the peelable substrate.

Next, as shown in FIG. 6 (i), the semiconductor element mounting member 10 of the present invention has a curability such as a solder resist on the surface of the conductive metal layer patterns 13 and 14 formed of plated copper or the like. By applying a resin and patterning using a photo method, a screen printing method, or the like, at least a part of the conductive metal layer patterns 13 and 14 is exposed (FIG. 6J).
Next, as shown in FIG. 6 (k), the semiconductor element mounting member 10 is obtained by sequentially performing nickel plating and gold plating on the surfaces of the conductive metal layer patterns 13 and 14 formed of plated copper or the like. It is preferable to prepare so that the metal plating layer 16 is formed and wire bonding performed later is easily performed. The gold plating may be palladium plating or silver plating.

Next, as shown in FIG. 6 (l), the reflector 18 is installed as necessary to manufacture the semiconductor element mounting substrate 20 of the present invention. The material and shape used for the reflector are as described above. Here, in order to improve the adhesion between the solder resist and the reflector, it is preferable to perform plasma treatment on the surface of the solder resist before molding the reflector. The plasma treatment increases the number of polar groups on the surface of the solder resist, thereby increasing the activity and improving the adhesion with the reflector.
When there is no reflector, plasma treatment can be performed before wire bonding, and the sealing material can be molded as it is after wire bonding.

(Method for manufacturing semiconductor device)
The semiconductor device 40 mounts the semiconductor element 21 such as an LED semiconductor element on a portion (die pad portion) where the exposed portion of the conductive metal layer pattern of the semiconductor element mounting substrate 20 obtained in FIG. FIG. 6 (m)). The die pad portion is provided in a region surrounded by the reflector member.
Further, a predetermined position of the wire bonding portion on the conductive metal layer pattern 14 adjacent to the semiconductor element 21 is wire-bonded by the conductive wire 22 (FIG. 6 (m)).
As shown in FIG. 7, the semiconductor device 40 of the present invention usually peels off the carrier base material 37 (FIG. 7 (n)), is provided with exterior plating 24 and 24 ′ (FIG. 7 (o)), and is diced. It is used after being separated into individual pieces (FIG. 7 (q)). Moreover, after peeling the carrier base material 37 from a semiconductor element mounting substrate and dicing, outer layer plating 24 and 24 'may be provided, and the order is not ask | required.

As shown in FIG. 8, the semiconductor device 40 obtained as described above is mounted on the semiconductor device mounting wiring board 50 by soldering to produce a semiconductor device mounting wiring board 60. .
FIG. 8R shows a state immediately before the semiconductor device 40 is mounted on the mother board 51. A part of the wiring board for mounting a semiconductor device is shown. Conductor wirings 52 and 52 'are applied to the board body (excluding the wiring layer on the surface), and solders 53 and 53' are placed thereon. ing. The protruding metal layer portions of the semiconductor device 40 are soldered with solder pastes 53 and 53 ′, respectively. The result is as shown in FIG. 8 (s), and the solders 53 and 53 ′ connected to the metal layer portion of the semiconductor device 40 adhere so as to cover the protruding portion of the metal layer portion. For this reason, in the semiconductor device mounting wiring board obtained by soldering, the semiconductor device 40 is firmly coupled onto the wiring board 50 against the shearing force in the surface direction of the wiring board.
The connection between the semiconductor device and the wiring board for mounting the semiconductor device may be a method in which electric solder plating is performed instead of the solder paste and the solder is reflowed.

Next, the shape of the conductive metal layer pattern transferred to the peelable substrate will be described with reference to FIGS. 9 to 13 are plan views seen from the conductive metal layer pattern side.
9 to 13, the hatched portion indicates the conductive metal layer pattern, and the region surrounded by the dotted line portion indicates a region (semiconductor device region) that becomes one semiconductor device. By increasing the conductive metal layer pattern in the semiconductor device region as much as possible, the length of the outer peripheral portion of the conductive metal layer pattern is increased in the semiconductor device, and the conductive metal layer is increased by increasing the contact area with the insulating portion. Improves prevention of pattern falling off from semiconductor device. Further, the conductive metal layer pattern in the semiconductor device region is not connected to the conductive metal layer pattern in the same semiconductor device region, and the conductive metal layer pattern in the adjacent semiconductor device region is in the semiconductor device region. Are connected by metal layers (connected metal layers) having different widths of the conductive metal layer pattern. The following effects can be expected from the connecting metal layer.
(1) When transferring the conductive metal layer pattern formed by plating on the conductive substrate for plating to the peelable substrate along the direction in which the connecting metal layer is formed, transfer the conductive metal layer pattern. Leakage can be prevented.
(2) Since it is connected by a connecting metal layer, electroplating can be performed efficiently.
When the thick connection metal layer in FIG. 11 is separated into individual semiconductor device regions surrounded by a dotted line portion, the end surface of the thick connection metal layer is exposed at the end surface of the semiconductor device. It is possible to satisfactorily confirm the wet state of the solder when connected to the device mounting wiring board.
Here, the necessary minimum width of the connecting metal layer is preferably 100 μm or less, more preferably 80 μm or less, and further preferably 60 μm or less.

Further, in the present invention, a rotating body (roll) can be used as the electroconductive substrate for plating used, and further details thereof will be described. The rotating body (roll) is preferably made of metal. Furthermore, it is preferable to use a drum electrode or the like used in the drum-type electrolytic deposition method as the rotating body. As described above, the material that forms the surface of the drum electrode may be a material with relatively low plating adhesion, such as stainless steel, chrome-plated cast iron, chrome-plated steel, titanium, or titanium-lined material. preferable. By using a rotating body as the conductive base material, it is possible to obtain a base material with a conductor layer pattern as a roll, and in this case, productivity is greatly increased.
The process of obtaining a substrate with a conductor layer pattern as a scroll while continuously peeling the pattern formed by electroplating using a rotating body, and the drum electrode as a conductive substrate, As a device for continuously depositing metal by electrolytic plating while rotating and stripping the deposited metal continuously, the method and device described in International Publication WO2008 / 081904 can be used.

Example 1
(Formation of convex resist pattern)
A resist film (Photech RY3315, 15 μm thickness, manufactured by Hitachi Chemical Co., Ltd.) was bonded to one side of a 150 mm square stainless steel plate (SUS316L, # 400 polished finish, thickness 500 μm, manufactured by Nisshin Steel Co., Ltd.). The bonding conditions were a roll temperature of 105 ° C., a pressure of 0.5 MPa, and a line speed of 1 m / min.
Next, a negative film having a predetermined pattern specification was placed on a resist film bonded to a stainless steel plate, and ultraviolet rays were irradiated at 250 mJ / cm ² under a vacuum of 600 mmHg or less using an ultraviolet irradiation device. Furthermore, it developed with 1 mass% sodium carbonate aqueous solution, and the pattern-like resist film (thickness 10 micrometers) was obtained (refer FIG.4 (b)).

(Formation of insulating layer)
A DLC film was formed using a PBII / D apparatus (Type III, manufactured by Kurita Seisakusho Co., Ltd.). A stainless steel substrate with a resist film attached thereto was placed in the chamber, the inside of the chamber was evacuated, and the substrate surface was cleaned with argon gas. Next, hexamethyldisiloxane was introduced into the chamber, and an underlayer was formed to a thickness of 0.1 μm.
Subsequently, toluene, methane, and acetylene gas were introduce | transduced and the DLC layer was formed on the base layer so that a film thickness might be set to 5-6 micrometers (refer FIG.4 (c)).

(Formation of conductive substrate for plating)
The stainless steel substrate with the insulating layer attached was immersed in an aqueous sodium hydroxide solution (10%, 50 ° C.) and left for 8 hours with occasional rocking. The resist film and the DLC film formed thereon were peeled off. If there was a part that was difficult to peel off, the entire surface could be peeled off by lightly rubbing with a cloth (see FIG. 4D).
The shape of the recess was wider toward the opening direction, and the inclination angle of the side surface of the recess was the same as the angle of the boundary surface. The depth of the recess was 5 to 6 μm.

(Copper plating)
An adhesive film (Hitalex K-3940B, manufactured by Hitachi Chemical Co., Ltd.) was attached so that the surface (back surface) on which the pattern of the conductive substrate for plating obtained above was not formed was not plated. Electrolytic bath for electrolytic copper plating (copper sulfate (pentahydrate) 250 g / L, sulfuric acid 70 g / L, Cubelite AR), with the electroconductive substrate for plating with the adhesive film attached as the cathode and phosphorous copper as the anode The thickness of the metal layer deposited in the concave portion of the conductive base material for plating, immersed in 4 ml / L aqueous solution (30 ° C.) (supplied by Ebara Eugelite Co., Ltd.) and having a current density of 10 A / dm ² The plating was carried out until the thickness became approximately 35 μm. Plating was formed so as to overflow from the concave portion of the conductive base material for plating (see FIG. 5E).

(Preparation of composition for pressure-sensitive adhesive layer)
Into a 500 cm ³ three-necked flask equipped with a thermometer, a cooling tube, and a nitrogen introducing tube, the composition 1 described below is charged and heated to 60 ° C. with gentle stirring to initiate polymerization. While bubbling with nitrogen, stirring was performed at 60 ° C. for 8 hours under reflux to obtain an acrylic resin having a hydroxyl group in the side chain. Thereafter, 5 parts by mass of Karenz MOI (2-isocyanatoethyl methacrylate; manufactured by Showa Denko KK) is added and reacted at 50 ° C. with gentle stirring, and a reactive polymer having a photopolymerizable functional group in the side chain. A solution of 1 was obtained.
(Composition composition 1)
2-ethylhexyl methacrylate 70 parts by mass Butyl acrylate 15 parts by mass 2-hydroxyethyl methacrylate 10 parts by mass Acrylic acid 5 parts by mass Azobisisobutyronitrile 0.1 part by mass Toluene 60 parts by mass Ethyl acetate 60 parts by mass

The obtained reactive polymer 1 had a methacryloyl group in the side chain, and the weight average molecular weight in terms of polystyrene measured by gel permeation chromatography was 800,000.
To 100 parts by mass (solid content) of the solution 1 of the reactive polymer, 2-methyl-1 [4-methylthio] phenyl] -2-morpholinopropan-1-one (trade name Irgacure 907, Ciba Geigy ( 1 part by mass), 3 parts by mass of an isocyanate-based crosslinking agent (trade name Coronate L-38ET, manufactured by Nippon Polyurethane Co., Ltd.) and 50 parts by mass of toluene were obtained to obtain a composition for an adhesive layer. .

(Preparation of transfer substrate)
The obtained pressure-sensitive adhesive layer composition was applied to the surface of SUS304, which is a substrate material having a thickness of 50 μm and a 120 mm square, so that the film thickness after drying was 15 μm, and UV-cured on the substrate material. A transferable base material (carrier base material) was prepared by forming a pressure-sensitive adhesive layer. The drying condition was 80 ° C. for 10 minutes.

(Transfer of conductive metal layer pattern)
The substrate for transfer was bonded to the surface of the pressure-sensitive adhesive layer on the surface of the conductive substrate for plating subjected to copper plating using a roll laminator. Lamination conditions were a roll temperature of 30 ° C., a pressure of 0.3 MPa, and a line speed of 0.5 m / min. Next, when the transfer substrate (see FIG. 5G) bonded to the conductive substrate for plating was peeled off, the conductive metal layer pattern made of copper on the conductive substrate for plating was an adhesive layer. The structure transcribed into (1) was prepared (see the upper diagram of FIG. 5 (h)). Next, a PET film E-5100 (manufactured by Toyobo Co., Ltd.) having a thickness of 12 μm is applied to the surface of the resulting structure on which the conductive metal layer pattern is present at a roll temperature of 30 ° C., a pressure of 0.3 MPa, and a line speed of 0.5 m / Bonded in min. Furthermore, ultraviolet rays were irradiated at a dose of 1 J / cm ² from the surface where the conductive metal layer pattern was present.
A part of the base material on which the copper was transferred was cut out, and the cross section was observed on a scanning electron micrograph (magnification 2000 times). The conductive metal layer pattern was buried approximately 5 μm in the thickness direction in the adhesive.

(Production of insulation part)
First, a photosensitive liquid solder resist (manufactured by Taiyo Ink Co., Ltd., trade name: PSR-4000LEW3) is applied by screen printing to the entire surface of the structure on which the metal layer pattern is present, and the temperature is 80 ° C. for 25 minutes. The thickness after curing was 30 μm (see FIG. 6 (i)).
Next, a mask was attached for exposure, the unexposed portion was developed and removed, and an opening was provided (see FIG. 6 (j)). The opening size of the conductive metal layer pattern on which the LED semiconductor element is mounted is 500 × 500 μm with respect to the LED semiconductor element size of 300 × 300 μm, and the opening size of the conductive metal layer pattern for wire bonding connection is 300 × 300 μm. .
Then, this drying was carried out under conditions of a temperature of 150 ° C. for 60 minutes.

(Manufacture of semiconductor devices)
Nickel plating 5 μm and gold plating (purity 99.99%) 0.3 μm were sequentially applied to the copper surface of the opening of the conductive metal layer pattern by electroplating (see FIG. 6 (k)).
Next, in order to improve the adhesion between the solder resist, the reflector, and the sealing material, the solder resist surface was subjected to plasma treatment (equipment manufacturer: Mori Engineering Co., Ltd., product name: PLASMA ASHER PB-1000S). The plasma treatment conditions were as follows: gas used: Ar, degree of vacuum: 100 Pa, output: 400 W, time: 5 minutes.
Next, an epoxy resin containing a white inorganic pigment (manufactured by Hitachi Chemical Co., Ltd., trade name: WM7005T) was molded at a predetermined position by a transfer mold method, and the reflector member was placed on the solder resist (FIG. 6 (l )reference). The resin was cured at 150 ° C. for 2 hours.
Next, the LED semiconductor element was bonded to a predetermined position of the metal layer pattern by silver paste (Kyocera Chemical Co., Ltd., trade name: CT220HS), cured at 150 ° C. for 1 hour, and then connected by wire bonding. Thereafter, a transparent liquid sealing material (Shin-Etsu Chemical Co., Ltd., trade name: Shin-Etsu Silicone ASP-1020B) was filled and cured at 150 ° C. for 30 minutes to cure the transparent liquid sealing material (FIG. 6). (See (m)).
Note that wire bonding is performed by a wire bonding apparatus 4524AD (Kulicke & Soffa, Ltd.) and a capillary type 40472-0010-320 (Kullike & Soffa, Ltd.). .)], And the type GMH type 25 μm (Tanaka Kikinzoku Kogyo Co., Ltd.) was used as the wire. The connection conditions were as follows: ultrasonic output was 0.2 W, ultrasonic output time was 45 ms, and temperature was 130 ° C.

  Thereafter, the carrier substrate was peeled off (see FIG. 7 (n)). At this time, the pressure-sensitive adhesive was adhered to the peelable substrate, and the pressure-sensitive adhesive could be easily peeled off without remaining on the plated portion of the opening or the solder resist.

  After peeling off the carrier substrate, the semiconductor device 40 was cut into a predetermined size (3 mm × 2 mm × 300 μm) with a dicing device to obtain a separated semiconductor device 40. In this semiconductor device, tin plating having a thickness of 3 μm was applied by electroless plating to a portion where the lower surface of the conductive metal layer pattern (copper plating) protrudes from the semiconductor device (see FIGS. 7 (o) and 7 (p)). .

The LED semiconductor device 40 thus obtained is
(1) Since the adhesion between the conductive metal layer pattern and the insulating portion is strong, the moisture absorption resistance of the semiconductor device is improved. Therefore, the insulation reliability of the semiconductor device can be improved. Also, when Ag plating is applied to the uppermost layer of the conductive metal layer pattern, the Ag plating is difficult to discolor, the deterioration of the light quantity can be reduced, and the Ag plating discoloration can be reduced. It is possible to suppress the color change.
(2) In addition to the strong adhesion between the conductive metal layer pattern and the insulating part, at least a part of the peripheral part of the conductive metal layer pattern is covered with an insulating part made of a curable resin or the like. It is excellent in the ability to prevent the conductive metal layer pattern from falling off the semiconductor device. Therefore, the plating thickness of the conductive metal layer pattern can be reduced, and the semiconductor device can be further reduced in thickness and the conductive metal layer pattern can be further refined.
(3) The surface of the conductive metal layer pattern is flat, and the connection workability of the conductive wire can be improved.
(4) Since the surface of the conductive metal layer pattern is flat and a curable resin such as a solder resist is applied, the mold sealing property is high, and the base material is the conductive metal layer when forming the base material. There is no oozing on the upper surface of the pattern.
(5) Since a curable resin such as a solder resist is applied to the conductive metal layer pattern, the base material does not wrap around the lower surface of the conductive metal layer pattern when the base material is formed.
(6) By applying a curable resin such as a solder resist to the conductive metal layer pattern, it is sufficient to apply the connection plating to the necessary portion of the surface of the conductive metal layer pattern. Even when plating is applied, the color change is small.
(7) Since it is only necessary to perform connection plating only on the necessary portion of the outermost surface of the conductive metal layer pattern, the cost can be reduced.
(8) Since the lower surface of the conductive metal layer pattern to be externally connected protrudes from the semiconductor device, the external connection portion after mounting the semiconductor device becomes strong against shearing force, and the reliability of external connection is improved.
(9) Since it is not necessary to form a conductive metal layer pattern for each product, the cost can be reduced. Furthermore, it can be manufactured by roll-to-roll and is excellent in productivity.

(Preparation of semiconductor device mounting wiring board)
The semiconductor device obtained above was mounted on a wiring board to produce a semiconductor device mounting wiring board.
The semiconductor device was mounted on the wiring board in such a manner that the tin plated portion of the protruding conductive metal layer pattern of the semiconductor device was soldered onto the wiring having a 20 μm electric solder plating layer of the wiring board.

Comparative Example 1
A comparative example will be described with reference to FIGS.
As the supporting base material 101, SUS430 having a thickness of 0.15 mm and the same size as in Example 1 was prepared. A Pd film 102 having a thickness of 0.1 μm was formed on the upper surface of the support substrate by plating. After providing the Pd film, it was heated at 400 ° C. in order to improve the adhesion between Pd and the supporting substrate.
Next, after the photosensitive film 103 (Photech RY3237, 37 μm thickness, manufactured by Hitachi Chemical Co., Ltd.) was laminated on the surface of the Pd film (see FIG. 17A), the same as in Example 1 was formed on the upper part. A mask was placed, and exposure was performed by irradiating ultraviolet rays in the same manner as in Example 1. Thereafter, a patterned insulating layer 104 was provided by treating with an etchant in the same manner as in Example 1 (see FIG. 17B).

Next, gold having a thickness of 0.1 μm was plated (gold plating 105), and copper was further formed thereon by plating in the same manner as in Example 1 to a thickness of 65 μm (copper plating 106). At this time, since the copper plating was thicker than the resist film, a protrusion having a width of about 15 μm was formed on the side surface. Further, nickel of 5 μm thickness and gold of 0.3 μm were sequentially plated on the uppermost layer in the same manner as in Example 1, and then the protective film was washed and removed in the same manner as in Example 1. At this time, the protrusion on the side surface of the conductive metal layer pattern had a width of about 20 μm.
Next, as shown in FIG. 18E, the reflector 108 was formed by the transfer molding method in the same manner as in Example 1. As in Example 1, as shown in FIG. 18 (f), the light emitting element 109 was bonded onto the metal layer, and the electrode of the light emitting element and another metal layer were connected using the conductive wire 110.
Next, as shown in FIG. 18 (f), a sealing member made of a translucent resin is formed by potting a sealing material in the recess formed surrounded by the reflector in the same manner as in Example 1, and the light emitting element or The conductive wire was covered with a sealing member.
Next, after the sealing material was cured, the support substrate was peeled off as shown in FIG. Finally, in the same manner as in Example 1, the reflector part was diced into individual pieces (FIGS. 19H and 19I), and a light emitting device mounting wiring board as shown in FIG. 20K was obtained.

The following problems were confirmed in the semiconductor device thus obtained.
(1) The base material (of the reflector) made of a light-shielding resin contains a release agent for imparting releasability from the mold, and has low adhesion to the metal that becomes the conductive metal layer pattern. Moreover, since the distance from the lower surface of the conductive metal layer pattern to the plating of the uppermost layer of the conductive metal layer pattern is short, the moisture absorption resistance of the semiconductor device is lowered, and the insulation reliability of the semiconductor device is inferior. In particular, when Ag plating is performed on the uppermost layer of the conductive metal layer pattern, the Ag plating is liable to change color due to moisture absorption, and the deterioration of the light amount and the color change are large.
(2) Since the adhesion between the base material made of a light-shielding resin and the metal to be the conductive metal layer pattern is weak, the side surface of the conductive metal layer pattern is used to prevent the conductive metal layer pattern from falling off the semiconductor device. Protrusions are provided. Therefore, it is necessary to increase the plating thickness from the lower surface of the conductive metal layer pattern to the protruding portion, and there is a limit to the thinning and miniaturization of the semiconductor device. Moreover, since there is a protrusion on the side surface of the conductive metal layer pattern, it is difficult to fill the resin material for forming the base material when forming the base material.
(3) Since the surface of the conductive metal layer pattern is a free precipitation surface of plating, the surface is inferior in smoothness and the connection workability of the conductive wire is low. Moreover, since the smoothness of the surface of the conductive metal layer pattern is inferior, the mold sealing property is poor, and the resin material constituting the base material oozes out from the upper surface of the conductive metal layer pattern when the base material is formed.
(4) Since the adhesion between the metal layer on the support substrate and the conductive metal layer pattern is weak, the base material wraps around the lower surface of the conductive metal layer pattern when the base material is formed.
(5) Since it is necessary to perform connection plating on the entire surface of the conductive metal layer pattern, when Ag plating that easily discolors due to moisture absorption is applied to the connection plating, the color change is large.
(6) Since the lower surface of the conductive metal layer pattern to be externally connected does not protrude from the semiconductor device, the external connection portion after mounting the semiconductor device is weak against shearing force, and the reliability of external connection is limited.
(7) Since it is necessary to perform expensive connection plating on the entire outermost surface of the conductive metal layer pattern, the cost increases. In addition, since the formation of the conductive metal layer pattern is a photolithography method, it is necessary to form a pattern for each product, so that a great expense is required. Furthermore, it is difficult to handle roll-to-roll, resulting in poor productivity.
(8) A part of Pd in the Pd film formed by plating on the upper surface of the supporting substrate remains on the substrate side at the time of peeling of the supporting substrate, so that the process after peeling of the supporting substrate, for example, a plating process In such a case, plating may be deposited in an undesired place, or insulation may be deteriorated due to moisture absorption.

10: Semiconductor element mounting member 11: Peelable substrate 12: Adhesive layer 13: Conductive metal layer pattern 14: Conductive metal layer pattern 15: Insulating part 16: Metal plating layer 17: Peripheral part 18, 108: Reflector 19: pedestal-shaped convex portion 20: semiconductor element mounting substrate 21, 109: semiconductor element 22, 110: conductive wire 23, 112: sealing member 24, 24 ′: exterior plating 25: die bonding material 30: conductive for plating Base material 31: Conductive base material 32: Concave portion (opening, plating forming portion)
33: Insulating layer 34: Photosensitive resist layer 36: Metal layer pattern 37: Carrier base 39: Protrusion 40: Semiconductor device 50: Semiconductor device mounting wiring board 51: Motherboard 52, 52 ′: Conductor wiring 53, 53 ′ : Solder 60: Semiconductor device mounting wiring board 101: Support base material 102: Pd film 103: Photosensitive film 104: Insulating layer 105: Gold plating 106: Copper plating

Claims (12)

  A semiconductor element mounting member having a conductive metal layer pattern and an insulating part on a carrier substrate, wherein the metal layer pattern covers at least the peripheral part of the insulating part so as to partially have an exposed part. In the plan view from the metal layer pattern side of the member, the outermost peripheral portion of the metal layer pattern has a cross-sectional shape protruding to the insulating portion side from the portion where the metal layer pattern and the carrier substrate are in contact with each other A member for mounting a semiconductor element.   The semiconductor element mounting member according to claim 1, wherein a surface of the exposed portion is substantially flat.   The semiconductor element mounting according to claim 1, wherein the conductive metal layer pattern has a pedestal-shaped convex portion having a substantially flat surface on the inner side of the outermost periphery on a surface opposite to the carrier base material side. Materials.   The member for mounting a semiconductor element according to claim 1, wherein the insulating portion is made of a thermosetting and / or active energy ray-curable solder resist.   The said carrier base material consists of a peelable base material and an adhesive layer, and an electroconductive metal layer pattern and an insulating part are stuck to a peelable base material through an adhesive layer. The member for mounting a semiconductor element according to the above.   The member for mounting a semiconductor element according to claim 5, wherein the conductive metal layer pattern is disposed so as to protrude toward a peeling surface when the carrier base material is peeled off.   A semiconductor element mounting substrate comprising a reflector on the semiconductor element mounting member according to claim 1 so as not to cover an exposed portion of the conductive metal layer pattern.   The reflector constitutes a side wall, the surface composed of the conductive metal layer pattern and the insulating portion of the semiconductor element mounting member constitutes a bottom surface, and has two or more conductive metal layer patterns including an exposed portion in the bottom surface. The semiconductor element mounting substrate according to claim 7, wherein the side wall and the bottom surface form a recess.   A semiconductor device comprising the semiconductor element mounting member according to claim 1, the semiconductor element, and a sealing member, wherein the semiconductor element mounting member forms an outer surface, and the semiconductor element A semiconductor device mounted on the semiconductor element mounting member, wherein the sealing member seals the semiconductor element.   The semiconductor device according to claim 9, wherein the semiconductor element is an LED semiconductor element.   The semiconductor device according to claim 9, further comprising a reflector on the semiconductor element mounting member so as not to cover an exposed portion of the conductive metal layer pattern.   The reflector constitutes a side wall, the surface composed of the conductive metal layer pattern and the insulating portion of the semiconductor element mounting member constitutes a bottom surface, and has two or more conductive metal layer patterns including an exposed portion in the bottom surface. The semiconductor device according to claim 11, wherein a sealing member is formed by filling the sealing material in a recess constituted by the side wall and the bottom surface.

Images