JP2013004697A - Manufacturing apparatus and manufacturing method for semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a manufacturing apparatus and a manufacturing method for a semiconductor device that can reduce a crack or break in a semiconductor chip when the chip is detached from an adhesive tape.SOLUTION: A pickup device 10 includes a holding stage 11 that holds a semiconductor chip in a state of being attached to an adhesive tape. A first groove 21a and a second groove 22a are formed on the surface of the holding stage, which holds the semiconductor chip. At least one venthole 12 is connected to the first groove 21a and the second groove 22a. The width t2 of an aperture of the second groove 22a is narrower than the width t1 of an aperture of the first groove 21a. The pickup device 10 holds the semiconductor chip while directing the side attached to the adhesive tape downward, at the respective tops of the first groove 21a and second groove 22a. After an enclosed space surrounded by the adhesive tape, the first groove 21a and the second groove 22a is decompressed by decompressing means, the pickup device 10 picks up the semiconductor chip from the holding stage 11 using a collet.

Description

  The present invention relates to a semiconductor device manufacturing apparatus and a semiconductor device manufacturing method.

  In recent years, in an IGBT (Insulated Gate Bipolar Transistor), a semiconductor wafer has been thinned for high performance and low cost. For example, a technique for reducing the thickness of a semiconductor wafer to a thickness of about 50 μm to 100 μm or less has been proposed.

  In order to manufacture a semiconductor device with a thin device thickness, for example, after a device structure is formed on the front surface of a semiconductor wafer, back grinding or silicon etching is performed on the back surface of the semiconductor wafer until a predetermined thickness is reached. Then, dicing is performed for each device structure formed on the front surface of the semiconductor wafer, and the semiconductor wafer is cut into individual semiconductor chips.

  Further, the following method has been proposed as another method for manufacturing a semiconductor device having a thin device thickness. After the device structure is formed on the front surface of the semiconductor wafer, a groove deeper than the device thickness of the semiconductor device is formed along the dicing line from the front surface side of the semiconductor wafer. Thereafter, back grinding and silicon etching are performed on the back surface of the semiconductor wafer, and the semiconductor wafer is thinned to a predetermined thickness. The semiconductor wafer is cut into individual semiconductor chips by grooves formed in the semiconductor wafer.

  As another method for manufacturing a semiconductor device having a thin device thickness, the following method has been proposed. After the device structure is formed on the front surface of the semiconductor wafer, back grinding and silicon etching are performed on the back surface of the semiconductor wafer, and only the central portion of the semiconductor wafer is thinned in a range narrower than the diameter of the semiconductor wafer. Thereafter, dicing is performed with the outer peripheral portion (hereinafter referred to as a rib portion) of the semiconductor wafer left or after the rib portion is removed, and the semiconductor wafer is cut into individual semiconductor chips.

  In order to avoid problems such as scattering of semiconductor chips separated by dicing, for example, a method of dicing by attaching an adhesive tape such as a dicing tape to the back surface of a semiconductor wafer is known. When dicing by attaching an adhesive tape to the back surface of the semiconductor wafer, the semiconductor chip attached to the adhesive tape is picked up from the adhesive tape and separated into individual semiconductor chips.

  As a method for picking up a semiconductor chip from an adhesive tape, the following method has been proposed. The semiconductor chip is pushed upward from the back surface side to which the adhesive tape side is attached, for example, by a needle or the like, and the contact area between the semiconductor chip and the adhesive tape is reduced. Then, the semiconductor chip is sucked by, for example, a collet that sucks and sucks the semiconductor chip, and the semiconductor chip is picked up from the adhesive tape. However, when such a pickup method is applied to a thinned semiconductor chip, the surface of the semiconductor chip may be damaged or the semiconductor chip may be damaged by pushing up the semiconductor chip with a needle.

  As a method for solving such a problem, the following method has been proposed. The fixed jig includes a jig base having a plurality of protrusions and side walls on one surface, and an adhesion layer laminated on the surface having the protrusions of the jig base and bonded to the upper surface of the side walls. A partition space is formed on the surface of the jig base having the protrusions by the adhesion layer, the protrusions, and the side walls, and is connected to a vacuum source by a through hole. Air in the partition space is sucked through the through hole to deform the adhesion layer, and the suction collet sucks the chip from the upper surface side of the chip and picks up the chip from the adhesion layer (for example, refer to Patent Document 1 below). .

  As another method, the following method has been proposed. The mounting table has a plurality of suction grooves distributed so as to cover a region facing the chip-shaped component, and is positioned between the suction grooves and partially opposed to each chip-shaped component in at least two places. And a protrusion. The holding sheet is placed on the mounting table, and a negative pressure is applied to the suction groove, whereby the holding sheet is deformed along the protrusion and peeled off from the chip-shaped component. At this time, first, the negative pressure applied to the suction groove facing the peripheral edge of the chip-shaped component is further increased so that the holding sheet is peeled off from the peripheral edge of the chip-shaped component (see, for example, Patent Document 2 below). ).

  As another method, the following method has been proposed. On the surface on which the back side of the semiconductor chip is placed via the dicing tape of the suction piece, a suction surface that is concave and substantially hemispherical and has a plurality of protrusions of the same height rising vertically. And a side wall having a width of 0.4 mm or less and a height equal to the height of the protrusion or a difference between the height of the protrusions of less than 1 mm. Then, the dicing tape is sucked from the suction holes provided in at least one of the valleys between the protrusions and / or the side surfaces of the protrusions, and sucked into the protrusions, and colleted from the front surface side of the semiconductor chip. Pick up the semiconductor chip. When adsorbing the dicing tape from the adsorbing hole, the dicing tape is slightly submerged between the adsorbing side wall and the adsorbing surface within the range of elasticity of the dicing tape (for example, the following patent document) 3).

  In addition, the following apparatus has been proposed as a pickup apparatus that avoids damage to the semiconductor chip. The wafer mounting table is connected to the plurality of protrusions that hold the lower surface of the IC chip through the adhesive sheet at the top, the suction grooves formed in the valleys of the plurality of protrusions, and the suction grooves via a connection tube. A vacuum device that peels the adhesive sheet from the IC chip and attracts it to the valleys of the protrusions by generating a suction force in the suction groove (see, for example, Patent Document 4 below).

JP 2008-103493 A JP 11-54594 A JP 2010-123750 A JP-A-5-335405

  However, in each of the above-mentioned patent documents, the following problems occur depending on the chip size and the components of the adhesive tape. For example, when the adhesion force between the semiconductor chip and the adhesive tape is larger than the suction force of the collet, there is a possibility that the semiconductor chip adhered to the upper surface of the protruding portion by the adhesive tape cannot be picked up with the suction force of the collet. In order to reliably pick up the semiconductor chip by the suction force of the collet, when the semiconductor chip is sucked in a state where the collet is pressed against the semiconductor chip, the surface of the semiconductor chip may be damaged by pressing the collet.

  FIG. 13 is a cross-sectional view showing a semiconductor chip held on a holding stage of a conventional semiconductor device manufacturing apparatus. On the other hand, when the adhesive force between the semiconductor chip and the adhesive tape is weak, the timing at which the adhesive tape 102 is peeled within the surface of one semiconductor chip 101a varies as shown in FIG. As a result, the semiconductor chip 101a is inclined with respect to the holding stage 111, and there is a possibility that the adjacent semiconductor chip 101a comes into contact with the chip. Further, the semiconductor chip 101a may collide with a collet (not shown) when picked up and be damaged.

  Further, the adhesive force between the semiconductor chip 101a and the adhesive tape 102 varies depending on the surface roughness of the back surface of the semiconductor chip 101a and the presence or absence of the back electrode. Furthermore, the ease of deformation of the adhesive tape 102 varies depending on the rigidity of the adhesive tape 102. For this reason, it is difficult to control the adhesion force between the semiconductor chip 101a and the adhesive tape 102 and the deformation of the adhesive tape 102 to be constant. Therefore, depending on the element structure of the semiconductor chip 101a and the rigidity of the adhesive tape 102, the above-described problem is likely to occur, and it is difficult to peel the semiconductor chip 101a from the adhesive tape 102 without causing the semiconductor chip 101a to crack or chip. is there.

  The present invention provides a semiconductor device manufacturing apparatus and a semiconductor device manufacturing method capable of reducing chipping and scratching of a semiconductor chip at the time of peeling from an adhesive tape in order to eliminate the above-described problems caused by the prior art. With the goal.

  In order to solve the above-described problems and achieve the object of the present invention, a semiconductor device manufacturing apparatus according to the present invention is a semiconductor device manufacturing apparatus that picks up a semiconductor chip cut by dicing from an adhesive tape. A holding stage having a plurality of grooves provided on a surface for holding a chip and at least one vent hole connected to the groove, and an outer peripheral portion of the semiconductor chip held by the holding stage among the grooves. A first groove disposed at a corresponding position, and has a width narrower than the first groove, and is disposed at a position corresponding to a central portion of the semiconductor chip held on the holding stage. A second groove and an apex formed by an end of the groove on the opening side and point-contacted with the semiconductor chip held by the holding stage; and the front of the semiconductor chip After the semiconductor chip is held at the apex portion with the surface on the side where the adhesive tape is attached facing the holding stage, the space surrounded by the groove and the adhesive tape is decompressed via the vent hole. And a suction unit that sucks and picks up the semiconductor chip held at the apex portion after the space is decompressed by the decompression unit.

  In order to solve the above-described problems and achieve the object of the present invention, a semiconductor device manufacturing apparatus according to the present invention is a semiconductor device manufacturing apparatus that picks up a semiconductor chip cut by dicing from an adhesive tape, The holding is formed by a holding stage having a plurality of grooves provided on a surface on the side holding the semiconductor chip, and at least one vent hole connected to the grooves, and an end of the groove on the opening side. After the semiconductor chip is held at the apex portion with the apex portion that makes point contact with the semiconductor chip held on the stage, and the surface of the semiconductor chip on the side where the adhesive tape is affixed to the holding stage side A decompression means for decompressing the space surrounded by the groove and the adhesive tape through the vent, and the semiconductor chip held at the apex portion Are spaced a predetermined interval, after which the space is depressurized by the pressure reducing means, characterized in that it comprises a suction means picking by sucking the semiconductor chip held in the apex portion.

  In the semiconductor device manufacturing apparatus according to the present invention as set forth in the invention described above, the pressure reducing means deforms the adhesive tape attached to the semiconductor chip so as to follow the inner wall of the groove. .

  In the semiconductor device manufacturing apparatus according to the present invention as set forth in the invention described above, the decompression means decompresses the space until the contact portion between the semiconductor chip and the adhesive tape is only a portion corresponding to the apex portion. It is characterized by doing.

  The semiconductor device manufacturing apparatus according to the present invention may further include an outer wall portion that is in contact with a side surface of the holding stage and surrounds the holding stage in the above-described invention, on the side of the outer wall portion on which the semiconductor chip is held. The surface has the same height as the surface of the holding stage on the side where the semiconductor chip is held.

  In the semiconductor device manufacturing apparatus according to the present invention, in the above-described invention, the apex portion includes apex portions of conical, quadrangular pyramid, or quadrangular prism-shaped protrusions configured by side walls of the adjacent grooves. It is characterized by that.

  The semiconductor device manufacturing apparatus according to the present invention is characterized in that, in the above-described invention, a size ratio of two sides sharing one vertex of the semiconductor chip is 0.75 or more and 1.25 or less. .

  The semiconductor device manufacturing apparatus according to the present invention is characterized in that, in the above-described invention, at least four of the vent holes are provided in a region of the holding stage where the one semiconductor chip is held. To do.

  In the semiconductor device manufacturing apparatus according to the present invention as set forth in the invention described above, the suction means is arranged at a distance of 0.05 mm or more and 0.5 mm or less from the semiconductor chip held at the apex portion. It is characterized by that.

  Moreover, in order to solve the above-described problems and achieve the object of the present invention, a method for manufacturing a semiconductor device according to the present invention is a method for manufacturing a semiconductor device that picks up a semiconductor chip cut by dicing from an adhesive tape, The surface on the side where the adhesive tape is affixed to the apex that is formed by the end of the opening provided on the holding stage and is in point contact with the semiconductor chip held on the holding stage. A holding step for holding the semiconductor chip on the holding stage side, a first groove disposed at a position corresponding to an outer peripheral portion of the semiconductor chip after the holding step, and a width narrower than the first groove. And decompressing the groove surrounded by the second groove disposed at a position corresponding to the central portion of the semiconductor chip of the holding stage and the space surrounded by the adhesive tape. And pressurizing step, after the vacuum step, characterized in that it comprises a suction step of picking by sucking the semiconductor chip held in the apex portion.

  Moreover, in order to solve the above-described problems and achieve the object of the present invention, a method for manufacturing a semiconductor device according to the present invention is a method for manufacturing a semiconductor device that picks up a semiconductor chip cut by dicing from an adhesive tape, The surface on the side where the adhesive tape is affixed to the apex that is formed by the end of the opening provided on the holding stage and is in point contact with the semiconductor chip held on the holding stage. A holding step for holding the semiconductor chip on the holding stage side, a depressurizing step for depressurizing the space surrounded by the groove and the adhesive tape after the holding step, and holding at the apex after the depressurizing step A suction step of sucking and picking up the semiconductor chip by suction means arranged at a predetermined interval from the semiconductor chip. The features.

  According to the above-described invention, when the sealed space surrounded by the adhesive tape and the groove (hereinafter referred to as the sealed space) is decompressed, the decompression loss in the space formed by the adhesive tape and the first groove is It becomes smaller than the decompression loss in the space formed by the adhesive tape and the second groove. For this reason, when depressurizing the sealed space surrounded by the adhesive tape and the groove and peeling the adhesive tape from the semiconductor chip, the adhesive tape on the outer peripheral side of the semiconductor chip is more than the adhesive tape on the central side of the semiconductor chip. It can be peeled off quickly. Therefore, when the adhesive tape on the outer peripheral side of the semiconductor chip is peeled off, the central part side of the semiconductor chip can be sufficiently adhered to the adhesive tape. For this reason, even if variation occurs in the timing at which the adhesive tape is peeled from the outer peripheral side of the semiconductor chip, it is possible to avoid the semiconductor chip from being inclined with respect to the holding stage.

  Furthermore, after that, when the adhesive tape on the central portion side of the semiconductor chip is peeled off, the adhesive tape on the outer peripheral portion side of the semiconductor chip is already peeled off. For this reason, the adhesive tape on the central portion side of the semiconductor chip can be peeled in a state where the semiconductor chip is held in parallel with the holding stage. This ensures that the adhesive tape is peeled from the semiconductor chip in a state where the semiconductor chip is held parallel to the holding stage regardless of the surface roughness of the back surface of the semiconductor chip, the presence or absence of the back electrode, and the rigidity of the adhesive tape. Can do.

  In addition, after the sealed space surrounded by the adhesive tape and the groove was decompressed, the semiconductor chip and the adhesive tape made point contact at a portion corresponding to the apex formed by the opening side end of the groove of the holding stage. It becomes a state and the adhesive tape is almost peeled from the semiconductor chip. For this reason, the adhesive force between the semiconductor chip and the adhesive tape can be made substantially zero. Therefore, for example, the adhesive tape can be peeled from the semiconductor chip without performing the process of pushing up the semiconductor chip with a needle or the like as in the prior art.

  Furthermore, since the adhesive force between the semiconductor chip and the adhesive tape can be made almost zero, without pressing the suction means against the semiconductor chip, with a predetermined interval between the suction means and the semiconductor chip, A semiconductor chip can be picked up from the holding stage. Moreover, since the adhesive force between the semiconductor chip and the adhesive tape can be made almost zero, a part of the semiconductor chip is not peeled off while being attached to the adhesive tape. Therefore, the semiconductor chip can be reliably picked up (pick up) by the suction force of the suction means.

  In this manner, the semiconductor chip on the holding stage can be picked up without pressing the suction means against the semiconductor chip and without tilting the semiconductor chip with respect to the holding stage.

  According to the semiconductor device manufacturing apparatus and the semiconductor device manufacturing method of the present invention, it is possible to reduce the chipping or scratching of the semiconductor chip at the time of peeling from the adhesive tape.

1 is a plan view showing a semiconductor wafer processed by a semiconductor device manufacturing apparatus according to a first embodiment; FIG. 2 is a plan view showing a state after dicing of the semiconductor wafer shown in FIG. 1. 1 is a cross-sectional view schematically showing a main part of a semiconductor device manufacturing apparatus according to a first embodiment; 1 is a plan view schematically showing a main part of a semiconductor device manufacturing apparatus according to a first embodiment; 1 is a plan view schematically showing a main part of a semiconductor device manufacturing apparatus according to a first embodiment; 1 is a plan view schematically showing a main part of a semiconductor device manufacturing apparatus according to a first embodiment; 1 is a bird's eye view schematically showing a main part of a semiconductor device manufacturing apparatus according to a first embodiment; FIG. 3 is a cross-sectional view showing the semiconductor chip held by the semiconductor device manufacturing apparatus according to the first embodiment; FIG. 3 is a cross-sectional view sequentially illustrating operations of the semiconductor device manufacturing apparatus according to the first embodiment; FIG. 3 is a cross-sectional view sequentially illustrating operations of the semiconductor device manufacturing apparatus according to the first embodiment; FIG. 6 is a cross-sectional view schematically showing a main part of a semiconductor device manufacturing apparatus according to a second embodiment; FIG. 6 is a cross-sectional view showing a semiconductor chip held by a semiconductor device manufacturing apparatus according to a second embodiment; It is sectional drawing which shows the semiconductor chip hold | maintained at the holding stage of the manufacturing apparatus of the conventional semiconductor device.

  Exemplary embodiments of a semiconductor device manufacturing apparatus and a semiconductor device manufacturing method according to the present invention will be explained below in detail with reference to the accompanying drawings. Note that, in the following description of the embodiments and the accompanying drawings, the same reference numerals are given to the same components, and duplicate descriptions are omitted.

(Embodiment 1)
FIG. 1 is a plan view of a semiconductor wafer processed by the semiconductor device manufacturing apparatus according to the first embodiment. FIG. 2 is a plan view showing a state after dicing of the semiconductor wafer shown in FIG. The semiconductor wafer 1 before being processed by the semiconductor device manufacturing apparatus according to the first embodiment will be described. As shown in FIGS. 1 and 2, the semiconductor wafer 1 is diced with an adhesive tape (dicing tape) 2 attached thereto, and cut into individual semiconductor chips 1 a on which the device surface structure (electronic circuit) is formed. Is done.

  Specifically, for example, the semiconductor wafer 1 is diced and cut into individual semiconductor chips 1a as follows. First, as shown in FIG. 1, the surface structure of the device is formed on the front surface side of the semiconductor wafer 1 for each semiconductor chip formation region 1b. The semiconductor chip formation regions 1b are arranged in, for example, islands at equal intervals. Marks such as dicing lines 1c are formed between adjacent semiconductor chip formation regions 1b.

  Next, back grinding or silicon etching of the back surface of the semiconductor wafer 1 is performed, and the semiconductor wafer 1 is thinned to a predetermined thickness. At this time, the semiconductor wafer 1 may be a wafer having a flat back surface, or a rib wafer leaving an outer peripheral portion (rib portion) on the back surface side. Next, the adhesive tape 2 is affixed on the back surface side of the thinned semiconductor wafer 1. Next, the semiconductor wafer 1 is fixed to the dicing frame 3 by attaching the dicing frame 3 to the surface of the adhesive tape 2 on the semiconductor wafer 1 side.

  Next, the semiconductor wafer 1 is diced from the front surface side of the semiconductor wafer 1 along the dicing line 1c. At this time, dicing is performed so that the notch due to dicing does not penetrate the adhesive tape 2. Thereby, as shown in FIG. 2, the semiconductor wafer 1 is cut into individual semiconductor chips 1a. Since the semiconductor chip 1a is attached to the adhesive tape 2, it is picked up from the adhesive tape 2 by the semiconductor device manufacturing apparatus according to the first embodiment and separated into individual semiconductor chips 1a. That is, the semiconductor device manufacturing apparatus according to the first embodiment is a pickup device that picks up the semiconductor chip 1 a attached to the adhesive tape 2 from the adhesive tape 2.

  Next, suitable conditions for the semiconductor chip 1a picked up by the semiconductor device manufacturing apparatus according to the first embodiment will be described. The semiconductor chip 1a has a rectangular planar shape. The semiconductor chip 1a preferably has a substantially square planar shape, for example. Specifically, the dimensional ratio of two sides sharing one vertex of the semiconductor chip 1a is preferably, for example, 0.75 or more and 1.25 or less (within a chip size aspect ratio of 1 ± 0.25). The reason is that the occurrence rate of chipping or scratching of the semiconductor chip 1a when the semiconductor chip 1a is picked up by the semiconductor device manufacturing apparatus according to the first embodiment can be reduced most.

  The pressure-sensitive adhesive tape 2 is composed of a base material made of polyvinyl chloride (PVC) and a pressure-sensitive adhesive layer made of, for example, an acrylic UV curable resin that is softened by irradiating with ultraviolet rays (UV: Ultra Violet). It is preferable. The hardness of the substrate may be, for example, 5 Mpa or more and 15 Mpa or less. The elastic modulus of the base material may be, for example, 100 MPa or more and 300 MPa or less. The adhesive strength of the adhesive layer before UV irradiation may be 3 N / 20 mm, for example. The adhesive strength of the adhesive layer after UV irradiation may be, for example, 0.05 N / 20 mm or more and 0.2 N / 20 mm or less.

  By configuring the adhesive tape 2 with a base material made of PVC, for example, the step of the adhesive tape 2 to the stepped portion generated on the surface of the semiconductor wafer 1, such as a stepped portion formed by the central portion and the rib portion of the rear surface of the rib wafer. The pasteability can be increased. Furthermore, the adhesive tape 2 can be heated and softened by comprising the adhesive tape 2 with the base material which consists of PVC. Thereby, the adhesive tape 2 can be easily peeled from the semiconductor chip 1a by the semiconductor device manufacturing apparatus according to the first embodiment. The operation of the semiconductor device manufacturing apparatus according to the first embodiment will be described later.

  Moreover, by comprising the adhesive tape 2 with the adhesion layer which consists of UV curable resin, UV can be irradiated and the adhesive force of an adhesion layer can be reduced. For this reason, when peeling the adhesive tape 2 from the semiconductor chip 1a, it can be avoided that a part of the semiconductor chip 1a remains attached to the adhesive tape 2. Thereby, when the semiconductor chip 1a on the holding stage 11 is sucked and picked up by the collet (suction means), it is possible to avoid the semiconductor chip 1a from being inclined. Furthermore, by constituting the adhesive tape 2 with an adhesive layer made of a UV curable resin, the adhesive force of the adhesive layer can be reduced by irradiating UV. For this reason, when picking up the semiconductor chip 1a, the semiconductor chip 1a can be picked up with a small suction force.

  Next, the configuration of the semiconductor device manufacturing apparatus (hereinafter referred to as a pickup apparatus) according to the first embodiment will be described. FIG. 3 is a cross-sectional view schematically showing a main part of the semiconductor device manufacturing apparatus according to the first embodiment. 4 to 6 are plan views schematically showing main parts of the semiconductor device manufacturing apparatus according to the first embodiment. FIG. 7 is a bird's-eye view schematically showing a main part of the semiconductor device manufacturing apparatus according to the first embodiment. FIG. 8 is a cross-sectional view showing the semiconductor chip held by the semiconductor device manufacturing apparatus according to the first embodiment. FIG. 3 shows a cross-sectional view of the holding stage 11 of the pickup device 10. FIG. 4 shows a plan view of the holding stage 11 of the pickup device 10. FIG. 5 shows an enlarged view of a portion 11a of the holding stage 11 shown in FIG. FIG. 6 shows an enlarged view of a portion 11a of the holding stage 11 shown in FIG. 4 when the semiconductor chip 1a is held. FIG. 7 schematically shows a surface (hereinafter referred to as an upper surface) of the holding stage 11 on the side where the semiconductor chip 1a is held. FIG. 8 shows a state where the semiconductor chip 1a is held by the pickup device 10 shown in FIG.

  As shown in FIGS. 3 and 8, the pickup apparatus 10 includes a holding stage 11 that holds the semiconductor chip 1 a with the surface of the semiconductor chip 1 a on which the adhesive tape 2 is attached facing the holding stage 11, and the holding stage 11. When the semiconductor chip 1a is held on the upper surface, a decompression means (not shown) for decompressing the space 14 surrounded by the adhesive tape 2 and the holding stage 11, and the semiconductor chip 1a on the holding stage 11 is sucked and taken up ( And a collet (pickup means: not shown).

  The holding stage 11 includes a plurality of grooves provided on the upper surface of the holding stage 11, at least one or more vent holes 12 connected to the grooves, and an outer wall portion 13 that contacts the side surface of the holding stage 11 and surrounds the holding stage 11. And having. Specifically, the groove of the holding stage 11 includes a first groove 21a and a second groove 22a having a narrower width than the first groove 21a. The vent hole 12 is connected to the bottom of the groove, passes through the holding stage 11, and is connected to the decompression means.

  The more vent holes 12 are provided, the more the adhesive tape 2 (not shown) formed on the upper surface of the holding stage 11 is surrounded by the adhesive tape 2, the first groove 21a, the second groove 22a, and the outer wall portion 13. The suction force when the air in the space (sealed space) 14 is decompressed by the decompression means increases. Accordingly, the more vent holes 12 are provided, the more preferable, but the more vent holes 12 are provided, the more cost is increased. For this reason, the vent hole 12 should just be provided at least 4 places in the area | region 20 where one semiconductor chip 1a is hold | maintained. For example, the air holes 12 connected to the first grooves 21a arranged in the portions corresponding to the vicinity of the apexes of the semiconductor chip 1a may be provided. The diameter of the vent hole 12 may be 0.4 mm, for example.

  The decompression means is a hermetically sealed enclosure surrounded by the adhesive tape 2, the first groove 21a, the second groove 22a and the outer wall portion 13 formed when the semiconductor chip 1a is held on the upper surface of the holding stage 11 via the adhesive tape 2. The space 14 is depressurized. In the region 20 where one semiconductor chip 1a is held, the first space 14a formed by the adhesive tape 2 and the first groove 21a and the second space 14b formed by the adhesive tape 2 and the second groove 22a. A sealed space 14 is formed.

  The outer wall portion 13 is provided such that the upper surface thereof is the same height as the upper surface of the holding stage 11. That is, the outer wall portion 13 is provided so as to be flat from the upper surface of the outer wall portion 13 to the upper surface of the holding stage 11. The first groove 21 a and the second groove 22 a are not provided on the upper surface of the outer wall portion 13. Thereby, when the semiconductor chip 1a is held on the holding stage 11 via the adhesive tape 2, a sealed space 14 surrounded by the adhesive tape 2, the first groove 21a, the second groove 22a and the outer wall portion 13 is formed. The

  The width of the outer wall portion 13 may be, for example, 0.3 mm or more and 3 mm or less. A configuration in which the first groove 21 a and the second groove 22 a are not provided in the outer peripheral portion of the holding stage 11 without providing the outer wall portion 13 may be adopted. In this case, a portion of the outer periphery of the holding stage 11 where the first groove 21a and the second groove 22a are not provided functions as the outer wall portion 13, and is a space surrounded by the adhesive tape 2, the first groove 21a, and the second groove 22a. Becomes the sealed space 14.

  The first groove 21 a is disposed at a position corresponding to the outer peripheral portion of the semiconductor chip 1 a held on the upper surface of the holding stage 11. In other words, the first groove 21 a is arranged on the outer peripheral portion (hereinafter referred to as a first groove arrangement region) 21 of the region 20 of the holding stage 11 where one semiconductor chip 1 a is held. Specifically, as shown in FIG. 4, the first groove arrangement region 21 is arranged in a lattice shape because it is arranged at a position corresponding to the outer peripheral portion of all the semiconductor chips 1 a attached to the adhesive tape 2. (The hatched portion in FIG. 4). 5 and 6, when the semiconductor chip 1a is held on the upper surface of the holding stage 11, the first groove arrangement region 21 has four sides on the outer peripheral end portion of the semiconductor chip 1a. It is arranged to be located on the top. 4-6, illustration of the 1st groove | channel 21a and the 2nd groove | channel 22a is abbreviate | omitted.

  The second groove 22 a is disposed at a position corresponding to the central portion of the semiconductor chip 1 a held on the upper surface of the holding stage 11. That is, the second groove 22a is arranged in the central portion (hereinafter referred to as a second groove arrangement region) 22 of the region 20 where one semiconductor chip 1a is held in the holding stage 11. Specifically, as shown in FIG. 4, the second groove arrangement region 22 is arranged at a position corresponding to the central portion of all the semiconductor chips 1 a attached to the adhesive tape 2, and thus arranged in a lattice shape. It is surrounded by the first groove arrangement region 21 and is arranged in an island shape (a white background portion surrounded by a hatched portion in FIG. 4).

  Therefore, when the semiconductor chip 1a is held on the holding stage 11, as shown in FIG. 6, each second groove arrangement region 22 is covered with one semiconductor chip 1a. Further, a part of the first groove arrangement region 21 on the second groove arrangement region 22 side is covered with the outer peripheral portion of the semiconductor chip 1a (FIG. 6 shows the first groove arrangement region 21 and the second groove arrangement region 21). The boundary line of the groove arrangement region 22 is indicated by a dotted line). As described above, the first grooves 21a and the second grooves 22a are alternately and repeatedly arranged according to the chip size and the number of the semiconductor chips 1a attached to the adhesive tape 2 in a lattice shape.

  A plurality of the first grooves 21 a may be provided in the first groove arrangement region 21. A plurality of second grooves 22 a may be provided in the second groove arrangement region 22. For example, in the holding stage 11, four first grooves 21a are arranged in the first groove arrangement region 21, and areas where seven second grooves 22a are arranged in the second groove arrangement area 22 adjacent thereto are alternately provided repeatedly. It is good also as a structure. The number of first grooves 21a provided in the first groove arrangement region 21 and the number of second grooves 22a provided in the second groove arrangement region 22 are determined in accordance with the chip size of one semiconductor chip 1a.

  Further, the first groove 21 a and the second groove 22 a have a cross-sectional shape in which the width gradually decreases in the depth direction of the holding stage 11. Specifically, the first groove 21a and the second groove 22a have a triangular cross-sectional shape in which the width of the opening is wider than the bottom. The width t1 of the opening of the first groove 21a may be, for example, not less than 0.5 mm and not more than 3 mm. The width t2 of the opening of the second groove 22a is narrower than the width t1 of the opening of the first groove 21a. The width t2 of the opening of the second groove 22a is, for example, about 1/3 or 1/2 of the width t1 of the opening of the first groove 21a.

  For this reason, the cross-sectional area of the second space 14b formed by the adhesive tape 2 and the second groove 22a is smaller than the cross-sectional area of the first space 14a formed by the adhesive tape 2 and the first groove 21a. Thereby, when the sealed space 14 is decompressed by the decompression means, the pressure loss in the first space 14a is smaller than the pressure loss in the second space 14b. For this reason, the decompression force in the first space 14a is larger than the decompression force in the second space 14b. Accordingly, the portion of the adhesive tape 2 that forms the first space 14a is deformed earlier than the portion of the adhesive tape 2 that forms the second space 14b, and is peeled off from the semiconductor chip 1a.

  The cross-sectional area of the first space 14a formed by the adhesive tape 2 and the first groove 21a refers to the width t1 of the opening of the first groove 21a as the bottom surface portion and the depth of the first groove 21a as the height portion. It is a cross-sectional area of the first groove 21a having an inverted triangular cross-sectional shape. The cross-sectional area of the second space 14b formed by the adhesive tape 2 and the second groove 22a refers to the width t2 of the opening of the second groove 22a as the bottom surface portion and the depth of the second groove 22a as the height portion. This is the area of the cross-sectional shape of the second groove 22a having an inverted triangular cross-sectional shape.

  As shown in FIG. 7, the semiconductor chip 1 a held by the holding stage 11 is adhered by the end portions on the opening side of the plurality of grooves (first groove 21 a and second groove 22 a) provided in the holding stage 11. An apex portion that makes point contact with the back surface of the adhesive tape 2 is formed. That is, this apex portion is the apex portion of the conical or quadrangular pyramidal protrusion 23 constituted by the side walls of adjacent grooves. The semiconductor chip 1 a held on the holding stage 11 is held only at the apex of the protrusion 23.

  The distance between the apexes of the protrusion 23 constituted by the side wall of the first groove 21a is the width t1 of the opening of the first groove 21a. The distance between the apexes of the projection 23 constituted by the side wall of the first groove 21a and the side wall of the second groove 22a, and the distance between the apexes of the projection 23 constituted by the side wall of the second groove 22a are: It becomes the width t2 of the opening of the second groove 22a. The plurality of semiconductor chips 1 a held by the holding stage 11 are held at the apexes of at least four protrusions 23, respectively. Although the dimensions of the protrusions 23 in the first groove arrangement region 21 and the second groove arrangement region 22 are different from each other, they are not shown in FIG.

  Moreover, the height of the vertex part of the projection part 23 is equal. Thus, when the semiconductor chip 1a is held on the upper surface of the holding stage 11 with the surface of the semiconductor chip 1a to which the adhesive tape 2 is attached facing down, the adhesive tape 2, the first groove 21a and the second groove A sealed space 14 surrounded by 22a is formed. The first groove 21 a and the second groove 22 a are provided, for example, at a depth that does not reach the surface on the opposite side of the upper surface of the holding stage 11 from the upper surface of the holding stage 11. The depths of the first groove 21a and the second groove 22a may be different as long as the cross-sectional area of the second space 14b can be made smaller than the cross-sectional area of the first space 14a.

  The collet sucks and adsorbs the semiconductor chip 1 a after the sealed space 14 is decompressed by the decompression means, and picks up the semiconductor chip 1 a from the holding stage 11. Specifically, in the collet, the contact portion between the semiconductor chip 1a and the adhesive tape 2 is only the portion corresponding to the apex portion of the protrusion 23, that is, the portion corresponding to the first and second grooves 21a and 22a. After the adhesive tape 2 is deformed until the tape 2 peels from the back surface of the semiconductor chip 1a, the semiconductor chip 1a is sucked and picked up.

  The collet is arranged with a predetermined interval from the semiconductor chip 1a held on the holding stage 11. Specifically, an interval h between the surface of the collet that adsorbs the semiconductor chip 1a and the semiconductor chip 1a held on the holding stage 11 (hereinafter referred to as an interval between the collet and the semiconductor chip 1a) is 0.05 mm or more. It is preferably 0.5 mm or less. The reason is as follows.

  By setting the distance h between the collet and the semiconductor chip 1a to 0.05 mm or more, the collet is not pressed against the semiconductor chip 1a, and the element structure formed on the surface of the semiconductor chip 1a is damaged. Can be prevented. Furthermore, by setting the interval h between the collet and the semiconductor chip 1a to be 0.05 mm or more, even if the semiconductor chip 1a is warped when the adhesive tape 2 is peeled from the semiconductor chip 1a, the semiconductor chip 1a Contact with the collet can be avoided. Further, by setting the distance h between the collet and the semiconductor chip 1a to 0.5 mm or less, the suction force of the collet can be maintained to such an extent that the semiconductor chip 1a can be sucked and adsorbed.

  The pickup device 10 may include a heating unit (not shown) that heats the adhesive tape 2. By heating the adhesive tape 2 by the heating means, the adhesive tape 2 is easily deformed. Specifically, the heating unit may be, for example, a heater that heats the sealed space 14 surrounded by the adhesive tape 2, the first groove 21a, the second groove 22a, and the outer wall portion 13.

  The decompression means, collet and heating means constituting the pickup device 10 are controlled by the CPU using a program or data recorded on a ROM, RAM, magnetic disk, optical disk or the like in the pickup device 10, for example. Is done by doing.

  Next, a method of picking up the semiconductor chip 1a by the pickup device 10 will be described. 9 and 10 are cross-sectional views sequentially illustrating the operation of the semiconductor device manufacturing apparatus according to the first embodiment. First, as shown in FIG. 8, the semiconductor chip 1a (see FIG. 1) fixed to the dicing frame is placed on the upper surface of the holding stage 11 with the surface on which the adhesive tape 2 is attached facing down. . Each semiconductor chip 1 a is in a state of being held at the apex portion of the protrusion 23 via the adhesive tape 2. Thereby, a sealed space 14 surrounded by the adhesive tape 2, the first groove 21 a, the second groove 22 a, and the outer wall portion 13 is formed between the adhesive tape 2 and the holding stage 11.

  Next, the sealed space 14 is decompressed through the vent hole 12 by decompression means (not shown). Thereby, a negative pressure arises in the adhesive tape 2 affixed on the semiconductor chip 1a. As described above, the width of the first space 14a is wider than the width of the second space 14b, and the cross-sectional area of the first space 14a is larger than the cross-sectional area of the second space 14b. Thereby, since the decompression force is larger in the first space 14a than in the second space 14b, only the portion forming the first space 14a of the adhesive tape 2 in a flat state as shown in FIG. As shown in FIG. 9 (b), it is deformed along the inner wall of the first groove 21a. The part which forms the 2nd space 14b of the adhesive tape 2 has not deform | transformed yet.

  That is, the adhesive tape 2 is peeled only from the outer peripheral side of the semiconductor chip 1a. On the other hand, the central part side of the semiconductor chip 1 a is in a state of being attached to the adhesive tape 2. For this reason, the semiconductor chip 1 a is held on the upper surface of the holding stage 11 by being sufficiently in close contact with the adhesive tape 2 on the center side of the semiconductor chip 1 a. Then, by continuing the decompression of the sealed space 14 by the decompression means, the portion of the adhesive tape 2 forming the second space 14b is deformed along the inner wall of the second groove 22a as shown in FIG. As a result, the semiconductor chip 1 a and the adhesive tape 2 are in contact with each other only at the portion corresponding to the apex portion of the protrusion 23. For this reason, the adhesive tape 2 is almost peeled from the semiconductor chip 1a, and the adhesion force between the semiconductor chip 1a and the adhesive tape 2 is substantially zero.

  Moreover, the adhesive tape 2 is maintained in the state which contact | connected the inner wall of the 1st groove | channel 21a and the 2nd groove | channel 22a by continuing depressurizing the sealed space 14 with a pressure reduction means. Thereby, when the semiconductor chip 1a is picked up by the collet, the adhesive tape 2 peeled from the semiconductor chip 1a is not picked up by the collet together with the semiconductor chip 1a.

  Next, as shown in FIG. 10B, the semiconductor chip 1 is arranged by a collet 31 disposed above the semiconductor chip 1a at a predetermined interval h from the semiconductor chip 1a held at the apex of the protrusion 23. The semiconductor chip 1a is picked up from the holding stage 11 by sucking and adsorbing 1a. The distance h between the collet 31 and the semiconductor chip 1a is preferably 0.05 mm or more and 0.5 mm or less. The reason is as described above. Thereby, the pickup of the semiconductor chip 1a by the pickup device 10 is completed.

  When the pickup device 10 includes a heating unit, the sealed space 14 may be decompressed by the decompression unit while heating the adhesive tape 2 by the heating unit. By heating the adhesive tape 2 by the heating means, the adhesive tape 2 is easily deformed. For this reason, the adhesive tape 2 is easily deformed along the inner walls of the first groove 21a and the second groove 22a, and is peeled off from the semiconductor chip 1a.

  As described above, according to the first embodiment, the first groove 21a and the second groove 22a are provided on the surface (upper surface) of the holding stage 11 that holds the semiconductor chip 1a. Thereby, when the sealed space 14 surrounded by the adhesive tape, the first groove 21a and the second groove 22a is decompressed by the decompression means, the pressure is reduced in the first space 14a formed by the adhesive tape 2 and the first groove 21a. The loss is smaller than the decompression loss in the second space 14b formed by the adhesive tape 2 and the second groove 22a. For this reason, when depressurizing the sealed space 14 and peeling the adhesive tape 2 from the semiconductor chip 1a, the adhesive tape 2 on the outer peripheral side of the semiconductor chip 1a is moved faster than the adhesive tape 2 on the central part side of the semiconductor chip 1a. Can be peeled off. Therefore, when the adhesive tape 2 on the outer peripheral side of the semiconductor chip 1a is peeled off, the central part side of the semiconductor chip 1a can be sufficiently adhered to the adhesive tape 2. For this reason, even if the timing at which the adhesive tape 2 is peeled off from the outer peripheral side of the semiconductor chip 1a varies, the semiconductor chip 1a can be prevented from being inclined with respect to the holding stage 11.

  Further, after that, when the adhesive tape 2 on the central portion side of the semiconductor chip 1a is peeled off, the adhesive tape 2 on the outer peripheral portion side of the semiconductor chip 1a has already been peeled off. For this reason, the adhesive tape 2 on the center side of the semiconductor chip 1a can be peeled in a state where the semiconductor chip 1a is held in parallel with the holding stage 11. Thereby, the adhesive tape 2 is removed from the semiconductor chip 1a in a state where the semiconductor chip 1a is held in parallel with the holding stage 11 regardless of the surface roughness of the back surface of the semiconductor chip 1a, the presence or absence of the back electrode, and the rigidity of the adhesive tape. It can be reliably peeled off.

  Further, after the sealed space 14 surrounded by the adhesive tape 2, the first groove 21 a and the second groove 22 a is decompressed by the decompression means, the semiconductor chip 1 a and the adhesive tape 2 are portions corresponding to the apex portions of the protrusions 23. In this state, the adhesive tape is almost peeled off from the semiconductor chip. For this reason, the adhesive force between the semiconductor chip 1a and the adhesive tape 2 can be made substantially zero. Therefore, for example, the adhesive tape 2 can be peeled from the semiconductor chip 1a without performing a process of pushing up the semiconductor chip 1a with a needle or the like as in the prior art.

  Furthermore, since the adhesive force between the semiconductor chip 1a and the adhesive tape 2 can be made substantially zero, a predetermined interval h between the collet 31 and the semiconductor chip 1a can be set without pressing the collet 31 against the semiconductor chip 1a. In the opened state, the semiconductor chip 1a can be picked up from the holding stage 11. Moreover, since the adhesive force between the semiconductor chip 1a and the adhesive tape 2 can be made substantially zero, a part of the semiconductor chip 1a does not remain attached to the adhesive tape 2. Thereby, the semiconductor chip 1a can be reliably picked up by the suction force of the collet 31.

  Thus, the semiconductor chip 1a on the holding stage 11 can be picked up without pressing the collet 31 against the semiconductor chip 1a and without tilting the semiconductor chip 1a with respect to the holding stage 11. For this reason, the chip | tip and damage | wound of the semiconductor chip 1a at the time of peeling from the adhesive tape 2 can be reduced. Further, the thinned semiconductor chip 1a can be picked up by the pickup device 10, and the thinned semiconductor chip 1a can be safely transported.

(Embodiment 2)
FIG. 11 is a cross-sectional view schematically showing a main part of the semiconductor device manufacturing apparatus according to the second embodiment. FIG. 12 is a cross-sectional view showing the semiconductor chip held by the semiconductor device manufacturing apparatus according to the second embodiment. The semiconductor device manufacturing apparatus (pickup apparatus) 40 according to the second embodiment differs from the semiconductor device manufacturing apparatus according to the first embodiment in that the cross-sectional shapes of the first groove 51a and the second groove 52a are rectangular. This is the point.

  As shown in FIG. 11, the holding stage 11 of the pickup apparatus 40 includes at least a first groove 51a and a second groove 52a provided on the upper surface of the holding stage 11, and at least connected to the first groove 51a and the second groove 52a. One or more ventilation holes 12 and an outer wall portion 13 that contacts the side surface of the holding stage 11 and surrounds the holding stage 11 are provided. The vent hole 12 is connected to the bottom of the first groove 51a or the second groove 52a, for example. Further, the vent hole 12 penetrates the holding stage 11 and is connected to the decompression means.

  The first groove 51 a and the second groove 52 a are the same as the first groove and the second groove arranged on the holding stage of the pickup device according to the first embodiment, and the first groove arrangement area 51 and the second groove arrangement area 52. Is arranged. The first groove 51a and the second groove 52a have a substantially rectangular cross-sectional shape. The width t3 of the first groove 51a is the same as the width of the opening of the first groove in the first embodiment. The width t4 of the second groove 52a is the same as the width of the opening of the second groove in the first embodiment.

  Therefore, as shown in FIG. 12, the cross-sectional area of the second space 44b formed by the adhesive tape 2 and the second groove 52a is the cross-sectional area of the first space 44a formed by the adhesive tape 2 and the first groove 51a. Smaller than. Therefore, when the sealed space 44 surrounded by the adhesive tape 2, the first groove 51a, the second groove 52a, and the outer wall portion 13 is decompressed by the decompression means, the decompression force is greater in the first space 44a than in the second space 44b. Becomes larger.

  For this reason, as in Embodiment 1, the adhesive tape 2 on the outer peripheral side of the semiconductor chip 1a is peeled off earlier than the adhesive tape 2 on the central side of the semiconductor chip 1a. Thereafter, the pressure reduction of the sealed space 44 by the pressure reducing means is continued, whereby the pressure-sensitive adhesive tape 2 on the central portion side of the semiconductor chip 1a is also peeled off. The pressure-sensitive adhesive tape 2 is connected to the inner walls (side walls and the second grooves 52a). And is held on the upper surface of the holding stage 11.

  On the back surface of the adhesive tape 2 to which the semiconductor chip 1a held by the holding stage 11 is attached by the end of the plurality of grooves (first groove 51a and second groove 52a) provided on the holding stage 11 on the opening side. A vertex portion that makes point contact is formed. That is, this apex portion is the apex portion of the quadrangular prism-shaped projection 53 formed by the side walls of adjacent grooves. The semiconductor chip 1 a held on the holding stage 11 is held only at the apex of the protrusion 53. The protruding portion 53 is formed so that the contact area between the apex portion of the protruding portion 53 and the semiconductor chip 1a is reduced.

  The distance between the apexes of the protrusion 53 formed by the side wall of the first groove 51a is the width t3 of the opening of the fifth groove 51a. The distance between the apexes of the projection 53 constituted by the side wall of the first groove 51a and the side wall of the second groove 52a, and the distance between the apexes of the projection 53 constituted by the side wall of the second groove 52a are: It becomes the width t4 of the opening of the second groove 52a.

  The plurality of semiconductor chips 1 a held on the holding stage 11 are held at the apexes of at least four protrusions 53. The configuration of the pickup device 40 other than the first groove 51a and the second groove 52a is the same as the configuration of the pickup device according to the first embodiment. The method of picking up the semiconductor chip 1a by the pickup device 40 is the same as that of the pickup device according to the first embodiment.

  As described above, according to the second embodiment, the same effects as those of the semiconductor device manufacturing apparatus (pickup apparatus) and the semiconductor device manufacturing method (pickup method) according to the first embodiment can be obtained.

  In the above description, the present invention has been described by taking the configuration in which the first and second grooves are provided in the holding stage as an example. It is good also as a structure which increased more. Specifically, for example, the first and second grooves are provided in the holding stage as in the above-described embodiment, and moreover than the second groove at a position corresponding to the central portion of the semiconductor chip held by the holding stage. A third groove having a narrower width than the second groove may be arranged on the center side of the semiconductor chip. That is, the widest groove is provided at a position corresponding to the outer peripheral portion of the semiconductor chip held by the holding stage, and the position corresponding to the center of the semiconductor chip from the position corresponding to the outer peripheral portion of the semiconductor chip held by the holding stage. A plurality of grooves having different widths may be arranged so that the width of the grooves becomes narrower. Further, the present invention can provide the same effect even when a back electrode or the like is formed on the back surface side of the semiconductor wafer before the adhesive tape is attached to the back surface of the thinned semiconductor wafer.

  As described above, the semiconductor device manufacturing apparatus and the semiconductor device manufacturing method according to the present invention are useful when picking up a dicing cut semiconductor chip from an adhesive tape and separating it into individual semiconductor chips.

DESCRIPTION OF SYMBOLS 1 Semiconductor wafer 1a Semiconductor chip 2 Adhesive tape 3 Dicing frame 10 Pickup apparatus 11 Holding stage 12 Vent hole 13 Outer wall part 14 Sealed space 14a, 14b Space (first and second)
20 Region for holding one semiconductor chip 21a, 22a Groove (first and second)
23 Protrusion

Claims (11)

A semiconductor device manufacturing apparatus that picks up a semiconductor chip cut by dicing from an adhesive tape,
A holding stage having a plurality of grooves provided on a surface for holding the semiconductor chip, and at least one vent hole connected to the grooves;
A first groove disposed at a position corresponding to an outer peripheral portion of the semiconductor chip held by the holding stage among the grooves;
Of the grooves, a second groove having a narrower width than the first groove and disposed at a position corresponding to a central portion of the semiconductor chip held by the holding stage;
An apex portion formed by an end portion on the opening side of the groove and in point contact with the semiconductor chip held by the holding stage;
After the semiconductor chip is held at the apex portion with the surface of the semiconductor chip to which the adhesive tape is attached facing the holding stage, the semiconductor chip is surrounded by the groove and the adhesive tape through the vent hole. Decompression means for decompressing the space,
Suction means for sucking and picking up the semiconductor chip held at the apex after the space has been decompressed by the decompression means;
An apparatus for manufacturing a semiconductor device, comprising: A semiconductor device manufacturing apparatus that picks up a semiconductor chip cut by dicing from an adhesive tape,
A holding stage having a plurality of grooves provided on a surface on the side holding the semiconductor chip, and at least one vent hole connected to the grooves;
An apex portion formed by an end portion on the opening side of the groove and in point contact with the semiconductor chip held by the holding stage;
After the semiconductor chip is held at the apex portion with the surface of the semiconductor chip to which the adhesive tape is attached facing the holding stage, the semiconductor chip is surrounded by the groove and the adhesive tape through the vent hole. Decompression means for decompressing the space,
A suction unit that is arranged at a predetermined interval from the semiconductor chip held at the apex portion, and sucks and picks up the semiconductor chip held at the apex portion after the space is depressurized by the depressurization unit. When,
An apparatus for manufacturing a semiconductor device, comprising:   3. The semiconductor device manufacturing apparatus according to claim 1, wherein the decompression unit deforms the adhesive tape attached to the semiconductor chip along an inner wall of the groove.   The said decompression means decompresses the said space until the contact part of the said semiconductor chip and the said adhesive tape becomes only the part corresponding to the said vertex part, The Claim 1 characterized by the above-mentioned. Semiconductor device manufacturing equipment. Further comprising an outer wall portion in contact with a side surface of the holding stage and surrounding the holding stage;
The surface of the outer wall portion on the side where the semiconductor chip is held is the same height as the surface of the holding stage on the side where the semiconductor chip is held. The manufacturing apparatus of the semiconductor device as described in one.   The said apex part consists of the apex part of the cone-shaped, quadrangular pyramid-shaped, or quadrangular prism-shaped projection part comprised by the side wall of the said adjacent groove | channel, The any one of Claims 1-5 characterized by the above-mentioned. Semiconductor device manufacturing equipment.   7. The apparatus for manufacturing a semiconductor device according to claim 1, wherein a dimensional ratio of two sides sharing one vertex of the semiconductor chip is 0.75 or more and 1.25 or less. .   8. The semiconductor device manufacturing method according to claim 1, wherein at least four air holes are provided in a region of the holding stage where one semiconductor chip is held. 9. apparatus.   The said attraction | suction means is arrange | positioned with the said semiconductor chip hold | maintained at the said vertex part at intervals of 0.05 mm or more and 0.5 mm or less, The Claim 1 characterized by the above-mentioned. Semiconductor device manufacturing equipment. A method for manufacturing a semiconductor device that picks up a semiconductor chip cut by dicing from an adhesive tape,
The surface on the side where the adhesive tape is affixed to the apex that is formed by the end of the opening provided on the holding stage and is in point contact with the semiconductor chip held on the holding stage. Holding step for holding the semiconductor chip on the holding stage side;
After the holding step, the first groove disposed at a position corresponding to the outer peripheral portion of the semiconductor chip, and a width narrower than the first groove, corresponding to the central portion of the semiconductor chip of the holding stage. A depressurizing step for depressurizing the groove formed by the second groove disposed at the position and the space surrounded by the adhesive tape;
After the decompression step, a suction step for sucking and picking up the semiconductor chip held at the apex portion;
A method for manufacturing a semiconductor device, comprising: A method for manufacturing a semiconductor device that picks up a semiconductor chip cut by dicing from an adhesive tape,
The surface on the side where the adhesive tape is affixed to the apex that is formed by the end of the opening provided on the holding stage and is in point contact with the semiconductor chip held on the holding stage. Holding step for holding the semiconductor chip on the holding stage side;
After the holding step, a decompression step of decompressing the space surrounded by the groove and the adhesive tape;
After the decompression step, a suction step of sucking and picking up the semiconductor chip by suction means arranged at a predetermined interval from the semiconductor chip held at the apex portion;
A method for manufacturing a semiconductor device, comprising:

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