JP2012248786A - Wiring board and manufacturing method of the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a wiring board which creates good connection between electrode terminals of a semiconductor element and semiconductor element connection pads, and to provide a manufacturing method of the wiring board.SOLUTION: A solder resist layer 6 formed by a thermosetting resin and deposited on the lower surface side of an insulation substrate 1 fills through holes 2 provided on the insulation substrate 1, and a solder resist layer 7 formed by a thermosetting resin and deposited on an upper surface of the insulation substrate 1 has an opening, which exposes the through holes 2 in a mounting part 1a, and higher cure shrinkage than the solder resist layer 6 deposited on the lower surface side of the insulation substrate 1.

Description

  The present invention relates to a wiring board for mounting a semiconductor element and a manufacturing method thereof.

  Conventionally, as shown in FIG. 10, the central portion of the upper surface of an insulating substrate 11 having a large number of through-holes 12 is used as a wiring substrate on which a semiconductor element S having peripherally arranged electrode terminals T is mounted by flip-chip connection. A mounting portion 11 a for mounting the semiconductor element S is provided on the substrate, and a plurality of wiring conductors 13 led out from the upper surface of the insulating substrate 11 to the lower surface through the inside of the through holes 12 are attached. Is disposed as a semiconductor element connection pad 14 for connecting to the electrode terminal T of the semiconductor element S on the outer peripheral portion of the mounting portion 11a, and is disposed as an external connection pad 15 for connecting to an external electric circuit board on the lower surface of the insulating substrate 11. Furthermore, the semiconductor element connection pads 14 and the external connection pads are provided in the upper and lower surfaces of the insulating substrate 11 and the through holes 12. 5 wiring substrate made by depositing a solder resist layer 16 having openings 16a and 16b are exposed has been known.

  In such a wiring board, as shown in FIG. 11, the semiconductor element connection pad 14 provided on the mounting portion 11 a and the electrode terminal T of the semiconductor element S are pressure-contacted to face each other and joined. The semiconductor element S is mounted by filling a sealing resin 17 called underfill between the mounting portion 11a and the mounting portion 11a.

  In this conventional wiring board, in order to deposit the solder resist layer 16 on the upper and lower surfaces of the insulating substrate 11 and in the through holes 12, a resin paste having photosensitivity for the solder resist layer is applied by screen printing. 11 is applied to the upper and lower surfaces of the resin 11 and simultaneously filled into the through-holes 12, and after that, the applied and filled resin paste is exposed and developed so as to have the openings 16 a and 16 b, and is thermally cured and UV cured. Yes.

  However, in this conventional wiring board, when the solder resist layer 16 is deposited on the upper and lower surfaces of the insulating substrate 11 and in the through hole 12, the resin on the through hole 12 is filled with the resin paste filled in the through hole 12. The paste is pushed outward, and the solder resist layer 16 on the through hole 12 tends to have a convex portion.

  And when the large convex part is formed in the soldering resist layer 16 in the mounting part 11a, when making the electrode terminal T of the semiconductor element S face to face on the semiconductor element connection pad 14 provided in the mounting part 11a, The lower surface of the semiconductor element S and the convex part of the solder resist layer 16 are in contact with each other. As a result, the electrode terminal T of the semiconductor element S and the semiconductor element connection pad 14 are not firmly pressed together, and the connection between the two is performed well. It has the problem that it becomes difficult.

  Therefore, the applicant of the present application previously provided in Japanese Patent Application No. 2009-250506 an opening for exposing the through hole of the mounting portion in the solder resist layer on the upper surface side, or the thickness of the mounting portion of the solder resist layer on the upper surface side as the mounting portion. A wiring board was proposed in which the thickness of the solder resist layer on the upper side was made thinner than the thickness on the outer side, or the thickness of the solder resist layer on the upper side was made thinner than the thickness of the solder resist layer on the lower side. However, when the wiring board proposed in this Japanese Patent Application No. 2009-250506 is made thinner, the warpage generated in the wiring board increases, and as a result, it becomes difficult to mount the semiconductor element satisfactorily. The problem was induced.

JP 2006-66517 A

  The problem of the present invention is that, in a wiring board on which a semiconductor element having electrode terminals arranged peripherally on the lower surface outer peripheral part is mounted by flip chip connection, the warp generated in the wiring board can be reduced, and the semiconductor element can be satisfactorily mounted. An object of the present invention is to provide a wiring board and a method for manufacturing the same, which can satisfactorily connect an electrode terminal of a semiconductor element and a semiconductor element connection pad.

  A first wiring board according to the present invention has a mounting portion on which a semiconductor element is mounted on an upper surface, and an insulating substrate formed with a plurality of through holes from the upper surface including the mounting portion to the lower surface, and the insulating substrate. The insulating substrate has a plurality of semiconductor element connection pads that are attached from the upper surface to the lower surface of the insulating substrate through the inner surface of the through hole, and to which the electrode terminals of the semiconductor element are connected to the outer peripheral portion of the mounting portion. A wiring conductor having an external connection pad to which a wiring conductor of an external electric circuit board is connected to the lower surface of the semiconductor substrate, and exposing the semiconductor element connection pad and the external connection pad in the upper and lower surfaces of the insulating substrate and the through hole. A wiring board comprising a solder resist layer made of a thermosetting resin and deposited so as to fill the inside of the through hole. The through hole is filled with a solder resist layer deposited on the lower surface side of the insulating substrate, and the solder resist layer deposited on the upper surface of the insulating substrate exposes the through hole in the mounting portion. And having a curing shrinkage ratio larger than that of the solder resist layer deposited on the lower surface side.

  A second wiring board according to the present invention includes a mounting portion on which a semiconductor element is mounted on an upper surface, and an insulating substrate in which a plurality of through holes are formed from the upper surface to the lower surface including the mounting portion, and the insulating substrate. The insulating substrate has a plurality of semiconductor element connection pads that are attached from the upper surface to the lower surface of the insulating substrate through the inner surface of the through hole, and to which the electrode terminals of the semiconductor element are connected to the outer peripheral portion of the mounting portion. A wiring conductor having an external connection pad to which a wiring conductor of an external electric circuit board is connected to the lower surface of the semiconductor substrate, and exposing the semiconductor element connection pad and the external connection pad in the upper and lower surfaces of the insulating substrate and the through hole. A wiring board comprising a solder resist layer made of a thermosetting resin and deposited so as to fill the inside of the through hole. The through hole is filled with a solder resist layer deposited on the lower surface side of the insulating substrate, and the solder resist layer deposited on the upper surface of the insulating substrate has a thickness at the mounting portion. It is characterized by having a layer that is thinner than the outer thickness and has a larger cure shrinkage rate than the solder resist layer deposited on the lower surface side at least outside the mounting portion.

  A third wiring board of the present invention has a mounting portion on which a semiconductor element is mounted on the upper surface, and an insulating substrate formed with a plurality of through holes from the upper surface including the mounting portion to the lower surface, and the insulating substrate. The insulating substrate has a plurality of semiconductor element connection pads that are attached from the upper surface to the lower surface of the insulating substrate through the inner surface of the through hole, and to which the electrode terminals of the semiconductor element are connected to the outer peripheral portion of the mounting portion. A wiring conductor having an external connection pad to which a wiring conductor of an external electric circuit board is connected to the lower surface of the semiconductor substrate, and exposing the semiconductor element connection pad and the external connection pad in the upper and lower surfaces of the insulating substrate and the through hole. A wiring board comprising a solder resist layer made of a thermosetting resin and deposited so as to fill the inside of the through hole. The through hole is filled with a solder resist layer deposited on the lower surface side of the insulating substrate, and the solder resist layer deposited on the upper surface of the insulating substrate is a solder resist layer deposited on the lower surface. It is thinner than the layer and has a higher curing shrinkage rate than the solder resist layer deposited on the lower surface side.

  A first method for manufacturing a wiring board according to the present invention has a mounting portion on which a semiconductor element is mounted on an upper surface, and a plurality of through holes are formed from the upper surface to the lower surface including the mounting portion. A step of preparing an insulating substrate having a wiring conductor deposited on the lower surface through the inner surface of the hole; and applying a first thermosetting resin paste for a solder resist layer to the lower surface of the insulating substrate. The resin paste is filled with the resin paste from the lower surface side into the through hole, and is cured and shrunk more than the first resin paste so as to have an opening exposing the through hole in the mounting portion on the upper surface of the insulating substrate. A step of applying a thermosetting second resin paste for a solder resist layer having a high rate, and the upper and lower surfaces of the insulating substrate and the through holes A plurality of semiconductor element connection pads in which a part of the wiring conductor deposited on the upper surface is connected to the electrode terminal of the semiconductor element by thermally curing the first and second resin pastes after exposure and development The solder resist layer on the upper surface side having an opening for exposing the through hole in the mounting portion and exposing the through hole in the mounting portion, and a part of the wiring conductor attached to the lower surface of the external electric circuit board And a step of forming a solder resist layer on the lower surface side having an opening exposed as an external connection pad connected to the wiring conductor.

  The second wiring board manufacturing method of the present invention has a mounting portion on which a semiconductor element is mounted on the upper surface, and a plurality of through holes are formed from the upper surface to the lower surface including the mounting portion, and the through-hole is formed from the upper surface. A step of preparing an insulating substrate having a wiring conductor deposited on the lower surface through the inner surface of the hole; and applying a first thermosetting resin paste for a solder resist layer to the lower surface of the insulating substrate. And filling the through hole into the through hole from the lower surface side, and forming a thermosetting second solder resist layer on the upper surface of the insulating substrate having a curing shrinkage rate greater than or equal to that of the first resin paste. (2) applying the resin paste (2) so as to be thinner than the first resin paste applied to the lower surface; A step of applying a thermosetting third resin paste for a solder resist having a high rate on the second resin paste outside the mounting portion; and the upper and lower surfaces of the insulating substrate and the first resin in the through hole. A plurality of semiconductor element connection pads for connecting a part of the wiring conductor deposited on the upper surface to the electrode terminal of the semiconductor element by curing the first, second and third resin pastes after exposure and development As a solder resist layer on the upper surface side having an opening exposed to the outer peripheral portion of the mounting portion, and a part of the wiring conductor deposited on the lower surface as an external connection pad connected to the wiring conductor of the external electric circuit board And a step of forming a solder resist layer on the lower surface side having an opening to be exposed.

  According to a third method of manufacturing a wiring board of the present invention, a plurality of through holes are formed from a top surface to a bottom surface including a mounting portion on which a semiconductor element is mounted on the top surface. A step of preparing an insulating substrate having a wiring conductor deposited on the lower surface through the inner surface of the hole; and applying a first thermosetting resin paste for a solder resist layer to the lower surface of the insulating substrate. A step of filling the through hole into the through hole from the lower surface side, and a thermosetting second resin paste for the solder resist layer having a higher curing shrinkage than the first resin paste on the upper surface of the insulating substrate Is applied so as to be thinner than the resin paste applied to the lower surface, and the upper and lower surfaces of the insulating substrate and the first ohmic in the through-hole. And mounting the second resin paste as a plurality of semiconductor element connection pads connected to electrode terminals of the semiconductor element by curing the second resin paste after exposing and developing the resin paste. A solder resist layer on the upper surface side having an opening exposed to the outer peripheral portion of the substrate and an opening for exposing a part of the wiring conductor attached to the lower surface as an external connection pad connected to the wiring conductor of the external electric circuit board. And a step of forming a solder resist layer on the lower surface side.

  According to the first wiring board of the present invention, the inside of the through hole is filled with the solder resist layer deposited on the lower surface side of the insulating substrate, and the solder resist layer deposited on the upper surface of the insulating substrate is mounted. Since the through-hole is exposed in the part, the inside of the through-hole is satisfactorily filled with the solder resist, and the solder resist filled in the through-hole protrudes above the through-hole, for example. However, in the mounting portion of the insulating substrate, a large convex portion of the solder resist layer that contacts the lower surface of the semiconductor element to be mounted is not formed. Therefore, when the electrode terminal of the semiconductor element is pressed face-to-face on the semiconductor element connection pad provided in the mounting portion, the lower surface of the semiconductor element and the solder resist layer in the mounting portion do not come into contact with each other. The connection between the terminal and the semiconductor element connection pad can be performed satisfactorily. Furthermore, since the solder resist layer deposited on the upper surface side has a higher curing shrinkage rate than the solder resist layer deposited on the lower surface side, it effectively prevents the warpage caused by the curing shrinkage of the solder resist layer on the lower surface side. Can be suppressed.

  According to the second wiring board of the present invention, the inside of the through hole is filled with the solder resist layer deposited on the lower surface side of the insulating substrate, and the solder resist layer deposited on the upper surface of the insulating substrate is mounted. Because the thickness of the part is thinner than the thickness outside the mounting part, the inside of the through hole is well filled with solder resist, and even if the solder resist filled in the through hole protrudes over the through hole In the mounting portion of the insulating substrate, a large convex portion of the solder resist layer that contacts the lower surface of the mounted semiconductor element is not formed. Therefore, when the electrode terminal of the semiconductor element is pressed face-to-face on the semiconductor element connection pad provided in the mounting portion, the lower surface of the semiconductor element and the solder resist layer in the mounting portion do not come into contact with each other. The connection between the terminal and the semiconductor element connection pad can be performed satisfactorily. Further, since the solder resist layer deposited on the upper surface side has a layer having a larger cure shrinkage rate than the solder resist layer deposited on the lower surface side at least outside the mounting portion, the solder resist layer on the lower surface side It is possible to effectively suppress the occurrence of warpage due to curing shrinkage.

  According to the third wiring board of the present invention, the inside of the through hole is filled with the solder resist layer deposited on the lower surface side of the insulating substrate, and the solder resist layer deposited on the upper surface of the insulating substrate is the lower surface. The through hole is filled with the solder resist well, and even if the solder resist filled in the through hole protrudes over the through hole, the insulating substrate In the mounting portion, a large convex portion of the solder resist layer that contacts the lower surface of the semiconductor element to be mounted is not formed. Therefore, when the electrode terminal of the semiconductor element is pressed face-to-face on the semiconductor element connection pad provided in the mounting portion, the lower surface of the semiconductor element and the solder resist layer in the mounting portion do not come into contact with each other. The connection between the terminal and the semiconductor element connection pad can be performed satisfactorily. Furthermore, since the solder resist layer deposited on the upper surface side has a higher curing shrinkage rate than the solder resist layer deposited on the lower surface side, it effectively prevents the warpage caused by the curing shrinkage of the solder resist layer on the lower surface side. Can be suppressed.

  According to the first method for manufacturing a wiring board of the present invention, the thermosetting first resin paste for the solder resist layer is applied to the lower surface of the insulating substrate, and the first resin paste is applied from the lower surface side to the first resin paste. Heat for the solder resist layer having a larger curing shrinkage than the first resin paste so as to have an opening for filling the through hole and then exposing the through hole in the mounting portion on the upper surface of the insulating substrate. Since the curable second resin paste is applied, the inside of the through hole is satisfactorily filled with the solder resist, and even if the solder resist filled in the through hole protrudes over the through hole, the insulating substrate In the mounting portion, a large convex portion of the solder resist layer that contacts the lower surface of the semiconductor element to be mounted is not formed. Therefore, when the electrode terminal of the semiconductor element is pressed face-to-face on the semiconductor element connection pad provided in the mounting portion, the lower surface of the semiconductor element and the solder resist layer in the mounting portion do not come into contact with each other. It is possible to provide a wiring board capable of satisfactorily connecting the terminals and the semiconductor element connection pads. Furthermore, since the solder resist layer deposited on the upper surface side is formed of a resin paste having a larger curing shrinkage rate than the solder resist layer deposited on the lower surface side, the curing shrinkage of the solder resist layer on the lower surface side It is possible to effectively suppress the occurrence of warping.

  According to the second method of manufacturing a wiring board of the present invention, the thermosetting first resin paste for the solder resist layer is applied to the lower surface of the insulating substrate, and the first resin paste is applied from the lower surface side. Fill the through hole, and then apply a thermosetting second resin paste for solder resist layer on the lower surface of the insulating substrate on the upper surface of the insulating substrate. It is applied so as to be thinner than the applied first resin paste, and then a thermosetting third resin paste for a solder resist having a higher curing shrinkage than the first resin paste is provided outside the mounting portion. Since it is coated on the second resin paste, the inside of the through hole is filled with the solder resist well, and the solder resist filled in the through hole is, for example, the through hole. Even protruding above, in the mounting portion of the insulating substrate, is not a large protrusion of the solder resist layer so as to contact with the lower surface of the semiconductor element to be mounted is formed. Therefore, when the electrode terminal of the semiconductor element is pressed face-to-face on the semiconductor element connection pad provided in the mounting portion, the lower surface of the semiconductor element and the solder resist layer in the mounting portion do not come into contact with each other. It is possible to provide a wiring board capable of satisfactorily connecting the terminals and the semiconductor element connection pads. Furthermore, since the solder resist layer deposited on the upper surface side has a layer formed of a resin paste having a larger curing shrinkage rate than the solder resist layer deposited on the lower surface side at least outside the mounting portion, Generation of warpage due to curing shrinkage of the solder resist layer on the lower surface side can be effectively suppressed.

  According to the third method of manufacturing a wiring board of the present invention, the thermosetting first resin paste for the solder resist layer is applied to the lower surface of the insulating substrate, and the first resin paste is applied from the lower surface side. A through-hole was filled, and then a thermosetting second resin paste for a solder resist layer having a higher curing shrinkage than the first resin pace was applied to the upper surface of the insulating substrate on the lower surface. Since it is applied so as to be thinner than the first resin paste, the inside of the through hole is satisfactorily filled with the solder resist, and even if the solder resist filled in the through hole protrudes above the through hole, for example. In the mounting portion of the insulating substrate, a large convex portion of the solder resist layer that contacts the lower surface of the mounted semiconductor element is not formed. Therefore, when the electrode terminal of the semiconductor element is pressed face-to-face on the semiconductor element connection pad provided in the mounting portion, the lower surface of the semiconductor element and the solder resist layer in the mounting portion do not come into contact with each other. It is possible to provide a wiring board capable of satisfactorily connecting the terminals and the semiconductor element connection pads. Furthermore, since the solder resist layer deposited on the upper surface side is formed of a resin paste having a larger curing shrinkage rate than the solder resist layer deposited on the lower surface side, the curing shrinkage of the solder resist layer on the lower surface side It is possible to effectively suppress the occurrence of warping.

FIG. 1 is a schematic sectional view showing a first embodiment of a wiring board according to the present invention. FIG. 2 is a schematic cross-sectional view showing a case where a semiconductor element is mounted on the wiring board shown in FIG. FIG. 3 is a schematic cross-sectional view for each step for explaining the method of manufacturing the wiring board shown in FIG. FIG. 4 is a schematic sectional view showing a second embodiment of the wiring board of the present invention. FIG. 5 is a schematic cross-sectional view showing a case where a semiconductor element is mounted on the wiring board shown in FIG. FIG. 6 is a schematic cross-sectional view for each step for explaining the method of manufacturing the wiring board shown in FIG. FIG. 7 is a schematic cross-sectional view showing a third embodiment of the wiring board of the present invention. FIG. 8 is a schematic cross-sectional view showing a case where a semiconductor element is mounted on the wiring board shown in FIG. FIG. 9 is a schematic cross-sectional view for each step for explaining the method of manufacturing the wiring board shown in FIG. FIG. 10 is a schematic cross-sectional view showing a conventional wiring board. 11 is a schematic cross-sectional view showing a case where a semiconductor element is mounted on the wiring board shown in FIG.

  Next, a first embodiment of the wiring board and the manufacturing method thereof according to the present invention will be described with reference to FIGS. As shown in FIG. 1, the wiring substrate of this example is mainly formed of an insulating substrate 1, a wiring conductor 3, and solder resist layers 6 and 7.

  The insulating substrate 1 is made of an electrically insulating material plate that is thermoset by impregnating a glass cloth base material with a thermosetting resin such as an epoxy resin or a bismaleimide triazine resin, and a semiconductor element S is mounted on the center of the upper surface thereof. A plurality of through holes 2 are formed from the upper surface to the lower surface including the mounting portion 1a. Such an insulating substrate 1 is obtained by impregnating a glass cloth base material with an uncured thermosetting resin composition and semi-curing it, and attaching a metal foil to be a part of the wiring conductor 3 on the upper and lower surfaces thereof. It is formed by thermally curing to form an electric insulating material plate, and then drilling the electric insulating material plate together with the upper and lower metal foils and drilling through holes 2.

  A plurality of wiring conductors 3 are attached from the upper surface of the insulating substrate 1 through the inner surface of the through hole 2 to the lower surface. The wiring conductor 3 functions as a conductive path for connecting the electrode terminal T of the semiconductor element S to a wiring conductor of an external electric circuit board (not shown), and the electrode terminal of the semiconductor element S is provided on the outer periphery of the mounting portion 1a on the upper surface of the insulating substrate 1. It has a semiconductor element connection pad 4 to which T is connected, and an external connection pad 5 connected to the wiring conductor of the external electric circuit board on the lower surface of the insulating substrate 1. Such a wiring conductor 3 is made of a good conductive material such as a copper foil or a copper plating layer. For example, a thin copper foil that is a part of the wiring conductor 3 is attached to the upper and lower surfaces of the electrically insulating material plate for the insulating substrate 1. In addition, after forming the through hole 2 together with the copper foil on the electrically insulating material plate, the electroless copper plating is applied to the inner surface of the through hole 2 and the surface of the copper foil, and then the electrolytic copper is deposited on the electroless copper plating. Plating and electrolytic tin plating are applied to a predetermined pattern corresponding to the wiring conductor 3, and then the electroless copper plating and copper foil not selectively covered with tin plating are selectively removed by etching, and finally electrolysis is performed. It is formed by selectively etching away the tin plating on the copper plating.

  A solder resist layer 6 having a thickness of about 20 to 25 μm is deposited on the lower surface of the insulating substrate 1, and the inside of the through hole 2 is filled with the solder resist layer 6. Further, the external connection pad 5 is exposed from the opening 6 a provided in the solder resist layer 6. Further, a solder resist layer 7 having a thickness of 20 to 25 μm is deposited on the outer peripheral portion of the upper surface of the insulating substrate 1, and the semiconductor element connection pads 4 are exposed from the openings 7 a provided in the solder resist layer 7. ing. The solder resist layers 6 and 7 are for protecting the wiring conductor 3. For example, an inorganic insulating filler such as silicon oxide is dispersed in a photocurable and thermosetting resin substrate such as an acrylic-modified epoxy resin. Made of electrically insulating material. Such solder resist layers 6 and 7 are respectively printed and applied to the upper and lower surfaces of the insulating substrate 1 by printing a resin paste of an electroless material containing, for example, a photosensitive acrylic-modified epoxy resin by a screen printing method. After filling in the through hole 2, the resin paste is exposed and developed in a predetermined pattern, and then cured by ultraviolet curing and heat curing.

  In the wiring board of this example, the through hole 2 is filled with the solder resist layer 6 deposited on the lower surface side of the insulating substrate 1 and the solder resist layer deposited on the upper surface of the insulating substrate 1. 7 has an opening 7a for exposing the semiconductor element connection pad 4 and exposing the through hole 2 in the mounting portion 1a, and has a higher curing shrinkage than the solder resist layer 6 deposited on the lower surface side. Thus, in the wiring substrate of this example, the inside of the through hole 2 is filled with the solder resist layer 6 deposited on the lower surface side of the insulating substrate 1 and the solder resist deposited on the upper surface of the insulating substrate 1. Since the layer 7 has the opening 7a that exposes the semiconductor element connection pad 4 and the through hole 2 in the mounting portion 1a, the solder resist layer 7 on the upper surface side is formed on the through hole 2 in the mounting portion 1a. Even though the through hole 2 is satisfactorily filled with the solder resist layer 6 on the lower surface side, even if the solder resist layer 6 filled in the through hole 6 protrudes over the through hole 2, In the mounting portion 1a of the insulating substrate 1, a large convex portion of the solder resist layer 6 that contacts the lower surface of the semiconductor element S to be mounted. It will not be formed. Furthermore, since the solder resist layer 7 deposited on the upper surface side has a higher curing shrinkage rate than the solder resist layer 6 deposited on the lower surface side, warpage due to the curing shrinkage of the solder resist layer 6 on the lower surface side occurs. Can be effectively suppressed.

  Then, in the wiring board of this example, as shown in FIG. 2, the electrode terminal T of the semiconductor element S is pressed and bonded to the semiconductor element connection pad 4 provided in the mounting portion 1a so as to face each other. The semiconductor element S is mounted by filling a sealing resin 9 called underfill between the element S and the insulating substrate 1. At this time, in the mounting portion 1a of the insulating substrate 1, since the large convex portion of the solder resist layer 6 that contacts the lower surface of the semiconductor element S to be mounted is not formed, according to the wiring substrate of this example, The electrode terminal T of the semiconductor element S and the semiconductor element connection pad 4 can be connected well. At this time, since the sealing resin 9 is filled between the semiconductor element S and the insulating substrate 1, the solder resist layer 7 does not exist on the mounting portion 1a of the insulating substrate 1, but the wiring on the mounting portion 1a. The conductor 3 is well protected by the sealing resin 9. Further, since the warp is small, the semiconductor element S can be mounted satisfactorily.

  Note that the surface of the wiring conductor 3 on the mounting portion 1a except for the semiconductor element connection pads 4 is preferably at least one of a roughened surface and an oxidized surface. The surface of the wiring conductor 3 on the mounting portion 1a excluding the semiconductor element connection pads 4 is set as at least one of a roughened surface and an oxidized surface, whereby the wiring conductor 3 and the sealing resin 9 on the mounting portion 1a are roughened. Or it can adhere | attach very firmly through at least one of an oxidation surface. In this case, a metal having excellent corrosion resistance such as gold is deposited on the surface of the semiconductor element connection pad 4 by plating in order to improve the bonding with the electrode T of the semiconductor element S, or a preflux treatment is performed. It is preferable to give.

  Next, a method for manufacturing the wiring board of the first embodiment described above by the manufacturing method of the present invention will be described with reference to FIG.

  First, as shown in FIG. 3 (a), the semiconductor device has a mounting portion 1a on which a semiconductor element is mounted at the center of the upper surface, and a plurality of through holes 2 are formed from the upper surface to the lower surface including the mounting portion 1a. An insulating substrate 1 having a wiring conductor 3 deposited from the upper surface to the lower surface through the inner surface of the through hole 2 is prepared. At this time, the surface of the wiring conductor 3 is preferably a roughened surface. In order to make the surface of the wiring conductor 3 roughened, for example, a method of roughening the surface of the wiring conductor 3 with an acidic roughening solution containing formic acid is employed.

  Next, as shown in FIG. 3B, a thermosetting resin paste 6P1 having photosensitivity for the solder resist layer is applied to the lower surface of the insulating substrate 1 and the resin paste 6P1 is filled in the through holes 2. . At this time, the resin paste 6 </ b> P <b> 1 filled in the through hole 2 is applied with a thickness that does not protrude significantly from the upper surface side of the insulating substrate 1. A screen printing method is used for application and filling of the resin paste 6P1.

  Next, after drying the lower surface of the insulating substrate 1 and the resin paste 6P1 in the through hole 2, as shown in FIG. 3C, a solder resist layer is formed on the lower surface of the insulating substrate 1 from above the resin paste 6P1. A thermosetting resin paste 6P2 having photosensitivity is applied. By this application, the thickness of the solder resist layer 6 on the lower surface of the insulating substrate 1 can be made sufficiently thick, such as about 20 to 25 μm. If an attempt is made to obtain a solder resist layer 6 having a sufficient thickness on the lower surface of the insulating substrate 1 by applying only the resin paste 6P1 to the lower surface of the insulating substrate 1, the resin paste 6P1 filled in the through hole 2 is insulated. There is a high risk that the substrate 1 protrudes greatly on the upper surface side. Therefore, after applying the resin paste 6P1 to the lower surface of the insulating substrate 1 in such a thin thickness that the resin paste 6P1 filled in the through hole 2 does not protrude greatly to the upper surface side of the insulating substrate 1, and then drying it, It is preferable that the resin paste 6P2 for making the solder resist layer 6 on the lower surface of the insulating substrate 1 have a sufficient thickness is overcoated. The resin paste 6P2 may be the same as the resin paste 6P1. The resin paste 6P2 may be applied by a screen printing method as in the case of the resin paste 6P1, but a screen, a squeegee, or the like used for the screen printing may be different from that in the case of the resin paste 6P1.

  Next, after drying the resin paste 6P2 applied on the resin paste 6P1, as shown in FIG. 3D, an opening 7Pa for exposing the through hole 2 in the mounting portion 1a is formed on the upper surface of the insulating substrate 1. Then, a thermosetting resin paste 7P having photosensitivity for the solder resist layer is applied. As the resin paste 7P, one having a curing shrinkage rate larger than that of the resin pastes 6P1 and 6P2 is used. The resin paste 7P may be applied by using a screen printing method as in the case of the resin pastes 6P1 and 6P2, but the screen used for screen printing uses a masked portion corresponding to the opening 7Pa.

  Next, after the resin paste 7P applied to the upper surface of the insulating substrate 1 is dried, as shown in FIG. 3E, the resin pastes 6P1, 6P2, and 7P are exposed to a predetermined pattern using a photolithography technique. After the development, UV curing and heat curing are performed to expose the solder resist layer 7 on the upper surface side having the opening 7a for exposing the through hole 2 in the semiconductor element connection pad 4 and the mounting portion 1a, and the external connection pad 5. The wiring board of this example is completed by forming the solder resist layer 6 on the lower surface side having the opening 6a to be formed.

  At this time, according to the method of manufacturing the wiring board of this example, the resin pastes 6P1 and 6P2 for the solder resist layer are sequentially applied to the lower surface of the insulating substrate 1 and the resin paste 6P1 is filled into the through holes 2 from the lower surface side. Next, since the resin paste 7P for the solder resist layer is applied on the upper surface of the insulating substrate 1 so as to have the opening 7Pa that exposes the through hole 2 in the mounting portion 1a, the inside of the through hole 2 is better due to the solder resist 6 Even if the solder resist 6 filled in the through hole 2 protrudes above the through hole 2, the mounting portion 1a of the insulating substrate 1 contacts the lower surface of the semiconductor element S to be mounted. Such a large convex portion of the solder resist layer 6 is not formed. Therefore, when the electrode terminal T of the semiconductor element S is pressed face-to-face on the semiconductor element connection pad 4 provided in the mounting portion 1a, the lower surface of the semiconductor element S and the solder resist layers 6 and 7 in the mounting portion 1a are in contact with each other. Thus, it is possible to provide a wiring board capable of satisfactorily connecting the electrode terminal T of the semiconductor element S and the semiconductor element connection pad 4. Further, the solder resist layer 7 deposited on the upper surface side has an opening 7a that exposes the mounting portion 1a at the center thereof, but the curing shrinkage ratio is higher than that of the solder resist layer 6 deposited on the lower surface side. Therefore, the occurrence of warpage due to the curing shrinkage of the solder resist layer 6 on the lower surface side can be effectively suppressed.

  The wiring conductor 3 on the mounting portion 1a exposed in the opening 6a preferably has at least one of a roughened surface and an oxidized surface on the surface excluding the semiconductor element connection pads 4. The surface of the wiring conductor 3 on the mounting portion 1a excluding the semiconductor element connection pads 4 is set as at least one of a roughened surface and an oxidized surface, whereby the wiring conductor 3 and the sealing resin 9 on the mounting portion 1a are roughened. Alternatively, it is possible to provide a wiring substrate that can be adhered extremely firmly through at least one of the oxidized surfaces. In order to make the surface of the wiring conductor 3 on the mounting portion 1a exposed in the opening 6a a roughened surface, a method of roughening the surface of the wiring conductor 3 with a roughening solution as described above is employed. Further, in order to make the surface of the wiring conductor 3 on the mounting portion 1a exposed in the opening 6a an oxidized surface, after forming the solder resist layer 6 on the upper and lower surfaces of the insulating substrate 1, the surface of the wiring conductor 3 is oxidized. A method of leaving it in an easy-to-use environment is adopted. In this case, a metal having excellent corrosion resistance such as gold is deposited on the surface of the semiconductor element connection pad 4 by plating in order to improve the bonding with the electrode T of the semiconductor element S, or a preflux treatment is performed. It is preferable to give.

  Next, a second embodiment of the wiring board and the manufacturing method thereof according to the present invention will be described with reference to FIGS. In addition, in this example, the same code | symbol is attached | subjected to the location similar to the above-mentioned 1st embodiment, and the detailed description is abbreviate | omitted in order to avoid complexity.

  As shown in FIG. 4, in the wiring board of this example, a solder resist layer 6 made of a thermosetting resin is deposited on the lower surface side of the insulating substrate 1 and the upper surface of the insulating substrate 1 is made of a thermosetting resin. Solder resist layers 7 and 8 are deposited. The solder resist layer 6 on the lower surface side has a thickness of about 20 to 25 μm, and has an opening 6 a that fills the inside of the through hole 2 and exposes the external connection pad 5. Of the solder resist layers 7 and 8 on the upper surface side, the solder resist layer 7 covers the upper surface of the insulating substrate 1 with a thickness of 5 to 11 μm from the mounting portion 1 a to the outer peripheral portion and exposes the semiconductor element connection pads 4. It has a portion 7a. The solder resist layer 8 covers the solder resist layer 7 outside the mounting portion 1a and has a thickness of about 9 to 20 μm. As a result, the solder resist layers 7 and 8 have a thickness in the mounting portion 1a that is smaller than the thickness on the outside in a state in which the solder resist layers 7 and 8 are combined. In this example, the solder resist layer 7 has a curing shrinkage rate equal to or larger than that of the solder resist layer 6, and the solder resist layer 8 has a curing shrinkage rate larger than that of the solder resist layer 6. As described above, according to the wiring board of this example, the inside of the through hole 2 is filled with the solder resist layer 6 deposited on the lower surface side of the insulating substrate 1 and is deposited on the upper surface of the insulating substrate 1. Since the thickness of the solder resist layers 7 and 8 in the mounting portion 1a is smaller than the thickness on the outside thereof, the inside of the through hole 2 is formed even though the solder resist layer 7 in the mounting portion 1a is as thin as 5 to 11 μm. Even if the solder resist layer 6 filled in the through hole 6 is satisfactorily filled with the solder resist layer 6 on the lower surface side, even if the solder resist layer 6 protrudes on the through hole 2, the mounting portion 1a of the insulating substrate 1 is mounted. A large convex portion of the solder resist layer 7 that contacts the lower surface of the semiconductor element S is not formed. Further, since the solder resist layers 7 and 8 deposited on the upper surface side have a layer 8 having a larger curing shrinkage rate than the solder resist layer 6 deposited on the lower surface side at least outside the mounting portion, Generation of warpage due to curing shrinkage of the solder resist layer 6 on the side can be effectively suppressed.

  Therefore, according to the wiring board of this example, as shown in FIG. 5, after the electrode terminal T of the semiconductor element S is pressed and bonded to the semiconductor element connection pad 4 provided in the mounting portion 1a facing each other, When the semiconductor element S is mounted by filling the sealing resin 9 between the semiconductor element S and the insulating substrate 1, the mounting portion 1 a of the insulating substrate 1 is in contact with the lower surface of the mounted semiconductor element S. Since the large convex portion of the solder resist layer 6 is not formed, the electrode terminal T of the semiconductor element S and the semiconductor element connection pad 4 can be connected well. At this time, since the sealing resin 9 is filled between the semiconductor element S and the insulating substrate 1, the solder resist layer 7 on the mounting portion 1a of the insulating substrate 1 is thin, but on the mounting portion 1a. The wiring conductor 3 is well protected by the sealing resin 7.

  Next, a method of manufacturing the wiring board of the second embodiment described above by the manufacturing method of the present invention will be described with reference to FIG.

  First, as shown in FIG. 6 (a), it has a mounting portion 1a on which a semiconductor element is mounted at the center of the upper surface, and a plurality of through holes 2 are formed from the upper surface including the mounting portion 1a to the lower surface, and An insulating substrate 1 having a wiring conductor 3 deposited from the upper surface to the lower surface through the inner surface of the through hole 2 is prepared.

  Next, as shown in FIG. 6B, a thermosetting resin paste 6P1 having photosensitivity for the solder resist layer is applied to the lower surface of the insulating substrate 1 and the resin paste 6P1 is filled in the through holes 2. . At this time, the resin paste 6 </ b> P <b> 1 filled in the through hole 2 is applied with a thickness that does not protrude significantly from the upper surface side of the insulating substrate 1.

  Next, after drying the lower surface of the insulating substrate 1 and the resin paste 6P1 in the through hole 2, as shown in FIG. 6C, a solder resist layer is formed on the lower surface of the insulating substrate 1 from above the resin paste 6P1. A thermosetting resin paste 6P2 having photosensitivity is applied. By this application, the thickness of the solder resist layer 6 on the lower surface of the insulating substrate 1 can be made sufficiently thick, such as about 20 to 25 μm.

  Next, after the resin paste 6P2 applied on the resin paste 6P1 is dried, as shown in FIG. 6D, a thermosetting resin having photosensitivity for the solder resist layer on the upper surface of the insulating substrate 1 is used. The paste 7P is applied thinner than the total thickness of the resin pastes 6P1 and 6P2 applied to the lower surface of the insulating substrate 1. The thickness of the resin paste 7P is preferably about 5 to 11 μm. If the thickness of the resin paste 7P is larger than 11 μm, the semiconductor element S and the solder resist layer 6 on the upper surface side of the insulating substrate 1 are formed when the resin paste 6P1 filled in the through hole 2 protrudes from the upper surface of the insulating substrate 1. There is a risk of forming a large convex portion that comes into contact. The inorganic insulating filler contained in the resin paste 7P preferably has a particle size of 10 μm or less. If the particle size of the inorganic insulating filler contained in the resin paste 7P exceeds 10 μm, the risk of pinholes being formed in the applied resin paste 6P3 increases. As the resin paste 7P, a paste having a curing shrinkage rate equal to or larger than that of the resin paste 6P is used.

  Next, after drying the resin paste 7P applied to the upper surface of the insulating substrate 1, as shown in FIG. 6E, the outer side of the mounting portion 1a on the resin paste 7P applied to the upper surface of the insulating substrate 1 is provided. A thermosetting resin paste 8P having photosensitivity for the solder resist layer is applied to the portion. As the resin paste 8P, one having a curing shrinkage rate larger than that of the resin pastes 6P1 and 6P2 is used. The resin paste 8P may be applied by screen printing as in the case of the resin pastes 6P1, 6P2, and 7P. However, the screen used for screen printing uses a masked portion corresponding to the mounting portion 1a. .

  Next, after the resin paste 8P applied to the upper surface of the insulating substrate 1 is dried, as shown in FIG. 6F, the resin pastes 6P1, 6P2, 7P, and 8P are applied with a predetermined pattern using a photolithography technique. After the exposure and development, the solder resist layers 7 and 8 on the upper surface side having the opening 7a for exposing the semiconductor element connection pad 4 and the opening 6a for exposing the external connection pad 5 are exposed by ultraviolet curing and heat curing. The wiring board of this example is completed by forming the lower side solder resist layer 6 having

  At this time, according to the method of manufacturing the wiring board of this example, the resin pastes 6P1 and 6P2 for the solder resist layer are sequentially applied to the lower surface of the insulating substrate 1 and the resin paste 6P1 is filled into the through holes 2 from the lower surface side. Next, the resin pastes 7P and 8P for the solder resist layer are applied to the upper surface of the insulating substrate 1, and the combined thickness of the resin pastes 6P1 and 6P2 applied to the lower surface of the insulating substrate 1 in the mounting portion 1a. In addition, the through-hole 2 is filled with the solder resist 6 and filled into the through-hole 2 in order to be thinner and thinner than the mounting portion 1a. Even if the solder resist 6 is projected on the through hole 2, the mounting portion 1a of the insulating substrate 1 , No large protrusions of the solder resist layer 7 so as to contact with the lower surface of the semiconductor element S to be mounted is formed. Accordingly, when the electrode terminal T of the semiconductor element S is brought into pressure contact with the semiconductor element connection pad 4 provided in the mounting portion 1a, the lower surface of the semiconductor element S and the solder resist layer 7 in the mounting portion 1a are in contact with each other. However, it is possible to provide a wiring board capable of satisfactorily connecting the electrode terminal T of the semiconductor element S and the semiconductor element connection pad 4. Furthermore, since the solder resist layers 7 and 8 deposited on the upper surface side have a layer 8 having a larger curing shrinkage rate than the solder resist layer 6 deposited on the lower surface side at least outside the mounting portion 1a, Although the thickness on the mounting portion 1a is small, it is possible to effectively suppress the occurrence of warpage due to the curing shrinkage of the solder resist layer 6 on the lower surface side.

  Next, a third embodiment of the wiring board and the manufacturing method thereof according to the present invention will be described with reference to FIGS. In addition, in this example, the same code | symbol is attached | subjected to the location similar to the above-mentioned 1st and 2nd embodiment example, and in order to avoid complexity, the detailed description is abbreviate | omitted.

  As shown in FIG. 7, in the wiring board of this example, the inside of the through hole 2 is filled with a solder resist layer 6 made of a thermosetting resin deposited on the lower surface side of the insulating substrate 1. The thickness of the solder resist layer 6 is about 20 to 25 μm on the lower surface of the insulating substrate 1. The solder resist layer 7 deposited on the upper surface of the insulating substrate 1 has a thickness of 5 to 11 μm, and is thinner than the thickness 20 to 25 μm of the solder resist layer 6 deposited on the lower surface of the insulating substrate 1. Further, the solder resist layer 7 has a larger thermal shrinkage rate than the solder resist layer 6. As described above, according to the wiring board of this example, the inside of the through hole 2 is filled with the solder resist layer 6 deposited on the lower surface side of the insulating substrate 1 and is deposited on the upper surface of the insulating substrate 1. Since the solder resist layer 7 is thinner than the solder resist layer 6 deposited on the lower surface of the insulating substrate 1, the solder resist layer 7 on the upper surface side is as thin as 5 to 11 μm on the through hole 2 in the mounting portion 1a. Nevertheless, the inside of the through hole 2 is satisfactorily filled with the solder resist layer 6 on the lower surface side, and even if the solder resist layer 6 filled in the through hole 6 protrudes over the through hole 2, the insulating substrate In one mounting portion 1a, a large convex portion of the solder resist layer 7 that contacts the lower surface of the semiconductor element S to be mounted is not formed. Furthermore, since the solder resist layer 7 deposited on the upper surface side has a higher curing shrinkage rate than the solder resist layer 6 deposited on the lower surface side, the solder resist layer on the lower surface side although the thickness on the mounting portion 1a is thin. Generation | occurrence | production of the curvature by the hardening shrinkage | contraction of the layer 6 can be suppressed effectively.

  Therefore, according to the wiring board of this example, as shown in FIG. 8, after the electrode terminal T of the semiconductor element S is pressed and bonded to the semiconductor element connection pad 4 provided in the mounting portion 1a facing each other, When the semiconductor element S is mounted by filling a sealing resin 9 called underfill between the semiconductor element S and the insulating substrate 1, the mounting portion 1 a of the insulating substrate 1 has a lower surface of the semiconductor element S to be mounted. Since the large convex portions of the solder resist layer 7 that are in contact with each other are not formed, the electrode terminal T of the semiconductor element S and the semiconductor element connection pad 4 can be connected well. At this time, since the sealing resin 9 is filled between the semiconductor element S and the insulating substrate 1, the solder resist layer 7 on the mounting portion 1a of the insulating substrate 1 is thin, but on the mounting portion 1a. The wiring conductor 3 is well protected by the sealing resin 7.

  Next, a method of manufacturing the wiring board of the third embodiment described above by the manufacturing method of the present invention will be described with reference to FIG.

  First, as shown in FIG. 9 (a), the semiconductor device has a mounting portion 1a on which a semiconductor element is mounted at the center of the upper surface, and a plurality of through holes 2 are formed from the upper surface to the lower surface including the mounting portion 1a. An insulating substrate 1 having a wiring conductor 3 deposited from the upper surface to the lower surface through the inner surface of the through hole 2 is prepared.

  Next, as shown in FIG. 9B, a thermosetting resin paste 6P1 having photosensitivity for the solder resist layer is applied to the lower surface of the insulating substrate 1, and the through-hole 2 is filled with the resin paste 6P1. . At this time, the resin paste 6 </ b> P <b> 1 filled in the through hole 2 is applied with a thickness that does not protrude significantly from the upper surface side of the insulating substrate 1.

  Next, after drying the lower surface of the insulating substrate 1 and the resin paste 6P1 in the through hole 2, as shown in FIG. 9C, a solder resist layer is formed on the lower surface of the insulating substrate 1 from above the resin paste 6P1. A thermosetting resin paste 6P2 having photosensitivity is applied. By this application, the thickness of the solder resist layer 6 on the lower surface of the insulating substrate 1 can be made sufficiently thick, such as about 20 to 25 μm.

  Next, after the resin paste 6P2 applied on the resin paste 6P1 is dried, as shown in FIG. 9D, a thermosetting resin having photosensitivity for the solder resist layer on the upper surface of the insulating substrate 1 is obtained. The paste 7P is applied to a thickness of 5 to 11 μm, which is thinner than the total thickness 20 to 25 μm of the resin pastes 6P1 and 6P2 applied to the lower surface of the insulating substrate 1. When the thickness of the resin paste 7P is larger than 11 μm, the semiconductor element S and the solder resist layer 7 on the upper surface side of the insulating substrate 1 are formed when the resin paste 6P1 filled in the through hole 2 protrudes from the upper surface of the insulating substrate 1. There is a risk of forming a large convex portion that comes into contact. The inorganic insulating filler contained in the resin paste 7P preferably has a particle size of 10 μm or less. When the particle size of the inorganic insulating filler contained in the resin paste 7P exceeds 10 μm, the risk of pinholes being formed in the applied resin paste 7 increases. In addition, as the resin paste 7P, a material having a curing shrinkage rate larger than that of the resin pastes 6P1 and 6P2 is used.

  Next, after drying the resin paste 7P applied on the upper surface of the insulating substrate 1, as shown in FIG. 9E, the resin pastes 6P1, 6P2, and 7P are exposed to a predetermined pattern by using a photolithography technique. Then, after development, the upper surface side solder resist layer 7 having the opening 7a exposing the semiconductor element connection pad 4 and the lower surface side having the opening 6a exposing the external connection pad 5 are exposed by ultraviolet curing and heat curing. The wiring board of this example is completed by forming the solder resist layer 6.

  At this time, according to the method of manufacturing the wiring board of this example, the resin pastes 6P1 and 6P2 for the solder resist layer are sequentially applied to the lower surface of the insulating substrate 1 and the resin paste 6P1 is filled into the through holes 2 from the lower surface side. Next, since the solder paste layer resin paste 7P is applied to the upper surface of the insulating substrate 1 so as to be thinner than the total thickness of the resin pastes 6P1 and 6P2 applied to the lower surface of the insulating substrate 1, the through-hole 2 Even if the inside is satisfactorily filled with the solder resist 6 and the solder resist 6 filled in the through hole 2 protrudes over the through hole 2, the semiconductor to be mounted is mounted on the mounting portion 1 a of the insulating substrate 1. A large convex portion of the solder resist layer 7 that contacts the lower surface of the element S is not formed. Accordingly, when the electrode terminal T of the semiconductor element S is brought into pressure contact with the semiconductor element connection pad 4 provided in the mounting portion 1a, the lower surface of the semiconductor element S and the solder resist layer 7 in the mounting portion 1a are in contact with each other. However, it is possible to provide a wiring board capable of satisfactorily connecting the electrode terminal T of the semiconductor element S and the semiconductor element connection pad 4. Furthermore, since the solder resist layer 7 deposited on the upper surface side has a higher curing shrinkage rate than the solder resist layer 6 deposited on the lower surface side, the solder resist layer on the lower surface side although the thickness on the mounting portion 1a is thin. Generation | occurrence | production of the curvature by the hardening shrinkage | contraction of the layer 6 can be suppressed effectively.

  The present invention is not limited to the above-described embodiment, and various modifications can be made without departing from the gist of the present invention. For example, in the above-described embodiment, the resin paste 6P1, Although the thermosetting resin paste having photosensitivity is used as 6P2, 7P, and 8P, a thermosetting resin paste having no photosensitivity may be used as at least a part of the resin paste. In this case, what is necessary is just to print so that it may have a predetermined pattern at the time of printing of a resin paste.

DESCRIPTION OF SYMBOLS 1 Insulation board | substrate 1a Mounting part 2 Through hole 3 Wiring conductor 4 Semiconductor element connection pad 5 External connection pad 6, 7, 8 Solder resist layer 6P1, 6P2, 7P, 8P Resin paste for solder resist layer S Semiconductor element T Semiconductor element T Electrode terminal

Claims (9)

  An insulating substrate having a mounting portion on which a semiconductor element is mounted on an upper surface, and a plurality of through holes formed from an upper surface including the mounting portion to a lower surface, and the upper surface of the insulating substrate through the inner surface of the through hole A wiring conductor of an external electric circuit board is provided on the lower surface of the insulating substrate and has a plurality of semiconductor element connection pads that are attached to the lower surface of the insulating substrate and are connected to electrode portions of the semiconductor elements on the outer peripheral portion of the mounting portion. A wiring conductor having an external connection pad connected to the semiconductor substrate, an upper and lower surfaces of the insulating substrate, and the through-hole so that the semiconductor element connection pad and the external connection pad are exposed and filled in the through-hole. And a solder resist layer made of a thermosetting resin, and the inside of the through hole is the wiring board. Filled with a solder resist layer deposited on the lower surface side of the edge substrate, and the solder resist layer deposited on the upper surface of the insulating substrate has an opening that exposes the through hole in the mounting portion; And the wiring board characterized by having a larger cure shrinkage rate than the solder resist layer deposited on the lower surface side.   The wiring board according to claim 1, wherein a surface of the wiring conductor excluding the semiconductor element connection pad in the mounting portion is at least one of a roughened surface and an oxidized surface.   An insulating substrate having a mounting portion on which a semiconductor element is mounted on an upper surface, and a plurality of through holes formed from an upper surface including the mounting portion to a lower surface, and the upper surface of the insulating substrate through the inner surface of the through hole A wiring conductor of an external electric circuit board is provided on the lower surface of the insulating substrate and has a plurality of semiconductor element connection pads that are attached to the lower surface of the insulating substrate and are connected to electrode portions of the semiconductor elements on the outer peripheral portion of the mounting portion. A wiring conductor having an external connection pad connected to the semiconductor substrate, an upper and lower surfaces of the insulating substrate, and the through-hole so that the semiconductor element connection pad and the external connection pad are exposed and filled in the through-hole. A wiring board comprising a solder resist layer attached thereto, wherein the through-hole is formed on a lower surface side of the insulating board. Filled with a solder resist layer made of a thermosetting resin, the solder resist layer deposited on the upper surface of the insulating substrate is thinner in the mounting portion than the thickness outside the mounting portion, And a wiring board having a layer having a higher curing shrinkage than the solder resist layer deposited on the lower surface side at least outside the mounting portion.   An insulating substrate having a mounting portion on which a semiconductor element is mounted on an upper surface, and a plurality of through holes formed from an upper surface including the mounting portion to a lower surface, and the upper surface of the insulating substrate through the inner surface of the through hole A wiring conductor of an external electric circuit board is provided on the lower surface of the insulating substrate and has a plurality of semiconductor element connection pads that are attached to the lower surface of the insulating substrate and are connected to electrode portions of the semiconductor elements on the outer peripheral portion of the mounting portion. A wiring conductor having an external connection pad connected to the semiconductor substrate, an upper and lower surfaces of the insulating substrate, and the through-hole so that the semiconductor element connection pad and the external connection pad are exposed and filled in the through-hole. And a solder resist layer made of a thermosetting resin, and the inside of the through hole is the wiring board. Filled with a solder resist layer deposited on the lower surface side of the edge substrate, the solder resist layer deposited on the upper surface of the insulating substrate is thinner than the solder resist layer deposited on the lower surface, and A wiring board having a curing shrinkage rate larger than that of a solder resist layer deposited on a lower surface side.   A wiring conductor having a mounting portion on which a semiconductor element is mounted on the upper surface, a plurality of through holes formed from the upper surface including the mounting portion to the lower surface, and deposited from the upper surface to the lower surface via the inner surface of the through hole A step of preparing an insulating substrate having an insulating substrate, and applying a thermosetting first resin paste for a solder resist layer to the lower surface of the insulating substrate and filling the through hole with the first resin paste from the lower surface side And a thermosetting second for a solder resist layer having a larger curing shrinkage rate than the first resin paste so as to have an opening exposing the through hole in the mounting portion on the upper surface of the insulating substrate. A step of applying a resin paste of 2, and exposing the upper and lower surfaces of the insulating substrate and the first and second resin pastes in the through holes And by curing after development, a part of the wiring conductor attached to the upper surface is exposed to the outer peripheral portion of the mounting portion as a plurality of semiconductor element connection pads connected to the electrode terminals of the semiconductor element, and A solder resist layer on the upper surface side having an opening for exposing the through hole in the mounting portion, and a part of the wiring conductor attached to the lower surface are exposed as external connection pads connected to the wiring conductor of the external electric circuit board. And a step of forming a solder resist layer on the lower surface side having an opening to be formed in order.   6. The method of manufacturing a wiring board according to claim 5, further comprising a step of making the surface of the wiring conductor excluding the semiconductor element connection pad in the mounting portion at least one of a roughened surface and an oxidized surface.   A wiring conductor having a mounting portion on which a semiconductor element is mounted on the upper surface, a plurality of through holes formed from the upper surface including the mounting portion to the lower surface, and deposited from the upper surface to the lower surface via the inner surface of the through hole A step of preparing an insulating substrate having an insulating substrate, and applying a thermosetting first resin paste for a solder resist layer to the lower surface of the insulating substrate and filling the through hole with the first resin paste from the lower surface side And a step of applying a thermosetting second resin paste for a solder resist layer having a curing shrinkage rate greater than or equal to that of the first resin paste on the upper surface of the insulating substrate. The step of applying the coating to be thinner than the first resin paste, and the thermosetting for a solder resist having a curing shrinkage ratio larger than that of the first resin paste Applying the third resin paste onto the second resin paste outside the mounting portion, and the first, second and third resin pastes in the upper and lower surfaces of the insulating substrate and in the through holes. Is exposed and developed and then cured, thereby exposing a part of the wiring conductor deposited on the upper surface to the outer peripheral portion of the mounting portion as a plurality of semiconductor element connection pads connected to the electrode terminals of the semiconductor element. A solder resist layer on the upper surface side having an opening and a solder resist on the lower surface side having an opening for exposing a part of the wiring conductor attached to the lower surface as an external connection pad connected to the wiring conductor of the external electric circuit board And a step of forming a layer in order.   A wiring conductor having a mounting portion on which a semiconductor element is mounted on the upper surface, a plurality of through holes formed from the upper surface including the mounting portion to the lower surface, and deposited from the upper surface to the lower surface via the inner surface of the through hole A step of preparing an insulating substrate having an insulating substrate, and applying a thermosetting first resin paste for a solder resist layer to the lower surface of the insulating substrate and filling the through hole with the first resin paste from the lower surface side And a thermosetting second resin paste for a solder resist layer having a larger curing shrinkage than the first resin paste on the upper surface of the insulating substrate than the resin paste applied to the lower surface. A step of thinly applying, and exposing and developing the first and second resin pastes in the upper and lower surfaces of the insulating substrate and in the through holes And having an opening that exposes a part of the wiring conductor attached to the upper surface to the outer peripheral portion of the mounting portion as a plurality of semiconductor element connection pads connected to the electrode terminals of the semiconductor element Forming an upper surface side solder resist layer and a lower surface side solder resist layer having an opening exposing a part of the wiring conductor attached to the lower surface as an external connection pad connected to the wiring conductor of the external electric circuit board; And a step of sequentially performing the steps.   In the step of applying the resin paste to the lower surface of the insulating substrate and filling the resin paste into the through-hole from the lower surface side, the through-hole is filled with the resin paste by a single coating and the lower surface. 9. The method of manufacturing a wiring board according to claim 5, wherein the resin paste is applied by overcoating.

Images