JP2012220463A - Ic及びマザーボードの間の入出力信号の計測方法 - Google Patents
Ic及びマザーボードの間の入出力信号の計測方法 Download PDFInfo
- Publication number
- JP2012220463A JP2012220463A JP2011089848A JP2011089848A JP2012220463A JP 2012220463 A JP2012220463 A JP 2012220463A JP 2011089848 A JP2011089848 A JP 2011089848A JP 2011089848 A JP2011089848 A JP 2011089848A JP 2012220463 A JP2012220463 A JP 2012220463A
- Authority
- JP
- Japan
- Prior art keywords
- board
- input
- output signal
- mother board
- relay
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
Landscapes
- Testing Of Individual Semiconductor Devices (AREA)
- Tests Of Electronic Circuits (AREA)
Abstract
【解決手段】マザーボードとアダプタ基板とのとの間に測定すべきICと同じ大きさの中継基板を配置させる。また、中継基板を多層構造とし、中継基板の内層を電源層及びグラウンド層の組とする。
【選択図】図1
Description
500 アダプタ基板
501 マザーボード
502 IC
503 プローブ
504 計測装置
505 パッド
506 部品
Claims (2)
- マザーボードとアダプタ基板との間に測定すべきICと同じ大きさの中継基板を配置することを特徴とするIC及びマザーボードの間の入出力信号の計測方法。
- 前記中継基板を多層構造とし、前記中継基板の内層を電源層及びグラウンド層の組とすることを特徴とする請求項1に記載のIC及びマザーボードの間の入出力信号の計測方法。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2011089848A JP2012220463A (ja) | 2011-04-14 | 2011-04-14 | Ic及びマザーボードの間の入出力信号の計測方法 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2011089848A JP2012220463A (ja) | 2011-04-14 | 2011-04-14 | Ic及びマザーボードの間の入出力信号の計測方法 |
Publications (1)
Publication Number | Publication Date |
---|---|
JP2012220463A true JP2012220463A (ja) | 2012-11-12 |
Family
ID=47272107
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2011089848A Pending JP2012220463A (ja) | 2011-04-14 | 2011-04-14 | Ic及びマザーボードの間の入出力信号の計測方法 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP2012220463A (ja) |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH08129048A (ja) * | 1994-10-31 | 1996-05-21 | Ando Electric Co Ltd | 狭ピッチic用コンタクトボードの接地強化板 |
JP2005308685A (ja) * | 2004-04-26 | 2005-11-04 | Hitachi Ulsi Systems Co Ltd | 半導体装置の製造方法およびそれに用いられるテスト治具 |
JP2006344787A (ja) * | 2005-06-09 | 2006-12-21 | Canon Inc | 半導体装置 |
-
2011
- 2011-04-14 JP JP2011089848A patent/JP2012220463A/ja active Pending
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH08129048A (ja) * | 1994-10-31 | 1996-05-21 | Ando Electric Co Ltd | 狭ピッチic用コンタクトボードの接地強化板 |
JP2005308685A (ja) * | 2004-04-26 | 2005-11-04 | Hitachi Ulsi Systems Co Ltd | 半導体装置の製造方法およびそれに用いられるテスト治具 |
JP2006344787A (ja) * | 2005-06-09 | 2006-12-21 | Canon Inc | 半導体装置 |
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