JP2012204402A - Solid-state imaging device and method of manufacturing the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To improve the image quality of a solid-state imaging device.SOLUTION: A solid-state imaging device comprises: unit cells that are provided in an imaging region 21 of a semiconductor substrate 10 and include at least one photoelectric conversion element 30; black reference cells that are provided in a black reference region 29 of the semiconductor substrate 10 and include at least one photoelectric conversion element 40; lenses 60 that are provided above the unit cells via an insulating film 71 on the semiconductor substrate 10; and a first light-shielding film 61 that is provided above the black reference cells via the insulating film 71 and has a concave-convex portion 62 on its surface.

Description

  Embodiments described herein relate generally to a solid-state imaging device and a method for manufacturing the same.

  Solid-state imaging devices such as CCD image sensors and COMS image sensors are used in various applications such as digital still cameras, video cameras, and surveillance cameras.

  For example, a photodiode is used in the photoelectric conversion unit of the image sensor. Light incident on the photodiode is photoelectrically converted to obtain an electrical signal corresponding to the image (subject).

  The image sensor includes, in a pixel array provided with a photodiode, an imaging region that captures incident light corresponding to a subject, and a light shielding region that is shielded so as not to capture incident light.

  The light shielding area is provided to form black which is a reference for the characteristics of the image sensor, and is also referred to as a black reference area. The light shielding region is formed by providing a metal film above the photodiode in the pixel array and blocking incident light on the photodiode with the metal film.

JP 2007-53153 A

  A technique for improving the image quality of the formed image is proposed.

  The solid-state imaging device of the present embodiment is provided in an imaging region of a semiconductor substrate, and includes a unit cell including at least one photoelectric conversion element, and a black reference region of the semiconductor substrate, and includes at least one photoelectric conversion element. Including a black reference cell, a lens provided above the unit cell via an insulating film on the semiconductor substrate, and provided above the black reference cell via the insulating film, and having a concave and convex surface And a first light-shielding film.

The top view which shows the structure of a solid-state imaging device. The equivalent circuit diagram which shows the structure of a pixel array. 1 is a cross-sectional view illustrating a structure of a solid-state imaging device according to a first embodiment. Sectional drawing which shows 1 process of the manufacturing method of the solid-state imaging device of 1st Embodiment. Sectional drawing which shows 1 process of the manufacturing method of the solid-state imaging device of 1st Embodiment. Sectional drawing which shows 1 process of the manufacturing method of the solid-state imaging device of 1st Embodiment. Sectional drawing which shows 1 process of the manufacturing method of the solid-state imaging device of 1st Embodiment. Sectional drawing which shows the structure of the solid-state imaging device of 2nd Embodiment. Sectional drawing which shows the modification of the solid-state imaging device of embodiment. Sectional drawing which shows the modification of the solid-state imaging device of embodiment.

[Embodiment]
Hereinafter, this embodiment will be described in detail with reference to the drawings. In the following description, elements having the same function and configuration are denoted by the same reference numerals, and redundant description will be given as necessary.

(1) First embodiment
A solid-state imaging device and a method for manufacturing the same according to the first embodiment will be described with reference to FIGS.

(A) Structure
The structure of the solid-state imaging device according to the first embodiment will be described with reference to FIGS. 1 to 3.

FIG. 1 is a schematic diagram illustrating a chip layout example of a solid-state imaging device (hereinafter referred to as an image sensor).
As shown in FIG. 1, in the image sensor of this embodiment, a pixel array 2 and a circuit (analog circuit or logic circuit) for controlling the pixel array 2 are provided in one semiconductor substrate (chip) 10. .

The pixel array 2 in the semiconductor substrate 10 includes an imaging region (also referred to as an effective region) 21 for acquiring light corresponding to an image (subject).
The imaging region 21 has a plurality of unit cells 3 including effective pixels. Hereinafter, the unit cell 3 including the effective pixel is simply referred to as a unit cell. Each unit cell 3 includes at least one pixel (effective pixel, photoelectric conversion unit). The photoelectric conversion unit converts light incident through the microlens and the color filter into an electric signal. A CMOS sensor or a CCD sensor is formed by the photoelectric conversion unit. The unit cells 3 adjacent to each other and the photoelectric conversion units adjacent to each other are separated by an element isolation region.

  The pixel array 2 includes a black reference area 29. The black reference region 29 is provided in the pixel array 2 in order to form a reference potential (dark voltage or reset voltage) for the photoelectrically converted signal. The black reference area 29 is also called an OB (Optical Black) area, a light shielding area, or an invalid area.

The black reference area 29 is adjacent to the imaging area 21 in the pixel array 2. For example, the black reference area 29 is laid out in the pixel array 2 so as to surround the imaging area 21.
The black reference area 29 has a unit cell 4 including a plurality of black reference pixels. Hereinafter, the unit cell 4 including the black reference pixel in the black reference region 29 is simply referred to as the black reference cell 4. The black reference cell 4 has substantially the same structure as the unit cell 20 and includes pixels. A black reference region 29 is formed by providing a light-shielding film that blocks the incidence of light above the black reference cell 4. The black reference cell 4 is sometimes called a dummy cell.

  In the semiconductor substrate 10, a region (hereinafter referred to as a peripheral region) 7 for arranging an analog circuit or a logic circuit is provided. The peripheral region 7 is provided so as to be adjacent to the pixel array 2. For example, the pad 70 for connecting the image sensor chip and another device is provided above the peripheral region 7. The pad 70 is provided on the interlayer insulating film on the semiconductor substrate 10.

  FIG. 2 is a diagram illustrating an example of a circuit configuration of the pixel array 2 and a circuit in the vicinity thereof.

  As shown in FIG. 2, the plurality of unit cells 20 are arranged in a matrix in the pixel array 2.

The unit cell 20 includes a photoelectric conversion unit (photodiode) 5 and a signal scanning circuit unit.
The signal scanning circuit section of the cell 20 is formed by, for example, four field effect transistors 132, 133, 134, and 135. Each field effect transistor 132, 133, 134, 135 is, for example, an n-channel MOS transistor. Hereinafter, the four field effect transistors included in the cell 20 are referred to as a transfer gate (read transistor) 132, an amplifier transistor 133, an address transistor 134, and a reset transistor 135, respectively.

  In the unit cell 20 shown in FIG. 2, the anode of the photodiode 30 is grounded. The cathode of the photodiode 30 is connected to a floating diffusion (floating diffusion layer) FD as a signal detection unit via a current path of the transfer gate 132.

  The transfer gate 132 controls the accumulation and emission of signal charges of the photodiode 30. The gate of the transfer gate 132 is connected to the read signal line TRF. The source of the transfer gate 132 is connected to the cathode of the photodiode 30, and the drain of the transfer gate 132 is connected to the floating diffusion FD.

  The amplifier transistor 133 amplifies the signal from the floating diffusion FD. The gate of the amplifier transistor 133 is connected to the floating diffusion FD. The drain of the amplifier transistor 133 is connected to the vertical signal line VSL, and the source of the amplifier transistor 133 is connected to the drain of the address transistor 134. The signal amplified by the amplifier transistor 133 is output to the vertical signal line VSL. The amplifier transistor 133 functions as a source follower in the unit cell 20.

  The reset transistor 135 resets the gate potential of the amplifier transistor 133 (the potential of the floating diffusion FD). The gate of the reset transistor 135 is connected to the reset signal line RST. The drain of the reset transistor 135 is connected to the floating diffusion FD, and the source of the reset transistor 135 is connected to a terminal 124 to which a reference potential is applied. Hereinafter, the terminal 124 is referred to as a reference potential terminal.

  The gate of the address transistor 134 is connected to the address signal line ADR. The drain of the address transistor 134 is connected to the source of the amplifier transistor 133, and the source of the address transistor 134 is connected to the reference potential terminal 124.

  A circuit configuration in which one unit cell 20 includes one photodiode 30 is called a one-pixel one-cell structure. On the other hand, a circuit configuration in which one unit cell 20 includes two photodiodes is called a two-pixel one-cell structure. In the case of the two-pixel one-cell structure, the two photodiodes are connected to a common floating diffusion FD via different transfer gates. In the 2-pixel 1-cell structure, the two photodiodes share the amplifier transistor 133, the address transistor 134, and the reset transistor 135.

  Each unit cell 20 may not include the address transistor 134. In this case, the cell 20 includes three transistors 132, 133, and 135, and the drain of the reset transistor 135 is connected to the source of the amplifier transistor 133. In this case, the address signal line ADR is not provided.

  The vertical shift register 89 is connected to the read signal line TRF, the address signal line ADR, and the reset signal line RST. The vertical shift register 89 controls and selects the plurality of unit cells 20 in the pixel array 2 in units of rows by controlling the potentials of the read signal line TRF, the address signal line ADR, and the reset signal line RST. The vertical shift register 89 outputs a control signal (voltage pulse) for controlling on and off of the transistors 132, 134, and 135 to the signal lines TRF, ADR, and RST.

  The AD conversion circuit 80 is connected to the vertical signal line VSL. The AD conversion circuit 80 includes a plurality of CDS (Corrected Double Sampling) units 85. One CDS unit 85 is connected to one vertical signal line VSL. The AD conversion circuit 80 converts the signal from the unit cell 20 output to the vertical signal line VSL into a digital value. The AD conversion circuit 80 removes noise included in each unit cell (pixel) by CDS processing by the CDS unit 85.

  The load transistor 121 is used as a current source for the vertical signal line VSL. The gate of the load transistor 121 is connected to the selection signal line SF. The drain of the load transistor 121 is connected to the drain of the amplifier transistor 133 via the vertical signal line VSL. The source of the load transistor 121 is connected to the control signal line DC.

A signal (charge) reading operation from the cell 20 of the pixel array 2 is performed as follows.
A predetermined row of the pixel array 2 is selected by the vertical shift register 89, and a plurality of cells 20 belonging to the selected row are activated.
The address transistor 134 belonging to the selected row is turned on by a row selection pulse from the vertical shift register 89. Further, the reset transistor 135 is turned on by the reset pulse from the vertical shift register 89. As a result, the potential from the reference potential terminal 124 is applied to the floating diffusion FD and the transistors 133, 134, and 135.

  The potential of the vertical signal line VSL is reset to a voltage (reset voltage) close to the potential of the floating diffusion FD by the amplifier transistor 133 forming the source follower. The reset voltage from the unit cell 20 is input to the AD conversion circuit 80. After the reset voltage is output to the vertical signal line VSL, the reset transistor 135 is turned off.

  Subsequently, the transfer gate 132 is turned on by a read pulse from the vertical shift register 89, and the charge (signal charge) accumulated in the photodiode 30 passes through the transfer gate 132 in the on state, and the floating diffusion FD. To be released. The potential of the floating diffusion FD is modulated according to the signal charge output from the photodiode. The modulated potential (signal voltage) is output to the vertical signal line VSL by the amplifier transistor 133 forming the source follower. The signal voltage is input to the AD conversion circuit 80.

  The reset voltage and the signal voltage are sequentially converted from an analog value to a digital value by the AD conversion circuit 80. Along with AD conversion of these voltage values, CDS processing for the reset voltage and signal voltage is executed by the CDS unit 85. A difference value between the reset voltage and the signal voltage is output as pixel data Dsig to a subsequent circuit (for example, an image processing circuit).

  As a result, the signal reading operation from a plurality of cells (pixels) belonging to a predetermined row is completed.

  Such row-unit readout operations for the pixel array 2 are sequentially repeated to form a predetermined image.

  For example, the potential from the black reference region 29 is applied to the unit cell 20 from the reference potential terminal 124 as a reference potential for generating a reset voltage, or data (signal) corresponding to the potential from the black reference region 29 is received. The image data is compared with the pixel data Dsig by the subsequent image processing circuit. Thus, the color tone of the image formed by the pixel data Dsig is determined using the potential output from the black reference cell in the black reference region 29.

FIG. 3 shows a cross-sectional structure of the pixel array 2 of the image sensor of this embodiment.
As described above, the unit cell 3 includes at least one photodiode 30 (PD) as a photoelectric conversion unit. In the photodiode 30, charges are generated inside the photodiode according to the amount of incident light, and a potential difference is generated between the terminals of the photodiode 30. The photodiode 30 can accumulate the generated charges.

  In the imaging region 21 of the pixel array 2, the photodiode 30 of the unit cell 3 is formed in the semiconductor substrate 10. The photodiode 30 includes at least one impurity layer (diffusion layer) 30 formed in the semiconductor substrate 10.

  For example, when the semiconductor substrate 10 has a P-type conductivity type, the impurity layer 30 has an N-type conductivity type. In order to improve the characteristics (for example, sensitivity) of the photodiode PD, the photodiode 30 may include a plurality of N-type and P-type impurity layers having different impurity concentrations.

  The plurality of photodiodes PD are electrically isolated from each other by an element isolation layer 90 provided in the semiconductor substrate 10. The element isolation layer 90 may be, for example, an impurity layer or an insulating film having an STI structure.

  In FIG. 3, only the photodiode 30 is shown in the region surrounded by the element isolation layer 90 for simplification of illustration, but the transistors 132 and 133 constituting the unit cell are shown in the same region. , 134, 135 and a floating diffusion (floating diffusion layer) FD are provided.

  The black reference cell 4 in the black reference region 29 has substantially the same structure as the unit cell 3 in the imaging region 21. The black reference cell 4 includes at least one photodiode 40. In order to distinguish the photodiodes 30 and 40 in the unit cell 3 and the black reference cell 4, the photodiode 40 in the black reference cell 4 is called a dummy diode.

  The dummy diode 40 has substantially the same structure as the photodiode 30 and is formed by at least one impurity layer (for example, an N-type impurity layer) 40 formed in the semiconductor substrate 10. The dummy diode 40 is hardly irradiated with light by a light shielding film described later. The dummy diode 40 generates and outputs a dark voltage (dark current) as a reference potential. A reset voltage is generated based on the voltage output from the dummy diode 40.

  In the peripheral region 7, a field effect transistor (for example, a MOS transistor) Tr is provided in the well region 15 in the semiconductor substrate 10. Two diffusion layers (impurity layers) 53 are provided in the well region 15. These two diffusion layers 53 function as the source / drain of the transistor Tr. A gate electrode 51 is provided on the surface of the well region (channel region) between the two diffusion layers 53 via the gate insulating film 52.

  Whether the field effect transistor Tr is a P-channel type or an N-channel type depends on the conductivity type of the well region 15 in which the transistor Tr is provided and the conductivity type of the diffusion layer 73 serving as the source / drain.

  For simplification of illustration, only the field effect transistor Tr is shown as an element formed in the peripheral region 7. However, in the peripheral region 7, a resistor element, a capacitive element, a diode, a bipolar transistor, etc. Is provided.

  An interlayer insulating film 71 is provided on the semiconductor substrate 10. The interlayer insulating film 71 covers elements formed in the semiconductor substrate 10. A color filter 65 and a micro lens 60 are provided above the pixel array 2 with the interlayer insulating film 71 interposed therebetween.

  A plurality of metal films 72, 73, and 75 are provided in the interlayer insulating film 71. The interlayer insulating film 71 and the metal films 72, 73, and 75 are formed by a multilayer wiring technique and are provided within a predetermined wiring level (height from the substrate surface). For example, the interlayer insulating film 71 is formed using silicon oxide. The metal films 72, 73, and 75 are formed using aluminum (Al) or copper (Cu).

  The metal film 72 in the imaging region 21 is configured to transmit light between adjacent pixels so that light transmitted through the microlens 60 and the color filter 65 is incident only on the pixels 30 corresponding to the microlens 60 and the color filter 65. Used as a light shielding film 72 for preventing leakage.

  In the black reference region 29, the metal film 73 is used as the light shielding film 73 in order to prevent light irradiation to the dummy diode 40 of the black reference cell 4. The thickness of the light shielding film 73 is, for example, about 100 nm to 400 nm. The light shielding films 72, 73, and 75 may be formed of a metal other than Al and Cu.

  In the example shown in FIG. 3, the light shielding film 73 at each wiring level covers, for example, the entire black reference region 29. However, the light shielding film 73 may be provided at each wiring level in the black reference region 29, or may be provided only at one wiring level. The light shielding film 73 at one wiring level among the plurality of wiring levels covers the entire black reference region 29, and the light shielding film 73 at the remaining wiring level has the same layout as the light shielding film 72 in the imaging region. May be. In addition, when a predetermined area ratio (hereinafter referred to as a coverage) is set between a certain region and a pattern in the region (here, a metal film), the predetermined coverage is satisfied. The metal film is divided within one wiring level. In this case, a plurality of light shielding films 73 are provided at each wiring level.

In the peripheral region 7, the metal film 75 is mainly used as a wiring 75 for connecting elements. Depending on the circuit to be formed, a wiring 75 having a predetermined wiring pattern is provided in a plurality of wiring levels. The metal film 75 may be a dummy layer for adjusting the coverage.
Wirings 75 of different wiring levels are connected by plugs CP and 79 embedded in the interlayer insulating film 71.

  The wiring 75 in the lowermost wiring level is connected to the diffusion layer 53 in the semiconductor substrate 10 by the contact plug CP. The via plug 79 connects the upper layer wiring 75 and the lower layer wiring 75.

  For example, the pad 70 is provided on the interlayer insulating film 71 by a rewiring formation technique. However, the uppermost wiring 75 of the interlayer insulating film 71 may be used as a pad. The pad 70 is adjacent to an insulating layer (for example, resin layer) 77 on the interlayer insulating film 71.

  Further, a pad may be provided on the surface opposite to the surface of the semiconductor substrate 10 on which the interlayer insulating film is provided by a via (through via) penetrating the semiconductor substrate 10. The through via (not shown) is formed by a TSV (Through Substrate Via) technique.

  In the present embodiment, the surface on which the interlayer insulating film 75 is provided is called the surface of the semiconductor substrate 10, and the surface of the semiconductor substrate 10 that faces the surface on which the interlayer insulating film 75 is provided is called the back surface of the semiconductor substrate 10. .

  The color filters 65 and 66 and the microlens array ML are provided above the pixel array 2 on the surface side of the semiconductor substrate 10.

  The color filter 65 is attached to the interlayer insulating films 71 and 77 through a laminated film 68 of a planarizing layer, a protective layer, and an adhesive layer. Hereinafter, the laminated film 68 including the planarizing layer, the protective layer, and the adhesive layer is referred to as an overcoat layer 68. The overcoat layer 68 is formed using a highly transmissive material so that light incident on the photodiode 30 is not reduced (deteriorated).

  For example, the image sensor in the present embodiment is a single plate type image sensor. The single-plate image sensor acquires a plurality of pieces of color information with a single pixel array 2. In this case, the color filter 65 includes a plurality of filters F1, F2, and F3 that transmit at least one color component (light) in each wavelength band such as red, blue, and green included in light corresponding to an acquired image. . For example, a Bayer array is used as the array pattern of the filters F1, F2, and F3 of each color of the color filter 65 used in the single-plate image sensor. The Bayer array color filter 65 includes red (R), green (R), and blue (B) filters F1, F2, and F3. In the light from the subject irradiated on the color filter 65, the light in the wavelength band (wavelength component) corresponding to the colors of the filters F1, F2, and F3 is transmitted through the filters F1, F2, and F3. Each of the filters F1, F2, and F3 of red, blue, and green corresponds to one pixel (photodiode 30).

  For example, the color filter 66 is provided on the overcoat layer 68 in the black reference region 29. The filter 66 in the black reference area 29 is referred to as a dummy filter 66. For the dummy filter 66 in the black reference region 29, for example, a single color filter is provided in common to the plurality of black reference cells 4 without changing the filter color for each black reference cell 4. For example, the dummy filter 66 is formed of a blue filter.

  The plurality of microlenses 60 are attached to the color filter 65 via the overcoat layer 69. The microlenses 60 are two-dimensionally arranged on the overcoat layer 69. A microlens array is formed by the plurality of microlenses 60.

The microlens 60 collects light corresponding to the acquired image. The microlenses 60 are arranged so as to correspond to the respective pixels in a one-to-one relationship.
The microlens 60 and the overcoat layer 69 are formed using a material having high transparency so that light incident on the photodiode 30 is not reduced. The overcoat layer 69 is a laminated film including a planarizing layer, a protective layer, and an adhesive layer.

  In the present embodiment, the light corresponding to the acquired image is irradiated from the surface side of the semiconductor substrate 10. As described above, the image sensor that takes in the light irradiated from the surface side of the semiconductor substrate 10 into the pixel (photodiode) is called a surface irradiation type image sensor.

  In the image sensor of the present embodiment, a light shielding film 61 having an uneven portion is provided above the black reference cell 4 (photodiode 40) in the black reference region 29. The uneven part (projection part) 62 of the light shielding film 61 is formed on the light irradiation side. The concavo-convex part (projection part) 62 of the light shielding film 61 reflects and scatters the light irradiated to the light shielding film 61.

  The light shielding film 61 is formed above the interlayer insulating film 71 using the same material (transparent film) as the microlens 60, for example. The uneven portion 62 on the surface of the light shielding film 61 is formed by roughening the surface of the transparent film for forming the microlens 60 using, for example, etching. Due to the uneven portion 62, the surface flatness of the light shielding film 61 becomes lower than the surface flatness of the microlens 60. In FIG. 4, the concavo-convex portion 62 of the light shielding film 61 is illustrated as having uniformity (periodicity) for simplification of illustration, but is not limited thereto. For example, the shape of the concavo-convex portion 62 has a random (non-uniform) shape with almost no uniformity.

  The maximum film thickness of the light shielding film 61 including the uneven portion 62 is smaller than the maximum dimension (maximum film thickness) of the microlens 60 in the direction perpendicular to the substrate surface.

  In the present embodiment, since the light shielding film 61 is formed using a transparent material, the surface roughness (uneven steps) of the light shielding film 61 is large enough to diffuse and scatter light in order to make it difficult to transmit light. The thickness and density are set. For example, the surface roughness of the light shielding film 61 is, for example, about 1/10 of the thickness of the microlens. For example, when the thickness of the microlens is 4 to 7 μm, the light shielding film 61 has a surface roughness on the order of nanometers (several hundred nm to several tens of nm).

  The light with respect to the black reference region 29 is reflected or scattered by the uneven portion 62 on the surface of the light shielding film 61, so that the light entering the interlayer insulating film 71 below the light shielding film 61 in the black reference region 29 is reduced. To do.

The metal film includes pinholes (fine holes) due to its properties.
Furthermore, since the image sensor chip and the camera module including the image sensor chip are required to reduce the size of the device, the chip and the module tend to be thinned. Therefore, a member for forming the image sensor chip is thinned, and accordingly, the film thickness of the metal film 73 as the light shielding film is thinned. As a result, pinholes are easily generated in the metal films 72 and 73 as the light shielding films.

  As in the image sensor of this embodiment, the light-irradiated surface is provided with an uneven (coarse) light-shielding film 61 on the interlayer insulating film 71, so that the light is reflected by the uneven part 62. And scattering occurs. As a result, the light incident below the light shielding film 61 having the concavo-convex portion 62 can be reduced, and the light shielding property to the black reference region 29 can be improved.

  Therefore, even if the metal film 73 as the light shielding film in the black reference region 29 includes a defect such as a pinhole that allows light to pass through, the photodiode ( It is possible to reduce the incidence on the dummy diode 40. As a result, the reference potential output from the black reference cell 40 in the black reference region 29 can be prevented from changing due to the photoelectric conversion of the light that has penetrated the light shielding film 73 by the dummy diode.

  Therefore, the image sensor of this embodiment can reproduce the color tone of the image formed by the pixel data Dsig with higher accuracy to the color tone of the image (subject) corresponding to the incident light.

  In addition, since the thickness of the light-shielding film 61 having irregularities is smaller than the thickness of the microlens 60 and the metal films 72 and 73 as the light-shielding films are not thickened, the light-shielding property of the black reference region 29 can be improved. A thin image sensor chip can be provided.

  In order to improve the light shielding property of the black reference region 29, a film in which a black filter or a plurality of filters corresponding to each color is stacked may be provided in the black reference region 29 in some cases. As will be described later, in these cases, an increase in the manufacturing process of the image sensor and an increase in processing difficulty of the manufacturing process occur. On the other hand, in the image sensor of this embodiment, the light shielding film 61 having the concavo-convex portion 62 is formed using the same material as the microlens 60 at the same height as the microlens 60 in the direction perpendicular to the substrate surface. Is done. The uneven portion 62 of the light shielding film 61 is formed substantially simultaneously with the opening process of the pad 70. Therefore, the image sensor of the present embodiment can form the light-shielding film 61 having an uneven surface by an after-mentioned manufacturing method without an increase in manufacturing steps or an increase in processing difficulty. Therefore, an image sensor with improved color reproducibility can be formed without an increase in manufacturing cost and manufacturing period.

  As described above, according to the solid-state imaging device of the present embodiment, the image quality of the formed image can be improved.

(B) Manufacturing method
A method for manufacturing the solid-state imaging device (image sensor) according to the first embodiment will be described with reference to FIGS. 4 to 7 show cross-sectional structures in the respective steps of the image sensor manufacturing method of the present embodiment. Note that in the image sensor manufacturing method of the present embodiment, the order in which components of the image sensor described later are formed may be appropriately changed as long as process consistency is ensured.

  As shown in FIG. 4, P-type and N-type well regions 15 and element isolation layers 90 and 91 are formed in a semiconductor substrate 10, for example, a P-type silicon substrate 10. The semiconductor substrate 10 may be an SOI substrate.

  The well region 15 and the element isolation impurity layer are formed at predetermined positions in the semiconductor substrate 10 by control of acceleration energy of impurity ions in ion implantation or a mask formed by a photolithography technique.

  An element isolation trench is formed in the semiconductor substrate 10 by a photolithography technique and an RIE (Reactive Ion Etching) method. An insulator is embedded in the element isolation trench by a CVD (Chemical Vapor Deposition) method or a coating method, and an element isolation insulating film 95 is formed at a predetermined position in the semiconductor substrate 10.

  Thereby, an element isolation region (insulating film or impurity layer) for electrically isolating adjacent elements is formed in the semiconductor substrate 10, and the pixel array 20 and the peripheral region 7 adjacent thereto are respectively connected to the semiconductor substrate 10. It is partitioned in. In the pixel array 2, a unit cell formation region is defined by the formed element isolation region. The unit cell formation region includes at least one pixel formation region (photodiode formation region), and the pixel formation region is also defined by the element isolation region.

  A resist mask (not shown) is formed on the semiconductor substrate 10 by photolithography. The resist mask has an opening corresponding to the photodiode formation region. Using the resist mask, impurity layers 30 and 40 are formed in the semiconductor substrate 10 by ion implantation. When the semiconductor substrate 10 is a P-type semiconductor substrate, the impurity layers 30 and 40 are formed of, for example, at least one N-type impurity layer. The photodiode may be formed by a plurality of impurity layers. As a result, photodiodes 3 and 4 corresponding to the respective pixels of the image sensor are formed in the pixel array 2. In order to improve the characteristics of the photodiodes 3 and 4, a plurality of P-type and N-type impurity layers may be formed in the photodiode formation region.

  An impurity layer (not shown) as a floating diffusion is formed in the semiconductor substrate 10 at a predetermined position in the cell formation region 20 of the pixel array 2 by photolithography and ion implantation.

  A gate insulating film 52 is formed on the semiconductor substrate 10 by, for example, a thermal oxidation method on the semiconductor substrate 10. A silicon layer is deposited on the gate insulating film 52 by a CVD method. Then, a gate electrode 51 having a predetermined gate length and gate width is formed on the surface (first surface) of the semiconductor substrate 10 with the gate insulating film 52 interposed therebetween by a photolithography technique and an RIE method. For example, the formed gate electrode 51 is used as a mask, and an impurity layer 53 as a source and a drain is formed in the semiconductor substrate 10 by ion implantation. Thereby, a field effect transistor for forming a unit cell and a field effect transistor Tr for forming a peripheral circuit are formed in the pixel array 2 and the peripheral region 7 on the surface of the semiconductor substrate 10, respectively.

  The field effect transistor of the unit cell and the field effect transistor Tr of the peripheral circuit may be formed in the same process, or may be formed in different processes.

  On the surface (first surface) of the semiconductor substrate 10 on which the element is formed, an interlayer insulating film 71, metal films 72, 73, 75 and plugs CP, 76 are sequentially formed for each wiring level by a multilayer wiring technique. The

  For example, the lowermost interlayer insulating film is deposited by a CVD (Chemical Vapor Deposition) method so as to cover the gate electrode 51 of the transistor Tr and the upper surfaces of the photodiodes 30 and 40. Then, the upper surface of the deposited interlayer insulating film is planarized using, for example, a CMP (Chemical Mechanical Polishing) method. A contact hole is formed in the interlayer insulating film 71 using the photolithography technique and the RIE method so as to expose the upper part of the gate electrode and the upper part of the impurity layer (source / drain or contact region). The contact plug CP is embedded in the formed contact hole.

  A metal film such as aluminum or copper is deposited on the lowermost interlayer insulating film and the contact plug CP, for example, by sputtering. The deposited metal film is processed into a predetermined shape so as to be connected to the contact plug CP1 by a photolithography technique and an RIE method. By substantially the same process, an interlayer insulating film, a via plug 79, and a plurality of metal films 72, 73, and 75 are sequentially formed from the wiring level on the lower layer (substrate surface side) by multilayer wiring technology at each wiring level. Is done.

  As a result, the metal films 72 and 73 as the light shielding films 72 and 73 are formed in the pixel array 2, and the metal film 75 as the wiring 75 is formed in the peripheral region 7. For example, the light shielding films (metal films) 72 and 73 are formed to have a film thickness of about 100 nm to 400 nm.

  As shown in FIG. 5, the rewiring layer 70 is formed on the interlayer insulating film 72 so as to be connected to the wiring 75 by, for example, a rewiring formation technique. The rewiring layer 70 is used as a pad, for example. An insulating layer (for example, a resin layer) 77 is formed on the interlayer insulating film 71. Thereafter, an overcoat layer 68 </ b> A is formed on the rewiring layer 70 and the insulating layer 77. Here, the overcoat layer 68A is a laminated film including a planarization layer, a protective layer, and an adhesive layer.

  Then, the color filter 65 is formed on the overcoat layer 68 </ b> A so as to correspond to each pixel 30 in the imaging region 21 of the pixel array 2. For example, a single color filter (dummy filter) 66 is formed on the overcoat layer 68 </ b> A in the black reference region 29 of the pixel array 2. A color filter is not formed above the rewiring layer 70 as a pad.

  Overcoat layer 69A is formed on color filters 65 and 66 and overcoat layer 68A. Then, a transparent film (hereinafter referred to as a lens forming layer) for forming the microlens is formed on the overcoat layer 69A. The lens forming layers 60 and 61A are made of a highly permeable material, for example, an organic film or a resin. However, the lens forming layer may be an inorganic compound layer such as glass. Of course, the overcoat layers 68A and 69A also have transparency.

  For example, the thickness of the lens forming layer is larger than the thickness of the overcoat layers 68A and 69A on the pad 70. For example, the lens forming layer 61A has a film thickness of about 1 μm to 10 μm when formed.

  Above the imaging region 21 of the pixel array 2, the lens formation layer is processed into a hemisphere (lens shape) by, for example, etching (RIE method), and the microlens 60 corresponds to each photodiode 30. It is formed. The lens forming layer in the black reference region 29 is covered with a resist mask and is not etched. In addition, the process for forming the microlens may be performed by a process using a thermal change of the lens forming layer, a molding process (molding process), or the like.

  The lens forming layer in the peripheral region 7 is selectively removed by, for example, a photolithography technique and etching in a process separate from the formation of the microlens 60.

  As shown in FIG. 6, after the micro lens 60 is formed, patterning for opening the pad 70 is performed. Therefore, a resist mask 96 is formed so as to cover the microlens 60 by photolithography. The resist mask 96 is selectively removed from above the pad 70, and the overcoat layer 69A covering the pad 70 is exposed.

  At this time, the resist mask is removed in the black reference region 29. Alternatively, the resist mask 96X (shown by a broken line in FIG. 6) on the lens formation layer 61A in the black reference region 29 has a film thickness that covers the microlens 60 by intermediate exposure using a halftone mask (reticle). The film thickness is made thinner than 96. In this case, the resist mask 96X in the black reference region 69 is formed simultaneously with the resist mask 96 that covers the microlens 60, for example.

After the resist mask 96 covering the microlens 60 is formed, etching (for example, RIE method) is performed as shown in FIG. As a result, the overcoat layer on the pad 70 is removed, and the upper surface of the pad 70 is exposed. For example, the etching for removing the overcoat layer on the upper surface of the pad 70 is performed using a mixed gas of oxygen (O) gas and fluorine (F) gas at 1 Torr (1.33 × 10 ² Pa). Performed at a vacuum level for a period of 300 to 600 seconds. Depending on the material of the overcoat layer, the fluorine-based gas may not be added to the oxygen gas. Further, the power for etching (for example, RF power) is appropriately adjusted according to gas pressure and etching time.

During the etching for opening the pad 70, the pixel array 2 is also etched. Since the microlens 60 in the imaging region 21 is covered with the resist mask 96, it is not etched.
On the other hand, the lens forming layer 61 is exposed in the black reference region 29. Therefore, the surface of the lens forming layer 61 is etched. When the lens forming layer 61 is covered with a resist mask 96X that is thinner than the mask 96 that covers the microlens 60, the lens forming layer 61 is over-etched. That is, in the black reference region 29, after the resist mask 96X covering the lens forming layer 61 is removed, the surface of the lens forming layer 61 is etched.

  By etching, the surface of the lens forming layer (for example, organic film) in the black reference region 29 is roughened, and a light shielding film (lens forming layer) 61 having an uneven surface is formed. For example, when the thickness of the microlens is 4 to 7 μm, the light shielding film 61 has a surface roughness on the order of nanometers (several hundred nm to several tens of nm). The light with respect to the black reference region 29 is irregularly reflected or scattered by the concavo-convex portion 62 on the surface of the light shielding film 61 due to etching roughness, and the light that enters the light shielding film 61 is reduced.

  Thus, since the convex / concave portion 62 formed on the surface of the light shielding film 61 is formed simultaneously with the opening of the pad 70, even if the light shielding film 61 is formed, the manufacturing process does not increase. If only the process for roughening the surface of the lens forming layer 61 is performed, the etching period may be about 10 to 30 seconds. Of course, the etching conditions for opening the pad are appropriately changed according to the material of the overcoat layer and the material of the lens forming layer to be roughened.

  After the opening of the pad 70 and the surface of the light shielding film 61 are roughened, the resist mask 60 on the microlens 60 is removed.

  Through the above manufacturing process, the image sensor of the present embodiment shown in FIG. 4 is manufactured.

The metal film as the light shielding film may contain pinholes, and the thickness of the metal film tends to be reduced as the image sensor becomes thinner.
As in the image sensor of the present embodiment, the light shielding film 61 having an uneven surface on which light is irradiated is formed in the black reference area 29, so that the light irradiated to the black reference area 29 Light that is reflected or scattered by the concavo-convex portion 62 on the surface of 61 and enters the interlayer insulating film 71 below the light shielding film 61 is reduced. That is, the light shielding property with respect to the black reference region 29 can be improved by the light shielding film 61 having the uneven portion 62.
Therefore, even if the light shielding film (metal film) 73 in the black reference region 29 includes a defect such as a pinhole, light leaked into the black reference region 29 The incidence on the photodiode (dummy diode) 40 in the black reference region 29 can be reduced. Thereby, it is possible to suppress the reference potential output from the black reference cell 40 in the black reference region 29 from fluctuating due to photoelectric conversion of the light that has penetrated the light shielding film 73.

  Therefore, the image sensor manufacturing method of the present embodiment can form an image sensor that can reproduce the color tone of an image (subject) corresponding to incident light with higher accuracy.

  Accordingly, the present embodiment can suppress an increase in the thickness and the number of stacked layers of the metal light shielding film 73 and the interlayer insulating film 71 covering the metal light shielding film 73 in order to improve the light shielding property. Therefore, the image sensor manufacturing method of the present embodiment can provide a thin image sensor.

In order to improve the light shielding property of the black reference region 29, a film in which a black filter or a plurality of filters corresponding to each color is stacked may be provided in the black reference region 29 in some cases. When the black filter is formed in the black reference region 29, the manufacturing process of the image sensor is increased. When a laminated film (for example, a three-layer film of red, blue, and green) of each color filter included in the color filter is formed in the black reference region 29, it is between the black reference region 29 and the other regions 7, 21. In addition, a large step due to the stacked filters is generated, and it becomes difficult to form a microlens and to open a pad.
On the other hand, in the image sensor manufacturing method of the present embodiment, the microlens and the light shielding film 61 having an uneven surface are used, for example, by using a normal member included in the image sensor such as a microlens forming member. It can be formed by substantially the same process as the opening of the pad. Therefore, an image sensor with improved color reproducibility can be formed without an increase in manufacturing cost and manufacturing period.

  As described above, according to the method for manufacturing the solid-state imaging device of the present embodiment, the image quality of the formed image can be improved.

(2) Second embodiment
With reference to FIG. 8, a solid-state imaging device and a manufacturing method thereof according to the second embodiment will be described. Note that in the second embodiment, explanations regarding members and manufacturing steps common to the first embodiment will be made as necessary.

In the first embodiment, the light shielding film 61 having an uneven surface is formed using a lens forming layer for forming the microlens 60.
However, if a light-shielding film having a roughened surface is provided above the photodiode 40 and the metal light-shielding film 73 in the black reference region 29, light shielding in a direction perpendicular to the material of the light-shielding film and the substrate surface is performed. The film formation position (height from the substrate surface) is not limited.

  For example, as illustrated in FIG. 8, the light shielding film 69 </ b> X having the uneven portion 62 may be formed using the overcoat layers 69 and 69 </ b> X on the color filters 65 and 66. In this case, the light shielding film 69X is made of the same material as the overcoat layer 69 and is formed using a transparent material (transparent film). The light shielding film 69X is provided at the same height as the overcoat layer 69 in the direction perpendicular to the substrate surface.

  The light shielding film having an uneven surface may be formed using the color filter 66 or the overcoat layer 68 below the color filter 66.

  When the light shielding film 69X having an uneven surface is formed using an overcoat layer, for example, the lens forming layer 61A in the black reference region 29 is removed in the steps shown in FIGS.

  Then, the upper surface of the overcoat layer 69A in the black reference region 29 is exposed by a process substantially the same as the process shown in FIG. 7, or from a resist mask that covers the microlens 60 on the overcoat layer 69A. A thin resist mask is formed. However, for the common process, the film thickness of the resist mask in the black reference region 29 is such that the overcoat layer 69A in the black reference region 19 is over-etched during the etching for opening the pad 70. In addition, it is preferable that the overcoat layer 69A in the black reference region 29 is set to a thickness that is not removed by etching.

  If the overcoat layer 69X can be over-etched, the lens forming layer may be left in the black reference region 29 in the steps shown in FIGS.

As described above, in the image sensor of this embodiment, the light shielding film 69X having the uneven portion 62 is formed by the overcoat layer. Even in this case, the light incident on the dummy diode 40 in the black reference region 29 can be reduced by the reflection and scattering of the light by the concavo-convex portion 62 of the light shielding film 69X made of the overcoat layer. As a result, fluctuations in the reference potential due to the photoelectric conversion of the dummy diode 40 can be suppressed, and the color tone reproducibility of the formed image data can be improved.
Further, in the image sensor manufacturing method of the present embodiment, even when the light shielding film 69X having the concavo-convex portion 62 is formed using the overcoat layer, the manufacturing process is performed by sharing the forming member and the forming process. The image sensor of this embodiment can be formed without increasing the number.

  As described above, according to the solid-state imaging device and the manufacturing method thereof according to the second embodiment, it is possible to provide a solid-state imaging device that can improve the image quality of the formed image.

(3) Modification
A modification of the solid-state imaging device according to the present embodiment will be described with reference to FIGS. In addition, the overlapping description regarding the member common to the component of 1st and 2nd embodiment is performed as needed.

  As shown in FIG. 9, a hemispherical light shielding film 60 </ b> X may be provided in the black reference region 29. The light shielding film 60 </ b> X is formed at the same time using the same material as the microlens 60 and using the same process as the microlens 60. The light shielding film 60 </ b> X may have a function as a lens, or the function as a lens may be lost due to uneven portions due to roughening of the surface (etching roughness) as described above. Further, the upper end of the light shielding film 60X may be flat (straight).

  For example, when the light shielding film 60X has a function as a lens, the hemispherical light shielding film 60X allows light from an oblique direction with respect to the substrate surface to pass through the gap between the wiring and the light shielding film, thereby obtaining a black reference. Direct incidence on the dummy diode 40 in the region 29 can be suppressed.

As shown in FIG. 10, the image sensor of the present embodiment may be a backside illuminated image sensor.
In the back side illumination type image sensor, the back side of the substrate is an irradiation surface of light from the subject. The back-illuminated image sensor is provided with a color filter 65 and a microlens 60 on the surface (back surface) opposite to the surface (front surface) provided with an interlayer insulating film covering an element (for example, a gate electrode of a transistor). It has been. In the image sensor of this modification, a light shielding film 61 having an uneven surface is provided on the irradiation surface side of the back-illuminated image sensor, that is, on the back surface side of the semiconductor substrate 10.

  In this case, light shielding films 72 </ b> A and 73 </ b> A made of a metal film are provided on the back surface side of the substrate 10 via the insulating film 89 on the back surface of the semiconductor substrate 10. The light shielding film 73 A made of a metal film is provided between the black reference cell 4 and the insulating film 89 on the back surface of the semiconductor substrate 10 in the black reference region 29. The light shielding film 73A covers the lower side (irradiation surface side) of the black reference cell 4 and the field effect transistor Tr. The light shielding films 72A and 73A are covered with an insulating film 67.

  In the back-illuminated image sensor, the support substrate 19 is attached to the interlayer insulating film 71 on the substrate surface side by the adhesive layer 18.

  For example, the pad 80 is provided on the back side of the semiconductor substrate 10. The semiconductor substrate 10 is connected to a wiring 75 in the interlayer insulating film 71 through a through via 81 penetrating from the front surface side to the back surface side. The through via 81 is formed by TSV technology. An insulating film 88 is provided between the through via 81 and the semiconductor substrate 10, and an insulating film 89 is provided between the pad 80 and the semiconductor substrate 10.

  The metal light shielding films 72A and 73A are formed, for example, in substantially the same process as the pad 80 provided on the back surface of the semiconductor substrate 10.

The backside illuminated image sensor of this modification is formed as follows, for example.
Similar to the process shown in FIG. 4, the support substrate 19 attaches the adhesive layer 18 to the semiconductor substrate 10 on which the elements 30, 40, Tr, the interlayer insulating film 71 and the wirings (pads) 75, 70 are formed. It is affixed to the interlayer insulation film 71 via the via. Then, the back side of the semiconductor substrate 10 is etched by wet etching or CMP, and the semiconductor substrate 10 is thinned.
Through holes and through vias 81 are formed by the TSV technique. Thereafter, the insulating film 89, the pad 80, and the light shielding films 72A and 73A are sequentially formed.

Then, the overcoat layers 68 and 69, the color filter 65, and the microlens 60 are formed on the pad 80 and the light shielding films 72 </ b> A and 73 </ b> A by substantially the same steps as those shown in FIGS. 5 and 6. It is formed sequentially on the back side.
Substantially similar to the process shown in FIG. 7, the lens-forming layer 61 (or overcoat layer 69) is exposed to etching conditions at the same time as the overcoat layer on the pad 80 is removed by etching. Due to the etching roughness, a light shielding film 61 having a rough surface is formed on the back side of the semiconductor substrate 10.

  As a result, the back-illuminated image sensor of the modification shown in FIG. 10 is formed.

  Also in the image sensor of the modification shown in FIG. 9 and FIG. 10, the light incident on the black reference region 29 can be reduced, and the light shielding property to the black reference region 29 can be improved.

  Therefore, the image sensor of the modification of this embodiment can improve the image quality of the image formed similarly to the 1st and 2nd embodiment.

  In order to further improve the light shielding property with respect to the black reference region, a black filter or a laminated film of a plurality of filters is used for the dummy filter provided in the black reference region 29 in addition to the light shielding film having the uneven portion 62. May be.

  Although several embodiments of the present invention have been described, these embodiments are presented by way of example and are not intended to limit the scope of the invention. These novel embodiments can be implemented in various other forms, and various omissions, replacements, and changes can be made without departing from the scope of the invention. These embodiments and modifications thereof are included in the scope and gist of the invention, and are included in the invention described in the claims and the equivalents thereof.

  2: pixel array, 21: imaging region, 29: black reference region, 73, 73A: light shielding film (metal film), 61, 69X: light shielding film (transparent film), 62: concavo-convex part, 60: microlens, 68, 69: Overcoat layer, 30, 40: Photodiode.

Claims (6)

A unit cell provided in an imaging region of a semiconductor substrate and including at least one photoelectric conversion element;
A black reference cell provided in the black reference region of the semiconductor substrate and including at least one photoelectric conversion element;
A lens provided above the unit cell via an insulating film on the semiconductor substrate;
A first light-shielding film provided above the black reference cell via the insulating film and having a convex concave portion on the surface;
A solid-state imaging device comprising:   2. The solid-state imaging device according to claim 1, wherein a second light-shielding film made of metal is provided in the insulating film between the first light-shielding film and the black reference cell.   The solid-state imaging device according to claim 1, wherein the first light-shielding film is formed using a transmissive material.   4. The solid-state imaging device according to claim 1, wherein the first light shielding film is adjacent to the microlens. 5. Forming a photoelectric conversion element in the imaging region and the black reference region of the semiconductor substrate;
Forming an insulating film on the semiconductor substrate; forming a pad on the insulating film;
Forming a transparent film on the overcoat layer covering the upper surface of the insulating film and the upper surface of the pad in the imaging region and the black reference region;
Processing the transparent film in the imaging region to form a lens above the photoelectric conversion element in the imaging region;
At the same time as removing the transparent film on the pad, the surface of the transparent film in the black reference region is roughened, and a first light-shielding having an uneven portion on the surface above the first light-shielding film. Forming a film;
A method of manufacturing a solid-state imaging device.   The solid-state imaging device according to claim 5, further comprising a step of forming a second light-shielding film made of a metal covering the photoelectric conversion element in the black reference region in the insulating film. Manufacturing method.

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