KR100959442B1 - Image Sensor and Method for Manufacturing Thereof - Google Patents

Abstract

An image sensor according to an embodiment includes a semiconductor substrate including a light receiving area; Trenches disposed in the semiconductor substrate other than the light receiving region; A photodiode formed in the light receiving region; A CMOS circuit formed on a bottom surface of the trench; A first insulating layer including a contact plug disposed on the semiconductor substrate to be connected to the CMOS circuit; A second insulating layer disposed on the first insulating layer and including a metal wiring connected to the contact plug; A color filter disposed on the second insulating layer; It includes a micro lens disposed on the color filter.

Image Sensors, Photodiodes, Transistors

Description

Image Sensor and Method for Manufacturing Thereof}

In an embodiment, an image sensor and a method of manufacturing the same are disclosed.

The image sensor is a semiconductor device that converts an optical image into an electrical signal, and includes a charge coupled device (CCD) image sensor and a complementary metal oxide silicon (CMOS) image sensor (CIS). do.

The CMOS image sensor implements an image by sequentially detecting an electrical signal of each unit pixel by a switching method by forming a photodiode and a MOS transistor in the unit pixel.

As the design rule of the CMOS image sensor is gradually reduced, the size of the unit pixel may be reduced, thereby reducing the light sensitivity. That is, when the size of the unit pixel is reduced, the area of the photodiode is reduced, and thus the optical sensitivity may be reduced.

The embodiment provides an image sensor and a manufacturing method which can improve the light sensitivity by increasing the area of the photodiode.

An image sensor according to an embodiment includes a semiconductor substrate including a light receiving area; Trenches disposed in the semiconductor substrate other than the light receiving region; A photodiode formed in the light receiving region; A CMOS circuit formed on a bottom surface of the trench; A first insulating layer including a contact plug disposed on the semiconductor substrate to be connected to the CMOS circuit; A second insulating layer disposed on the first insulating layer and including a metal wiring connected to the contact plug; A color filter disposed on the second insulating layer; It includes a micro lens disposed on the color filter.

In another embodiment, a method of manufacturing an image sensor includes: preparing a semiconductor substrate including a light receiving area; Forming trenches in the semiconductor substrate other than the light receiving region; Forming a photodiode in the light receiving region; Forming a CMOS circuit on a bottom surface of the trench; Forming a first insulating layer including a contact plug on the semiconductor substrate so as to be connected to the CMOS circuit; Forming a second insulating layer on the first insulating layer, the second insulating layer including a metal wire connected to the contact plug; Forming a color filter on the second insulating layer; And forming a micro lens on the color filter.

According to the image sensor and the method of manufacturing the same according to the embodiment, the focal length of the photodiode and the microlens is reduced to improve the fill factor of the photodiode.

In addition, since the transistor circuit and peripheral circuits are formed in the trench region of the semiconductor substrate, the same effect as that of reducing the overall height of the image sensor can be obtained.

In addition, since the microlens and the photodiode are formed to be close to each other, the crosstalk can be prevented to improve the sensory activity.

In addition, the thickness of the insulating layer formed on the upper portion of the photodiode is reduced to prevent diffraction and scattering of light as much as possible.

An image sensor and a method of manufacturing the same according to an embodiment will be described in detail with reference to the accompanying drawings.

In the description of the embodiments, where described as being formed "on / over" of each layer, the on / over may be directly or through another layer ( indirectly) includes everything formed.

In the drawings, the thickness or size of each layer is exaggerated, omitted, or schematically illustrated for convenience and clarity of description. In addition, the size of each component does not necessarily reflect the actual size.

5 is a cross-sectional view of an image sensor according to an embodiment.

Referring to FIG. 5, a trench 110 and a light receiving region A are disposed in the semiconductor substrate 100. The bottom surface of the trench 110 and the surface of the light receiving area A have a step height of a first height. For example, the light receiving area A and the bottom surface of the trench 110 may have a height difference of 3000 to 5000 mW.

In the light receiving area A, a photodiode 200 for receiving light to generate photocharges is disposed. The photodiode 200 may be formed in the semiconductor substrate 100 defined as the light receiving region A and may have a large area.

In the trench 110, a transistor circuit 130 connected to the photodiode 200 and converting the received photocharges into an electrical signal may be formed for each pixel. In addition, the trench 110 is formed in the peripheral circuit region of the semiconductor substrate 100, and the transistor circuit 135 is formed in the trench 110 in the peripheral circuit region.

The first insulating layer 140 including the contact plug 150 is disposed on the semiconductor substrate 100 including the photodiode 200 and the transistor circuit 130.

For example, the first insulating layer 140 may be formed of an oxide film or a nitride film. In addition, the first insulating layer 140 may be formed to a thickness of 4000 ~ 6000Å based on the bottom surface of the trench 110. Therefore, the first insulating layer 140 may be formed to cover all of the photodiodes 200.

The contact plug 150 may be formed of a metal material including tungsten, titanium, and aluminum. The contact plug 150 is disposed to be connected to the transistor circuit 130 through the first insulating layer 140. The contact plug 150 may be formed to a height of 2000 ~ 3500Å.

The second insulating layer 160 including the metal wirings M1 and M2 is disposed on the first insulating layer 140 including the contact plug 150. The second insulating layer 160 may be formed of a plurality of layers.

The metal wires M1 and M2 may be formed in plural in the second insulating layer 160. The metal wires M1 and M2 are intentionally laid out to be connected to the contact plug 150 so as not to block light incident to the photodiode 200. Accordingly, the first insulating layer 140 and the second insulating layer 160 may be positioned in an upper region of the photodiode 200.

The passivation layer 170 is disposed on the second insulating layer 160. The passivation layer 170 may be formed of an oxide film, a nitride film, or an oxynitride film.

Color filters 180 are disposed for each unit pixel on the passivation layer 170.

The color filter 180 may be formed for each unit pixel to separate colors from incident light. For example, the color filter 180 may be formed with red, green, and blue color filters for each unit pixel.

The microlens 190 is disposed for each pixel on the color filter 180. The micro lens 190 may be formed in a dome shape to condense light to the photodiode 200.

The image sensor according to the embodiment may improve the fill factor of the photodiode by reducing the focal length of the photodiode and the microlens.

In addition, the photodiode and the micro lens are formed to be close to each other to prevent cross talk.

In addition, other devices except for the photodiode may be formed in the trench of the semiconductor substrate to integrate the devices.

A manufacturing process of an image sensor according to an embodiment will be described with reference to FIGS. 1 to 5.

Referring to FIG. 1, a photoresist pattern 10 is formed on a semiconductor substrate 100.

The semiconductor substrate 100 is mainly a single crystal silicon substrate, and may be a substrate doped with P-type impurities or N-type impurities.

The photoresist pattern 10 is for defining a light receiving region A in which a photodiode is to be formed. The photoresist pattern 10 may be formed by applying a photoresist film on the semiconductor substrate 100 by a spin process or the like by a lithography process. The photoresist pattern 10 may be formed for each pixel on the semiconductor substrate 100.

Referring to FIG. 2, a light receiving region A and a trench 110 are formed in the semiconductor substrate 100. The light receiving area A and the trench 110 are formed at the same time. That is, the entire surface etching process is performed on the semiconductor substrate 100 using the photoresist pattern 10 described with reference to FIG. 1 as an etching mask. Then, the semiconductor substrate 100 exposed by the photoresist pattern 10 is removed to form the trench 110. The region left by the photoresist pattern 10 becomes a light receiving region A for forming a photodiode. Therefore, the light receiving area A may be formed to protrude from the trench 110.

That is, the surface of the light receiving area A and the bottom surface of the trench 110 have a step height of the first height D. FIG. For example, the step difference between the light receiving area A and the trench 110 may have a height difference of 3000 to 5000 μs.

Referring to FIG. 3, a transistor circuit 130 is formed in the trench 110, and a photodiode 200 is formed in the light receiving region A. Referring to FIG.

A photoresist pattern (not shown) covering the light receiving region A is formed on the semiconductor substrate 100. The photoresist pattern may be formed using a mask used to form the trench 110.

An isolation layer 120 is formed on the bottom surface of the trench 110. The device isolation layer 120 is for defining an active region and a field region in the semiconductor substrate 100. The device isolation layer 120 may be formed in plural by an STI process.

The transistor circuit 130 is formed in the active region inside the trench 110 defined by the device isolation layer 120. The transistor circuit 130 may be connected to the photodiode 200 to convert the received photocharge into an electrical signal. The transistor circuit 130 may include a transfer transistor connected to the photodiode 200 to transport the photocharges collected to the floating diffusion, a reset transistor configured to set the potential of the floating diffusion to a desired value, and discharge the charge to reset the floating diffusion. The voltage may include an access transistor serving as a source follower buffer amplifier and a select transistor serving as an addressing role as a switching role. In particular, the gate of the transistor circuit 130 shown in FIG. 3 may be any one of the transistors.

In addition, when the transistor circuit 130 is formed, a transistor circuit 135 for signal processing and control processing may be formed in a peripheral region. That is, since the trench 110 is formed in the remaining regions other than the light receiving region A, transistor circuits 130 and 135 may be formed in the trench 110.

The bottom surface of the trench 110 and the surface of the light receiving area A have a step height of the first height D. FIG. In addition, the gate height of the transistor circuit 130 may be formed to 1500 ~ 2500Å. Thus, the transistor circuit 130 may be formed in the trench 110.

When the transistor circuit 130 is formed in the trench 110, a photoresist pattern (not shown) covering the trench 110 region and exposing the light receiving region A is formed. In addition, a photodiode 200 is formed in the semiconductor substrate 100 of the light receiving region A exposed by the photoresist pattern 10. The photodiode 200 may be formed by implanting n-type impurities and p-type impurities into the semiconductor substrate 100 defined as the light receiving region A. For example, the n-type impurity may be acenic (As) and the p-type impurity may be boron (B). The p-type impurity of the photodiode 200 may be formed on the surface of the semiconductor substrate 100 to contact the n-type impurity.

Since the surface of the semiconductor substrate 100 defined as the light receiving region A is formed at a height higher than the bottom surface of the trench 110, the area of the photodiode 200 may be increased. In addition, since the contact plug connected to the transistor circuit 130 may be formed in the trench 110, the optical path of the photodiode 200 may be relatively reduced.

In the exemplary embodiment, the photodiode 200 is formed in the light receiving region A after the transistor circuit 130 is formed in the trench 110, but the photodiode 200 is formed in the light receiving region A. After forming first, the transistor circuit 130 may be formed in the trench 110.

Referring to FIG. 4, the first insulating layer 140 including the contact plug 150 is formed on the semiconductor substrate 100 including the photodiode 200 and the transistor circuit 130.

The first insulating layer 140 may be a metal insulating layer. For example, the first insulating layer 140 may be formed of an oxide film or a nitride film. The first insulating layer 140 may be formed to a thickness of 4000 ~ 6000Å based on the bottom surface of the trench 110. Therefore, the first insulating layer 140 may be formed to cover both the photodiode 200 and the transistor circuit 130.

The contact plug 150 may be connected to the transistor circuit 130 through the first insulating layer 140. The contact plug 150 may be formed by depositing a metal layer after forming a contact hole in the first insulating layer 140 corresponding to the transistor circuit 130. For example, the contact plug 150 may be formed of metal such as tungsten, titanium, and aluminum. The contact plug 150 may be formed to a height of 2000 ~ 3500Å.

As described above, elements including the transistor circuit 130 and the contact plug 150 are formed in the trench 110 of the semiconductor substrate 100, and the photodiode 200 is close to the first insulating layer 140. It can be formed to. Therefore, there is an effect that can reduce the optical path of the photodiode 200.

Referring to FIG. 5, a second insulating layer 160 including metal wires M1 and M2 is formed on the first insulating layer 140. The second insulating layer 160 may be formed of a plurality of layers. For example, the second insulating layer 160 may be formed of a nitride film or an oxide film.

The metal wires M1 and M2 may be formed in plural through the second insulating layer 160. The metal wires M1 and M2 are intentionally laid out so as not to block light incident to the photodiode 200 by being connected to the contact plug 150. Therefore, the second insulating layer 160 may be positioned in the upper region of the photodiode 200.

The passivation layer 170 may be formed on the second insulating layer 160. The passivation layer 170 may be formed of an insulating film to protect the device from moisture, scratches, and the like. For example, the passivation layer 170 may be formed of any one of a silicon oxide film, a silicon nitride film, and a silicon oxynitride film, or may have a structure in which one or more layers are stacked. On the other hand, the formation of the passivation layer 170 may be omitted.

The color filter 180 and the micro lens 190 are formed for each unit pixel on the passivation layer 170.

The color filter 180 may be formed for each unit pixel to separate colors from incident light. The color filter 180 forms a color filter material including a photosensitive material and a pigment or a photosensitive material and a dye on the passivation layer 170 through a spin coating process or the like. Subsequently, the color filter material is exposed and developed using a pattern mask to form a color filter 180. For example, the color filter 180 is formed of red, green, and blue color filters for each unit pixel. Can be.

The microlens 190 may be formed for each unit pixel to collect incident light to the photodiode 200. The microlens 190 performs a patterning process after applying a silicon oxide film or a photosensitive photoresist having high light transmittance. Then, a lens pattern is formed to correspond to the photodiode 200 arranged for each unit pixel. When the lens pattern is reflowed, a dome-shaped micro lens 190 is formed for each unit pixel.

According to the manufacturing method of the image sensor according to the embodiment, the focal length of the photodiode and the micro lens is reduced to improve the fill factor of the photodiode.

In addition, since the transistor circuit and the peripheral circuits are formed in the trench region of the semiconductor substrate, the same effect as that of reducing the overall height of the image sensor can be obtained.

In addition, since the microlens and the photodiode are formed to be close to each other, the crosstalk can be prevented to improve the sensory activity.

In addition, the thickness of the insulating layer formed on the upper portion of the photodiode is reduced to prevent diffraction and scattering of light as much as possible.

The above-described embodiments are not limited to the above-described embodiments and drawings, and it is common in the technical field to which the present embodiments belong that various changes, modifications, and changes can be made without departing from the technical spirit of the present embodiments. It will be apparent to those who have

1 to 5 are cross-sectional views illustrating a manufacturing process of an image sensor according to an embodiment.

Claims (5)

A semiconductor substrate including a light receiving region; Trenches disposed in the semiconductor substrate other than the light receiving region; A photodiode formed in the light receiving region; An isolation layer formed in the trench to define an active region; A transistor circuit formed in an active region of the trench; A first insulating layer including a contact plug disposed on the semiconductor substrate to be connected to the transistor circuit; A second insulating layer disposed on the first insulating layer and including a metal wiring connected to the contact plug; A color filter disposed on the second insulating layer; and An image sensor comprising a micro lens disposed on the color filter. The method of claim 1, And the light receiving area has a height lower than an upper surface of the contact plug. Preparing a semiconductor substrate including a light receiving region; Forming trenches in the semiconductor substrate other than the light receiving region; Forming a photodiode in the light receiving region; Forming an isolation layer on the semiconductor substrate corresponding to the trench to define an active region; Forming a CMOS circuit in the active region of the trench; Forming a first insulating layer including a contact plug on the semiconductor substrate so as to be connected to the CMOS circuit; Forming a second insulating layer on the first insulating layer, the second insulating layer including a metal wire connected to the contact plug; Forming a color filter on the second insulating layer; And And forming a micro lens on the color filter. The method of claim 3, Forming the trench, Forming a photoresist pattern defining a light receiving region on the semiconductor substrate; And And etching the semiconductor substrate by using the photoresist pattern as an etching mask. The method of claim 3, Forming the contact plug, Forming a first insulating layer on the semiconductor substrate that is higher than a surface of the light receiving region; And forming a contact plug on the first insulating layer to be connected to the CMOS circuit.

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