JP2012199321A - Chip sorter and chip transfer method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a chip sorter which enhances recognition accuracy without sacrifice of the yield.SOLUTION: In a chip sorter, a first camera acquires a first image by capturing the pattern surface of a wafer, a second camera acquires a second image by capturing the rear surface of a chip, a recognition processing unit recognizes a wafer based on the first image, measures and recognizes the X, Y, θ-axis positions of the chip based on the second image and recognizes crack tips, and a control unit controls a drive system based on the recognition results output from the recognition processing unit.

Description

  The present invention relates to a chip sorter (chip transfer device) that picks up a WLCSP chip from a wafer level chip size package (WLCSP) wafer and automatically transfers and packs it onto a chip tray. Data recognition accuracy and production yield.

Conventional WLCSP chips have irregularities due to pattern printing or solder application on the chip surface in the WLCSP affixed form, and many of them have complicated shapes.
Due to this complicated shape, a conventional chip sorter (see, for example, Patent Document 1) performs chip chip recognition (first recognition) in a wafer state before picking up individual chips with a transfer head. I was going. For this reason, it is difficult to recognize an image with a pattern, a mirror surface, or the like, and it has not been possible to cope with the occurrence of chipping after pickup. Therefore, the production yield in chip recognition is large.

That is, when performing the first recognition (wafer recognition) in the conventional chip sorter, because of the increased number of unique shapes of the WLCPS chips, the binarization and pattern matching inspection at the wafer recognition unit is missing. The number of erroneous detections increases, and the production yield becomes worse than the actual chip yield.
An example of this missing detection error detection will be described with reference to FIG. FIG. 10A is a diagram illustrating an example of a binarized image of a WLCSP chip in conventional wafer recognition. FIG.10 (b) is sectional drawing which shows the unevenness | corrugation seen by the AA line of Fig.10 (a).
As shown in FIG. 10, when the chip surface serving as a plan view inspection surface of the WLCSP chip has irregularities, bright and dark spots are generated in the binarized image depending on the illumination direction of illumination. In the case of the example of FIG. 10A, the white portion is recognized as a chip, and the black portion K is recognized as other than a chip. For this reason, the central shaded portion G1 is recognized as a defective chip by pattern matching, and the corner shaded portion G2 is recognized as a defective chipping defect. If the recognition threshold value is lowered and the recognition rate is lowered, the recognition failure rate can be suppressed, but it becomes difficult to discriminate the true failure, which causes a serious problem in production. As described above, the defect determination due to the reduction in recognition accuracy is not allowed, so that the recognition rate cannot be lowered and the yield is reduced.

JP 2004-140084 A

As described above, in the chip sorter of the conventional WLCSP chip, it is difficult for the wafer recognition unit to recognize the chip detection.
An object of the present invention is to provide a chip sorter in which the recognition accuracy is improved without reducing the yield.

  In order to solve the above problem, the chip sorter of the present invention is configured to detect the presence / absence of a chip by wafer recognition and to detect a chip and recognize a chip position by posture recognition.

  That is, the chip sorter of the present invention includes a transfer head that sucks chips from a wafer attached to a wafer ring and transfers them to a predetermined position, a first camera that images each chip on the wafer, and the transfer A second camera that images the back surface of the chip adsorbed by the head, the first camera, and a recognition processing unit that performs image processing to determine whether the image captured by the second camera is good, the wafer ring, the chip push-up unit, In the chip sorter comprising: a drive system for moving the transfer head to a predetermined position; and a control unit that controls the recognition processing unit and the drive system and controls the entire apparatus. The camera captures a pattern surface of the wafer to acquire a first image, the second camera captures a back surface of the chip to acquire a second image, and the recognition processing unit The wafer is recognized based on the first image, and the X, Y, θ axis position measurement recognition and chip chip recognition of the chip are performed based on the second image. The drive system is controlled based on the output recognition result.

  In addition, the recognition processing unit of the chip sorter according to the invention performs chip chip recognition based on the second image, and when the recognition is good, the control unit detects the chip based on the second image. The correction of X, Y, and θ axes is controlled.

  Further, the recognition processing unit of the chip sorter according to the present invention performs chip chip recognition based on the second image, and discards the chip if the recognition is poor.

  Furthermore, in the chip sorter according to the present invention, a waste BOX for discarding the chip is provided between the second camera and the first camera in the moving path of the transfer head, and chip recognition is performed by performing chip chip recognition. The resulting chip is discarded in the middle of moving to the operation for transferring the next chip.

  In the chip transfer method of the present invention, a chip is sucked from a wafer attached to a wafer ring by a transfer head and transferred to a predetermined position, and each chip on the wafer is imaged by a first camera. The back surface of the chip adsorbed by the transfer head is imaged by a second camera, and the first image captured by the first camera and the second image captured by the second camera are processed and recognized. In the chip transfer method of a chip sorter for outputting a result and transferring individual chips of the wafer to a predetermined position from a wafer attached to the wafer ring, the first image is a pattern of the wafer The second image is an image acquired by imaging the back surface of the chip, and wafer recognition is performed based on the first image, and the second image is acquired. On the image And it performs chip X, Y, the measurement recognition and chipping recognition θ-axis position Zui.

  The chip transfer method of the present invention performs chip chip recognition based on the second image, discards the chip if the recognition is poor, and if the recognition is good, the control unit The correction of the X, Y, and θ axes of the chip is controlled based on the second image.

  Furthermore, the chip transfer method of the present invention is characterized in that the chip that has been recognized poorly by performing the chip chip recognition is discarded in the middle of the operation for transferring the next chip.

  Furthermore, in the chip transfer method of the present invention described above, a place where a chip that has been recognized poorly due to chip chip recognition is discarded in the middle of the operation for transferring the next chip is located at the transfer position. It is characterized by being between the second camera and the first camera in the movement path of the head.

  According to the present invention, since it is possible to recognize a chip on the sheet pasting surface of the WLCSP wafer, the recognition rate can be improved and a decrease in production yield can be suppressed.

It is a front view which shows the structure of one Example of the chip sorter of this invention. It is a front view which shows the structure of one Example of the chip sorter of this invention. It is a front view which shows the structure of one Example of the chip sorter of this invention. It is a front view which shows the structure of one Example of the chip sorter of this invention. It is a top view which shows the structure of one Example of the chip sorter of this invention. It is a figure for demonstrating acquisition of the attitude | position recognition image of one Example of the chip sorter of this invention. It is a figure which shows the difference between this invention of the kind recognized by wafer recognition and attitude | position recognition, and the past. It is a flowchart which shows one Example of the operation | movement procedure of the chip sorter of this invention. It is a figure which shows the control part, drive mechanism, and recognition process part in one Example of the chip sorter of this invention. It is a figure which shows the example of a binarized image in the conventional wafer recognition.

The chip sorter of the present invention mainly detects chip presence / absence detection and chipping detection by wafer recognition and chip position recognition by attitude recognition using an image on the back side of the chip from a method of chip position recognition by attitude recognition. It changes to the method of implementing.
Hereinafter, an embodiment of the present invention will be described with reference to the drawings. In addition, the following description is for describing one embodiment of the present invention, and does not limit the scope of the present invention. Accordingly, those skilled in the art can employ embodiments in which these elements or all of the elements are replaced with equivalent ones, and these embodiments are also included in the scope of the present invention.
In the description of each drawing, the same reference numerals are assigned to components having a common function, and the description is not repeated as much as possible.

A chip sorter according to an embodiment of the present invention will be described with reference to FIGS. 1 to 4 are front views showing the configuration of an embodiment of the chip sorter of the present invention. FIG. 5 is a plan view showing the configuration of an embodiment of the chip sorter of the present invention.
100 is a chip sorter according to an embodiment of the present invention, 1 is a wafer recognition camera, 2 is a posture recognition camera, 3 is a WLCSP wafer, 4 is a tray, 5 is a transfer head, 6 is a mirror unit, 6A and 6B are mirrors, 7 is an operation monitor, 8 is a chip push-up unit, 9 is a tower lamp, 10 is a first illumination, 11 is a second illumination, 12 is an illumination power supply, 13 is a WLCSP chip attached to a wafer ring, and 14 is a waste box. . The wafer recognition camera 1 and the posture recognition camera 2 are, for example, CCD (Charge Coupled Device) cameras.
FIG. 1 is a diagram illustrating a state in which the transfer head 5 is positioned above the WLCSP wafer, and FIG. 2 is a diagram illustrating a position of the transfer head 5 during wafer recognition. 3 is a diagram showing the position of the transfer head 5 at the time of posture recognition, and FIG. 4 is a diagram showing the position of the transfer head 5 when the tray 4 is stored. Further, FIG. 5 is a view of the chip sorter 100 as viewed from above.
Although not shown in FIGS. 1 to 5, the chip sorter 100 further includes a control unit that performs overall control of the apparatus, a drive mechanism, a recognition processing unit, and a monitor. Communicating through the interface. The control unit is a CPU (Central Processing Unit) and has a configuration in which a RAM (Random Access Memory) and a ROM (Read Only Memory) are connected. Further, the chip sorter 100 includes a control monitor 7, a tower lamp 8, and an illumination power source 12 that controls illumination ON / OFF.

The chip sorter 100 is a device that picks up one WLCSP chip 13 from the WLCSP wafer 3 diced in advance by suction or the like by the transfer head 5 and stores it in the tray 4.
When the WLCSP chip 13 is picked up, the transfer head 5 moves from the state shown in FIG. 1 to a position shown in FIG. 3, for example. At this time, the transfer head 5 has not sucked the WLCSP chip 13 from above the WLCSP wafer 3 yet.

The first illumination 10 illuminates the WLCSP wafer 3, and the wafer recognition camera 1 images the WLCSP chip before chip separation, and outputs the captured image to the recognition processing unit. The recognition processing unit performs recognition processing based on the acquired image and performs wafer recognition.
Thereafter, only the (OK) WLCSP chip that has passed the wafer recognition, the chip is pushed up by the raising needle raised from the inside of the chip raising portion 8, and the transfer head 5 moved to the position shown in FIG. 2 is lowered. As a result, the WLCSP chip 13 is adsorbed and peeled from the lower (back surface) side wafer sheet of the WLCSP wafer.
Next, the transfer head 5 moves upward while adsorbing the WLCSP chip 13, and then moves to the position of the mirror unit 6 and stops as shown in FIG. In FIG. 3, the WLCSP chip 13 is adsorbed to the lower end portion of the transfer head 5, but the WLCSP chip 13 is not shown for the sake of complexity.

In FIG. 3, the second illumination 11 illuminates the WLCSP chip 13, and the posture recognition camera 2 captures the back surface of the WLCSP chip 13 with the mirrors 6 a and 6 b of the mirror unit 6, and outputs the captured image to the recognition processing unit. To do. The recognition processing unit performs recognition processing based on the acquired image, performs X-axis, Y-, and θ-axis position measurement recognition of the WLCSP chip, and acquires position data of each axis as a recognition result. At the same time, the recognition processing unit performs chip chip recognition of the WLCSP chip 13 based on the acquired image, and determines pass / fail.
If the recognition processing of the image acquired by the posture recognition camera 2 is a recognition failure due to chip chip recognition (good or bad judgment: NG), the transfer head 5 is moved immediately above the waste BOX 14 to perform suction. The WLCSP chip 13 is separated from the transfer head 5 and discarded by stopping and breaking the vacuum.
In addition, when the chip is recognized and the recognition is good (the pass / fail judgment is OK), the control unit performs position correction by controlling the corresponding drive system based on the position data of each axis as the recognition result. . Thereafter, the transfer head 5 moves to the position shown in FIG. 4, and the WLCSP chip 13 is separated from the transfer head 5 and stored in the tray 4 by lowering the transfer head 5 and stopping suction (vacuum break). In FIG. 4, the WLCSP chip 13 is adsorbed to the lower end portion of the transfer head 5, but the WLCSP chip 13 is not shown for the sake of complexity.

  By repeating this content, the WLCSP chip 13 is transferred from the WLCSP wafer 3 to the tray 4.

1 to 5 described above, the chip sorter 100 according to the present invention includes two types, namely, wafer recognition as a first recognition and posture recognition as a second recognition. In the case of conventional chip sorter recognition, chip presence / absence detection and chip chipping detection are performed by wafer recognition which is the first recognition. In the present invention, chip chip detection is second recognition. To do.
FIG. 6 is a diagram for explaining the acquisition of the posture recognition image according to the embodiment of the chip sorter of the present invention. For example, as shown in FIG. 6, the back surface of the WLCSP chip 13 is imaged with two mirrors 6A and 6B arranged at an angle of 45 degrees with the posture recognition camera 2 and recognized based on the captured image. The processing unit performs positioning correction recognition.
In other words, as described in the prior art, the recognition method is changed as shown in FIG. 7 in order to prevent a decrease in yield due to chip recognition in wafer recognition as the first recognition. FIG. 7 is a diagram showing the difference between the present invention of the type recognized by wafer recognition and posture recognition and the conventional one.

The operation procedure of the chip sorter of the present invention will be described with reference to FIG. FIG. 8 is a flowchart showing an embodiment of the operation procedure of the chip sorter of the present invention.
The operation of FIG. 8 is executed by the control unit controlling each device in the apparatus.

After the start of production, in step S81, the wafer pickup is moved to the next chip position. Further, the transfer head 5 is moved to the posture recognition position. However, when the previous wafer recognition is NG, the transfer head 5 is not moved.
In step S82, the wafer chip attachment area is determined. That is, when there is a WLCSP chip to be transferred in the WLCSP wafer, the process proceeds to step S83. If there is no WLCSP chip to be transferred in the WLCSP wafer, the production is finished.
In step S83, wafer recognition is performed. If the chip recognition is acceptable (OK), the process proceeds to step S84. In the case of failure (NG), the process returns to step S81.

In step S84, the chip push-up unit 8 and the transfer head 5 are moved to the wafer recognition position.
In step S85, the transfer head 5 is caused to pick up the WLCSP chip.
In step S86, the transfer head 5 is moved within the angle of view of the posture recognition camera 2. Further, the wafer pickup is moved to the next chip position.
In step S87, posture recognition is performed. First, in the case of recognition failure (good / bad determination NG) due to chip chipping recognition, the process proceeds to step S91. If the chip is recognized and the recognition is good (good / bad determination OK), based on the position data of each axis as the recognition result, the corresponding drive system is controlled to perform position correction, and the process proceeds to step S88.

In step S88, the transfer head 5 is moved to the storage position of the tray 4 (X-axis direction). Further, the tray 4 is moved to the storage position (Y-axis direction).
In step S89, the transfer head 5 is lowered to a predetermined position on the tray 4, the suction is stopped, the vacuum is broken, and the WLCSP chip is stored in the tray 4.
In step S90, it is determined whether or not the tray 4 is full. If it is full (Yes), production is terminated. If it is not yet full (No), the process returns to step S81.

In step S91, the transfer head 5 is moved to the position of the disposal BOX 14.
In step S92, the suction of the transfer head 5 is stopped, the vacuum is broken, the WLCSP chip is discarded, and the process returns to step S81.

  Next, a control operation in an embodiment of the chip sorter of the present invention will be described with reference to FIG. FIG. 9 is a diagram showing the control unit 90, the drive mechanism 99, and the recognition processing unit 96 in one embodiment of the chip sorter of the present invention. Reference numeral 91 denotes a CPU as a main body of the control unit 90 that performs overall control of the operation of the chip sorter 100, and 92 stores thickness data for each type of WLCSP chip 13, data for each transfer head 5, wafer map data, and the like. The RAM of the control unit 90 and 93 are the ROM of the control unit 90. Then, the CPU 91 performs overall control of operations related to the transfer of the WLCSP chip 13 in accordance with a program stored in the ROM 93 based on data stored in the RAM 92. That is, the CPU 91 controls each drive motor (including a changeover switch and the like) 98 via the drive circuit 94 and the interface 95.

In addition, the recognition processing unit 96 performs a recognition process on an image acquired by imaging with the wafer recognition camera 1 and the posture recognition camera 2, and outputs a processing result to the CPU 91 via the interface 95. That is, the CPU 91 outputs an instruction to the recognition processing device 96 to perform recognition processing on the image captured by each recognition camera 1 or 2, and receives the recognition processing result from the recognition processing device 96.
The images captured by the recognition cameras 1 and 2 are displayed on a monitor 97 as a display device.

In the above-described embodiment, the disposal BOX 14 is installed between the posture recognition camera 2 and the wafer recognition camera 1 in the movement path of the transfer head 5, and the next chip on the wafer is discarded while discarding chips. The operation for transferring the chip was shifted to shorten the throughput. That is, the chip that has been recognized as defective due to chip chip recognition is discarded in the middle of the operation for transferring the next chip. However, there may be a case where importance is placed not on the throughput but on other factors such as the device space and the manufacturing cost of the device. Therefore, the disposal BOX 14 may be installed arbitrarily.
1 to 9 described above, the present invention has been described with reference to an embodiment in which a WLCSP chip is transferred from a WLCSP wafer to a tray. However, it is obvious that it may be transferred not only to the tray but also to another container such as a tape. Furthermore, it is of course applicable to a die mounter that directly attaches a wafer to a package or a printed board. Furthermore, not a WLCSP wafer but a normal wafer may be used. In particular, when a SAW chip is transferred from a SAW wafer for a SAW (Surface Acoustic Wave) filter to a container such as a tray or is die-mounted, the present invention is applied to a chip whose material has a fragile back surface. It is valid.

  According to the above-described embodiment, when the wafer recognition surface (chip surface at the time of attaching the WLCSP) is difficult to recognize by a pattern, a mirror surface, or the like, and when chipping is recognized at the same time, the pickup rate (yield) decreases, the wafer attachment surface (WLCSP attachment). If chip recognition is performed on the back surface of the chip, the problem of the recognition rate is solved, and the result is a decrease in yield.

  1: Wafer recognition camera, 2: Attitude recognition camera, 3: WLCSP wafer, 4: Tray, 5: Transfer head, 6: Mirror part, 6A, 6B: Mirror, 7: Operation monitor, 8: Chip push-up part, 9 : Tower light, 10: First illumination, 11: Second illumination, 12: Illumination power supply, 13: WLCSP chip, 14: Disposal box, 90: Control unit, 91: CPU, 92: RAM, 93: ROM, 94: Drive circuit, 95: interface, 96: recognition processing unit, 97: monitor, 98: drive motor, 99: drive system, 100: chip sorter.

Claims (8)

A transfer head that picks up a chip from a wafer attached to the wafer ring and transfers it to a predetermined position, a first camera that picks up an image of each chip on the wafer, and picks up a back surface of the chip that is picked up by the transfer head The second camera, the first camera, and the recognition processing unit that performs image processing on the images captured by the second camera to determine whether the image is acceptable, the wafer ring, the chip push-up unit, and the transfer head are placed at predetermined positions. In a chip sorter provided with a drive system for moving, and a control unit that controls the recognition processing unit and the drive system and controls the entire apparatus,
The first camera captures a pattern surface of the wafer to acquire a first image, and the second camera captures a back surface of the chip to acquire a second image, and the recognition process The unit performs wafer recognition based on the first image, and performs X-, Y-, and θ-axis position measurement recognition and chip chip recognition based on the second image, and the control unit performs the recognition A chip sorter characterized in that the drive system is controlled based on a recognition result output from a processing unit.   2. The chip sorter according to claim 1, wherein the recognition processing unit performs chip chip recognition based on the second image, and when the recognition is good, the control unit detects the chip based on the second image. A chip sorter that controls correction of X, Y, and θ axes.   3. The chip sorter according to claim 1, wherein the recognition processing unit performs chip chip recognition based on the second image, and discards the chip if the recognition is poor. Chip sorter.   4. The chip sorter according to claim 3, wherein a waste BOX for discarding the chip is provided between the second camera and the first camera in the moving path of the transfer head, and chip recognition is performed by performing chip chip recognition. A chip sorter, characterized in that the chip that has been formed is discarded during the operation for transferring the next chip. Chips are picked up by a transfer head from a wafer attached to the wafer ring and transferred to a predetermined position, each chip on the wafer is imaged by a first camera, and the back surface of the chip picked up by the transfer head The second camera captures the first image captured by the first camera and the second image captured by the second camera, outputs a recognition result, and is attached to the wafer ring. In the chip transfer method of the chip sorter for transferring the individual chips of the wafer to a predetermined position from the obtained wafer,
The first image is an image acquired by imaging the pattern surface of the wafer, and the second image is an image acquired by imaging the back surface of the chip, based on the first image. A chip transfer method, wherein the wafer is recognized, and the X, Y, θ-axis position measurement recognition and chip defect recognition of the chip are performed based on the second image.   6. The chip transfer method according to claim 5, wherein chip missing recognition is performed based on the second image, and if the recognition is poor, the chip is discarded, and if the recognition is good, the control unit A chip transfer method comprising controlling correction of X, Y, and θ axes of the chip based on the second image.   7. The chip transfer method according to claim 6, wherein the chip that has been recognized as defective due to chip chip recognition is discarded in the middle of the operation for transferring the next chip. Method.   8. The chip transfer method according to claim 7, wherein a chip that has been recognized as defective due to chip chip recognition is discarded in the middle of moving to an operation for transferring a next chip. A chip transfer method characterized by being between the second camera and the first camera in the movement path.

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