JP2012195328A - Semiconductor device and manufacturing method of the same - Google Patents

Semiconductor device and manufacturing method of the same Download PDF

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JP2012195328A
JP2012195328A JP2011056032A JP2011056032A JP2012195328A JP 2012195328 A JP2012195328 A JP 2012195328A JP 2011056032 A JP2011056032 A JP 2011056032A JP 2011056032 A JP2011056032 A JP 2011056032A JP 2012195328 A JP2012195328 A JP 2012195328A
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conductive layer
semiconductor device
protective film
forming
recess
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Kentaro Matsunaga
健太朗 松永
Takeshi Hamaya
毅 濱谷
Tadaaki Mimura
忠昭 三村
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Panasonic Corp
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Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device which can achieve inhibition of connection between neighboring electrodes such as inhibition of connection between neighboring bonding pads by splash.SOLUTION: A semiconductor device of the present invention comprises: a semiconductor substrate 1; a first conductive layer 5 formed on the semiconductor substrate 1; a protective film (insulation film 3 in FIG. 1) formed on the semiconductor substrate 1 and opening to expose the first conductive layer 5; the first conductive layer 5 exposed on the opening of the protective film; and a second conductive layer 6 formed on the protective film 3. The second conductive layer 6 has recesses 7 inside the edges of the second conductive layer 6.

Description

本発明は、半導体装置およびその製造方法に関する。   The present invention relates to a semiconductor device and a manufacturing method thereof.

近年、半導体装置の高機能化・多機能化の要望が強まっており、半導体素子のボンディングパッド数が増加してきている。また、電子機器の小型化やコストダウンに対応するために、半導体素子のより一層の小型化が求められている。これらの要求に応えるため、ボンディングパッド（電極）のサイズが小さくなってきている。   In recent years, there has been an increasing demand for higher functionality and multiple functions of semiconductor devices, and the number of bonding pads for semiconductor elements has increased. Further, in order to cope with downsizing and cost reduction of electronic devices, further downsizing of semiconductor elements is required. In order to meet these requirements, the size of bonding pads (electrodes) has been reduced.

しかし、ボンディングパッドのサイズの縮小化に伴い、ボンディングパッドからボンディングワイヤが外れるという問題が顕在化してきた。そこで、ボンディングワイヤとボンディングパッドとの接合性をより高める手段として、ボンディングパッドを凹凸のある起伏形状に形成することが提案されている（例えば、特許文献１参照。）。   However, as the size of the bonding pad is reduced, the problem that the bonding wire is detached from the bonding pad has become apparent. In view of this, as a means for further improving the bonding property between the bonding wire and the bonding pad, it has been proposed to form the bonding pad in a undulated shape having irregularities (see, for example, Patent Document 1).

図７に従来の半導体装置のボンディングパッドを示す。図７（ａ）は従来の半導体装置のボンディングパッドを示す平面図である。図７（ｂ）は従来の半導体装置のボンディングパッドを示す断面図であり、詳しくは、図７（ａ）のＡ−Ａ’線部の断面を示している。図７において、１１はシリコン基板、１２はアルミニウム電極、１３は保護膜、１４はボンディングパッドである。   FIG. 7 shows a bonding pad of a conventional semiconductor device. FIG. 7A is a plan view showing bonding pads of a conventional semiconductor device. FIG. 7B is a cross-sectional view showing a bonding pad of a conventional semiconductor device. Specifically, FIG. 7B shows a cross section taken along line A-A ′ of FIG. In FIG. 7, 11 is a silicon substrate, 12 is an aluminum electrode, 13 is a protective film, and 14 is a bonding pad.

図７に示すように、アルミニウム電極１２の表面に碁盤目状に多数の溝を刻説して、ボンディングパッド１４を凹凸のある起伏形状に形成することで、高周波放電のスパークにより先端をボール状にしたボンディングワイヤとボンディングパッドとの合金層の面積が増加するとともに、ボンディングワイヤをボンディングパッドに押し付ける際に加える超音波によって生じる摩擦力も増加するので、ボンディングワイヤとボンディングパッドとの接合性の向上を望める。   As shown in FIG. 7, a large number of grooves are engraved on the surface of the aluminum electrode 12, and the bonding pad 14 is formed in a undulating shape with irregularities. This increases the area of the alloy layer between the bonding wire and the bonding pad, and also increases the friction force generated by the ultrasonic waves applied when the bonding wire is pressed against the bonding pad, thus improving the bondability between the bonding wire and the bonding pad. I can hope.

一方、近年、電子機器の更なるコストの削減、電気伝導性の向上、ならびにボール接合およびウェッジ接合等の接合信頼性の向上のために、ボンディングワイヤとして、これまでの高純度４Ｎ（純度＞９９．９９ｍａｓｓ％）の金ワイヤに代えて、銅ワイヤや合金ワイヤなどが使われ始めている。合金ワイヤとしては、ワイヤの芯線にＣｕ（３Ｎ〜４Ｎ程度）を使用し、ワイヤの表面にはＣｕの酸化を防止するためのＰｄ等を使用したＰｄコートＣｕワイヤ等が一般的に知られている。   On the other hand, in recent years, as a bonding wire, high purity 4N (purity> 99) has been used as a bonding wire in order to further reduce the cost of electronic devices, improve electric conductivity, and improve bonding reliability such as ball bonding and wedge bonding. (.99 mass%) instead of gold wires, copper wires and alloy wires are beginning to be used. As an alloy wire, a Pd-coated Cu wire or the like using Cu (about 3N to 4N) as a core wire of the wire and using Pd or the like for preventing oxidation of Cu on the surface of the wire is generally known. Yes.

しかし、銅ワイヤや合金ワイヤは金ワイヤよりも硬いため、高周波放電のスパークにより先端がボール状になった銅ワイヤまたは合金ワイヤを、半導体素子のボンディングパッド上に、超音波、温度、圧力を加えて押し付けると、ボンディングパッド（電極）を形成している金属が押し出される。この押し出された金属はスプラッシュと呼ばれる。加えて、銅ワイヤや合金ワイヤをボンディングパッドと接合するためには、金ワイヤをボンディングする場合よりも高い超音波周波数と圧力が必要となる。そのため、超音波の振幅方向に発生するスプラッシュの量が多くなり、この超音波の振幅方向に過剰に発生したスプラッシュによって、隣接するボンディングパッド（電極）同士が接続されるおそれがある。   However, since copper wires and alloy wires are harder than gold wires, ultrasonic waves, temperature, and pressure are applied to the bonding pads of semiconductor elements by applying copper wires or alloy wires whose tips are ball-shaped by sparks of high-frequency discharge. When pressed, the metal forming the bonding pad (electrode) is pushed out. This extruded metal is called splash. In addition, in order to bond a copper wire or an alloy wire to a bonding pad, a higher ultrasonic frequency and pressure are required than when a gold wire is bonded. For this reason, the amount of splash generated in the amplitude direction of the ultrasonic wave increases, and there is a possibility that adjacent bonding pads (electrodes) are connected to each other by the splash generated excessively in the amplitude direction of the ultrasonic wave.

以上説明したように、近年使用されるようになってきた銅ワイヤや合金ワイヤには、超音波の振幅方向に隣接するボンディングパッド（電極）同士がスプラッシュによって接続するおそれがある。しかしながら、従来のボンディングパッドの構造としては、ボンディングワイヤとボンディングパッドとの接合性を高めるために、電極の表面に碁盤目状に多数の溝を刻説して、ボンディングパッドを凹凸のある起伏形状に形成したものはあっても、金ワイヤよりも硬い金属ワイヤを用いた場合でも隣接するボンディングパッド同士の接続を防止することができるボンディングパッドはなかった。そのため、金ワイヤよりも硬い金属ワイヤを用いた場合でも隣接するボンディングパッド同士の接続を防止することができるボンディングパッドが求められている。   As described above, in copper wires and alloy wires that have been used in recent years, bonding pads (electrodes) adjacent in the amplitude direction of ultrasonic waves may be connected by splash. However, in the conventional bonding pad structure, in order to improve the bondability between the bonding wire and the bonding pad, a large number of grooves are engraved on the surface of the electrode so that the bonding pad is uneven. However, there is no bonding pad that can prevent connection between adjacent bonding pads even when a metal wire harder than a gold wire is used. Therefore, there is a need for a bonding pad that can prevent connection between adjacent bonding pads even when a metal wire harder than a gold wire is used.

特開平６−１２０２９０号公報JP-A-6-120290

以上のように、金ワイヤよりも硬い金属ワイヤを用いてワイヤボンディングを行うと、ボンディングパッドを形成している金属が押し出されてスプラッシュが発生する。加えて、ワイヤボンディングを行う際の超音波周波数と圧力が高いと、超音波の振幅方向へ押し出される金属（スプラッシュ）の量が増える。そのため、超音波の振幅方向に発生するスプラッシュの量が多くなり、この超音波の振幅方向に過剰に発生したスプラッシュによって、隣接するボンディングパッド（電極）同士が接続される不良が起こるおそれがある。   As described above, when wire bonding is performed using a metal wire that is harder than a gold wire, the metal forming the bonding pad is pushed out and splash is generated. In addition, if the ultrasonic frequency and pressure during wire bonding are high, the amount of metal (splash) pushed out in the direction of the amplitude of the ultrasonic wave increases. For this reason, the amount of splash generated in the amplitude direction of the ultrasonic waves increases, and the splash generated excessively in the amplitude direction of the ultrasonic waves may cause a defective connection between adjacent bonding pads (electrodes).

例えば、ボンディングワイヤとして銅ワイヤや合金ワイヤなどの金ワイヤよりも硬い金属ワイヤを使用する場合、回路配線基板（リードフレーム、基板、テープ）を約１５０°Ｃ〜３５０°Ｃの範囲で加熱し、高周波放電のスパークにより先端がボール状になったボンディングワイヤを、半導体素子のアルミニウム電極（ボンディングパッド）上に超音波、圧力を加えて押し付け、アルミニウムとの合金層を形成させて圧着して、ボンディングパッドとボンディングワイヤを接合させる。しかし、銅や合金などとアルミニウムとを接合する際には、金ワイヤを用いてワイヤボンディングを行う場合よりも超音波周波数と圧力を高くしなければならない。また、銅ワイヤや合金ワイヤの先端のボールは金ワイヤの先端のボールよりも硬い。そのため、銅ワイヤや合金ワイヤなどを用いたワイヤボンディングの場合は、金ワイヤを用いてワイヤボンディングを行う場合よりもスプラッシュが発生しやすくなる。   For example, when a metal wire harder than a gold wire such as a copper wire or an alloy wire is used as a bonding wire, a circuit wiring board (lead frame, substrate, tape) is heated in a range of about 150 ° C. to 350 ° C., Bonding wire, which has a ball-shaped tip due to sparks of high-frequency discharge, is pressed against the aluminum electrode (bonding pad) of the semiconductor element by applying ultrasonic waves and pressure, forming an alloy layer with aluminum, and then bonding and bonding. Bond the pad and bonding wire. However, when joining copper or an alloy with aluminum, the ultrasonic frequency and pressure must be higher than when wire bonding is performed using a gold wire. Also, the ball at the tip of the copper wire or alloy wire is harder than the ball at the tip of the gold wire. Therefore, in the case of wire bonding using a copper wire, an alloy wire, or the like, splash is more likely to occur than when wire bonding is performed using a gold wire.

本発明は、例えば、隣接するボンディングパッド同士のスプラッシュによる接続の防止など、隣接する電極同士の接続の防止を図ることができる半導体装置およびその製造方法を提供することを目的とする。   An object of the present invention is to provide a semiconductor device capable of preventing connection between adjacent electrodes, such as prevention of connection by splashing between adjacent bonding pads, and a method for manufacturing the same.

上記目的を達成するために、本発明の半導体装置は、半導体基板と、前記半導体基板上に形成された第１の導電層と、前記半導体基板上に形成され、前記第１の導電層を露出するように開口する保護膜と、前記保護膜の開口から露出する前記第１の導電層及び前記保護膜上に形成された第２の導電層と、を備え、前記第２の導電層が、その端部よりも内側に凹部を有することを特徴とする。   In order to achieve the above object, a semiconductor device according to the present invention includes a semiconductor substrate, a first conductive layer formed on the semiconductor substrate, and the first conductive layer formed on the semiconductor substrate. And a second conductive layer formed on the protective film, the first conductive layer exposed from the opening of the protective film, and the second conductive layer, It has a recessed part inside the edge part, It is characterized by the above-mentioned.

また、本発明の半導体装置の他の側面によれば、前記第１の導電層は凸部を有し、前記第２の導電層の凹部は、前記第１の導電層の凸部に沿って形成されている。   According to another aspect of the semiconductor device of the present invention, the first conductive layer has a convex portion, and the concave portion of the second conductive layer extends along the convex portion of the first conductive layer. Is formed.

また、本発明の半導体装置の他の側面によれば、前記第１の導電層は、深さが前記第１の導電層の厚み以下の凹部を有し、前記第２の導電層の凹部は、前記第１の導電層の凹部に沿って形成されている。   According to another aspect of the semiconductor device of the present invention, the first conductive layer has a recess having a depth equal to or less than the thickness of the first conductive layer, and the recess of the second conductive layer is The first conductive layer is formed along the recess.

また、本発明の半導体装置の他の側面によれば、前記第２の導電層の凹部は少なくとも２つ設けられている。   According to another aspect of the semiconductor device of the present invention, at least two concave portions of the second conductive layer are provided.

また、本発明の半導体装置の他の側面によれば、前記第２の導電層の凹部のうちの最外郭に位置する凹部間に、前記第２の導電層に接続される外部接続用電極の幅以上の間隔が設けられている。   According to another aspect of the semiconductor device of the present invention, an external connection electrode connected to the second conductive layer is disposed between the outermost concave portions of the concave portions of the second conductive layer. An interval greater than the width is provided.

また、本発明の半導体装置の他の側面によれば、前記第２の導電層の凹部は、平面視したとき直線状である。   According to another aspect of the semiconductor device of the present invention, the concave portion of the second conductive layer is linear when viewed in plan.

また、本発明の半導体装置の他の側面によれば、前記第２の導電層の凹部は、前記第２の導電層に外部接続用電極が接続される際に加えられる超音波の振幅方向に対して垂直な方向に沿った直線形状をしている。   According to another aspect of the semiconductor device of the present invention, the concave portion of the second conductive layer is formed in an amplitude direction of an ultrasonic wave applied when an external connection electrode is connected to the second conductive layer. It has a straight line shape along a direction perpendicular to it.

また、本発明の半導体装置の他の側面によれば、前記第２の導電層の凹部は、平面視したとき環状である。   According to another aspect of the semiconductor device of the present invention, the recess of the second conductive layer is annular when viewed in plan.

また、本発明の半導体装置の他の側面によれば、前記第２の導電層の凹部で囲まれる領域は、前記第２の導電層に接続される外部接続用電極の投影面積以上の面積を有する。   According to another aspect of the semiconductor device of the present invention, the region surrounded by the concave portion of the second conductive layer has an area larger than the projected area of the external connection electrode connected to the second conductive layer. Have.

また、本発明の半導体装置の他の側面によれば、前記第２の導電層の凹部は、断面視したとき、その深さ方向に傾斜している。   According to another aspect of the semiconductor device of the present invention, the concave portion of the second conductive layer is inclined in the depth direction when viewed in cross section.

また、本発明の半導体装置の他の側面によれば、前記第２の導電層の凹部は、断面視したとき階段状である。   According to another aspect of the semiconductor device of the present invention, the concave portion of the second conductive layer has a step shape when viewed in cross section.

また、本発明の半導体装置の他の側面によれば、前記第１の導電層及び第２の導電層は、銅、アルミニウム、タングステン、チタン、タンタルのうちの少なくとも１種類の単体を用いて、または、銅、アルミニウム、タングステン、チタン、タンタルのいずれかを含む少なくとも１種類の金属化合物を用いて、または、単体と金属化合物を組み合わせて形成されている。   According to another aspect of the semiconductor device of the present invention, the first conductive layer and the second conductive layer are made of at least one kind of copper, aluminum, tungsten, titanium, and tantalum, Alternatively, it is formed using at least one kind of metal compound containing any of copper, aluminum, tungsten, titanium, and tantalum, or a combination of a simple substance and a metal compound.

また、本発明の半導体装置の他の側面によれば、前記保護膜は、少なくとも１種類の絶縁化合物を用いて形成されている。   According to another aspect of the semiconductor device of the present invention, the protective film is formed using at least one insulating compound.

また、本発明の半導体装置の他の側面によれば、前記保護膜は、ＳｉＯ２またはＳｉＮの少なくとも一方を用いて形成されている。 According to another aspect of the semiconductor device of the present invention, the protective film is formed using at least one of SiO 2 and SiN.

また、本発明の半導体装置の製造方法は、半導体基板上に第１の導電層を形成する工程と、前記半導体基板上に、前記第１の導電層を露出するように開口する保護膜を形成する工程と、前記保護膜の開口を通じて、その開口から露出する前記第１の導電層の面積よりも小さい面積の導電層を積層して、前記第１の導電層を凹凸形状にする工程と、前記保護膜の開口から露出する前記第１の導電層及び前記保護膜上に第２の導電層を形成して、前記第２の導電層の端部よりも内側に、前記第１の導電層の凸部に沿った凹部を形成する工程と、を具備することを特徴とする。   According to another aspect of the present invention, there is provided a method for manufacturing a semiconductor device, comprising: forming a first conductive layer on a semiconductor substrate; and forming a protective film on the semiconductor substrate so as to expose the first conductive layer. And laminating a conductive layer having an area smaller than the area of the first conductive layer exposed from the opening through the opening of the protective film, and making the first conductive layer uneven. Forming a second conductive layer on the first conductive layer and the protective film exposed from the opening of the protective film, and forming the first conductive layer on an inner side than an end of the second conductive layer; Forming a concave portion along the convex portion.

また、本発明の他の半導体装置の製造方法は、半導体基板上に第１の導電層を形成する工程と、前記半導体基板上に、前記第１の導電層を露出するように開口する保護膜を形成する工程と、前記保護膜の開口を通じて前記第１の導電層に、深さが前記第１の導電層の厚み以下の第１の凹部を形成して、前記第１の導電層を凹凸形状にする工程と、前記保護膜の開口から露出する前記第１の導電層及び前記保護膜上に第２の導電層を形成して、前記第２の導電層の端部よりも内側に、前記第１の導電層の第１の凹部に沿った第２の凹部を形成する工程と、を具備することを特徴とする。   According to another aspect of the present invention, there is provided a method of manufacturing a semiconductor device, the step of forming a first conductive layer on a semiconductor substrate, and a protective film opening on the semiconductor substrate so as to expose the first conductive layer. Forming a first recess having a depth equal to or less than the thickness of the first conductive layer in the first conductive layer through the opening of the protective film, thereby forming the unevenness on the first conductive layer. Forming a second conductive layer on the first conductive layer and the protective film exposed from the opening of the protective film, and on the inner side of the end of the second conductive layer, Forming a second recess along the first recess of the first conductive layer.

本発明の好ましい形態によれば、第２の導電層に外部接続用電極を接続する際に、第２の導電層を形成している金属や第２の導電層に接続する外部接続用電極を形成している金属を、第２の導電層に設けられた凹部によって受け止めて、その金属が隣の第２の導電層まで押し出されるのを防ぐことができるので、隣接する第２の導電層（電極）同士の接続を防止することができる。   According to a preferred embodiment of the present invention, when the external connection electrode is connected to the second conductive layer, the metal forming the second conductive layer or the external connection electrode connected to the second conductive layer is provided. Since the metal being formed can be received by the concave portion provided in the second conductive layer, and the metal can be prevented from being pushed out to the adjacent second conductive layer, the adjacent second conductive layer ( Connection between the electrodes) can be prevented.

したがって、第２の導電層をボンディングパッドとして使用すれば、ボンディングパッドに金属ワイヤをボンディングする際にスプラッシュが発生しても、隣接するボンディングパッド同士の接続を防止することが可能となる。そのため、半導体装置の高機能化・多機能化に伴うパッド数の増加や、チップサイズの縮小化によって、パッドの狭ピッチ化が進んでも、スプラッシュによる不良を防止できることから、ボンディングパッドのサイズの更なる縮小化が可能となる。また、ワイヤボンディングに使用する超音波周波数や圧力を高めても、スプラッシュによる不良を防止できることから、これまで以上に高い超音波周波数や圧力を用いたワイヤボンディングが可能となり、信頼性の更なる向上が実現可能となる。   Therefore, if the second conductive layer is used as a bonding pad, it is possible to prevent the adjacent bonding pads from being connected to each other even if splash occurs when a metal wire is bonded to the bonding pad. For this reason, even if the pitch of pads is reduced due to the increase in the number of pads and the reduction in chip size due to the increase in functionality and functionality of semiconductor devices, defects due to splash can be prevented. Reduction can be achieved. In addition, even if the ultrasonic frequency and pressure used for wire bonding are increased, defects due to splash can be prevented, so wire bonding using ultrasonic frequency and pressure higher than ever is possible, further improving reliability. Is feasible.

更に、第２の導電層を金属バンプや半田ボール等の外部接続用電極に接合させる電極として使用すれば、熱接着時に金属バンプや半田ボール等から溶け出した金属が、隣の第２の導電層まで流れて、隣接する第２の導電層（電極）同士が接続する不良を防ぐことができる。   Furthermore, if the second conductive layer is used as an electrode to be joined to an external connection electrode such as a metal bump or a solder ball, the metal melted from the metal bump or the solder ball at the time of thermal bonding will be removed from the adjacent second conductive layer. It is possible to prevent a defect in which the adjacent second conductive layers (electrodes) are connected to each other through the layers.

本発明の実施の形態１における半導体装置の構成の要部を概略的に示す断面図および平面図Sectional drawing and top view which show schematically the principal part of a structure of the semiconductor device in Embodiment 1 of this invention 本発明の実施の形態１における、ボンディングパッドとボンディングワイヤとの接合状態を示す断面図Sectional drawing which shows the joining state of the bonding pad and bonding wire in Embodiment 1 of this invention 本発明の実施の形態１におけるボンディングパッドの配列方向を示す平面図The top view which shows the arrangement direction of the bonding pad in Embodiment 1 of this invention 本発明の実施の形態２における半導体装置の構成の要部を概略的に示す断面図Sectional drawing which shows schematically the principal part of a structure of the semiconductor device in Embodiment 2 of this invention. 本発明の実施の形態２におけるボンディングパッドの拡大断面図The expanded sectional view of the bonding pad in Embodiment 2 of this invention 本発明の実施の形態２におけるボンディングパッドの平面図The top view of the bonding pad in Embodiment 2 of this invention 従来の半導体装置のボンディングパッドを示す断面図および平面図Sectional drawing and top view which show the bonding pad of the conventional semiconductor device

以下、本発明の実施の形態について、図面を参照しながら説明する。なお、同じ要素には同じ符号を付しており、説明を省略する場合もある。また、図面は、理解しやすくするために、それぞれの要素を主体に模式的に示している。   Hereinafter, embodiments of the present invention will be described with reference to the drawings. In addition, the same code | symbol is attached | subjected to the same element and description may be abbreviate | omitted. Further, the drawings schematically show each element mainly for easy understanding.

（実施の形態１）
図１は本発明の実施の形態１における半導体装置の構成の要部を概略的に示す図であり、図１（ａ）は断面図、図１（ｂ）は平面図である。図１において、１は半導体基板、２は第１の絶縁膜、３は第２の絶縁膜、４はパッシベーション膜、５は第１の導電層、５ａは第１の導電層の本体、５ｂは第１の導電層の凸部、６は第２の導電層、７は第２の導電層の凹部である。図１において、第２の導電層６の、パッシベーション膜４から露出する表面が、ボンディングワイヤを接続するためのボンディングパッド（電極）である。以下、この実施の形態１における半導体装置について詳しく説明する。 (Embodiment 1)
1A and 1B are diagrams schematically showing a main part of the configuration of the semiconductor device according to the first embodiment of the present invention. FIG. 1A is a sectional view and FIG. In FIG. 1, 1 is a semiconductor substrate, 2 is a first insulating film, 3 is a second insulating film, 4 is a passivation film, 5 is a first conductive layer, 5a is a body of the first conductive layer, and 5b is The convex portion of the first conductive layer, 6 is the second conductive layer, and 7 is the concave portion of the second conductive layer. In FIG. 1, the surface of the second conductive layer 6 exposed from the passivation film 4 is a bonding pad (electrode) for connecting a bonding wire. Hereinafter, the semiconductor device according to the first embodiment will be described in detail.

半導体基板１には、例えばＳｉ基板を用いることができる。なお、実際の半導体装置では、半導体基板１上にＭＯＳトランジスタやバイポーラトランジスタ等のデバイスが作りこまれているが、図面上は簡略化のため省略している。   As the semiconductor substrate 1, for example, a Si substrate can be used. In an actual semiconductor device, a device such as a MOS transistor or a bipolar transistor is formed on the semiconductor substrate 1, but is omitted from the drawing for simplification.

半導体基板１上には第１の絶縁膜２が形成されている。第１の絶縁膜２には、例えばシリコン酸化膜（ＳｉＯ２膜）を用いることができる。この第１の絶縁膜２内に、表面が第１の絶縁膜２から露出する第１の導電層５が形成されている。この第１の導電層５は、半導体装置の配線および、配線とボンディングパッドとの接続領域となる。 A first insulating film 2 is formed on the semiconductor substrate 1. For example, a silicon oxide film (SiO 2 film) can be used for the first insulating film 2. A first conductive layer 5 whose surface is exposed from the first insulating film 2 is formed in the first insulating film 2. The first conductive layer 5 serves as a wiring region of the semiconductor device and a connection region between the wiring and the bonding pad.

第１の絶縁膜２および第１の導電層５上には、保護膜の一例としての第２の絶縁膜３が形成されている。第２の絶縁膜３には、例えばシリコン酸化膜（ＳｉＯ２膜）を用いることができる。なお、第２の絶縁膜３として、シリコン酸化膜と、そのシリコン酸化膜を挟むシリコン窒化膜（ＳｉＮ膜）とからなる積層体を用いてもよい。この第２の絶縁膜３は、第１の導電層５の表面のうち、ボンディングパッドとの接続領域となる部分を露出するように開口している。 On the first insulating film 2 and the first conductive layer 5, a second insulating film 3 as an example of a protective film is formed. For example, a silicon oxide film (SiO 2 film) can be used for the second insulating film 3. As the second insulating film 3, a stacked body including a silicon oxide film and a silicon nitride film (SiN film) sandwiching the silicon oxide film may be used. The second insulating film 3 is opened so as to expose a portion of the surface of the first conductive layer 5 that becomes a connection region with the bonding pad.

第２の絶縁膜３の開口から露出する第１の導電層５及び第２の絶縁膜３の開口の周囲の領域上には、第２の導電層６が形成されている。さらに、第２の導電層６の外周部および第２の絶縁膜３上にパッシベーション膜４が形成されている。   A second conductive layer 6 is formed on the first conductive layer 5 exposed from the opening of the second insulating film 3 and the region around the opening of the second insulating film 3. Further, a passivation film 4 is formed on the outer peripheral portion of the second conductive layer 6 and the second insulating film 3.

第２の導電層６の表面のうち、パッシベーション膜４から露出している領域が、この半導体装置の、外部との接続領域としてのボンディングパッドである。したがって、パッシベーション膜４は、第２の導電層６の表面のうちボンディングパッドとなる領域を露出するように開口している。   A region exposed from the passivation film 4 in the surface of the second conductive layer 6 is a bonding pad as a connection region of the semiconductor device to the outside. Therefore, the passivation film 4 is opened so as to expose a region to be a bonding pad on the surface of the second conductive layer 6.

第２の導電層６は、パッシベーション膜４から露出する領域の端部よりも内側に凹部７を有している。つまり、ボンディングパッド（電極）に凹部７が形成されている。この凹部７により、ボンディングパッドを形成している金属が、ワイヤボンディング時に隣のボンディングパッドまで押し出されることを防止して、隣接するボンディングパッド（電極）同士の接続を防止することができる。   The second conductive layer 6 has a recess 7 inside the end of the region exposed from the passivation film 4. That is, the recess 7 is formed in the bonding pad (electrode). The recess 7 prevents the metal forming the bonding pad from being pushed out to the adjacent bonding pad during wire bonding, thereby preventing the connection between adjacent bonding pads (electrodes).

凹部７は、好ましくは、ボンディングパッド（第２の導電層６）を断面視したときに、パッシベーション膜４から露出する第２の導電層６の端部、すなわちボンディングパッドの端部よりも内側に２箇所以上現れるように形成する。図１（ａ）には、ボンディングパッドを断面視したとき凹部７が２箇所に現れる構造を示している。   The recess 7 is preferably located on the inner side of the end of the second conductive layer 6 exposed from the passivation film 4, that is, the end of the bonding pad when the bonding pad (second conductive layer 6) is viewed in cross section. It is formed so as to appear at two or more locations. FIG. 1A shows a structure in which the concave portions 7 appear at two locations when the bonding pad is viewed in cross section.

さらに好ましくは、ボンディングパッド（第２の導電層６）を断面視したときに、第２の導電層の凹部７のうちの最外郭に位置する２つの凹部の間に、ボンディングパッド（第２の導電層６）に接続されるボンディングワイヤのボール状の端部（外部接続用電極）の幅以上の間隔を設ける。こうすることで、隣接するボンディングパッド（電極）同士の接続をより確実に防止することができる。   More preferably, when the bonding pad (second conductive layer 6) is viewed in cross section, the bonding pad (second conductive layer) is disposed between the two outermost concave portions of the concave portions 7 of the second conductive layer. An interval equal to or larger than the width of the ball-shaped end portion (external connection electrode) of the bonding wire connected to the conductive layer 6) is provided. By doing so, connection between adjacent bonding pads (electrodes) can be more reliably prevented.

第１の導電層５及び第２の導電層６の材料には、銅、アルミニウム、タングステン、チタン、タンタルのうちの少なくとも１種類を単体で用いてもよいし、それらのうちのいずれかを含む金属化合物のうちの少なくとも１種類を用いてもよいし、単体と金属化合物を組み合わせて用いてもよい。また、保護膜の一例である第２の絶縁膜３の材料には、少なくとも１種類の絶縁化合物を用いることができる。絶縁化合物としては、例えば、ＳｉＯ２やＳｉＮなどを用いることができる。 As a material for the first conductive layer 5 and the second conductive layer 6, at least one of copper, aluminum, tungsten, titanium, and tantalum may be used alone, or any one of them may be used. At least one of the metal compounds may be used, or a simple substance and a metal compound may be used in combination. In addition, as the material of the second insulating film 3 which is an example of the protective film, at least one kind of insulating compound can be used. As the insulating compound, for example, SiO 2 or SiN can be used.

図２に、ボンディングパッドにボンディングワイヤが接合した状態を示す。図２において、８はボンディングワイヤのボール部、９はボンディングワイヤである。第２の導電層の凹部７のうちの最外郭に位置する凹部よりも内側にボンディングワイヤ９のボール部８を接続すれば、銅ワイヤや合金ワイヤなどの硬い金属ワイヤを用いてワイヤボンディングした際に、超音波の振幅方向にスプラッシュが発生しても、そのスプラッシュは第２の導電層６に形成された凹部７に入り込み、隣のボンディングパッドと接触することはない。したがって、隣接するボンディングパッド（電極）同士の接続を防止することができる。   FIG. 2 shows a state in which the bonding wire is bonded to the bonding pad. In FIG. 2, 8 is a ball portion of the bonding wire, and 9 is a bonding wire. If the ball portion 8 of the bonding wire 9 is connected to the inner side of the outermost concave portion of the concave portion 7 of the second conductive layer, wire bonding is performed using a hard metal wire such as a copper wire or an alloy wire. Even if splash occurs in the amplitude direction of the ultrasonic waves, the splash enters the recess 7 formed in the second conductive layer 6 and does not come into contact with the adjacent bonding pad. Therefore, connection between adjacent bonding pads (electrodes) can be prevented.

ボンディングパッド（第２の導電層６）の凹部７は、第２の導電層６の直下の第１の導電層の本体５ａに凸部５ｂを少なくとも１つ設けることによって、その第１の導電層の凸部５ｂに沿って形成することができる。   The concave portion 7 of the bonding pad (second conductive layer 6) is formed by providing at least one convex portion 5b on the main body 5a of the first conductive layer immediately below the second conductive layer 6, thereby forming the first conductive layer. It can form along the convex part 5b.

第１の導電層の凸部５ｂは、第２の絶縁膜３の開口の内側、すなわち第２の絶縁膜３から露出する導電層５ａ上に、導電層を少なくとも１層積層することで形成する。例えば、導電層５ａの形成後に、導電層５ａと同じ材質、同じ薄膜形成方法を使用して、導電層５ａの上に、凸部５ｂとなる導電層を積層させるなどして、この凸部（導電層）５ｂを形成してもよい。薄膜形成方法としては、スパッタリングや電子ビーム蒸着などを使用することができる。   The convex portion 5 b of the first conductive layer is formed by laminating at least one conductive layer inside the opening of the second insulating film 3, that is, on the conductive layer 5 a exposed from the second insulating film 3. . For example, after forming the conductive layer 5a, using the same material and the same thin film forming method as the conductive layer 5a, a conductive layer to be the convex portion 5b is laminated on the conductive layer 5a. A conductive layer 5b may be formed. As a thin film forming method, sputtering, electron beam evaporation, or the like can be used.

第１の導電層の凸部５ｂの面積は、第２の絶縁膜３から露出する導電層５ａの面積（第２の絶縁膜３の開口面積）よりも小さく設定する。なお、ボンディングパッド（第２の導電層６）を断面視したときに、第２の導電層の凹部７が３箇所以上現れる構造とする場合には、第１の導電層の本体５ａに凸部５ｂを２つ以上設ける。   The area of the convex portion 5 b of the first conductive layer is set smaller than the area of the conductive layer 5 a exposed from the second insulating film 3 (opening area of the second insulating film 3). When the bonding pad (second conductive layer 6) has a structure in which three or more concave portions 7 of the second conductive layer appear in a cross-sectional view, a convex portion is formed on the main body 5a of the first conductive layer. Two or more 5b are provided.

この実施の形態１では、第２の絶縁膜３から露出する導電層５ａの領域内の１箇所に１層の導電層（凸部）５ｂが積層されている。第１の導電層の本体５ａの膜厚を１．０μｍとすると、その上に積層する導電層５ｂの膜厚は１．０μｍ以下にする。ここでは、０．９μｍとした。このように、膜厚０．９μｍの凸部５ｂを有する第１の導電層５上に、第２の導電層６を例えば膜厚１．０μｍで形成する。第２の導電層６は、例えば無電解めっき法などで形成することができる。そうすることで、第２の導電層６を加工することなく、０．９μｍの凹部７を第２の導電層６に形成することができる。なお、第２の絶縁膜３から露出する導電層５ａの領域内の１箇所に２層以上の導電層を積層して、膜厚０．９μｍの凸部５ｂを１個形成してもよい。   In the first embodiment, one conductive layer (convex portion) 5b is laminated at one place in the region of the conductive layer 5a exposed from the second insulating film 3. When the film thickness of the main body 5a of the first conductive layer is 1.0 μm, the film thickness of the conductive layer 5b laminated thereon is 1.0 μm or less. Here, it was set to 0.9 μm. In this way, the second conductive layer 6 is formed with a film thickness of 1.0 μm, for example, on the first conductive layer 5 having the convex part 5 b with a film thickness of 0.9 μm. The second conductive layer 6 can be formed by, for example, an electroless plating method. By doing so, a recess 7 of 0.9 μm can be formed in the second conductive layer 6 without processing the second conductive layer 6. It should be noted that two or more conductive layers may be stacked at one place in the region of the conductive layer 5a exposed from the second insulating film 3 to form one convex portion 5b having a thickness of 0.9 μm.

このように第１の導電層５を凹凸形状にすることで、第２の導電層６を加工することなく、凹部を有するボンディングパッド（第２の導電層６）を形成することができる。   By forming the first conductive layer 5 to have a concavo-convex shape in this way, a bonding pad (second conductive layer 6) having a recess can be formed without processing the second conductive layer 6.

この実施の形態１では、図１（ｂ）に示すように、ボンディングパッド（第２の導電層６）の凹部７は、平面視したとき直線状である。なお、直線状の凹部７は２本以上設けるのが好ましい。   In the first embodiment, as shown in FIG. 1B, the concave portion 7 of the bonding pad (second conductive layer 6) is linear when viewed in plan. In addition, it is preferable to provide two or more linear recesses 7.

図１（ｂ）に示すような２本の直線状の凹部７を形成する場合、図１（ａ）を記述した紙面に垂直な方向において、凸部５ｂの長さを、第２の絶縁膜３から露出する第１の導電層５の領域と同じ長さに設定する。また、図１（ａ）を記述した紙面の左右方向において、凸部５ｂの幅を、第２の絶縁膜３から露出する第１の導電層５の領域よりも短く設定する。好ましくは、図１（ａ）を記述した紙面の左右方向の凸部５ｂの幅は、第２の導電層の凹部７のうちの最外郭に位置する凹部７の間の間隔が、ボンディングパッド（第２の導電層６）に接続されるワイヤのボール状の端部（外部接続用電極）の幅以上となるように設定する。なお、図１（ａ）を記述した紙面に垂直な方向の凸部５ｂの長さを短くした場合、後述する図６（ｂ）に示すように、ボンディングパッドの凹部７は、平面視したときに正方形または長方形の辺に沿う環状となる。   In the case of forming two linear concave portions 7 as shown in FIG. 1B, the length of the convex portion 5b is set to the second insulating film in the direction perpendicular to the paper surface describing FIG. 3 is set to the same length as the region of the first conductive layer 5 exposed from 3. Further, the width of the convex portion 5 b is set to be shorter than the region of the first conductive layer 5 exposed from the second insulating film 3 in the left-right direction of the paper surface illustrated in FIG. Preferably, the width of the convex portion 5b in the left-right direction on the paper surface described in FIG. 1A is such that the interval between the concave portions 7 located at the outermost contour among the concave portions 7 of the second conductive layer is a bonding pad ( The width is set to be equal to or greater than the width of the ball-shaped end portion (external connection electrode) of the wire connected to the second conductive layer 6). In addition, when the length of the convex part 5b in the direction perpendicular to the paper surface in which FIG. 1A is described is shortened, the concave part 7 of the bonding pad is shown in plan view as shown in FIG. It is circular along the side of a square or rectangle.

続いて、この実施の形態１における半導体装置の製造方法について説明する。   Next, a method for manufacturing the semiconductor device according to the first embodiment will be described.

まず半導体基板１上にＭＯＳトランジスタ等のデバイス（図では省略）を形成した後、層間膜として第１の絶縁膜２を形成する。例えば、第１の絶縁膜２として、ＣＶＤ法によりシリコン酸化膜（ＳｉＯ２膜）を形成する。 First, a device such as a MOS transistor (not shown) is formed on the semiconductor substrate 1, and then a first insulating film 2 is formed as an interlayer film. For example, as the first insulating film 2, a silicon oxide film (SiO 2 film) is formed by a CVD method.

次に、第１の絶縁膜２に導電層５ａ用の溝（開口）を、例えば、リソグラフィ工程とドライエッチング工程を用いて形成する。   Next, a groove (opening) for the conductive layer 5a is formed in the first insulating film 2 by using, for example, a lithography process and a dry etching process.

次に、導電層５ａを形成するための金属膜を、例えばスパッタリングや電子ビーム蒸着により被着させ、その被着させた金属膜を平坦化することで、半導体基板１上に導電層５ａを形成する。なお、第１の導電層５の金属として例えばＣｕを用いる場合には、銅の拡散の防止と密着性の向上のために、まずＴｉＮ膜を被着させた後に、Ｃｕ膜を被着させてもよい。   Next, a metal film for forming the conductive layer 5a is deposited by, for example, sputtering or electron beam evaporation, and the deposited metal film is planarized to form the conductive layer 5a on the semiconductor substrate 1. To do. When Cu is used as the metal of the first conductive layer 5, for example, a TiN film is first deposited and then a Cu film is deposited in order to prevent copper diffusion and improve adhesion. Also good.

次に、層間膜として第２の絶縁膜３を形成する。例えば、第２の絶縁膜３として、ＣＶＤ法によりシリコン酸化膜（ＳｉＯ２膜）を形成する。なお、第１の導電層５の金属として例えばＣｕを用いる場合には、シリコン酸化膜とともに、銅の拡散の防止のために、第２の絶縁膜３を挟むシリコン窒化膜（ＳｉＮ膜）をＣＶＤ法により形成してもよい。第２の絶縁膜３の形成後、第２の絶縁膜３に第２の導電層６用の開口を、例えば、リソグラフィ工程とドライエッチング工程を用いて形成する。これにより、半導体基板１上に、第１の導電層５を露出するように開口する保護膜が形成される。 Next, a second insulating film 3 is formed as an interlayer film. For example, as the second insulating film 3, a silicon oxide film (SiO 2 film) is formed by a CVD method. When Cu is used as the metal of the first conductive layer 5, for example, a silicon nitride film (SiN film) sandwiching the second insulating film 3 is CVD together with the silicon oxide film in order to prevent copper diffusion. You may form by a method. After the formation of the second insulating film 3, an opening for the second conductive layer 6 is formed in the second insulating film 3 by using, for example, a lithography process and a dry etching process. Thereby, a protective film is formed on the semiconductor substrate 1 so as to expose the first conductive layer 5.

次に、第２の絶縁膜３の開口を通じて、第２の絶縁膜３から露出する導電層５ａ上に、その露出している領域の面積よりも小さい面積の導電層を積層する。例えば、スパッタリングや電子ビーム蒸着などにより金属膜を被着させて導電層５ａ上に積層し、その積層された金属膜を平坦化することで、導電層５ａ上に導電層を積層させることができる。この積層された導電層が第１の導電層の凸部５ｂとなる。これにより、保護膜から露出する凹凸形状の第１の導電層５が形成される。   Next, a conductive layer having an area smaller than the area of the exposed region is laminated on the conductive layer 5 a exposed from the second insulating film 3 through the opening of the second insulating film 3. For example, a conductive film can be stacked on the conductive layer 5a by depositing a metal film on the conductive layer 5a by sputtering, electron beam evaporation, or the like, and flattening the stacked metal film. . This laminated conductive layer becomes the convex portion 5b of the first conductive layer. Thereby, the uneven | corrugated shaped 1st conductive layer 5 exposed from a protective film is formed.

次に、第２の導電層６を形成するための金属膜を、第２の絶縁膜３の開口から露出する第１の導電層５及び第２の絶縁膜３の開口の外周上に、例えば無電解めっき法などで被着させる。これにより、第１の導電層５の凸部５ｂに沿った凹部７を有する第２の導電層６が形成される。その後、パッシベーション膜４を形成する。例えば、パッシベーション膜４として、シリコン窒化膜（ＳｉＮ膜）をＣＶＤ法により形成してもよい。パッシベーション膜４の形成後、リソグラフィ工程とドライエッチング工程を用いて、第２の導電層６の表面のうちボンディングパッド（電極）となる領域が露出するようにパッシベーション膜４を開口する。これにより、パッシベーション膜４から露出する第２の導電層６の端部よりも内側に、第１の導電層５の凸部５ｂに沿った凹部７を有するボンディングパッド（電極）が形成される。   Next, a metal film for forming the second conductive layer 6 is formed on the outer periphery of the opening of the first conductive layer 5 and the second insulating film 3 exposed from the opening of the second insulating film 3, for example. Deposit by electroless plating. Thereby, the 2nd conductive layer 6 which has the recessed part 7 along the convex part 5b of the 1st conductive layer 5 is formed. Thereafter, a passivation film 4 is formed. For example, a silicon nitride film (SiN film) may be formed as the passivation film 4 by a CVD method. After the passivation film 4 is formed, the passivation film 4 is opened using a lithography process and a dry etching process so that a region to be a bonding pad (electrode) in the surface of the second conductive layer 6 is exposed. As a result, a bonding pad (electrode) having a concave portion 7 along the convex portion 5 b of the first conductive layer 5 is formed inside the end portion of the second conductive layer 6 exposed from the passivation film 4.

以上のように、この実施の形態１では、半導体基板上に、複数の層間絶縁膜と、配線と、外部と電気的に接続するためのボンディングパッド（電極）とを備えた半導体装置において、外部と電気的に接続するための領域を有する第２の導電層が形成され、その第２の導電層の直下に、配線の領域を有する第１の導電層が形成されている。さらに、第１の導電層は、第２の導電層の直下において導電層が積層された構造になっており、第１の導電層の表面には凹凸が形成されている。このような構成によって、ボンディングパッド（電極）上に、より深い凹部を形成することができるので、金ワイヤよりも硬い、例えばＣｕワイヤや合金ワイヤ等の金属ワイヤを使用してワイヤボンディングした場合にスプラッシュが発生しても、隣接するボンディングパッド（電極）同士の接続を防止することができる。   As described above, in the first embodiment, in a semiconductor device including a plurality of interlayer insulating films, wirings, and bonding pads (electrodes) for electrical connection to the outside on a semiconductor substrate, A second conductive layer having a region for electrical connection is formed, and a first conductive layer having a wiring region is formed immediately below the second conductive layer. Further, the first conductive layer has a structure in which conductive layers are stacked immediately below the second conductive layer, and irregularities are formed on the surface of the first conductive layer. With such a configuration, since a deeper recess can be formed on the bonding pad (electrode), when wire bonding is performed using a metal wire that is harder than a gold wire, such as a Cu wire or an alloy wire. Even if splash occurs, connection between adjacent bonding pads (electrodes) can be prevented.

続いて、ボンディングパッド（電極）の配列方向について説明する。図３は本発明の実施の形態１におけるボンディングパッドの配列方向を示す図である。   Subsequently, the arrangement direction of the bonding pads (electrodes) will be described. FIG. 3 is a diagram showing the arrangement direction of the bonding pads in the first embodiment of the present invention.

図３（ａ）に示すように、ボンディングパッド（電極）の配列は、第２の導電層の直線状の凹部７の長手方向が、ワイヤボンディング時に加える超音波の振幅方向に対して垂直方向になるように設定するのが好ましい。このようにすれば、スプラッシュが広がる方向に対して凹部７が形成されるので、隣り合うボンディングパッド（電極）同士の接続をより確実に防止することができる。   As shown in FIG. 3A, the bonding pads (electrodes) are arranged such that the longitudinal direction of the linear recesses 7 of the second conductive layer is perpendicular to the amplitude direction of the ultrasonic waves applied during wire bonding. It is preferable to set so that In this way, since the recess 7 is formed in the direction in which the splash spreads, the connection between adjacent bonding pads (electrodes) can be more reliably prevented.

また、図３（ｂ）に示すように、ボンディングパッド（電極）の形状が長方形の場合、超音波の振幅方向とボンディングパッドの長辺方向が等しいならば、凹部７の長手方向を超音波の振幅方向に対して垂直方向に設定しなくてもよい場合がある。   Further, as shown in FIG. 3B, when the shape of the bonding pad (electrode) is a rectangle, if the ultrasonic amplitude direction is equal to the long side direction of the bonding pad, the longitudinal direction of the recess 7 is In some cases, it is not necessary to set the direction perpendicular to the amplitude direction.

（実施の形態２）
図４は本発明の実施の形態２における半導体装置の構成の要部を概略的に示す断面図である。但し、前述した実施の形態１で説明した要素に対応する要素には同一の符号を付して、説明を省略する。図４においても、第２の導電層６の、パッシベーション膜４から露出する表面が、ボンディングパッド（電極）である。以下、この実施の形態２における半導体装置について詳しく説明する。 (Embodiment 2)
FIG. 4 is a cross sectional view schematically showing a main part of the configuration of the semiconductor device according to the second embodiment of the present invention. However, elements corresponding to the elements described in the first embodiment are denoted by the same reference numerals, and description thereof is omitted. Also in FIG. 4, the surface of the second conductive layer 6 exposed from the passivation film 4 is a bonding pad (electrode). Hereinafter, the semiconductor device according to the second embodiment will be described in detail.

図４に示すように、この実施の形態２では、第１の導電層５に凹部１０が設けられている。このように第１の導電層に凹部１０を設けることにより、その凹部１０の直上にボンディングパッド（第２の導電層６）の凹部７を形成することができる。すなわち、凹部１０を設けた第１の導電層５上に、第２の導電層６を例えば無電解めっき法などで形成することにより、第２の導電層６に、第２の導電層６を加工することなく凹部７を形成することができる。   As shown in FIG. 4, in the second embodiment, a recess 10 is provided in the first conductive layer 5. Thus, by providing the recess 10 in the first conductive layer, the recess 7 of the bonding pad (second conductive layer 6) can be formed immediately above the recess 10. That is, the second conductive layer 6 is formed on the second conductive layer 6 by forming the second conductive layer 6 on the first conductive layer 5 provided with the recess 10 by, for example, an electroless plating method. The recess 7 can be formed without processing.

この第１の導電層の凹部１０は、好ましくは、断面視したとき、第２の絶縁膜３の開口から露出する第１の導電層５の領域内に２箇所以上現れるように形成する。図４（ａ）には、断面視したとき凹部１０が２箇所に現れる構造を示している。さらに好ましくは、第１の導電層の凹部１０のうちの最外郭に位置する凹部の間に、ボンディングパッド（第２の導電層６）に接続されるボンディングワイヤのボール状の端部（外部接続用電極）の幅以上の間隔を設ける。   The recesses 10 of the first conductive layer are preferably formed so as to appear in two or more places in the region of the first conductive layer 5 exposed from the opening of the second insulating film 3 when viewed in cross section. FIG. 4A shows a structure in which the recess 10 appears in two places when viewed in cross section. More preferably, a ball-shaped end portion (external connection) of a bonding wire connected to the bonding pad (second conductive layer 6) is provided between the outermost concave portions of the concave portions 10 of the first conductive layer. The gap is larger than the width of the electrode.

また、第１の導電層の凹部１０の深さは、第１の導電層５の膜厚以下にする。図４（ａ）には、第１の導電層５の膜厚よりも浅い凹部１０を、図４（ｂ）には、第１の導電層５の膜厚と同等程度または同等の深さの凹部１０を示している。このようにすれば、第２の導電層の凹部７の深さが、前述の実施の形態１で説明した構造と比較して、より深くなるので、スプラッシュの影響を回避する能力がより向上する。   Further, the depth of the concave portion 10 of the first conductive layer is set to be equal to or smaller than the film thickness of the first conductive layer 5. 4A shows a recess 10 that is shallower than the film thickness of the first conductive layer 5, and FIG. 4B shows a depth approximately the same as or equivalent to the film thickness of the first conductive layer 5. A recess 10 is shown. In this way, the depth of the concave portion 7 of the second conductive layer becomes deeper than that of the structure described in the first embodiment, so that the ability to avoid the influence of splash is further improved. .

続いて、図４（ａ）を用いて具体例を説明する。図４（ａ）に示す構造の場合、例えば、第１の導電層５の膜厚を１．０μｍとし、第１の導電層の凹部１０の深さを０．５μｍ程度とすると、第１の導電層５の表面と第１の導電層の凹部１０の底面との高低差は、０．５μｍ程度となる。すると、第２の導電層の凹部７の底面とボンディングパッドの外周部（パッシベーション膜４から露出する第２の導電層６の外周部の表面）との高低差は、第１の導電層５の表面と第１の導電層の凹部１０の底面との高低差よりも、第２の絶縁膜３の膜厚分だけ大きくなる。例えば、第２の絶縁膜３の膜厚を１．０μｍとした場合には、第２の導電層の凹部７の底面とボンディングパッドの外周部との高低差は、１．５μｍとなる。したがって、前述の実施の形態１で説明した構造よりも高い効果を実現できる。   Subsequently, a specific example will be described with reference to FIG. In the case of the structure shown in FIG. 4A, for example, if the thickness of the first conductive layer 5 is 1.0 μm and the depth of the concave portion 10 of the first conductive layer is about 0.5 μm, The difference in height between the surface of the conductive layer 5 and the bottom surface of the recess 10 of the first conductive layer is about 0.5 μm. Then, the difference in height between the bottom surface of the recess 7 of the second conductive layer and the outer peripheral portion of the bonding pad (the surface of the outer peripheral portion of the second conductive layer 6 exposed from the passivation film 4) is different from that of the first conductive layer 5. The height difference between the surface and the bottom surface of the recess 10 of the first conductive layer is larger by the thickness of the second insulating film 3. For example, when the thickness of the second insulating film 3 is 1.0 μm, the height difference between the bottom surface of the recess 7 of the second conductive layer and the outer peripheral portion of the bonding pad is 1.5 μm. Therefore, a higher effect than the structure described in the first embodiment can be realized.

次に、図４（ｂ）を用いて具体例を説明する。図４（ｂ）に示す構造の場合、例えば、第１の導電層５の膜厚を１．０μｍ、第１の導電層の凹部１０の深さを１．０μｍ程度、第２の絶縁膜３の膜厚を１．０μｍとした場合には、第２の導電層の凹部７の底面とボンディングパッドの外周部との高低差は、２．０μｍとなる。このように、図４（ｂ）に示す構造とすることにより、第２の導電層の凹部７を最も深くすることができる。そのため、押し出される金属（スプラッシュ）の量がより多い場合でも、第２の導電層（ボンディングパッド）に形成されている凹部７でスプラッシュを受け止めることができ、隣接するボンディングパッド（電極）同士の接続による不良を防止することができる。   Next, a specific example will be described with reference to FIG. In the case of the structure shown in FIG. 4B, for example, the thickness of the first conductive layer 5 is about 1.0 μm, the depth of the concave portion 10 of the first conductive layer is about 1.0 μm, and the second insulating film 3 is formed. When the film thickness is 1.0 μm, the difference in height between the bottom surface of the concave portion 7 of the second conductive layer and the outer peripheral portion of the bonding pad is 2.0 μm. As described above, by adopting the structure shown in FIG. 4B, the concave portion 7 of the second conductive layer can be deepest. Therefore, even when the amount of metal (splash) to be pushed out is larger, the splash can be received by the recess 7 formed in the second conductive layer (bonding pad), and the connection between adjacent bonding pads (electrodes) can be performed. It is possible to prevent the failure due to.

続いて、この実施の形態２における半導体装置の製造方法について説明する。この実施の形態２における半導体装置の製造工程のうち、第２の絶縁膜３に第１の導電層５ａを露出する開口を形成するまでの工程は、前述の実施の形態１で説明した工程と同様であるので、説明を割愛する。   Next, a method for manufacturing the semiconductor device in the second embodiment will be described. Of the manufacturing steps of the semiconductor device according to the second embodiment, the steps until the opening for exposing the first conductive layer 5a is formed in the second insulating film 3 are the same as the steps described in the first embodiment. Since it is the same, explanation is omitted.

この実施の形態２では、第２の絶縁膜３に第２の導電層６用の開口を形成した後、その開口を通じて第１の導電層５に、深さが第１の導電層５の厚み以下の凹部１０をエッチングなどの方法により形成する。これにより、第２の絶縁膜３から露出する凹凸形状の第１の導電層５が形成される。   In the second embodiment, after an opening for the second conductive layer 6 is formed in the second insulating film 3, the depth of the first conductive layer 5 is the depth of the first conductive layer 5 through the opening. The following recesses 10 are formed by a method such as etching. As a result, the first conductive layer 5 having an uneven shape exposed from the second insulating film 3 is formed.

その後、前述の実施の形態１と同様に、第２の導電層６を形成するための金属膜を、第２の絶縁膜３の開口から露出する第１の導電層５及び第２の絶縁膜３の開口の外周上に、例えば無電解めっき法などで被着させ、第１の導電層５の凹部１０に沿った凹部７を有する第２の導電層６を形成する。   Thereafter, in the same manner as in the first embodiment, the metal film for forming the second conductive layer 6 is exposed to the first conductive layer 5 and the second insulating film exposed from the opening of the second insulating film 3. A second conductive layer 6 having a recess 7 along the recess 10 of the first conductive layer 5 is formed on the outer periphery of the opening 3 by, for example, electroless plating.

以降の製造工程は、前述の実施の形態１で説明した工程と同様であるので、説明を割愛する。このように、この実施の形態２によれば、第１の導電層５をエッチングするだけで、凹部７を有する第２の導電層６を形成できるので、実施の形態１で説明した構造よりも少ない工程数を実現できる。すわち、実施の形態１で説明した構造では、第１の導電層の本体５ａ上に金属膜を被着させて積層する工程に加えて、その積層された金属膜を平坦化する工程も必要となり、この実施の形態２の構造よりも工程数が多くなる。   Since the subsequent manufacturing steps are the same as those described in the first embodiment, description thereof will be omitted. As described above, according to the second embodiment, the second conductive layer 6 having the recesses 7 can be formed only by etching the first conductive layer 5, so that the structure described in the first embodiment is improved. A small number of processes can be realized. In other words, in the structure described in the first embodiment, in addition to the step of depositing and laminating the metal film on the main body 5a of the first conductive layer, the step of flattening the laminated metal film is also necessary. Thus, the number of steps is larger than that of the structure of the second embodiment.

続いて、第２の導電層（ボンディングパッド）の凹部７を断面視したときの側面形状について説明する。第２の導電層の凹部７の側面は、図４に示すように、凹部７の深さ方向に垂直に立ち上がってもよいし、例えば図５（ａ）に示すように階段状でもよいし、図５（ｂ）に示すように、凹部７の深さ方向へ狭まるように傾斜させてもよい。   Next, a side shape when the concave portion 7 of the second conductive layer (bonding pad) is viewed in cross section will be described. The side surface of the concave portion 7 of the second conductive layer may rise perpendicularly to the depth direction of the concave portion 7 as shown in FIG. 4, or may have a stepped shape as shown in FIG. As shown in FIG. 5B, the recess 7 may be inclined so as to narrow in the depth direction.

図５（ａ）に示す階段形状は、例えば、第１の導電層５に対してエッチングを２回行うことで実現できる。階段の段数は図５（ａ）に示すように２段に限るものではなく、エッチングを３回以上行うことで３段以上にすることもできる。また、図５（ｂ）に示すような傾斜面もエッチングによって実現できる。   The step shape shown in FIG. 5A can be realized, for example, by performing etching twice on the first conductive layer 5. The number of steps is not limited to two as shown in FIG. 5A, but can be increased to three or more by performing etching three or more times. An inclined surface as shown in FIG. 5B can also be realized by etching.

なお、前述の実施の形態１のように第１の導電層に凸部５ｂを設ける場合も同様に、第２の導電層の凹部７の一側面（内側の側面）を、階段状にしてもよいし、凹部７の深さ方向へ狭まるように傾斜させてもよい。階段形状は、例えば、凸部５ｂの側面形状が階段状となるように、導電層５ａ上に、互いに面積が異なる複数の導電層を積層させることで実現することができる。傾斜面は、例えば、エッチングによって凸部５ｂの側面を傾斜面にすることで実現できる。   In the case where the first conductive layer is provided with the convex portion 5b as in the first embodiment, similarly, one side surface (inner side surface) of the concave portion 7 of the second conductive layer is formed in a step shape. Alternatively, it may be inclined so as to narrow in the depth direction of the recess 7. The step shape can be realized, for example, by laminating a plurality of conductive layers having different areas on the conductive layer 5a so that the side surface shape of the convex portion 5b is a step shape. An inclined surface is realizable by making the side surface of the convex part 5b into an inclined surface by an etching, for example.

続いて、第２の導電層（ボンディングパッド）の凹部７を平面視したときの形状について説明する。第１の導電層の凹部１０は、エッチングなどの方法により形成することができるので、第１の導電層の凹部１０を平面視したときの形状を、容易に、直線状にしたり環状にすることができる。したがって、第２の導電層の凹部７を平面視したときの形状を、容易に、直線状にしたり、環状にすることができる。ここで環状には、多角形の辺に沿う形状や、円形（楕円形も含む）に沿う形状が含まれる。   Next, the shape of the concave portion 7 of the second conductive layer (bonding pad) when viewed in plan will be described. Since the concave portion 10 of the first conductive layer can be formed by a method such as etching, the shape when the concave portion 10 of the first conductive layer is viewed in plan is easily made linear or annular. Can do. Therefore, the shape of the concave portion 7 of the second conductive layer when viewed in plan can be easily made linear or annular. Here, the ring includes a shape along a side of a polygon and a shape along a circle (including an ellipse).

なお、第１の導電層の凹部１０に囲まれる領域の形状は、正方形や、長方形、五角形、真円、楕円形など、第１の導電層にエッチングなどの方法により形成できる形状であればどのような形状でも構わない。第１の導電層の凹部１０に囲まれる領域の形状を長方形や楕円形などの長手方向を持つ形状にする場合には、その長手方向がワイヤボンディング時に加えられる超音波の振幅方向に沿うようにボンディングパッド（電極）を配列するのが好適である。また、第１の導電層５に２重以上の環状の凹部を設けてもよい。また、第１の導電層５に、環状の凹部と直線状の凹部とを組み合わせて設けてもよい。   The shape of the region surrounded by the recess 10 of the first conductive layer may be any shape that can be formed on the first conductive layer by a method such as etching, such as a square, a rectangle, a pentagon, a perfect circle, or an ellipse. Such a shape may be used. When the shape of the region surrounded by the recess 10 of the first conductive layer is a shape having a longitudinal direction such as a rectangle or an ellipse, the longitudinal direction is along the amplitude direction of the ultrasonic wave applied at the time of wire bonding. It is preferable to arrange bonding pads (electrodes). Further, the first conductive layer 5 may be provided with a double or more annular recess. Further, the first conductive layer 5 may be provided with a combination of an annular recess and a linear recess.

図６に、第２の導電層（ボンディングパッド）の凹部７を平面視したときの形状を例示する。   FIG. 6 illustrates the shape of the concave portion 7 of the second conductive layer (bonding pad) when viewed in plan.

図６（ａ）には、第２の導電層の凹部７を平面視したときの形状を直線状にした場合を示している。この場合、好ましくは、凹部７を少なくとも２本以上形成する。さらに好ましくは、第２の導電層の凹部７のうちの最外郭に位置する２つの凹部の間に、ボンディングパッド（第２の導電層６）に接続されるボンディングワイヤのボール状の端部（外部接続用電極）の幅以上の間隔を設ける。   FIG. 6A shows a case where the shape of the concave portion 7 of the second conductive layer when viewed from above is a straight line. In this case, preferably, at least two recesses 7 are formed. More preferably, a ball-shaped end portion of a bonding wire (connected to the bonding pad (second conductive layer 6)) is provided between the two outermost concave portions of the concave portions 7 of the second conductive layer. An interval greater than the width of the external connection electrode) is provided.

図６（ｂ）には、第２の導電層の凹部７を平面視したときの形状を、ボンディングパッド（電極）の中央領域を囲むように、四角形の辺に沿う形状にした場合を示している。この場合、好ましくは、第２の導電層の凹部７により囲まれる領域が、ボンディングワイヤのボール状の端部（外部接続用電極）の投影面積以上の面積となるようにする。このような形状にすることで、どの方向にスプラッシュが発生しても、隣接するボンディングパッド同士の接続を防止することができる。   FIG. 6B shows a case where the shape of the concave portion 7 of the second conductive layer when viewed from above is a shape along a square side so as to surround the central region of the bonding pad (electrode). Yes. In this case, it is preferable that the region surrounded by the concave portion 7 of the second conductive layer has an area larger than the projected area of the ball-shaped end portion (external connection electrode) of the bonding wire. By adopting such a shape, connection between adjacent bonding pads can be prevented regardless of the direction of splash.

第２の導電層の凹部７を平面視したときの形状を環状にする場合は、例えば図６（ｃ）や図６（ｄ）に示すように、六角形や真円の辺に沿う形状など、エッチングなどを使用して形成することができる形状であれば、どのような形状にしても構わない。但し、第２の導電層の凹部７を円形（楕円形を含む）の辺に沿う形状にする場合、円形の辺に沿って開口するマスクの変わりに、円形に類似する多角形の辺に沿って開口するマスクを用いてもよい。   When the shape of the concave portion 7 of the second conductive layer when viewed in plan is to be annular, for example, as shown in FIGS. 6C and 6D, a shape along the side of a hexagon or a perfect circle, etc. Any shape can be used as long as it can be formed using etching or the like. However, in the case where the concave portion 7 of the second conductive layer is formed along a side of a circle (including an ellipse), it is along a side of a polygon similar to a circle instead of a mask opened along the side of the circle. Alternatively, a mask that opens may be used.

また、前述の実施の形態１のように第１の導電層に凸部５ｂを設ける場合も同様に、第２の導電層の凹部７を平面視したときの形状を、多角形の辺に沿う形状としたり、円環状（楕円状を含む）にしてもよい。これは、第１の導電層の凸部５ｂを平面視したときの形状が多角形状や円形状（楕円形状を含む）となるように、第１の導電層の凸部５をエッチングにより削ることで実現できる。但し、第１の導電層の凸部５ｂを平面視したときの形状を円形状にする場合、円形（楕円形を含む）の辺に沿って開口するマスクの変わりに、円形に類似する多角形の辺に沿って開口するマスクを用いてもよい。   Similarly, when the convex portion 5b is provided in the first conductive layer as in the first embodiment, the shape of the concave portion 7 of the second conductive layer when viewed in plan is along the side of the polygon. It may have a shape or an annular shape (including an elliptical shape). This is because the convex portion 5 of the first conductive layer is etched by etching so that the shape of the convex portion 5b of the first conductive layer when viewed in plan is a polygonal shape or a circular shape (including an elliptical shape). Can be realized. However, when the shape of the projection 5b of the first conductive layer when viewed in plan is a circle, a polygon similar to a circle is used instead of a mask that opens along a side of a circle (including an ellipse). A mask that opens along the sides may be used.

この実施の形態２におけるボンディングパッドの配列方向は、前述した実施の形態１と同様であるので、ここでは説明を省略する。   Since the bonding pad arrangement direction in the second embodiment is the same as that in the first embodiment, the description thereof is omitted here.

なお、以上の実施の形態１および２では、外部との接続用の電極（外部接続用電極）がボンディングワイヤである場合について説明したが、本発明は、例えば、外部との接続用の電極が金属バンプや半田ボール等の場合にも応用可能である。すなわち、本発明が主として想定している課題は、隣接するボンディングパッド同士が、ワイヤボンディング時に発生するスプラッシュにより接続することを防止することであるが、外部との接続用の電極として金属バンプや半田ボール等を用いる場合であっても、第２の導電層に凹部が形成されていることにより、熱接着時に金属バンプや半田ボール等が溶け出して、第２の導電層から外へはみ出すことを防ぐという効果を発揮する。   In the first and second embodiments described above, the case where the electrode for connection to the outside (external connection electrode) is a bonding wire has been described. However, in the present invention, for example, the electrode for connection to the outside is It can also be applied to metal bumps and solder balls. That is, the problem mainly assumed by the present invention is to prevent adjacent bonding pads from being connected by splash generated at the time of wire bonding, but metal bumps or solder as electrodes for connection to the outside Even when a ball or the like is used, the concave portion is formed in the second conductive layer, so that metal bumps, solder balls, etc. are melted out during thermal bonding, and protrude from the second conductive layer. Demonstrate the effect of preventing.

本発明にかかる半導体装置とその製造方法は、ボンディングパッドと金属ワイヤとをワイヤボンディングにより接続する際に加える超音波と圧力によってスプラッシュが発生しても、隣接するボンディングパッド同士の接続を防止することができ、ワイヤボンディング工程の歩留まりを向上できるので、特に銅ワイヤや合金ワイヤを用いたワイヤボンディングなど、金ワイヤよりも硬い金属ワイヤを使用し、かつ金ワイヤを使用する場合よりも高い超音波周波数や圧力を必要とするワイヤボンディングに有効である。   The semiconductor device and the manufacturing method thereof according to the present invention prevent connection between adjacent bonding pads even if splash occurs due to ultrasonic waves and pressure applied when bonding pads and metal wires are connected by wire bonding. Can improve the yield of the wire bonding process, especially when using metal wires harder than gold wires, such as wire bonding using copper wires or alloy wires, and higher ultrasonic frequencies than when using gold wires It is effective for wire bonding that requires high pressure.

１ 半導体基板
２ 第１の絶縁膜
３ 第２の絶縁膜
４ パッシベーション膜
５ 第１の導電層
５ａ 第１の導電層の本体
５ｂ 凸部
６ 第２の導電層
７ 第２の導電層の凹部
８ ボンディングワイヤのボール部
９ ボンディングワイヤ
１０ 第１の導電層の凹部
１１ シリコン基板
１２ アルミニウム電極
１３ 保護膜
１４ ボンディングパッド DESCRIPTION OF SYMBOLS 1 Semiconductor substrate 2 1st insulating film 3 2nd insulating film 4 Passivation film 5 1st conductive layer 5a Main body of 1st conductive layer 5b Convex part 6 2nd conductive layer 7 Concave part of 2nd conductive layer 8 Ball portion of bonding wire 9 Bonding wire 10 Recessed portion of first conductive layer 11 Silicon substrate 12 Aluminum electrode 13 Protective film 14 Bonding pad

Claims (16)

半導体基板と、
前記半導体基板上に形成された第１の導電層と、
前記半導体基板上に形成され、前記第１の導電層を露出するように開口する保護膜と、
前記保護膜の開口から露出する前記第１の導電層及び前記保護膜上に形成された第２の導電層と、
を備え、前記第２の導電層が、その端部よりも内側に凹部を有することを特徴とする半導体装置。 A semiconductor substrate;
A first conductive layer formed on the semiconductor substrate;
A protective film formed on the semiconductor substrate and opening to expose the first conductive layer;
The first conductive layer exposed from the opening of the protective film and the second conductive layer formed on the protective film;
And the second conductive layer has a recess inside the end thereof. 前記第１の導電層は凸部を有し、前記第２の導電層の凹部は、前記第１の導電層の凸部に沿って形成されていることを特徴とする請求項１記載の半導体装置。   2. The semiconductor according to claim 1, wherein the first conductive layer has a convex portion, and the concave portion of the second conductive layer is formed along the convex portion of the first conductive layer. apparatus. 前記第１の導電層は、深さが前記第１の導電層の厚み以下の凹部を有し、前記第２の導電層の凹部は、前記第１の導電層の凹部に沿って形成されていることを特徴とする請求項１記載の半導体装置。   The first conductive layer has a recess having a depth less than or equal to the thickness of the first conductive layer, and the recess of the second conductive layer is formed along the recess of the first conductive layer. The semiconductor device according to claim 1, wherein: 前記第２の導電層の凹部は少なくとも２つ設けられていることを特徴とする請求項１ないし３のいずれかに記載の半導体装置。   4. The semiconductor device according to claim 1, wherein at least two concave portions of the second conductive layer are provided. 前記第２の導電層の凹部のうちの最外郭に位置する凹部間に、前記第２の導電層に接続される外部接続用電極の幅以上の間隔が設けられていることを特徴とする請求項４記載の半導体装置。   The space beyond the width of the external connection electrode connected to the second conductive layer is provided between the concave portions located at the outermost contour among the concave portions of the second conductive layer. Item 5. The semiconductor device according to Item 4. 前記第２の導電層の凹部は、平面視したとき直線状であることを特徴とする請求項４もしくは５のいずれかに記載の半導体装置。   6. The semiconductor device according to claim 4, wherein the concave portion of the second conductive layer is linear when viewed in plan. 前記第２の導電層の凹部は、前記第２の導電層に外部接続用電極が接続される際に加えられる超音波の振幅方向に対して垂直な方向に沿った直線形状をしていることを特徴とする請求項６記載の半導体装置。   The concave portion of the second conductive layer has a linear shape along a direction perpendicular to an amplitude direction of an ultrasonic wave applied when an external connection electrode is connected to the second conductive layer. The semiconductor device according to claim 6. 前記第２の導電層の凹部は、平面視したとき環状であることを特徴とする請求項１ないし３のいずれかに記載の半導体装置。   4. The semiconductor device according to claim 1, wherein the concave portion of the second conductive layer is annular when viewed in plan. 前記第２の導電層の凹部で囲まれる領域は、前記第２の導電層に接続される外部接続用電極の投影面積以上の面積を有することを特徴とする請求項８記載の半導体装置。   9. The semiconductor device according to claim 8, wherein the region surrounded by the concave portion of the second conductive layer has an area equal to or larger than the projected area of the external connection electrode connected to the second conductive layer. 前記第２の導電層の凹部は、断面視したとき、その深さ方向に傾斜していることを特徴とする請求項１ないし９のいずれかに記載の半導体装置。   The semiconductor device according to claim 1, wherein the concave portion of the second conductive layer is inclined in a depth direction when viewed in cross section. 前記第２の導電層の凹部は、断面視したとき階段状であることを特徴とする請求項１ないし９のいずれかに記載の半導体装置。   The semiconductor device according to claim 1, wherein the concave portion of the second conductive layer has a step shape when viewed in cross section. 前記第１の導電層及び第２の導電層は、銅、アルミニウム、タングステン、チタン、タンタルのうちの少なくとも１種類の単体を用いて、または、銅、アルミニウム、タングステン、チタン、タンタルのいずれかを含む少なくとも１種類の金属化合物を用いて、または、単体と金属化合物を組み合わせて形成されていることを特徴とする請求項１ないし１１のいずれかに記載の半導体装置。   The first conductive layer and the second conductive layer are made of at least one of copper, aluminum, tungsten, titanium, and tantalum, or any one of copper, aluminum, tungsten, titanium, and tantalum. 12. The semiconductor device according to claim 1, wherein the semiconductor device is formed by using at least one kind of metal compound or a combination of a simple substance and a metal compound. 前記保護膜は、少なくとも１種類の絶縁化合物を用いて形成されていることを特徴とする請求項１ないし１２のいずれかに記載の半導体装置。   13. The semiconductor device according to claim 1, wherein the protective film is formed using at least one type of insulating compound. 前記保護膜は、ＳｉＯ２またはＳｉＮの少なくとも一方を用いて形成されていることを特徴とする請求項１３記載の半導体装置。 The semiconductor device according to claim 13, wherein the protective film is formed using at least one of SiO 2 and SiN. 半導体装置の製造方法であって、
半導体基板上に第１の導電層を形成する工程と、
前記半導体基板上に、前記第１の導電層を露出するように開口する保護膜を形成する工程と、
前記保護膜の開口を通じて、その開口から露出する前記第１の導電層の面積よりも小さい面積の導電層を積層して、前記第１の導電層を凹凸形状にする工程と、
前記保護膜の開口から露出する前記第１の導電層及び前記保護膜上に第２の導電層を形成して、前記第２の導電層の端部よりも内側に、前記第１の導電層の凸部に沿った凹部を形成する工程と、
を具備することを特徴とする半導体装置の製造方法。 A method for manufacturing a semiconductor device, comprising:
Forming a first conductive layer on a semiconductor substrate;
Forming a protective film opening on the semiconductor substrate so as to expose the first conductive layer;
Laminating a conductive layer having an area smaller than the area of the first conductive layer exposed from the opening through the opening of the protective film, and forming the first conductive layer into an uneven shape;
Forming a second conductive layer on the first conductive layer and the protective film exposed from the opening of the protective film, and forming the first conductive layer on an inner side than an end of the second conductive layer; Forming a concave portion along the convex portion of
A method for manufacturing a semiconductor device, comprising: 半導体装置の製造方法であって、
半導体基板上に第１の導電層を形成する工程と、
前記半導体基板上に、前記第１の導電層を露出するように開口する保護膜を形成する工程と、
前記保護膜の開口を通じて前記第１の導電層に、深さが前記第１の導電層の厚み以下の第１の凹部を形成して、前記第１の導電層を凹凸形状にする工程と、
前記保護膜の開口から露出する前記第１の導電層及び前記保護膜上に第２の導電層を形成して、前記第２の導電層の端部よりも内側に、前記第１の導電層の第１の凹部に沿った第２の凹部を形成する工程と、
を具備することを特徴とする半導体装置の製造方法。


A method for manufacturing a semiconductor device, comprising:
Forming a first conductive layer on a semiconductor substrate;
Forming a protective film opening on the semiconductor substrate so as to expose the first conductive layer;
Forming a first recess having a depth equal to or less than the thickness of the first conductive layer in the first conductive layer through the opening of the protective film, and making the first conductive layer an uneven shape;
Forming a second conductive layer on the first conductive layer and the protective film exposed from the opening of the protective film, and forming the first conductive layer on an inner side than an end of the second conductive layer; Forming a second recess along the first recess;
A method for manufacturing a semiconductor device, comprising:


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JP2014150190A (en) * 2013-02-01 2014-08-21 Seiko Instruments Inc Semiconductor device
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Cited By (8)

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Publication number Priority date Publication date Assignee Title
JP2014150190A (en) * 2013-02-01 2014-08-21 Seiko Instruments Inc Semiconductor device
CN104835752A (en) * 2014-02-07 2015-08-12 瑞萨电子株式会社 Method of Manufacturing Semiconductor Device
JP2015149446A (en) * 2014-02-07 2015-08-20 ルネサスエレクトロニクス株式会社 Method of manufacturing semiconductor device
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