JP2012146832A - Semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device having a termination structure capable of enduring withstand voltage in a high electric field and capable of suppressing dielectric breakdown.SOLUTION: A semiconductor device according to the present invention comprises: a recess structure 3 formed on a surface of a drift region 2 so as to surround an SBD electrode 5 in a plan view; a guard ring injection layer 4 that is formed in the bottom surface of the recess structure 3 and is connected to the SBD electrode 5; a protective film 7 formed along the recess structure 3 so as to cover at least the recess structure 3; and a semi-insulating film 20 formed on the protective film 7 along the protective film 7. The semi-insulating film 20 has a connection portion 21 connected to the SBD electrode 5 inside the region surrounded by the recess structure 3, and a connection portion 22 connected to the drift region 2 outside the region surrounded by the recess structure 3.

Description

  The present invention relates to a semiconductor device, and more particularly to a termination structure of a semiconductor device.

  A semiconductor element using silicon carbide (SiC) is regarded as promising as a next-generation switching element capable of realizing high breakdown voltage, low loss, and high heat resistance, and is expected to be applied to power semiconductor devices such as inverters.

  However, many problems to be solved remain in the SiC semiconductor device. One of them is due to the electric field concentration at the end portion of the semiconductor device (for example, the end portion of the Schottky electrode of the Schottky barrier diode or the pn junction of the pn diode or MOSFET (Metal Oxide Field Effect Transistor)). This is a problem that the withstand voltage characteristic of the device is lowered.

  Typical examples of the termination structure for reducing the electric field generated at the termination portion of the semiconductor device include a guard ring structure, a JTE (Junction Termination Extension) structure, and an FLR (Field Limiting Ring) structure. These are impurity diffusion layers formed so as to surround the semiconductor device. In general, the JTE structure is provided for the purpose of reducing the surface electric field, and has a structure in which the impurity concentration gradually decreases from the terminal portion of the semiconductor device to the outside. On the other hand, the FLR structure is composed of a plurality of impurity diffusion layers having the same concentration.

  For example, Patent Document 1 below discloses a termination structure that combines a guard ring and JTE. The termination structure of Patent Document 1 has a structure in which a JTE having an impurity concentration lower than that of the guard ring is disposed outside the guard ring. In Patent Document 1, the guard ring and the JTE are formed under the recess structure provided on the surface of the semiconductor layer, so that the distance between the bottom end of the guard ring and the JTE where the electric field concentration easily occurs and the surface of the semiconductor layer is increased. A technique for further relaxing the electric field on the surface of the semiconductor layer has been proposed.

International Publication No. 2009/116444

  As described above, in a conventional semiconductor device, a withstand voltage structure is realized by using two types of implantation conditions of guard ring / JTE.

  Here, in order to realize the guard ring / JTE structure under two kinds of implantation conditions, a step of forming a mask for injecting impurities into each position is required. Further, in order to produce these masks, it is necessary to produce a reference (alignment mark) for aligning the positions of the respective masks in the previous process. The alignment mark is formed by etching the surface of SiC.

  As described above, in the conventional semiconductor device, at least three masks (for alignment mark formation, guard ring formation, and JTE formation) are required, and impurity implantation has to be performed under different conditions. For this reason, the process becomes complicated, and problems such as an increase in variation, a deterioration in defect rate, and an increase in cost have occurred.

  As a method for solving these problems, for example, a structure having only a guard ring or a FLR structure in which a plurality of the same ring-shaped injection layers are formed on the outside of the guard ring makes the injection process one step. Thus, it is conceivable to reduce three masks to two masks.

  Furthermore, the alignment mark and the termination structure can be formed with a single mask by making the process of forming the alignment mark and the process of forming the implantation mask (for guard ring formation, for JTE formation) common. Can also be formed.

  As described above, the mask can be reduced by optimizing the implantation conditions and the pattern shape.

  However, the impurity concentration of the guard ring in this case is formed at a relatively high concentration in order to ensure the breakdown voltage characteristics of the device. Therefore, when a high voltage is applied to the cathode, the extension of the depletion layer of the impurity layer is reduced and a high electric field is likely to be generated.

  Further, if there is a structure (recess structure) dug in the region of the guard ring, a strong electric field is generated particularly at the corner portion of the bottom surface of the recess.

  By the way, a wide band gap semiconductor such as SiC can secure a withstand voltage at a higher electric field than Si, and can secure a higher withstand voltage by optimizing implantation conditions and pattern shapes. However, in the case of a termination structure in which the termination portion of the semiconductor device is covered with an insulator such as polyimide, charges are accumulated on the surface of the insulator in the test process or assembly process, and the electric field strength of the recess structure fluctuates. There was a problem of causing dielectric breakdown.

  In addition, when a semiconductor device is incorporated in a power conversion module, it is necessary to cover the apparatus with another insulator. In that process, charges accumulate on the surface of an insulator such as polyimide, resulting in insulation. There was a problem of lowering the yield strength.

  The present invention has been made to solve the above-described problems, and an object of the present invention is to provide a semiconductor device having a termination structure that can secure a withstand voltage in a high electric field and can suppress dielectric breakdown.

  A semiconductor device according to the present invention includes a first conductivity type drift region formed on a first conductivity type wide band gap semiconductor substrate, a Schottky electrode formed on the surface of the drift region, and the drift region. On the surface, a recess structure formed so as to surround the Schottky electrode in plan view, and a second conductivity type guard ring layer formed in the bottom surface of the recess structure and connected to the Schottky electrode; A protective film formed along the recess structure and covering at least the recess structure, and a semi-insulating film formed on the protective film along the protective film, the semi-insulating film comprising: A connection portion connected to the Schottky electrode inside the region surrounded by the recess structure, and a contact portion connected to the drift region outside the region surrounded by the recess structure. And a part.

  According to the semiconductor device of the present invention, the first conductivity type drift region formed on the first conductivity type wide band gap semiconductor substrate, the Schottky electrode formed on the surface of the drift region, On the drift region surface, a recess structure formed so as to surround the Schottky electrode in plan view, and a second conductivity type guard ring layer formed in the bottom surface of the recess structure and connected to the Schottky electrode And a protective film formed along at least the recess structure so as to cover the recess structure, and a semi-insulating film formed on the protective film along the protective film. The film is connected to the connection portion connected to the Schottky electrode inside the region surrounded by the recess structure, and to the drift region outside the region surrounded by the recess structure. The charge accumulated on the protective film is removed by the semi-insulating film, thereby preventing an increase in electric field strength due to the charge on the protective film and preventing a decrease in breakdown voltage. It becomes possible.

1 is a plan view showing a structure of a semiconductor device according to a first embodiment. 1 is a cross-sectional view illustrating a structure of a semiconductor device according to a first embodiment. FIG. 5 is a plan view showing a structure of a semiconductor device according to a second embodiment. FIG. 6 is a plan view showing a structure of a semiconductor device according to a third embodiment. FIG. 6 is a cross-sectional view showing a structure of a semiconductor device according to a third embodiment.

<A. Embodiment 1>
<A-1. Configuration>
FIG. 1 is a plan view of the semiconductor device according to the present embodiment. 2 is a cross-sectional view taken along line AA ′ of FIG.

  As shown in FIGS. 1 and 2, the semiconductor device according to the present invention has a Schottky barrier diode (SBD) formed on, for example, a SiC substrate 1. Although SiC is cited as an example of a wide band gap semiconductor, other wide band gap semiconductors can be used. The present invention exhibits a particularly remarkable effect in the operation at a high electric field when a wide band gap semiconductor capable of operating at a higher voltage than Si is used.

  1 and 2, the SBD is formed on the surface of the SiC substrate 1. The SiC substrate 1 corresponds to, for example, a high-concentration n-type (hereinafter sometimes simply referred to as n +) semiconductor substrate, for example, a wafer. The SiC substrate 1 is a semiconductor substrate made of SiC and having a wide band gap wider than that of silicon. On SiC substrate 1, drift region 2, which is a low-concentration n-type (hereinafter sometimes simply referred to as “n−”) semiconductor layer, is formed. Drift region 2 is epitaxially grown on SiC substrate 1.

  An SBD electrode 5 is formed in a predetermined region on the surface of the drift region 2. The SBD electrode 5 is made of a metal such as Ti, Mo, or Ni. Further, an external output electrode 6 is formed on the SBD electrode 5. The external output electrode 6 is made of aluminum, for example.

  Recess structure 3 is formed on the surface of drift region 2 so as to surround SBD electrode 5 in plan view. The surrounding shape is, for example, a ring shape. A guard ring injection layer 4 is formed in the bottom surface of the recess structure 3. The guard ring implantation layer 4 is formed, for example, by implanting Al ions with an ion implanter and performing activation annealing at a high temperature of about 1700 ° C. On the guard ring injection layer 4, the drift region 2 is formed to extend.

  Further, a protective film 7 is formed extending from the external output electrode 6 to the guard ring injection layer 4. The protective film 7 is formed along the recess structure 3 (see FIG. 1) and covers the recess structure 3. The protective film 7 is an insulating film made of polyimide or the like, for example, and a part of a region covering the external output electrode 6 is opened so that an output can be taken out from the external output electrode 6.

  A semi-insulating film 20 such as a silicon nitride film is formed on the protective film 7. The semi-insulating film 20 is formed so as to surround the SBD electrode 5 in accordance with the protective film 7 (see FIG. 1), and is connected to the external output electrode 6 at the connection portion 21 inside the region surrounded by the recess structure 3. Outside the region surrounded by the structure 3, the connecting portion 22 is connected to the drift region 2 (see FIG. 1).

  On the back side of SiC substrate 1, ohmic electrode layer 8 and metal layer 9 are formed. The ohmic electrode layer 8 is made of, for example, NiSi that is a compound of Ni and Si. The metal layer 9 is, for example, a single layer film of metal such as Ti, Ni, Mo, Cu, Au, or a laminated film thereof.

<A-2. Manufacturing method>
Next, a method for manufacturing a semiconductor device according to the present embodiment will be described.

  A drift region 2 is formed by epitaxially growing a SiC film on the SiC substrate 1. Then, a resist pattern is formed on the drift region 2 which is an n-type semiconductor layer made of SiC, for example, by photolithography.

  Using this resist pattern as a mask, for example, Al ions are implanted to form a p-type guard ring implantation layer 4. Note that the termination structure can be formed with one mask by making the step of implanting ions and the step of forming the alignment mark a common step.

  As shown in FIG. 2, a termination structure in which a guard ring injection layer 4 is formed in the recessed structure 3, that is, the recess structure 3.

  An opening pattern (not shown) is formed in the drift region 2 in the region (not shown) where the alignment mark is to be formed and the region where the guard ring implantation layer 4 is to be formed. For example, reactive ion etching or the like is used. Then, the surface of the drift region 2 is etched. Thus, the concave alignment mark and the recess structure 3 are formed.

  Next, the guard ring implantation layer 4 is formed by implanting, for example, Al ions with the resist mask as it is. At this time, Al ions are also implanted into the region where the alignment mark is formed. However, the alignment mark only needs to be optically aligned and only needs to be formed with a step, so Al ions are implanted. There is no problem.

  Next, by annealing at a high temperature of 1500 ° C. or higher, for example, 1700 ° C., the region into which Al ions have been implanted is activated, and the p-type guard ring implanted layer 4 is formed.

  Next, the back side of SiC substrate 1 is ground to reduce the plate thickness. Then, a Ni film having a thickness of about 100 nm is formed on the ground back surface by, for example, a sputtering method, and annealed at about 1000 ° C. by, for example, a lamp annealing method to form an NiSi ohmic electrode layer 8 on the back surface.

  Next, the SBD electrode 5 is formed by sputtering, for example, using Ti, Mo, Ni or the like. A resist pattern by photolithography is used as a mask. When the metal of the SBD electrode 5 is Ti, for example, etching is performed with a solution diluted with hydrofluoric acid.

  The SBD electrode 5 is formed so as to be surrounded by the guard ring injection layer 4 and partially overlap the guard ring injection layer 4.

  Next, an aluminum film is formed on the SBD electrode 5 by sputtering, for example. Then, etching is performed with, for example, a solution containing phosphoric acid using a resist pattern formed by photolithography as a mask. Thus, the external output electrode 6 is formed.

  Next, a polyimide film is applied to the surface of the SiC substrate 1 by, for example, a spin coating method and etched by photolithography. A part of the surface of the external output electrode 6 and the device cutting / separating portion at the outer periphery of the device are opened by etching. Then, the protective film 7 made of a polyimide film is formed by baking at a temperature of about 300 to 400 ° C.

  Next, a semi-insulating film 20 such as a silicon nitride film having a semi-insulating property and a high resistance is formed by, for example, plasma chemical vapor deposition (CVD).

  The silicon nitride film formed by plasma CVD can change the composition ratio of Si and N by adjusting the film formation conditions. When the composition ratio of Si is higher than that of a normal silicon nitride film, the silicon nitride film, which is an insulator, can be made conductive, and the resistance of the semi-insulating film 20 can be adjusted by the composition ratio of Si. It is.

  Next, the semi-insulating film 20 is etched using the resist pattern formed by photolithography as a mask. The semi-insulating film 20 is formed by etching while leaving a region including the protective film 7 covering the recess structure 3.

  At this time, a portion where the semi-insulating film 20 is in contact with the surface of the external output electrode 6 is left as the connecting portion 21, and a portion where the semi-insulating film 20 is in contact with the drift region 2 is left as the connecting portion 22. 2 is electrically connected.

  Next, the metal layer 9 is formed. The metal layer 9 is formed of, for example, a single layer film of a metal such as Ti, Ni, Mo, Cu, or Au, or a laminated film thereof, for example, by sputtering or vapor deposition.

  In the present embodiment, the case where the semi-insulating film 20 is a plasma silicon nitride film has been described. However, another inorganic film such as a silicon film may be used, or a conductive material such as carbon may be used for an organic film such as polyimide. A semi-insulating film may be added.

  The resistance of the semi-insulating film 20 is preferably smaller than the reverse current of SBD. For example, when the voltage applied during standby of the SBD is 600 V and the reverse current flowing through the SBD is 10 μA, in order to reduce the current flowing through the semi-insulating film 20 to 1 μA or less, the resistance of the semi-insulating film 20 is What is necessary is just to set it to 600 MΩ or more.

  In this embodiment, the case where the semi-insulating film 20 is formed on the surface of the protective film 7 has been described. However, a second protective film may be formed on the semi-insulating film 20.

<A-3. Effect>
According to the first embodiment of the present invention, in the semiconductor device, the surface of the drift region 2 is formed so as to surround the SBD electrode 5 in a plan view, and the recess structure 3 is formed in the bottom surface of the recess structure 3. A guard ring injection layer 4 connected to the SBD electrode 5, a protection film 7 formed at least covering the recess structure 3 along the recess structure 3, and along the protection film 7 on the protection film 7. The semi-insulating film 20 is formed. The semi-insulating film 20 includes a connection portion 21 connected to the SBD electrode 5 inside the region surrounded by the recess structure 3 and a drift region outside the region surrounded by the recess structure 3. 2, the charge accumulated on the protective film 7 due to charging or the like is removed by the semi-insulating film 20, thereby preventing an increase in electric field strength due to charging on the protective film 7. , Pressure resistance It is possible to prevent degradation.

  Further, the reliability of the semiconductor device can be improved, and the cost can be reduced because the number of breakdown voltage defective elements is reduced.

  Further, one end of the semi-insulating film 20 is connected to the electrode terminal of the SBD electrode 5 via the connection portion 21, and the other end is connected to the opening portion of the drift region 2 in the peripheral periphery of the device via the connection portion 22. As a result, a gradual voltage gradient can be applied on the protective film 7 so that the voltage becomes the voltage of the drift region 2 in the peripheral peripheral portion from the SBD electrode 5 to the peripheral peripheral portion of the apparatus. Therefore, the electric field strength on the protective film 7 can be lowered, and the destruction and deterioration of the protective film 7 due to the high electric field can be prevented.

  In addition, when a semiconductor device is mounted by being embedded in a sealing agent such as an epoxy resin, impurity ions or the like of the sealing material may adhere to the outside of the device. However, since the semi-insulating film 20 is electrically shielded, the influence of impurity ions (charges) attached to the outside can be prevented from reaching the internal elements.

  Note that by forming the semi-insulating film 20, an increase in electric field strength can be prevented, so that the degree of influence on the dielectric breakdown can be reduced even when a recess structure is provided.

<B. Second Embodiment>
<B-1. Configuration>
FIG. 3 is a plan view of the semiconductor device according to the present embodiment. Except for the shape of the semi-insulating film 30, it is the same as the first embodiment shown in FIGS.

  In the semiconductor device according to the second embodiment, a plurality of openings 23 are formed in the semi-insulating film 30, and the semi-insulating film 30 is formed on the protective film 7 in a mesh shape. Similar to the first embodiment, the semi-insulating film 30 shown in FIG. 3 is disposed in a region including the protective film 7 covering the recess structure 3, and one end of the semi-insulating film 30 serves as an electrode terminal of the SBD electrode 5. The other end is connected via a connection portion 21 to the opening of the drift region 2 in the peripheral periphery of the apparatus.

  As a method of forming the semi-insulating film 30, a semi-insulating film is first formed on the protective film 7, and a plurality of openings 23 are provided in a region including the protective film 7 covering the recess structure 3. A resist pattern may be formed by photolithography and etched using the resist pattern as a mask.

<B-2. Effect>
According to the second embodiment of the present invention, in the semiconductor device, the semi-insulating film 30 has a plurality of openings 23, that is, the semi-insulating film 30 is processed into a mesh shape. A high-resistance film that can sufficiently suppress a leakage current flowing through the wiring can be easily formed even when a film having a low sheet resistance is used. Therefore, the choice of the material of the semi-insulating film 30 increases.

  Further, if the opening 23 is formed so that the semi-insulating film 30 has sufficiently high resistance, it becomes possible to control the leakage current even when the sheet resistance of the semi-insulating film 30 varies. The number of defective elements can be reduced and the cost can be reduced.

<C. Embodiment 3>
<C-1. Configuration>
FIG. 4 is a plan view of the semiconductor device according to the present embodiment. 5 is a cross-sectional view taken along the line AA ′ of FIG. Except for the shape of the semi-insulating film 24, the second embodiment is the same as the first embodiment shown in FIGS.

  In the semiconductor device according to the third embodiment, the semi-insulating film 24 is formed on the protective film 7 by etching so as to form a spiral wiring shape. The semi-insulating film 24 having a spiral wiring shape shown in FIG. 4 is disposed in a region including the protective film 7 covering the recess structure 3, and one end of the semi-insulating film 24 is connected to the electrode terminal of the SBD electrode 5. The other end is connected via the connecting portion 26 to the opening of the drift region 2 in the peripheral periphery of the device.

  As a method for forming the semi-insulating film 24, first, a semi-insulating film is formed on the protective film 7, and a plurality of wirings are formed in a region including the protective film 7 covering the recess structure 3. Such a spiral resist pattern may be formed by photolithography and etching may be performed using the resist pattern as a mask.

<C-2. Effect>
According to the third embodiment of the present invention, in the semiconductor device, the semi-insulating film 24 has a spiral shape along the protective film 7, so that a high-resistance film that can sufficiently suppress the leakage current flowing through the wiring is formed. Even when a film having a low sheet resistance is used, the film can be easily formed, and the choice of materials for the semi-insulating film 24 is increased.

  Further, if the thickness and number of wirings are formed so that the semi-insulating film 24 has sufficiently high resistance, the leakage current is controlled even when the sheet resistance of the semi-insulating film 24 varies. As a result, the number of defective elements can be reduced and the cost can be reduced.

  In the embodiment of the present invention, the material, material, conditions for implementation, etc. of each component are also described, but these are examples and are not limited to those described.

  1 SiC substrate, 2 drift region, 3 recess structure, 4 guard ring injection layer, 5 SBD electrode, 6 external output electrode, 7 protective film, 8 ohmic electrode layer, 9 metal layer, 20, 24, 30 semi-insulating film, 21 , 22, 25, 26 Connection, 23 Opening.

Claims (3)

A first conductivity type drift region formed on a first conductivity type wide band gap semiconductor substrate;
A Schottky electrode formed on the surface of the drift region;
A recess structure formed so as to surround the Schottky electrode in plan view on the drift region surface;
A guard ring layer of a second conductivity type formed in the recess structure bottom surface and connected to the Schottky electrode;
A protective film formed along the recess structure and covering at least the recess structure;
A semi-insulating film formed on the protective film along the protective film,
The semi-insulating film includes a connection portion connected to the Schottky electrode inside a region surrounded by the recess structure, and a connection portion connected to the drift region outside the region surrounded by the recess structure.
Semiconductor device. The semi-insulating film has a plurality of openings.
The semiconductor device according to claim 1. The semi-insulating film has a spiral shape along the protective film,
The semiconductor device according to claim 1.

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