JP2012133750A5 - - Google Patents

Download PDF

Info

Publication number
JP2012133750A5
JP2012133750A5 JP2011188119A JP2011188119A JP2012133750A5 JP 2012133750 A5 JP2012133750 A5 JP 2012133750A5 JP 2011188119 A JP2011188119 A JP 2011188119A JP 2011188119 A JP2011188119 A JP 2011188119A JP 2012133750 A5 JP2012133750 A5 JP 2012133750A5
Authority
JP
Japan
Prior art keywords
sdram
subsystem
chip
power
integrated circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
JP2011188119A
Other languages
English (en)
Japanese (ja)
Other versions
JP2012133750A (ja
Filing date
Publication date
Priority claimed from US13/081,095 external-priority patent/US9251005B2/en
Application filed filed Critical
Publication of JP2012133750A publication Critical patent/JP2012133750A/ja
Publication of JP2012133750A5 publication Critical patent/JP2012133750A5/ja
Ceased legal-status Critical Current

Links

JP2011188119A 2010-12-20 2011-08-31 メモリ・バックアップのための電力分離 Ceased JP2012133750A (ja)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US201061424701P 2010-12-20 2010-12-20
US61/424,701 2010-12-20
US13/081,095 US9251005B2 (en) 2010-12-20 2011-04-06 Power isolation for memory backup
US13/081,095 2011-04-06

Publications (2)

Publication Number Publication Date
JP2012133750A JP2012133750A (ja) 2012-07-12
JP2012133750A5 true JP2012133750A5 (enExample) 2014-08-14

Family

ID=45491270

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2011188119A Ceased JP2012133750A (ja) 2010-12-20 2011-08-31 メモリ・バックアップのための電力分離

Country Status (6)

Country Link
US (1) US9251005B2 (enExample)
EP (1) EP2466465A3 (enExample)
JP (1) JP2012133750A (enExample)
KR (1) KR20120069516A (enExample)
CN (1) CN102568566B (enExample)
TW (1) TWI543163B (enExample)

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8516172B1 (en) * 2007-08-30 2013-08-20 Virident Systems, Inc. Methods for early write termination and power failure with non-volatile memory
WO2012001917A1 (ja) * 2010-06-29 2012-01-05 パナソニック株式会社 不揮発性記憶システム、メモリシステム用の電源回路、フラッシュメモリ、フラッシュメモリコントローラ、および不揮発性半導体記憶装置
US9043642B2 (en) * 2010-12-20 2015-05-26 Avago Technologies General IP Singapore) Pte Ltd Data manipulation on power fail
CN103959200B (zh) 2011-12-09 2017-04-19 英特尔公司 自适应图像子系统功率和性能管理
US20140075174A1 (en) * 2012-09-10 2014-03-13 Texas Instruments Incorporated Boot State Restore from Nonvolatile Bitcell Array
KR20150132101A (ko) * 2013-03-15 2015-11-25 휴렛-팩커드 디벨롭먼트 컴퍼니, 엘.피. 확장 기입을 지원하는 메모리 모듈 제어기
US20140281639A1 (en) * 2013-03-15 2014-09-18 Mahesh Wagh Device power management state transition latency advertisement for faster boot time
US9195542B2 (en) 2013-04-29 2015-11-24 Amazon Technologies, Inc. Selectively persisting application program data from system memory to non-volatile data storage
US9170887B2 (en) 2013-08-14 2015-10-27 Kabushiki Kaisha Toshiba Memory system and controlling method of memory system
US9442560B2 (en) 2014-02-26 2016-09-13 Kabushiki Kaisha Toshiba Memory system minimizing occurrences of storing of operation data in non-volatile storage during power saving mode
WO2015152895A1 (en) * 2014-04-01 2015-10-08 Hewlett-Packard Development Company, L.P. Providing backup power
KR20150133350A (ko) 2014-05-19 2015-11-30 에스케이하이닉스 주식회사 메모리 모듈 및 이의 동작 방법
CN105512056A (zh) * 2014-09-24 2016-04-20 中兴通讯股份有限公司 数据保存方法、装置及终端
WO2017155516A1 (en) * 2016-03-08 2017-09-14 Hewlett-Packard Development Company, L.P. Securing data
WO2018143970A1 (en) * 2017-02-01 2018-08-09 Hewlett-Packard Development Company, L.P. Delay of power off to write data from volatile to non-volatile memory of a solid state drive
US10963408B2 (en) * 2017-06-01 2021-03-30 University Of Virginia Patent Foundation System on a chip with customized data flow architecture
US11836358B2 (en) 2018-04-16 2023-12-05 Hewlett-Packard Development Company, L.P. Data storage device power provisions
DE102018110276A1 (de) * 2018-04-27 2019-10-31 Minebea Intec GmbH Vorrichtung und Verfahren zur Sicherung von gespeicherten Daten in einem nicht-flüchtigen Speicher
US10976795B2 (en) * 2019-04-30 2021-04-13 Seagate Technology Llc Centralized power loss management system for data storage devices

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06110794A (ja) * 1992-09-28 1994-04-22 Yokogawa Electric Corp メモリバックアップ回路
JPH07182252A (ja) * 1993-12-24 1995-07-21 Nec Corp メモリのデータ不良検出回路
US6035347A (en) 1997-12-19 2000-03-07 International Business Machines Corporation Secure store implementation on common platform storage subsystem (CPSS) by storing write data in non-volatile buffer
US6336174B1 (en) * 1999-08-09 2002-01-01 Maxtor Corporation Hardware assisted memory backup system and method
US7249282B2 (en) 2002-04-29 2007-07-24 Thomson Licensing Eeprom enable
US7017017B2 (en) * 2002-11-08 2006-03-21 Intel Corporation Memory controllers with interleaved mirrored memory modes
US20040190210A1 (en) * 2003-03-26 2004-09-30 Leete Brian A. Memory back up and content preservation
JP4411014B2 (ja) * 2003-05-26 2010-02-10 日本電気株式会社 コンピュータおよびその電源バックアップ方法
JP2005250898A (ja) * 2004-03-04 2005-09-15 Toshiba Corp 半導体集積回路及び半導体集積回路システム
US7380055B2 (en) 2004-06-21 2008-05-27 Dot Hill Systems Corporation Apparatus and method in a cached raid controller utilizing a solid state backup device for improving data availability time
US7392429B2 (en) * 2004-12-22 2008-06-24 Microsoft Corporation System and method for maintaining persistent state data
US8046546B2 (en) 2007-07-25 2011-10-25 AGIGA Tech Variable partitioning in a hybrid memory subsystem
US8169839B2 (en) 2009-02-11 2012-05-01 Stec, Inc. Flash backed DRAM module including logic for isolating the DRAM
US8117428B2 (en) 2009-06-04 2012-02-14 Texas Instruments Incorporated Apparatus and method for automatically saving and restoring pad configuration registers implemented in a core power domain
US20120150808A1 (en) * 2010-12-13 2012-06-14 Verizon Patent And Licensing Inc. Method and system for performing data backup and restoration

Similar Documents

Publication Publication Date Title
JP2012133750A5 (enExample)
EP2423801A3 (en) Image forming apparatus, system-on-chip (SOC) unit, and driving method thereof
JP2013545207A5 (enExample)
MX352867B (es) Almacenamiento estructurado por registro, sin memoria de retención para métodos de acceso múltiple.
JP2013229019A5 (ja) プロセッサ
JP2010277685A5 (enExample)
US9213400B2 (en) Apparatus and method to provide near zero power DEVSLP in SATA drives
JP2012099113A5 (ja) デバッグを実行可能にするデバイス
JP2012133748A5 (enExample)
JP2011028430A5 (enExample)
WO2009088626A3 (en) Method and system for balancing host write operations and cache flushing
JP2011243216A5 (enExample)
EP2466465A3 (en) Power isolation for memory backup
JP2012252576A5 (enExample)
JP2015069655A5 (enExample)
JP2013017139A5 (ja) 印刷装置、その制御方法、プログラム、及び記憶媒体
DE602007008804D1 (de) Fernkopien ausführendes Speichersystem
JP2016537720A5 (enExample)
JP2014049131A5 (enExample)
TW201423662A (zh) 具有低圖形引擎利用率之資料處理裝置上的低功率應用執行
CN103593145A (zh) 计算机系统与其储存装置管理方法
JP2015119540A5 (ja) 電力制御システム、電力制御装置、電力制御方法及びプログラム
JP2013242680A5 (enExample)
JP2014030977A5 (enExample)
WO2009001514A1 (ja) メモリコントローラ、不揮発性記憶装置、ファイルシステム、不揮発性記憶システム、データ書き込み方法及びデータ書き込みプログラム