JP2012114793A - Communication driver circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a communication driver circuit capable of more reliably preventing changes in signal levels of a communication line even when external noise invades.SOLUTION: In a communication driver section 11, when noise is applied to a signal bus 17, a signal level change prevention circuit 14 operates so that an output signal of a reversion amplification circuit 13 with an output stage of open collector type is prevented from changing to the low level side.

Description

  The present invention provides a communication driver having an inverting amplifier circuit that outputs a communication signal on a communication line pulled up by performing an inverting amplification operation based on an input transmission signal, and whose output stage is an open collector type. Regarding the circuit.

  Various systems for reducing noise generated when a signal is output on a communication line via a driver circuit have been proposed in a system that performs serial communication in a wired manner. For example, in the case of local communication performed one-on-one without conforming to a specific protocol, a driver circuit as shown in FIG. 8 may be used. That is, the transmission signal is current-amplified by the amplifier 1, and the communication bus 3 pulled up to the power source by the output stage NPN transistor 2 is driven. Then, by externally attaching a capacitor 4 between the communication bus 3 and the ground, the communication signal waveform is blunted.

  However, in the configuration shown in FIG. 8, since the capacitance of the capacitor 4 is relatively large, about 0.01 μF, and the element cannot be taken into the IC, the capacitor 4 can only be externally attached. Therefore, in Patent Document 1, by using a mirror effect by connecting a feedback capacitor between the input and output terminals of the inverting amplifier circuit inside the IC of the communication driver circuit, the level change of the communication signal can be reduced even with a low-capacitance capacitor. To get enough effect.

JP 2007-214643 A (see FIG. 1)

  However, in the configuration of Patent Document 1, disturbance noise is likely to affect the feedback capacitor. When the feedback capacitor is affected by noise, the output signal changes from the high level to the low level, so a signal indicating the start of communication is displayed even though the communication is not actually started. There was a problem of being output on the bus.

  The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a communication driver circuit that can more reliably prevent fluctuations in the signal level of the communication line even when disturbance noise enters.

  According to the communication driver circuit of the first aspect, when noise is applied to the signal line, the signal level change prevention circuit causes the output signal of the inverting amplifier circuit whose output stage is an open collector type to be on the low level side. Operates to prevent change. Therefore, in order to reduce the degree to which the level of the communication signal changes, it is possible to reliably prevent the influence of noise from affecting the communication in the configuration in which the feedback capacitor is connected between the input and output terminals of the inverting amplifier circuit.

  According to the communication driver circuit of the second aspect, the signal level change prevention circuit drives the level change prevention transistor when noise is applied to the communication line and the output signal level of the drive circuit rises. The output stage transistors constituting the output stage are turned off. Thereby, it is possible to prevent the output signal of the inverting amplifier circuit from changing to the low level side. Then, the invalidating means invalidates the operation of the signal level change prevention circuit during the period when the transmission signal is output to the input terminal of the anti-amplification circuit. It is possible to reliably avoid the influence even when it is normally performed.

  According to the communication driver circuit of the third aspect, the time constant including the capacitor in the signal level change prevention circuit is set smaller than the time constant including the feedback capacitor. Therefore, when noise is applied to the communication line, the signal level change prevention circuit is operated faster than the inverting amplifier circuit, so that the influence of noise can be prevented more reliably.

  According to the communication driver circuit according to any one of claims 4 to 6, the level change prevention transistor is provided between the control terminal of the output stage transistor and the ground (claim 4), and between the input terminal of the inverting amplifier circuit and the ground. (Claim 5), the transistor is connected between the control terminal of the transistor in the inverting amplifier circuit for driving the output stage transistor and the ground (Claim 6). Therefore, in any case, if the level change prevention transistor is turned on by the drive circuit, the output stage transistor can be prevented from turning on.

  According to the communication driver circuit of the seventh or eighth aspect, the drive circuit is configured by a buffer circuit (Claim 7) or a comparator (Claim 8). Therefore, in any case, the level change prevention transistor can be turned on by applying noise to the communication line and increasing the signal level of the input terminal.

  According to the communication driver circuit of claim 9, when the invalidation means detects the edge when the level of the signal applied to the input terminal of the anti-amplification circuit changes, the signal output means The invalidation signal is output for a certain period from that time. Then, the invalidation transistor lowers the level of the input terminal of the drive circuit while the invalidation signal is given. Therefore, it is possible to avoid the influence of the signal level change prevention circuit when the communication is normally performed.

  According to the communication driver circuit of the tenth aspect, since the resistance element is connected between the communication line and the capacitor constituting the signal level change prevention circuit, the electrostatic noise is applied to the communication line. The tolerance can also be improved.

The figure which is 1st Example and shows a part of communication driver part Circuit diagram showing internal configuration of buffer circuit Timing chart showing operation of signal level change prevention circuit FIG. 1 equivalent view showing the second embodiment FIG. 1 equivalent view showing the third embodiment FIG. 1 equivalent view showing the fourth embodiment FIG. 1 equivalent view showing the fifth embodiment Diagram showing conventional technology

(First embodiment)
The first embodiment will be described below with reference to FIGS. In addition, the same code | symbol is attached | subjected and shown to the same part as patent document 1. FIG. FIG. 1 is a diagram corresponding to a part of the communication driver unit (communication driver circuit) 11 disclosed in FIG. The buffer circuit 12 (BUF1) in FIG. 1 drives an NPN transistor Q10 (output stage transistor) that constitutes the output stage of the inverting amplifier circuit 13. In Patent Document 1, as shown in FIG. , NPN transistor Q9, diodes D4, D5, D8, D9, current sources CS5, CS8, and the like. Therefore, the base of the transistor Q8 is the input terminal of the inverting amplifier circuit 13. The resistor element R3 connected between the input terminal and the signal input terminal IN to which the signal Vin is supplied is a component that is not disclosed in Patent Document 1. Further, the resistor element R1 connected between the communication bus (communication line) 17 and the capacitor C1 (feedback capacitor) in Patent Document 1 is omitted in this embodiment, and is connected in parallel to the capacitor C1 in FIG. The diodes D11 and D12 to be used are not shown.

  In this embodiment, the signal level change prevention circuit 14 is connected between the communication bus 17 and the output terminal of the buffer circuit 12. Hereinafter, the configuration of the signal level change prevention circuit 14 will be described. A series circuit of a capacitor C2 and a resistance element R4 is connected between the communication bus 17 and the ground, and their common connection point is connected to an input terminal of the buffer circuit 15 (BUF2, drive circuit). . The output terminal of the buffer circuit 15 is connected to the base of an NPN transistor 16 (level change prevention transistor). The collector of the NPN transistor 16 is connected to the base of the NPN transistor Q10, and the emitter is connected to the ground. The capacity of the capacitor C2 is set to be equal to or less than the capacity of the capacitor C1.

  An invalidation circuit (invalidation means) 19 is connected between the signal input terminal IN and the input terminal of the buffer circuit 15. The signal input terminal IN is connected to an edge detection unit (edge detection unit) 20 that detects rising and falling edges of the signal Vin, and a detection signal from the edge detection unit 20 is supplied to a timer (signal output unit) 21. It has been. When the rising edge or the falling edge of the signal Vin is detected by the edge detection unit 20, the timer 21 supplies a drive signal (invalidation signal) to the gate of the N-channel MOSFET 22 (invalidation transistor) for a predetermined time. The drain of the N-channel MOSFET 22 is connected to the input terminal of the buffer circuit 15, and the source is connected to the ground.

  Next, the operation of this embodiment will be described with reference to FIG. Since the communication bus 17 is pulled up by the resistance element 18, it is at a high level (recessive) unless it is driven by the communication driver unit 11. From this state, when the high-active signal Vin is given and the communication driver unit 11 operates, the communication bus 17 is driven to a low level (dominant).

  As shown in FIG. 3A, when the signal Vin changes from the low level to the high level, the potential Va at the input terminal of the buffer circuit 12 rises with a predetermined slope by the action of the capacitor C1 (FIG. 3). (See (b)), and the potential Vb of the output terminal also rises with substantially the same slope (see FIG. 3C). At this time, since the edge detection unit 20 detects the rising edge of the signal Vin, the timer 21 sets the gate potential Vc of the N-channel MOSFET 22 to a high level for a certain time from that time (see FIG. 3D). That is, the function of the timer 21 is equivalent to a one-shot multivibrator circuit that outputs a monopulse. The timer time for the timer 21 to set the gate potential Vc to the high level is set to be equal to or longer than the rising time of the potential Va.

  Since the N-channel MOSFET 22 is turned on when the gate potential Vc becomes high level, the potential Vd of the input terminal of the buffer circuit 15 is maintained at low level (see FIG. 3E). Therefore, the NPN transistor 16 is not turned on during this period. Then, the potential Vout of the communication bus 17 is driven to a low level through the buffer circuit 12 while the NPN transistor Q10 is on (see FIG. 3F). Further, when the signal Vin changes from high level to low level, each signal changes in the reverse process to the above, but the edge detection unit 20 detects the falling edge of the signal Vin, and the timer 21 similarly From that point on, the gate potential Vc of the N-channel MOSFET 22 is set to the high level for a fixed time (see FIG. 3D).

  The above is the normal operation of the communication driver unit 11 according to the change of the applied signal Vin. Next, the operation when noise is applied to the communication bus 17 will be described. As shown in FIG. 3F, when the potential Vout of the communication bus 17 temporarily rises due to the application of noise, the potential Va of the input terminal of the buffer circuit 12 also rises via the capacitor C1 (FIG. 3B). )reference). At this time, if the signal level change prevention circuit 14 does not exist, the base potential of the NPN transistor Q10 rises with a slight delay as shown by a broken line in FIG. As a result, the NPN transistor Q10 is turned on, so that the communication bus 17 is driven to a low level as shown in FIG.

  However, in this embodiment, the potential Vd of the input terminal of the buffer circuit 15 also rises via the capacitor C2 due to the application of noise (see FIG. 3 (e)). Thereby, since the NPN transistor 16 is turned on, the base potential of the NPN transistor Q10 becomes low level, and the NPN transistor Q10 maintains the off state. Therefore, the operation of the signal level change prevention circuit 14 prevents the communication bus 17 from being driven to a low level.

  As described above, according to the present embodiment, when noise is applied to the signal bus 17, the communication driver unit 11 is configured such that the signal level change prevention circuit 14 is an inverting amplifier circuit 13 whose output stage is an open collector type. The output signal is prevented from changing to the low level side. Therefore, when the capacitor C1 is connected between the input and output terminals of the inverting amplifier circuit 13 to alleviate the degree to which the level of the communication signal changes, it is possible to reliably prevent noise from affecting the communication. Further, since the time constant including the capacitor C2 in the signal level change prevention circuit 14 is set smaller than the time constant including the capacitor C1 on the inverting amplifier circuit 13 side, when noise is applied to the communication bus 17, the signal level By operating the change prevention circuit 14 faster than the inverting amplification circuit 13, it is possible to more reliably prevent the influence of noise from affecting communication.

  The signal level change prevention circuit 14 drives the NPN transistor 16 when noise is applied to the communication bus 17 and the output signal level of the buffer circuit 15 rises, and the NPN transistor Q10 constituting the output stage of the inverting amplifier circuit 13 is driven. Is turned off. Thereby, it is possible to prevent the output signal of the inverting amplifier circuit 13 from changing to the low level side. Since the invalidation circuit 19 invalidates the operation of the signal level change prevention circuit 14 during the period when the transmission signal is output to the input terminal of the anti-amplification circuit 13, the signal level change prevention circuit 14 is provided. Therefore, it is possible to avoid the influence even when communication is normally performed.

  In addition, when the edge detection unit 20 detects an edge when the level of the signal applied to the input terminal of the anti-amplification circuit 13 has changed, the invalidation circuit 19 causes the timer 21 to stop for a certain period from that point. A drive signal is output. Since the N-channel MOSFET 22 lowers the level of the input terminal of the buffer circuit 15 while the drive signal is applied, it is possible to avoid the influence of the signal level change prevention circuit 14 when performing communication normally. .

(Second embodiment)
FIG. 4 shows a second embodiment. The same parts as those in the first embodiment are denoted by the same reference numerals and the description thereof will be omitted. In the second embodiment, a signal level change prevention circuit 24 is configured by arranging a comparator (drive circuit) 23 instead of the buffer circuit 15. In this case, the non-inverting input terminal of the comparator 23 is connected to a common connection point between the capacitor C2 and the resistor element R4, and a reference voltage for comparison is applied to the inverting input terminal. In the case of the second embodiment configured as described above, the same effect as that of the first embodiment can be obtained.

(Third embodiment)
FIG. 5 shows the third embodiment, and the differences from the first embodiment will be described. The third embodiment is different from the first embodiment in that the collector of the NPN transistor 16 is connected to the input terminal side of the buffer circuit 12, and the above constitutes the signal level change prevention circuit 25. . In the case of the third embodiment configured as described above, the same effect as that of the first embodiment can be obtained.

(Fourth embodiment)
FIG. 6 shows a fourth embodiment, which is different from the first embodiment in the position where the collector of the NPN transistor 16 is connected as in the third embodiment. In the fourth embodiment, the collector is connected to the base of the NPN transistor Q9 constituting the buffer circuit 12 to constitute a signal level change prevention circuit 26. In the case of the fourth embodiment configured as described above, the same effect as that of the first embodiment can be obtained.

(5th Example)
FIG. 7 shows the fifth embodiment, and the differences from the first embodiment will be described. In the fifth embodiment, resistance elements R1 and R5 are connected between the communication bus 17 and the capacitors C1 and C2, respectively. As a result, the resistance to electrostatic noise applied to the communication bus 17 is improved, and the internal circuit of the communication driver unit 11 is prevented from being destroyed. The time constants of the capacitor C1 and the resistor element R1 may be equal to the time constants of the capacitor C2 and the resistor element R5. However, when noise is applied, the signal level change prevention circuit 14a is operated more quickly. As in the first embodiment, the latter time constant is preferably set slightly smaller.

  As described above, according to the fifth embodiment, the resistance element R1 is inserted between the communication bus 17 and the capacitor C1 on the inverting amplifier circuit 13a side, and the capacitor C2 constituting the communication bus 17 and the signal level change prevention circuit 14a. Since the resistance element R5 is connected between the two, the withstand amount when static noise is applied to the communication line 17 can be improved. Also in this case, the time constant including the capacitor C2 and the resistance element R5 in the signal level change prevention circuit 14 is set to be smaller than the time constant including the capacitor C1 and the resistance element R1 on the inverting amplifier circuit 13a side. When noise is applied to the communication bus 17, the signal level change prevention circuit 14a can be operated faster than the inverting amplifier circuit 13a, so that the influence of noise can be prevented more reliably.

The present invention is not limited to the embodiments described above or shown in the drawings, and the following modifications or expansions are possible.
The invalidating means may be deleted if it does not interfere with normal communication processing.
As for the transistor, a MOSFET and a bipolar transistor may be appropriately replaced.

  In the drawing, 11 is a communication driver section (communication driver circuit), 13 is an inverting amplifier circuit, 14 is a signal level change prevention circuit, 15 is a buffer circuit (drive circuit), 16 is an NPN transistor (level change prevention transistor), 17 Is a communication bus (communication line), 19 is an invalidation circuit (invalidation means), 20 is an edge detection unit (edge detection means), 21 is a timer (signal output means), and 22 is an N-channel MOSFET (invalidation transistor). , 23 are comparators (drive circuit), 24-26 are signal level change prevention circuits, Q10 is an NPN transistor (output stage transistor), C1 is a capacitor (feedback capacitor), C2 is a capacitor, and R1 to R5 are resistance elements.

Claims (10)

An inverting amplifier circuit configured to output a communication signal on a communication line that is pulled up by performing an inverting amplification operation based on an input transmission signal, and whose output stage is an open collector type;
A feedback capacitor connected between the input and output terminals of the inverting amplifier circuit;
A communication driver circuit comprising a signal level change prevention circuit that operates to prevent the output signal of the inverting amplifier circuit from changing to a low level when noise is applied to the communication line. . The signal level change prevention circuit, a series circuit of a capacitor and a resistance element connected between the communication line side and the ground,
A drive circuit having an input terminal connected to a common connection point of the capacitor and the resistance element;
When noise is applied to the communication line and the output signal level of the drive circuit rises, a level change prevention transistor that turns off the output stage transistor that constitutes the output stage;
2. The communication driver circuit according to claim 1, further comprising invalidating means for invalidating an operation of the signal level change prevention circuit during a period in which the transmission signal is output to an input terminal of the anti-amplification circuit. .   3. The communication driver circuit according to claim 2, wherein a time constant including a capacitor in the signal level change prevention circuit is set smaller than a time constant including the feedback capacitor.   4. The communication driver circuit according to claim 2, wherein the level change prevention transistor is connected between a control terminal of the output stage transistor and a ground.   4. The communication driver circuit according to claim 2, wherein the level change prevention transistor is connected between an input terminal of the inverting amplifier circuit and a ground.   4. The level change prevention transistor, which constitutes the inverting amplifier circuit, is connected between a control terminal of a transistor for driving the output stage transistor and a ground. Communication driver circuit.   The communication driver circuit according to claim 2, wherein the drive circuit is configured by a buffer circuit.   The communication driver circuit according to claim 2, wherein the drive circuit includes a comparator. The invalidating means, an edge detecting means for detecting an edge when a level of a signal applied to an input terminal of the anti-amplifying circuit is changed;
When the edge detection means detects the edge, a signal output means for outputting an invalidation signal for a certain period from that point; and
9. The communication driver according to claim 2, comprising a disabling transistor that reduces a level of an input terminal of the drive circuit while the disabling signal is applied. circuit.   10. The communication driver circuit according to claim 2, wherein a resistance element is connected between the communication line and a capacitor constituting the signal level change prevention circuit.

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