JP2012084703A - Diamond electronic element and manufacturing method thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a high output diamond electronic element having a drift layer with reduced defect density.SOLUTION: The diamond electronic element comprises: a drift layer composed of a diamond semiconductor; a structure retainer having a semi-insulating diamond layer; and a contact layer composed of the diamond semiconductor. The structure retainer has an opening and is laminated on one side of the drift layer while the contact layer is directly laminated on the drift layer in the opening. An anode electrode is provided on the contact layer in the opening and a cathode electrode is provided on the other side of the drift layer to realize, for example, a Schottky barrier diode. After a defect layer is formed on one substrate surface of a single crystal diamond substrate, the drift layer is deposited on the substrate surface, and the structure retainer having the opening is formed by selectively growing the semi-insulating diamond layer, and the substrate is separated from an element part by a smart cut method.

Description

  The present invention relates to a high-power diamond electronic device such as a vertical structure diode, transistor, FET, thyristor and the like, and a method for manufacturing the same.

  In recent years, a diamond electronic device is expected as a device that can be practically operated under a large band gap, a high avalanche breakdown electric field, a high saturation carrier mobility, a high thermal conductivity, a high temperature and a radiation exposure environment. Development of high-power diamond semiconductor elements such as diamond Schottky barrier diodes, diamond field effect transistors, diamond pn diodes, diamond thyristors, and diamond transistors has been promoted as semiconductor elements utilizing these characteristics.

  Conventionally, among the laminated structures of high-power diamond semiconductor elements, the present inventors have disclosed pseudo vertical structures (see Patent Documents 1 and 2 and Non-Patent Documents 1 to 3) and vertical structures (see Non-Patent Documents 4 to 7). Research and development has been done.

FIG. 5 shows a conventional high-power diamond semiconductor element having a pseudo vertical structure. As shown in FIG. 5, a p ⁺ contact layer 32 is grown on a semi-insulating diamond substrate 31, and a p ⁻ drift layer 33 is grown thereon to produce a laminated structure. In the stacked structure, an ohmic electrode 34 is provided on the p ⁺ contact layer 32 and a Schottky electrode 35 is provided on the p ⁻ drift layer 33 to produce an element.

FIG. 6 shows a conventional high-power diamond semiconductor element having a vertical structure using an HPHT / p ⁺ laminated substrate in which a p ⁺ layer is homoepitaxially grown on a high-temperature and high-pressure single crystal diamond. As shown in FIG. 6, the p ⁺ contact layer 42 is used as the p ⁺ layer of the HPHT / p ⁺ laminated substrate, and the p ⁻ drift layer 43 is formed on the substrate to produce a laminated structure. In the stacked structure, the ohmic electrode 44 is formed on the surface of the p ⁺ contact layer 42 where the p ⁻ drift layer 43 is not formed, and the Schottky electrode 45 is formed on the p ⁻ drift layer 43. Thus, an element was manufactured.

  The present inventors have conducted research and development on a high-quality diamond manufacturing method by CVD (see Patent Documents 3 to 5). Further, the inventors of the present invention performed ion implantation on the diamond substrate to form a layer having a modified crystal structure in the vicinity of the surface, and then performed diamond crystal growth on the substrate by a vapor phase synthesis method, and then the grown crystal layer A method for obtaining a self-supporting diamond CVD growth layer by separating the substrate and the substrate by electrochemical etching has been researched and developed (see Patent Documents 6, 7, and 8). Such a method for separating the crystal layer and the substrate is generally referred to as a smart cut method or a lift-off method.

JP 2009-252776 A JP 2009-59798 A JP 2009-200343 A JP 2007-194231 A JP 2009-59739 A JP 2008-31503 A International Publication 2008/029736 JP 2010-13322 A

H. Umezawa et al. IEEE Electron Device Lett. 30 (2009) 960. S. Shikata et al. Mater. Sci. Forum, 615-617 (2009) 999. K. Ikeda et al. Appl. Phys. Express, 2 (2009) 011202. A. Vescan et al. Diam. Relat. Mater. 7 (1998) 581. W. Ebert et al. Diam. Relat. Mater. 6 (1997) 329. S. J. et al. Rashid, Proc. ISPSD'08 (2008) 249. M.M. Imura et al. Diam. Relat. Mater. 17 (2008) 1916.

  In order to manufacture a high-power semiconductor element, a structure in which a drift layer and a contact layer are stacked as an operating semiconductor layer is an essential structure. The contact layer is doped with a very high concentration of impurities in order to reduce parasitic resistance. For this reason, the contact layer has a problem in that the crystal quality is poor due to lattice distortion and dislocation. On the other hand, with respect to the drift layer, it is necessary to extend the depletion layer when a reverse bias is applied and to maintain the voltage with a low leakage current even in a high electric field, so it is necessary to suppress the incorporation of defects in the element. Therefore, in order to perform a large current and high withstand voltage operation, the drift layer is required to have high crystallinity with low defect density and low distortion.

In the case of using the conventional pseudo-vertical structure, a p ⁺ contact layer is grown on a semi-insulating diamond substrate with a thickness of 1 to 50 μm, and a p ⁻ drift layer is grown thereon with 1 to 20 μm ( (See FIG. 5). Here, the drift layer is laminated on the contact layer by the CVD epitaxial growth method. However, when a drift layer requiring high quality is grown on a contact layer having many defects and poor quality, Since the existing defects are inherited in the drift layer, the quality of the drift layer is deteriorated. FIG. 5 shows how defects (black thick lines) in the semi-insulating substrate 31 are taken over by the p ⁺ contact layer 32 and defects in the p ⁺ contact layer 32 are taken over by the p ⁻ drift layer 33.

In addition, when a conventional HPHT / p ⁺ laminated substrate is used, there are low resistance single crystal substrates such as IIb type HPHT diamond. However, since the substrate itself has many dislocations and the substrate size is small, the increase in size of the device is not required. Is possible. The dislocation of the substrate is considered to affect the device characteristics, and when the element size is actually increased, a phenomenon in which the element characteristics deteriorate is observed. FIG. 6 shows how defects (black thick lines) in the p ⁺ contact layer 42 are taken over by the p ⁻ drift layer 43. From this, it is necessary to reduce the defect density of the p ⁺ contact layer in order to reduce the defect density in the drift layer, but it is difficult to reduce the defect density. In the case of diamond, the defect density in the drift layer is required to be 10 ³ / cm ² or less for a 1A class element and 10 ² / cm ² or less for a 10 A class element.

  As described above, in order to improve the device characteristics and increase the output, it is necessary to reduce the defect density such as dislocations existing in the drift layer. However, the drift layer is grown on the contact layer with many defects by high quality CVD. However, there is a problem that it is difficult to take over the dislocation.

In order to keep the low on-resistance is to increase the doping concentration of the p ⁺ contact layer, it is necessary to reduce the parasitic resistance component of the p ⁺ contact layer, by increasing the doping concentration, p ⁺ A difference occurs in the lattice constant between the contact layer and the p ⁻ drift layer, which causes the substrate to warp. If the p ^- drift layer is stacked in a state where warpage has occurred, defects are generated. There is a film thickness limit for introducing a dislocation, which is one of defects, with respect to the contact layer concentration. FIG. 7 shows the relationship between the critical thickness of the p ⁺ contact layer and the boron concentration. Lines A and B indicate lines calculated using different models. As shown in FIG. 7, it is necessary to make it 10 μm or less at a high doping level (> 10 ²⁰ / cm ³ ) at which metallic conduction is obtained. However, when this thickness of contact layer is used for the pseudo-vertical structure, the parasitic resistance increases because current flows in the lateral direction. On the other hand, when the contact layer is used for the vertical structure, the structure is too thin to maintain the structure. . The quality of a wafer or element can be determined by using distortion as an index. The warpage is indicated by a radius of curvature, and the larger the radius of curvature, the smaller the warp and the better the quality.

  The present invention is intended to solve these problems, and an object thereof is to provide a diamond electronic device having a drift layer with a reduced defect density. It is another object of the present invention to provide a method for manufacturing a diamond electronic device having a drift layer with reduced defect density.

In the present invention, the defect density of the drift layer is reduced by the structure that enables the high-quality drift layer to be epitaxially grown on the ultra-high-quality single crystal diamond by CVD and then the contact layer to be grown by high-concentration doping. A reduced diamond electronic device was realized. In the present invention, the single crystal diamond substrate on which the drift layer is epitaxially grown is separated from the element portion by the smart cut method, thereby realizing the laminated structure of the present invention.
In order to achieve the above object, the present invention has the following features.

The diamond electronic device of the present invention is a diamond electronic device comprising a drift layer made of a diamond semiconductor, a structure holding material having a semi-insulating diamond layer, and a contact layer made of a diamond semiconductor, the structure holding material, It has an opening and is laminated on one surface of the drift layer, and the contact layer is laminated directly on the drift layer in the opening. The electrode is characterized in that an anode electrode is provided on the contact layer in the opening and a cathode electrode is provided on the other surface of the drift layer. The contact layer and the anode electrode may be disposed only in the opening, or may be laminated on a structure holding material other than the opening. As an example of a specific structure, it is preferable that the drift layer is a p ^- diamond layer and the contact layer is a p ⁺ diamond layer. At this time, the drift layer is a p ^- diamond layer having a boron concentration of 10 ¹⁵ / cm ³ or more and 10 ¹⁷ / cm ³ or less, and the contact layer has a boron concentration of 10 ¹⁹ / cm ³ or more and 10 ²² / cm ^3. It is below, and it is preferable that it is a p ⁺ diamond layer. Here, the electronic element of the present invention preferably has a curvature radius of 5 m or more and 500 m or less. As another example of the specific structure, the cathode electrode is formed of a laminated structure of an ohmic metal and an n ⁺ diamond layer, the drift layer is a p ^- diamond layer, and the contact layer is a p ⁺ diamond layer. Is preferred.

  In the diamond electronic device of the present invention, it is preferable that the drift layer has a thickness of 1 μm to 50 μm and the contact layer has a thickness of 1 μm to 100 μm. The semi-insulating diamond layer of the present invention is preferably nitrogen-containing homoepitaxial single crystal diamond or nitrogen-containing polycrystalline diamond.

  The diamond electronic device of the present invention is, for example, a Schottky diode, a pin junction diode, or a pn junction diode.

The manufacturing method of the present invention is a manufacturing method of a diamond electronic device, wherein after forming a defect layer on one substrate surface of a single crystal diamond substrate, forming the drift layer on the substrate surface; A step of selectively growing the semi-insulating diamond layer on the drift layer to form a structure holding material having an opening; and separating the single crystal diamond substrate and the drift layer by the defect layer; Etching a defect layer to separate out the drift layer, exposing the drift layer, and forming the contact layer on the drift layer in the opening. And The manufacturing method of the present invention includes a step of providing a cathode electrode on the drift layer and an anode electrode on the contact layer of the opening. Here, the single crystal diamond substrate preferably has a dislocation density of 10 ³ pieces / cm ² or less, and irregularities on the front surface and the back surface satisfy Ra <1 nm. The drift layer is preferably formed on the single crystal diamond substrate by CVD synthesis.

Defects in the diamond epitaxial film are caused by inheritance from the base substrate and generation by lattice strain relaxation during the epitaxial process. In the prior art, the defect density of the drift layer is increased by using a substrate or contact layer having a high-density defect as a base. Even when a single crystal substrate with low defects was used as the substrate, the defect density of the drift layer was high due to defects generated by lattice relaxation in the contact layer. According to the laminated structure of the present invention, a drift layer made of a diamond semiconductor can be directly grown on a single crystal diamond substrate to be removed in the manufacturing process, so that a drift layer with few defects can be formed. . In the smart cut method, a defect layer is introduced by ion implantation. However, dislocation does not occur even when the defect layer is introduced, and the p ^- drift layer maintains a low defect.

In the present invention, since a semi-insulating diamond is used as the structure holding material, a diamond semiconductor contact layer can be formed. Further, in the present invention, the structure holding material having an opening is selectively grown on the drift layer using a lithography technique. Therefore, if the curvature of the wafer by stacking different impurity concentration layers is small, a diamond substrate is formed. It is sufficiently possible to maintain a thin p ⁻ drift layer / p ⁺ contact layer stack structure without breakage.

As described above, according to the present invention, it is possible to epitaxially grow the p ⁻ drift layer directly on the high quality semi-insulating single crystal diamond substrate which is later removed by the smart cut method, and then grow the p ⁺ contact layer. Therefore, the defect density of the p ⁻ drift layer can be greatly reduced even in the p ⁻ / p ⁺ stacked structure. According to the laminated structure of the present invention, a high voltage operation by a high-quality drift layer can be realized simultaneously with an element capable of high current operation with low parasitic resistance.

The figure which shows the laminated structure of the diamond electronic element of Example 1 The figure which shows the manufacturing method of the diamond electronic element of Example 1. The figure which shows the modification of Example 1. The figure which shows the laminated structure of the diamond electronic element of Example 2. Diagram showing the layered structure of a conventional pseudo-vertical diamond electronic device A diagram showing the layered structure of a conventional vertical diamond electronic device The figure which shows boron concentration dependence of p ⁺ contact layer critical thickness

  Embodiments of the present invention will be described below.

FIG. 1 shows a basic structure of a laminated structure of diamond electronic elements of the present invention. In the laminated structure of the diamond electronic device of the present invention, a semi-insulating diamond layer having openings for electrode arrangement is used as a structure holding material (also called a structure holding layer). The diamond electronic device of the present invention includes a drift layer (p ⁻ layer (also referred to as p ⁻ drift layer) 12) made of a diamond semiconductor, a structure holding layer 11 having a semi-insulating diamond layer, and a contact layer (p ^{+ made of} a diamond semiconductor). It has a stacked structure in which layers (also called p ⁺ contact layers) 13) are stacked in this order. The structure holding layer 11 has an opening, and the drift layer (p ⁻ layer 12) and the contact layer (p ⁺ layer 13) are directly stacked in the opening. The electrodes are arranged so that a cathode electrode (Schottky electrode) is provided on the drift layer (p ⁻ layer 12) and an anode electrode (ohmic electrode) is provided on the contact layer (p ⁺ layer 13) in the opening. .

  In the present invention, after an ion implantation is performed on a high-quality single crystal diamond (001) substrate having a low surface defect and controlled in the off angle / off direction, a layer (defect layer) having a modified crystal structure is formed in the vicinity of the surface. Then, crystal growth is performed on the substrate by a vapor phase synthesis method, and then the grown crystal layer and the substrate are separated. Here, as a method for forming a defect layer by ion implantation and a method for separating the crystal layer and the substrate, known methods such as the methods disclosed in Patent Documents 6 and 7 can be used. As ions used for ion implantation, hydrogen, carbon, or the like can be used.

  The substrate has an off angle of 2 ° in the <110> direction in order to perform flat epitaxial growth, but the variation is within ± 5 ° in the <110> direction, and the <001> vector becomes the normal vector of the surface. In contrast, those having an off angle of 1 ° or more are preferable.

  The surface of the substrate is polished with high precision in order to perform flat epitaxial growth, and Ra <1 nm. Ra represents arithmetic average roughness and is defined by the JIS B0601: '01 standard.

A p ^- diamond layer (drift layer) is epitaxially grown on the substrate by CVD. In order to operate the diode with a high voltage and low leakage and further to operate with a low on-resistance, it is necessary to control the doping concentration and film thickness of the drift layer. For this reason, the p ⁻ drift layer has a thickness of 1 μm to 50 μm. In addition, the boron concentration in the film is preferably 10 ¹⁵ / cm ³ or more and 10 ¹⁷ / cm ³ or less. Moreover, in order to prevent the wafer from cracking and a significant increase in defects, the curvature radius of the wafer is preferably 5 m or more and 500 m or less. The CVD method is performed using microwave plasma, using a gas of any one of H ₂ , CO ₂ , and CH ₄ and, in some cases, a mixed gas of trimethyl boron (TMB).

The present invention is characterized by a laminated structure including a structure holding material and a manufacturing method. A mask is formed on the p ⁻ drift layer formed on the substrate using a lithography technique, and a diamond film as a structure holding material is selectively formed by a CVD method. Here, the material used for the mask is preferably SiO ₂ or Ti / Au. The diamond film serving as the structure holding material is preferably semi-insulating and is a nitrogen-containing homoepitaxial single crystal film or a nitrogen-containing polycrystalline film.

  The crystal layer and the substrate were separated using the method described in Patent Document 8. The above-mentioned laminated diamond was put in ultrapure water, a voltage of 5.6 kV was applied between platinum electrodes that were also put in ultrapure water, and left for 15 hours, whereby the defect layer was separated by electric field etching.

After the structure holding layer is formed, the mask is removed by acid cleaning, and a p ⁺ contact layer is epitaxially grown on the peeling surface side (side from which the mask of the structure holding layer is peeled) by the CVD method. p ⁺ In forming the contact layer, suppressing the crystal defects formed by distortion of the substrate, and in order to lower resistance, ^{p +} contact layer with a thickness of 100μm or more 1μm 5 × ¹⁰ 19 / cm ³ or more ^{10 22} A boron concentration of / cm ³ or less is preferable. Moreover, in order to prevent the wafer from cracking and a significant increase in defects, the curvature radius of the wafer is preferably 5 m or more and 500 m or less.

In the diamond electronic device of the present invention, the drift layer is epitaxially grown on the high-quality substrate, and then the contact layer is grown via the structure retaining layer. Therefore, the defect density of the drift layer can be greatly reduced. Further, in the present invention, a p ⁻ drift layer and a p ⁺ contact layer with few defects can be epitaxially grown on a high-quality substrate, and the thickness of the contact layer can be reduced below the film thickness limit where dislocation occurs. it can.

Example 1
A diamond electronic device according to Example 1 of the present invention will be described below with reference to FIGS. FIG. 1 is a diagram showing a laminated structure of diamond electronic elements of this example, and FIG. 2 is a diagram showing a manufacturing process. With reference to FIG. 2, the manufacturing process of the diamond electronic element of a present Example is demonstrated.

(Preparation process of substrate)
A high-quality single-crystal diamond substrate having a low surface defect whose surface was precisely polished (Ra <1 nm) by controlling the off angle and the off direction was prepared. In the off angle control of the substrate, the <001> vector has an off angle of 2.5 ° with respect to the normal vector of the surface in the <110> direction. The single crystal diamond substrate is a chemical vapor deposition (CVD) diamond by microwave of 12 mm size formed by a smart cut method, and has a dislocation density of about 5 × 10 ² / cm ² and an XRD (004) rocking curve. The half width is 10 arcsec or less.

(Defect introduction process)
As shown in FIG. 2A, a high quality single crystal diamond substrate 16 (001) was ion-implanted to form a layer (defect layer 17) having a modified crystal structure in the vicinity of the surface. Carbon was used as ions used for ion implantation.

(P ^- drift layer forming step)
As shown in FIG. 2A, the p ⁻ drift layer 12 was epitaxially grown on the substrate 16 by the CVD method. The drift layer was epitaxially grown in an environment of 120 Torr and 3900 W by CVD using 2.45 GHz microwave. At that time, the CH ₄ flow rate was 16 sccm with respect to the H ₂ flow rate of 384 sccm, and the total flow rate was 400 sccm. The synthesis time was 18 hours and the film thickness was 45 μm. The boron concentration in the film was about 1 × 10 ¹⁶ / cm ³ due to boron incorporation from the chamber environment. Further, in the evaluation of in-substrate mapping of CL method Band A light emission (light emission wavelength 420 nm due to dislocation light emission), the light emission region is about 7 × 10 ² / cm ² , and hardly increases. This shows that there is no dislocation or defect in the present invention.

(Structure retention layer forming process)
Mixed acid treatment (20 cc of nitric acid and 20 cc of sulfuric acid) was performed to remove non-diamond components and increase the resistance by oxygenation of the surface. Next, a mask was formed using a photolithography technique, and a diamond film to be the structure holding layer 11 was selectively formed by a CVD method (see FIG. 2B).

More specifically, SiO ₂ having a thickness of 0.8 μm was formed on the entire surface of the substrate by tetraethoxysilane (TEOS) / CVD. Further, the resist in the selective growth portion was opened by photolithography. As the resist, AZ5214E made by Clariant Co. having a thickness of 3 μm was used. The SiO ₂ in the opening portion of the resist was selectively etched using CF ₄ gas by ICP method (reactive ion etching using capacitively coupled plasma) to expose the diamond surface. As for the plasma conditions, a bias of 20 W is applied at a plasma output of 200 W, and a pressure of 2 Pa is obtained with 20 sccm of CF ₄ gas. The resist was removed by acetone treatment and O ₂ plasma ashing. The resist portion has a rounded structure of 250 μm and is arranged in a lattice pattern at a pitch of 750 μm. This region is a portion that finally becomes an opening of the structure holding material, and a portion that becomes an ohmic electrode region. Design according to the required device current.

Subsequently, diamond was selectively grown using SiO ₂ selectively formed by etching as a mask. The selective growth of diamond was performed using a microwave CVD method with a CH ₄ flow rate of 16 sccm with respect to an H ₂ flow rate of 384 sccm. Here, hydrogen to which N ₂ gas was added was used, and the added nitrogen was 100 ppm in N / C. The film thickness of the structure holding material was 30 μm, and the nitrogen concentration in the film was 2 × 10 ¹⁷ / cm ³ .

(Substrate separation process)
Subsequently, the selective growth mask and dust were removed by washing with HF and sulfuric acid / hydrogen peroxide, and the seed substrate 16 and element diamond (p ^- drift layer 12 and structure retaining layer) were separated by defect layers by the smart cut method (FIG. 2). (C)). Separation was performed in pure water, and a voltage of 5.6 kV was applied to the opposed platinum electrodes and left for 15 hours to separate the electrodes. The defect layer 17 was removed by performing an ICP etching process using Ar gas on the entire surface of the element diamond separation surface at a depth of 2 μm.

(P ⁺ contact layer forming step)
A p ⁺ contact layer is epitaxially grown on the structure holding layer of the device diamond by a microwave plasma CVD method (FIG. 2D). The H ₂ flow rate was 390 sccm, the CH ₄ flow rate was 4 sccm, TMB (1% hydrogen dilution) was 6 sccm, and the plasma output was 1500 W. Here, the p ⁺ contact layer had a thickness of 10 μm and a boron concentration of 2 × 10 ²⁰ / cm ³ .

(Oxygen termination process)
Subsequently, the element diamond substrate is subjected to mixed acid cleaning and oxygen termination, and non-diamond components adhering to the diamond surface during synthesis are removed.

(Electrode formation process)
FIG. 2E shows an electrode forming process. FIG. 2E is a diagram in which the top and bottom of FIG. A Ti / Pt / Au ohmic electrode 14 is formed on the p ⁺ contact layer 13 and annealed at 420 ° C. for 1 hour in an Ar atmosphere to reduce the contact resistance (see FIG. 2E). A Ru-Schottky electrode 15 having a round shape of 300 μm and a thickness of 100 nm was formed on the p ⁻ drift layer 12 side to obtain a Schottky barrier diode element (see FIG. 2E).

(Modification)
A modification of the diamond electronic element of Example 1 of the present invention will be described below with reference to FIG. In FIG. 1, in the structure holding layer 11 excluding the opening, a drift layer (p ^- drift layer 12) made of a diamond semiconductor, a structure holding layer 11 having a semi-insulating diamond layer, and a contact layer (p ⁺ contact made of a diamond semiconductor). A structure having a stacked structure in which the layers 13) are stacked in this order has been described. However, the contact layer and the anode electrode positioned other than the opening are not essential and can be appropriately arranged according to the electrode structure and the like. FIG. 3 shows a modification in which a contact layer (p ⁺ contact layer 13) and an anode electrode (ohmic electrode) 14 are provided only in the opening.

(Example 2)
The laminated structure of the diamond electronic element of Example 2 of the present invention will be described below with reference to FIG. The diamond electronic device of Example 2 includes an n ⁺ layer (also referred to as an n ⁺ diamond layer) 21 made of a diamond semiconductor, and a p ⁻ layer (also called a p ⁻ drift layer or a p ⁻ diamond layer) 22 made of a diamond semiconductor. The structure holding layer 11 and a p ⁺ layer (also referred to as p ⁺ contact layer, also called p ⁺ diamond layer) 23 made of a diamond semiconductor are sequentially stacked, and on the p ⁺ layer 23 in the opening of the structure holding layer, An anode (ohmic electrode) 24 is provided, and an ohmic metal 25 is provided on the n ⁺ layer 21 to form a cathode. The structure-retaining layer 11 uses the same film as in Example 1. The n ⁺ layer 21 preferably has a doping impurity concentration of 10 ¹⁷ / cm ³ or more from the viewpoint of reducing on-resistance and ohmic resistance. Further, in order to reduce the introduction of defects into the crystal due to strain, it is preferably 10 ²² / cm ³ or less. Moreover, in order to prevent the wafer from cracking and a significant increase in defects, the curvature radius of the wafer is preferably 5 m or more and 500 m or less. The p ⁻ drift layer 22 preferably has a boron concentration of 10 ¹⁵ / cm ³ or more and 10 ¹⁷ / cm ³ or less in order to maintain a high reverse breakdown voltage and to reduce the on-resistance as much as possible. The p ⁺ contact layer 23 preferably has a doping impurity concentration of 10 ¹⁷ / cm ³ or more in order to reduce on-resistance and ohmic resistance. Further, in order to reduce the introduction of defects into the crystal due to strain, it is 10 ²² / cm ³ or less, and the curvature radius of the wafer is 5 m or more and 500 m or less in order to prevent the wafer from cracking or a significant increase in defects. Is preferred. The anode (ohmic electrode) 24 is formed of Au (100 nm) / Pt (30 nm) / Ti (30 nm), and the cathode ohmic metal 25 is formed of Au (100 nm) / Pt (30 nm) / Ti (30 nm).

The laminated structure of Example 2 is manufactured by the same process as the process shown in Example 1. However, in addition to the step of forming the p ⁺ contact layer (p ⁺ contact layer 13) of Example 1, the n ⁺ diamond layer 21 is formed on the opposite side of the p ⁺ contact layer from the substrate.

  The element of Example 2 can be used as a power device for a rectifying diode semiconductor element.

In the above embodiment, the drift layer is a p ^- diamond layer, the contact layer is a p ⁺ diamond layer (Example 1), and the cathode is formed of a laminated structure of an ohmic metal and an n ⁺ diamond layer. Is an p ^- diamond layer and the contact layer is a p ⁺ diamond layer (Example 2). However, as another stacked structure, an impurity concentration of 10 is present at the interface between the p ^- drift layer and the n ⁺ diamond layer. ^A pin structure with an i layer of ¹² / cm ³ or less interposed therebetween can be obtained.

  In the present invention, the drift layer refers to a layer in which a depletion layer expands when a reverse voltage is applied and maintains a withstand voltage, and the contact layer refers to a forward voltage that does not expand even when a reverse voltage is applied due to a high impurity concentration. A layer that lowers the on-resistance due to high conduction when applied.

  The examples shown in the embodiment and the like are described for easy understanding of the invention, and are not limited to this embodiment.

  The diamond electronic device of the present invention can be used as a semiconductor device such as various diodes such as a Schottky diode, a pn junction diode, and a pin junction diode, a thyristor, and an FET.

DESCRIPTION OF SYMBOLS 11 Structure retention layer 12 p ^- drift layer 13 p ⁺ contact layer 14 Anode (ohmic) electrode 15 Cathode (Schottky) electrode 16 Substrate 17 Defect layer 21 n ⁺ Diamond layer 22 p ^- Drift layer 23 p ⁺ Contact layer 24 Anode ( Ohmic) electrode 25 Ohmic metal 31 Semi-insulating substrate 32, 42 p ⁺ contact layer 33, 43 p ^- drift layer 34, 44 Ohmic electrode 35, 45 Schottky electrode

Claims (13)

A diamond electronic device comprising a drift layer made of a diamond semiconductor, a structure holding material having a semi-insulating diamond layer, and a contact layer made of a diamond semiconductor,
The structure holding material has an opening and is laminated on one surface of the drift layer,
The diamond electronic device according to claim 1, wherein the contact layer is directly laminated on the drift layer in the opening.   The diamond electronic device according to claim 1, wherein an anode electrode is provided on the contact layer in the opening, and a cathode electrode is provided on the other surface of the drift layer.   3. The diamond electronic device according to claim 1, wherein the contact layer is also laminated on a structure holding material.   4. The diamond electronic device according to claim 1, wherein the contact layer and the anode electrode are also laminated on a structure holding material. The diamond electronic device according to any one of claims 1 to 4, wherein the drift layer is a p ^- diamond layer, and the contact layer is a p ⁺ diamond layer. The drift layer is a p ^- diamond layer having a boron concentration of 10 ¹⁵ / cm ³ or more and 10 ¹⁷ / cm ³ or less, and the contact layer is a p having a boron concentration of 10 ¹⁹ / cm ³ or more and 10 ²² / cm ³ or less. ^The diamond electronic device according to any one of claims 1 to 5, wherein the diamond electronic device is a diamond layer, and the radius of curvature of the electronic device is 5 m or more and 500 m or less. The cathode electrode is formed of a laminated structure of an ohmic metal and an n ⁺ diamond layer, the drift layer is a p ⁻ diamond layer, and the contact layer is a p ⁺ diamond layer. The diamond electronic device according to any one of the above.   8. The diamond electronic device according to claim 1, wherein the drift layer has a thickness of 1 μm to 50 μm, and the contact layer has a thickness of 1 μm to 100 μm.   9. The diamond electronic device according to claim 1, wherein the semi-insulating diamond layer is nitrogen-containing homoepitaxial single crystal diamond or nitrogen-containing polycrystalline diamond.   The diamond electronic device according to any one of claims 1 to 9, wherein the diamond electronic device is a Schottky diode, a pn junction diode, or a pin junction diode. It is a manufacturing method of the diamond electronic device according to claim 1,
Forming a drift layer on the substrate surface after forming a defect layer on one substrate surface of the single crystal diamond substrate; and
Forming a structure holding material having an opening by selectively growing the semi-insulating diamond layer on the drift layer;
Separating the single crystal diamond substrate and the drift layer with the defect layer, etching the defect layer and separating the drift layer; and
Forming the contact layer on the drift layer in the opening,
A method for manufacturing a diamond electronic device, comprising:   The method of manufacturing a diamond electronic device according to claim 11, further comprising a step of providing a cathode electrode on the drift layer and an anode electrode on a contact layer of the opening. 13. The single crystal diamond substrate according to claim 11 or 12, wherein the single crystal diamond substrate has a dislocation density of 0 / cm ² or more and 10 ³ / cm ² or less, and irregularities on the front and back surfaces are Ra <1 nm. A method of manufacturing a diamond electronic device.