JP4858325B2 - SiC epitaxial film forming apparatus and method of manufacturing SiC semiconductor device using this epitaxial film forming apparatus - Google Patents

Description

  The present invention relates to a SiC semiconductor epitaxial film forming apparatus and a method for manufacturing a SiC semiconductor device using the epitaxial film forming apparatus.

When a high voltage power device is manufactured using a semiconductor SiC substrate, there is a possibility that the on-resistance can be greatly reduced. An on-resistance that is less than 10 mΩcm ² is obtained by a MOSFET having a withstand voltage of 1 to 1.2 kV, which has a lower on-resistance than a Si IGBT having the same withstand voltage class. High voltage MOSFETs with silicon carbide as the main material are expected to be mass-produced and shipped from each company in the next one or two years. If cost reduction and performance improvement proceed in the future, it is possible that most silicon IGBTs will be replaced as inverter parts.

  As described above, the use of the SiC semiconductor substrate can significantly reduce the on-resistance because the SiC semiconductor crystal has a higher dielectric breakdown electric field than the Si semiconductor. This is because the resistance of the drift layer can be reduced by two orders of magnitude or more compared to the Si semiconductor.

  However, for the SiC semiconductor substrate, bulk growth technology for producing a high-quality single crystal sufficient for power device production so as to have a predetermined doping density has not yet been completed. Not standing. This is mainly because the SiC material does not have a liquid phase, so that it cannot be bulk produced by a pulling method such as Si, and nitrogen, which is the main component of the atmosphere, acts as a donor in the SiC semiconductor substrate. In addition, it is difficult to industrially produce a low-dope crystal for producing a power device with good reproducibility. Under such circumstances, for the time being, it is indispensable to use a SiC wafer substrate in which a low-doped layer is produced by epitaxial growth on a highly-doped single crystal SiC substrate as a wafer substrate for producing a SiC power device.

  For practical epitaxial growth of a SiC crystal, which is necessary for producing such a SiC wafer substrate, a high temperature of 1300 ° C. or higher is generally required. Although many polytypes (crystal polymorphic structures) exist in SiC crystals, a temperature of 1500 to 1600 ° C. is frequently used for epitaxial growth particularly in 4H—SiC having excellent physical properties for power devices.

  In the SiC wafer substrate, the re-diffusion of the dopant due to heat is so slow that it cannot be observed in this temperature range, so there is no concern that the dopant diffuses from the SiC substrate to the epitaxial growth layer. As an epitaxial growth method, a chemical vapor deposition method (CVD) is generally used. As the gas used at that time, a silane-based Si source gas and a hydrocarbon-based C source gas are generally used as source gases, and hydrogen is generally used as a carrier gas.

  In order to handle these high-risk gases at high temperatures, the epitaxial film-forming apparatus has a quartz furnace body (quartz tube) as shown in the cross-sectional view of the main part in FIG. 16 (cross-sectional view cut along the main axis). In many cases, a heat insulating material 2 is provided inside 1 and a susceptor 3 is installed therein. Since the susceptor 3 is exposed to a temperature of 1500 ° C. to 1600 ° C. which is the temperature of epitaxial growth as described above, the susceptor 3 is insulated so that the outer quartz furnace body (quartz tube) 1 is not softened and deformed. Between. The susceptor 3 is hollowed and the source gas and carrier gas pass through the interior. The portion through which this gas passes is called a reaction chamber (gas channel) 4. In FIG. 16, the SiC substrate 5 on which the SiC epitaxial growth layer is formed is placed directly on the susceptor 3, but more practically, as shown in the cross-sectional view of the main part of FIG. After being placed on the substrate loading / unloading jig 6, it is further placed on the susceptor 3. In FIGS. 16 and 17, gas enters from the left and exits to the right. Compared to the flow of a river, the side where gas enters is often called the upstream side, and the side where it exits is often called the downstream side. Typically, the furnace body (quartz tube) 1 is preferably formed in a cylindrical shape having a circular longitudinal section and a rectangular transverse section. The main axis of the cylindrical furnace body (quartz tube) is horizontal in the cross-sectional views of FIGS. As a method for heating the susceptor 3, an induction heating method is mainly used. The material of the susceptor 3 needs to have an appropriate electrical conductivity in order to enable the induction heating, and further needs to be a stable material even at a high temperature as described above. From such a demand, high-purity graphite is mainly used as a base material. However, even though the purity is high, it is extremely difficult to completely remove aluminum and boron which become acceptors and become sources of contamination in the SiC substrate, and therefore, an appropriate coating is often applied to the surface. However, there are few suitable coating materials, and it is usual to use ultra-high purity graphite or polycrystalline SiC with fewer impurities than a substrate made of high-purity graphite.

  In the epitaxial film forming apparatus, during SiC epitaxial growth, polycrystalline SiC is deposited on the inner surface of the susceptor 3 and on the substrate loading / unloading jig 6 where the SiC substrate 5 is not installed, regardless of the amount. If the deposited polycrystalline SiC is completely fixed to the susceptor 3 and the substrate loading / unloading jig 6, there is no problem, but in practice, it is formed at the time of the previous epitaxial growth especially when loading / unloading the SiC substrate. Then, a part of the deposited polycrystalline SiC peels and becomes dust. If the SiC dust generated in this way adheres to the SiC substrate 5 before the epitaxial growth, a surface defect occurs when the epitaxial growth is performed. There is a problem that an electronic device produced by incorporating such surface defects is a defective product that cannot exhibit a predetermined performance.

  Therefore, if even one of such surface defects or peeling fallen objects is included in the electronic device substrate, the device becomes a defective product. Therefore, in order to handle a large current in general, there is a strong tendency to become a large area substrate. Devices are more susceptible to adverse effects from SiC dust. For example, when the SiC dust density on the SiC substrate 5 before epitaxial growth is D and the device area is A, according to a simple model, the yield that does not cause defects due to these is expressed by the expression exp (−D × A). expressed. That is, it can be said that the yield decreases sharply as the SiC dust density increases and the device area increases.

On the other hand, in power devices, obtaining good ohmic contact between the metal electrode and the semiconductor is important for reducing heat loss. However, in a power SiC device, it is not easy from the viewpoint of production efficiency to form a good ohmic contact between a p-type semiconductor and a metal. The reason is that, for example, in order to form ohmic contact with the surface of p-type SiC, it is preferable to perform ion implantation at a high dose of aluminum after preferably heating the SiC wafer to a high temperature. Although it is generally done, its production efficiency is very bad. More specifically, in order to obtain good ohmic contact on the surface of the p-type SiC layer formed by the above-described ion implantation method, an aluminum density of 10 ²⁰ cm ⁻³ or more, preferably 10 ²¹ It is necessary to implant ions at a high dose so that the aluminum density is in the order of cm ⁻³ . For example, in order to perform ion implantation so that the aluminum density is 2 × 10 ²¹ cm ⁻³ from the surface to a depth of 0.4 μm, the dose amount reaches 8 × 10 ¹⁶ cm ⁻² . However, in an ion implantation apparatus that is generally used at present, if the high dose implantation as described above is performed using the maximum beam amount, it takes several tens of minutes per time. In addition, the ion implantation apparatus has a disadvantage that it is essentially only a single wafer process while being relatively expensive as a semiconductor process apparatus. Therefore, only one piece can be processed in one ion implantation, and even a few can be processed even if it is devised. Moreover, as in the case of SiC power device fabrication, from several tens of minutes to one ion implantation, depending on necessity. If it took more than an hour, it cannot be said that production efficiency is high.

  However, at the laboratory level, it is also known to increase device fabrication efficiency by co-doping during epitaxial growth using trimethylaluminum or triethylaluminum as a doping gas. However, there is a problem that the so-called simultaneous doping, in which dopings with different doses as described above are simultaneously performed, is repeated many times, resulting in a memory effect, which makes it difficult to control particularly low doping, and has not been put into practical use.

  Furthermore, in SiC devices, known donors and acceptors such as aluminum, nitrogen and the like do not practically diffuse in the temperature range below 1800 ° C., so that a thermal diffusion method as is performed in a Si semiconductor substrate or the like. Is also impractical and difficult.

  As a knowledge from the known technology, by forming a carbon film having high etching resistance on the surface of the susceptor made of carbon facing the SiC substrate, the epitaxial film is uniformly and stably formed on the SiC substrate. A CVD apparatus that can form a film is known (Patent Document 1).

  A vertical hot wall CVD epitaxial apparatus including a square tube type second susceptor whose inside is a SiC epitaxial growth chamber and a first susceptor covering the outside is known (Patent Document 2).

In a manufacturing method of growing a silicon carbide single crystal by placing a SiC substrate inclined at a small inclination angle from the (0001) plane at the center of a hollow susceptor coated with SiC, an inclination angle of 0.5 to 7. There is a description of a manufacturing method for growing a SiC crystal at 0 degree (Patent Document 3).
JP 2006-28625 A JP 2005-109408 A JP 2006-321696 A

  However, as described above, the reduction of the SiC dust density falling on the SiC substrate is not as simple as the reduction of the Si dust density in the same type of silicon (Si) epitaxial film forming apparatus. The reason is that SiC crystals are chemically very stable, and depending on the method of cleaning by immersing a susceptor or jig in chemicals such as silicon (Si), it is possible to selectively remove only SiC crystals. It is not possible. The SiC dust falls on the SiC substrate before epitaxial growth because the polycrystalline SiC is deposited inside the susceptor, especially in the vicinity of the upstream of the gas flow in the epitaxial growth of the previous production lot. This is because it is difficult to remove them properly.

  As a method for removing polycrystalline SiC deposited inside the susceptor, gas etching at high temperature is effective. However, in the reaction chamber (gas channel), the temperature is inevitably low near the outside of the susceptor. The speed is slow. However, as described above, a large amount of polycrystalline SiC is deposited in the vicinity of the upstream of the low temperature gas flow. If this portion of polycrystalline SiC is completely removed, the required portion of the SiC coating inside the susceptor will also be etched away, so depending on the gas etching method at a high temperature, the inside of the susceptor, particularly the gas flow, It is difficult to remove polycrystalline SiC deposited in the vicinity of the upstream.

  In addition, since epitaxial growth is normally repeated many times in an epitaxial film forming apparatus used industrially, SiC in which polycrystalline SiC attached inside the susceptor falls as SiC dust falling on the SiC substrate 5 in the previous epitaxial growth. There are SiC dust before epitaxial growth and SiC dust after SiC epitaxial growth. The SiC dust falling on the SiC substrate 5 in the step after the epitaxial growth is not as serious as the SiC dust before the SiC epitaxial growth, but actually becomes a problem. This is because the SiC crystal is chemically very stable, and thus a method of forming a chemical oxide film on the surface and removing it like the Si crystal cannot be used. Eventually, no method has been found to remove the polycrystalline SiC adhered reliably both before and after epitaxial growth. The first problem is to solve this problem.

  Furthermore, the formation of the above-described low-doped epitaxial layer necessary to ensure the breakdown voltage in the SiC power device and the formation of the highly-doped epitaxial layer necessary to ensure good ohmic contact between the metal electrode and the semiconductor. In order to achieve high production efficiency, a large number of expensive ion implantation apparatuses may be prepared. As an alternative, as described above, simultaneous doping at the time of epitaxial growth, that is, formation of the low-doped epitaxial growth layer is performed. If the highly doped epitaxial growth layer can be formed in the same epitaxial growth process as that formed, it is preferable that the highly doped epitaxial growth layer can be obtained without substantially increasing the process time.

This simultaneous doping will be specifically described. In the SiC power device, in order to obtain a high breakdown voltage, a low-doped thick film epitaxially grown layer is essentially essential. For example, in the case of a breakdown voltage of 1.2 kV class, a film thickness of about 10 μm is required with doping of about 1 × 10 ¹⁶ cm ⁻³ . On the other hand, in order to obtain a good ohmic contact with a p-type layer formed by epitaxial growth, the doping density is required to be in the middle of 10 ¹⁹ cm ⁻³ or more. The film thickness may be about 0.4 μm, for example, as in the case of ion implantation. Therefore, if the high-doped epitaxial growth layer can be formed in the same epitaxial growth process as that for which the low-doped epitaxial growth layer is formed, the process time is not substantially increased, and expensive ion implantation is performed. The highly doped epitaxial growth layer can be obtained with high production efficiency without preparing many devices.

  However, in practice, when such an epitaxially grown layer is manufactured industrially by repeating a number of times, as described above, the controllability of doping of the low doped layer is often significantly deteriorated. This is a phenomenon well known as the memory effect. Unless this memory effect is suppressed, an epitaxially grown layer having both a low-doped layer and a highly-doped layer cannot be efficiently and repeatedly manufactured in an industrial sense. Therefore, the second problem is to solve this memory effect problem.

  The present invention has been made in view of the above-described problems. In an apparatus for epitaxially growing a SiC layer on a single-crystal SiC substrate, SiC dust generated secondary in the apparatus falls on the SiC substrate. SUMMARY OF THE INVENTION It is a first object of the present invention to provide an epitaxial film forming apparatus that avoids this and a method of manufacturing an SiC semiconductor device using the epitaxial film forming apparatus. Furthermore, when layers having different doping densities are formed by simultaneous doping at the time of epitaxial growth, an epitaxial film forming apparatus capable of repeatedly performing epitaxial growth many times while suppressing the memory effect in the simultaneous doping, and a method of manufacturing an SiC semiconductor device using this epitaxial film forming apparatus Is a second object of the present invention.

  The invention according to claim 1 of the present invention has a predetermined length along the axial direction of the cylindrical tube in a heat-resistant cylindrical tube having a reaction gas inlet and a discharge port at an axial end and capable of being depressurized. The susceptor is disposed via a heat insulating material for protecting the cylindrical tube from softening due to high temperature, and a plurality of plate-like supports for placing the SiC crystal substrate in a reaction chamber space provided inside the susceptor An induction heating device for inductively heating the susceptor on the outside of the cylindrical tube, the substrates being installed in a form that can be carried in and out in parallel with each other at an interval in the vertical direction; and Among the plurality of plate-like support substrates, the upper support substrate is characterized by an epitaxial SiC film forming apparatus installed so as to protrude more from the end face of the susceptor or the heat insulating material to the upstream side of the gas flow. Ah .

  The invention according to claim 2 of the present invention is characterized by the epitaxial SiC film forming apparatus according to claim 1, wherein the heat-resistant cylindrical tube is a quartz tube.

  The invention according to claim 3 of the present invention is characterized by the epitaxial SiC film forming apparatus according to claim 1 or 2, wherein the plate-like support substrate is mainly composed of SiC crystal.

  According to a fourth aspect of the present invention, the flat support substrate is installed in a groove formed in a direction parallel to the axis of the cylindrical tube on the reaction chamber side wall inside the susceptor so as to be able to be carried in and out. The epitaxial SiC film forming apparatus according to any one of claims 1 to 3 is characterized.

  The invention according to claim 5 of the present invention is formed in a direction parallel to the axis of the cylindrical tube on a side wall base material mainly composed of a SiC crystal provided adjacent to a reaction chamber side wall inside the susceptor. The epitaxial SiC film forming apparatus according to any one of claims 1 to 3, wherein the flat support substrate is installed in a groove to be carried in and out.

  The invention according to claim 6 of the claim is the epitaxial SiC film forming apparatus according to any one of claims 1 to 5, wherein the number of the plurality of flat plate-like support substrates is three or more. Features.

  The invention according to claim 7 of the present invention uses the epitaxial SiC film forming apparatus according to any one of claims 1 to 6 to perform the plurality of plate-like support substrates from the film forming apparatus after epitaxial growth. The SiC semiconductor device is manufactured by removing the SiC substrate and then removing the SiC adhering to the flat support substrate by etching.

  The invention according to claim 8 of the claims uses the epitaxial SiC film forming apparatus according to any one of claims 1 to 6, wherein the plurality of flat support substrates are Before epitaxial growth, an SiC semiconductor including an epitaxial growth step including a process of carrying in the reaction chamber of the susceptor in order from a spatially upper flat support substrate, and carrying out from the spatially lower flat support substrate after epitaxial growth. Features a method of manufacturing the device.

  According to the present invention, in an apparatus for epitaxially growing a SiC layer on a single crystal SiC substrate, it is possible to avoid the SiC dust that is generated in the apparatus from falling on the SiC substrate, and to have different doping densities. When a layer is formed by a co-doping method during epitaxial growth, an epitaxial film-forming apparatus capable of repeatedly performing epitaxial growth a large number of times while suppressing the memory effect in co-doping, and a method of manufacturing an SiC semiconductor device using this apparatus can be provided.

  Hereinafter, an epitaxial film forming apparatus according to the present invention and a method of manufacturing an SiC semiconductor device using the apparatus will be described in detail with reference to the drawings. The present invention is not limited to the description of the examples described below unless it exceeds the gist.

FIG. 13 is a sectional view showing a layer structure of a semiconductor substrate having an epitaxial growth layer. FIG. 14 is a cross-sectional view of a principal part of a pn diode using a SiC substrate. FIG. 15 is a current-voltage characteristic diagram of a pn diode using a SiC substrate. 1 to 3, 8, and 9 are cross-sectional views of different principal parts of the SiC epitaxial film forming apparatus according to the present invention. FIGS. 4 to 7 and FIGS. 10 and 11 are longitudinal sectional views of different main parts of the SiC epitaxial film forming apparatus according to the present invention. FIG. 12 is a cross-sectional view of the main part of the trench MOSFET according to the present invention.
(Examples concerning the suppression of SiC dust)
In the present invention, first, polycrystalline SiC deposited on a support substrate on which a SiC substrate is placed and polycrystalline SiC deposited on the ceiling of a reaction chamber (gas channel) by epitaxial growth are etched each time after the epitaxial growth process is completed. It was made based on the finding that the generation of SiC dust can be greatly suppressed if it can be removed. This point will be specifically described below.

  The support substrate and the ceiling of the reaction chamber (gas channel) can be removed from the susceptor and etched separately, and the removable flat support substrate (hereinafter abbreviated as a plate) is provided as a susceptor. By extending to the upstream side of the gas flow rather than a place where the heat insulating material or other raw material gas reacts, the generation of dust can be greatly suppressed.

  According to the present invention, a large number of SiC polycrystals that cause SiC dust are deposited on the plate. By removing the plate after the end of the epitaxial growth, the next time in the epitaxial growth, There is almost no SiC polycrystal and generation | occurrence | production of SiC dust can be suppressed significantly. In addition, since it can etch separately if it is only the said plate, after taking out the epitaxially grown SiC substrate, after etching so that dust may not come out, it can be reused for epitaxial growth.

  The plate may be etched in the epitaxial film forming apparatus, but may be in another epitaxial film forming apparatus. In the case of etching with another apparatus, a structure capable of processing a large number of plates at a time can be selected, and during that time, another plate can be used to perform epitaxial growth with an epitaxial film forming apparatus. Will improve.

  In order to etch the plate, it is necessary that the material is composed mainly of SiC crystal (etched with the plate) or at least capable of withstanding the process when etching polycrystalline SiC. . At the same time, this material must not cause unnecessary impurities during the epitaxial growth of SiC crystals. In reality, such materials are extremely limited. For example, high purity graphite may be able to withstand the process of etching polycrystalline SiC, but is not preferred because it can cause impurities such as aluminum, boron, titanium, etc. during epitaxial growth. From this point of view, the material of the plate is preferably a material mainly composed of SiC crystal.

  When the material of the plate is SiC crystal as a main component, the etching of polycrystalline SiC is, for example, in a mixed gas of hydrogen and hydrogen chloride of 80 to 760 Torr (1 Torr = 133.32 Pa) at about 1300 to 1700 ° C. It can be performed simply. It is not necessary to etch all the polycrystalline SiC deposited in the epitaxial growth. It is only necessary to remove the physically unstable part that produces SiC dust. Such a portion is generally etched more quickly because there are many hollow portions and the surface area is larger than the other portions. Therefore, the SiC crystal of the base material does not have to be etched much. In the middle of etching, such unstable parts are completely etched around so that dust may be generated. Therefore, during etching, the plate is vertical (plane is almost vertical). You should do it. In place of the mixed gas of hydrogen and hydrogen chloride, etching can be performed using a strong oxidizing gas such as chlorine trifluoride. In this case, a high temperature of 1300 ° C. or higher is not necessary.

  Thus, at first glance, it seems that a state without any SiC dust is obtained before epitaxial growth. However, in practice, dust is still produced for the following reason, although it is reduced. The problem lies in how to hold the plate in a hot susceptor. For example, a simple method of cutting a groove in a direction parallel to the axis on the side wall of the susceptor and taking the plate in and out along the groove is most preferable.

  In this method, the side wall of the susceptor is exposed, but if the width of the susceptor is sufficiently larger than the width of the SiC substrate, the influence of the side wall is minimized. As a more reliable method, for example, adjacent to the susceptor side wall, a new wall base material mainly composed of SiC crystal is provided in the same manner as the plate, and a groove parallel to the cylindrical axis is cut in this wall equipment, It is also preferable to put the plate in and out along this groove.

  However, the latter method requires caution because the SiC crystal may be sublimated and bonded together depending on the heat distribution between the plate and the wall substrate. In this case, it is necessary to devise such as coating with a substance that is not directly bonded to the SiC crystal.

  Among the methods described above, in particular, in the former method, a slight amount of SiC dust is generated at the groove when the plate is put in and out. In the latter case, if the wall base material is etched in the same manner as the plate and then assembled into the susceptor after assembling the whole, the SiC dust seems to be further reduced. It is not easy to carry in If the amount of fitting of the plate to the groove of the wall base material is small, the whole will be wobbled. Conversely, if the amount of fitting is too large, SiC dust will be generated again from the contact portion between the wall base material and the plate when taking out. It is. From the above viewpoint, when loading the plate, it is preferable that the plate should be loaded in order from the spatially upper side. In this way, even if SiC dust is generated at the time of loading the plate, there is no fear that the dust will fall on the SiC substrate because the SiC substrate to be epitaxially grown is not yet installed at the tip of the dust. When the wall base material is used, it is preferable that the wall base material is installed prior to the plate.

  Even when the plate is taken out, there is a concern that SiC dust falls on the epitaxially grown SiC substrate. In order to avoid this, at the time of taking out the plate, it suffices to take out the plate in order from the spatially lower side.

  A particularly large amount of polycrystalline SiC is deposited on the upstream side of the gas flow in the plate. Since this part produces especially a large amount of SiC dust, when taking out the plate, there is a high possibility that SiC dust will fall from the plate located above. For this reason, of course, the plate should be taken in and out from the downstream side of the gas flow, but at the same time, the plate is moved from the susceptor sequentially from the spatially upper plate to the lower plate. The amount of extension of the gas flow to the upstream side should be reduced. By doing so, the amount of SiC dust falling from the upper plate can be reduced on the lower plate.

  Note that it is not always necessary to change the length of the plate. The upper plate may simply be shifted to the upstream side of the gas flow.

  As described above, according to the epitaxial film forming apparatus as described above, since SiC dust adhering to the SiC substrate surface before epitaxial growth can be greatly reduced, crystal defects preferable for application to power devices that require a large area It is possible to obtain an epitaxially grown layer that does not have. The present invention can greatly increase the number of SiC substrates that can be processed at one time by the following modifications.

  In the present invention, the number of the plates installed on the susceptor may be more than two. If three or more are installed, the SiC substrate can be installed on two plates other than the plate installed on the top. Similarly, when n plates are installed, the SiC substrate can be installed on n−1 plates other than the plate installed at the top. That is, (n-1) times as many SiC substrates can be processed at a time as compared with the case of installing two plates. The following examples are merely examples, and embodiments are not limited to the following examples.

(Comparative Example 1)
Prior to the example, the results when the substrate loading / unloading jig 6 is made of high-purity polycrystalline SiC in the conventional cylindrical epitaxial film forming apparatus shown in the cross-sectional view of the main part in FIG. 17 will be described. The susceptor 3 is a high-purity graphite substrate coated with high-purity SiC, the heat insulating material 2 is made of high-purity porous graphite, and the furnace body 1 is made of transparent quartz.

Using commercially available 4H-SiC (0001) _Si face and (000-1) _C face 8-degree off-SiC substrate, RCA cleaning (described later) is performed, and then placed on substrate loading / unloading jig 6 and loaded into susceptor 3. did. The susceptor 3 on which the substrate loading / unloading jig 6 was placed was loaded into the heat insulating material 2 and then loaded into the furnace body (quartz tube) 1. Only one wafer having a diameter of 2 to 3 inches can be placed on the substrate loading / unloading jig 6 (RCA cleaning is a well-known cleaning method, which is a mixture of ammonium hydroxide, hydrogen peroxide and deionized water. Treatment of the surface with a first bath of a solution containing a liquid and a second bath of a solution containing a mixture of hydrochloric acid, hydrogen peroxide and deionized water, the first bath mainly consisting of the wafer. A process for removing the separated particles on the surface, and the second bath is a process for removing metal contamination).

Epitaxial growth is performed using H ₂ as a carrier gas and SiH ₄ and C ₃ H ₈ as source gases. N ₂ and trimethylaluminum (TMA) were used as n-type and p-type doping gases, respectively. These gases are exemplary and are not necessarily limited to these.

FIG. 13 is a cross-sectional view showing the layer structure of a typical SiC semiconductor substrate that undergoes epitaxial growth in the comparative example described above and the examples that follow. As the SiC substrate, commercially available n-type 4H—SiC (0001) _Si face and (000-1) _C face of 8 ° off face were used. On the SiC substrate 51, an n-type layer having a donor density of about 3 × 10 ¹⁷ cm ⁻³ (hereinafter referred to as a drift layer 53 following the power device) and a p-type having an acceptor density of about 2 × 10 ¹⁸ cm ⁻³ . Layers (hereinafter referred to as body layer 55a following the power device) are successively formed in a thickness of about 1 μm. Since these film forming conditions are already general, details are omitted.

  The theoretical breakdown voltage according to the one-dimensional model of the pn junction composed of the drift layer 53 and the body layer 55a shown in FIG. 13 is about 160V. According to the one-dimensional model, the extension of the depletion layer to the drift layer 53 and the body layer 55a at the theoretical breakdown voltage is 0.5 μm and 0.1 μm, respectively, so that the depletion layer is completely the drift layer 53 and the body layer 55a. It is in. A pn diode shown in the cross-sectional view of the main part in FIG. 14 was fabricated on this epitaxially grown wafer.

This pn diode has a mesa structure (mesa means trapezoid) by etching the drift layer 53 and the body layer 55a, which are the epitaxially grown layers in FIG. At this time, the angle formed between the mesa side wall surface and the upper surface of the epitaxial growth layer is not so important. The drift layer 53 is etched to a depth of at least 2 μm through the body layer 55a, and the end portion of the pn junction exposed by this etching. By protecting the surface with a protective insulating film 75 such as a SiO ₂ film, local electric field concentration inside the body layer 55a and the drift layer 53 is avoided, and the theoretical breakdown voltage based on the one-dimensional model can be realized.

  The anode electrode 72a is in contact with the upper surface of the body region 55a. Since the doping concentration of the body layer 55a is low, good ohmic contact with the anode electrode 72a cannot be obtained. However, in measuring the reverse characteristics of the pn diode, even if the anode electrode 72a and the body layer 55a form a Schottky contact, the Schottky contact becomes a forward bias, so the influence on the reverse characteristics is not affected. Virtually negligible.

A protective insulating film 75 is provided on the mesa upper surface (the upper surface of the body region 55a) other than the anode electrode 72a and the mesa side wall surface. The cathode electrode 71 a is in contact with the back surface of the SiC substrate 51. For later observation with an emission microscope, the cathode electrode 71a was not formed on the back surface portion facing the anode electrode 72a. However, when a practical device was manufactured, the cathode electrode 71a was formed on the entire surface. Also good. Although it is desirable that the cathode electrode 71a and the SiC substrate 51 form an ohmic contact, in measuring the reverse characteristics of the pn diode, even if the cathode electrode 71a and the SiC substrate 51 form a Schottky contact, Since this Schottky contact becomes a forward bias, the influence on the reverse characteristics can be substantially ignored. Hereinafter, a method for manufacturing this pn diode will be specifically shown in order.
(Epitaxial growth)
A drift layer 53 and a body layer 55a are formed in this order on the SiC substrate 51 having a high-concentration n-type 4H—SiC (0001) _Si surface and a (000-1) _C surface as main surfaces by epitaxial growth. Next, after the epitaxial growth, without removing the wafer from the film forming apparatus, SiH ₄ and N ₂ O gas are allowed to flow at a temperature of 850 to 950 ° C., and protection is made of so-called HTO (high temperature CVD-SiO ₂ film, the same applies hereinafter). A film is deposited. After removing the wafer from the CVD apparatus, the back surface of the wafer is polished with diamond slurry to obtain a mirror surface. This step is necessary for later observation with an emission microscope. Thereafter, SiC dust adhering to the wafer removal and back surface polishing is removed by plasma etching. Next, HTO is removed with diluted hydrofluoric acid to obtain an epitaxially grown wafer.

When the wafer surface was observed with an optical microscope after the epitaxial growth, several types of surface defects each having a characteristic surface morphology were observed. In particular, a large number of pit-like surface defects (hereinafter simply referred to as pit defects) that can be seen only by a point with an optical microscope, were about 100 / cm ² . In addition, a small number of surface defects (referred to as fallen object defects) attributed to relatively large SiC dusts falling on the SiC substrate before epitaxial growth were also observed. As the number of epitaxial growths increased, these surface defects tended to increase gradually.

  When a pit defect is cut out by FIB (Focused Ion Beam) which is a semiconductor analysis inspection apparatus and observed with a TEM (transmission electron microscope), the crystal orientation of the SiC substrate is different in the vicinity of the interface between the SiC substrate 51 and the epitaxial growth layer 53. It was confirmed that there was a region of SiC crystal and crystal dislocations were concentrated from the periphery to the surface. Even if it analyzed by EDX (energy dispersive X-ray analysis), it was not detected other than Si and C, and thus SiC having different crystal orientations is SiC fine dust that has dropped on the SiC substrate before epitaxial growth. it is conceivable that. Therefore, the pit defect is caused by SiC dust falling on the SiC substrate before the epitaxial growth like the falling object defect, and it is considered that the pit defect simply becomes a pit defect or a falling object defect due to a difference in size.

A small number of so-called carrot defects and triangular defects were also confirmed. These surface defects are also considered to be fine SiC dust that has fallen on the SiC substrate before epitaxial growth in the vicinity of the interface between the SiC substrate and the epitaxial growth layer, as in the case of pit defects.
(Mesa formation)
A SiO ₂ film is deposited on the wafer (either by plasma CVD or thermal CVD. The same applies unless otherwise specified), and this SiO ₂ film is patterned by a method similar to the Si process, followed by patterning. Using the SiO ₂ film as a mask, the SiC substrate is anisotropically etched to a predetermined depth by reactive ion etching (RIE). In this case, the etching depth is about 3 μm in total for all of the body layer 55a and a part of the drift layer 53, and is not so difficult.

After the epitaxial growth, the HTO protective film formed in this film forming apparatus may be diverted as the SiO ₂ film mask. However, in this case, appropriate uniformity is required. In the examples and the following examples, the HTO protective film was removed once, and then the SiO ₂ film was deposited again using an apparatus with good uniformity.
(Protective insulation film formation / electrode formation)
Next, the wafer is thermally oxidized in a wet atmosphere at 1200 ° C. for a predetermined time (depending on the plane orientation) to form a protective insulating film 75 having a thickness of 40 to 80 nm on the mesa side wall surface. Thereafter, a contact hole is formed in a portion of the protective insulating film 75 on the mesa by a method similar to the Si process. Subsequently, after Ni is sputter-deposited on the entire surface, this is patterned in the same manner as Al in the Si process to form an anode electrode 72a.

Next, the front surface is protected with a photoresist, and the wafer is immersed in buffered hydrofluoric acid to remove the oxide film on the back surface. Thereafter, after Ni is sputter-deposited on the entire back surface, a photoresist pattern is formed with a double-sided aligner so that a hole is opened only directly under the mesa, and Ni in the opening is removed by wet etching to form a cathode electrode 71a. Subsequently, after removing the photoresist on the front and back surfaces, heat treatment is performed in an Ar atmosphere at 1000 ° C. Since the doping density of the body layer 55a is low, good ohmic contact with the anode electrode 72a cannot be obtained, but it is possible to prevent Ni from peeling off during the electrical property measurement. Thus, a pn diode is completed.
(Electrical characteristics evaluation)
A pn diode is attached to a perforated copper plate with a silver paste, a reverse voltage is applied between the anode electrode 72a and the copper plate, and the leakage current is measured. At this time, light emission caused by leakage current is observed from the back surface of the pn diode with an emission microscope. In order to observe light emission, at least a portion immediately below the mesa of the copper plate must be perforated.

  A typical reverse current-voltage characteristic of the measured pn diode is shown in FIG. The reverse characteristics were roughly classified into three types mainly depending on the degree of increase in reverse leakage current.

  The first type (characteristic curve 93 in FIG. 15) is a large reverse leakage current (hereinafter referred to as a large leak). Here, the large reverse leakage current is such that the electric field at the pn junction according to the one-dimensional model is 25% of the dielectric breakdown electric field (applied voltage is about 10 V) and the leakage current is 10 nA or more. When observed with an emission microscope, the emission point was confirmed. When the vicinity of the light emission point was observed with an optical microscope, the location of the light emission point coincided with the location of the fallen object defect. That is, it has been found that if there is a fallen object defect, a large leak occurs. If the protective film is not deposited in the film forming apparatus after the epitaxial growth, process defects are caused due to the SiC dust falling on the wafer after the epitaxial growth, resulting in a large leak as well.

  The second type (characteristic curve 92 in FIG. 15) is a moderate reverse leakage current (hereinafter referred to as a medium leakage). Here, “medium” means that the leakage current is 10 nA or less when the electric field of the pn junction according to the one-dimensional model is 25% of the dielectric breakdown electric field (applied voltage is approximately 10 V), but 75% (applied voltage is approximately 91 V). Then, the leakage current is 10 nA or more. When observed with an emission microscope, the emission point was confirmed. When the vicinity of the light emitting point was observed with an optical microscope, a pit defect or a carrot defect was observed at the location of the majority of the light emitting points. As described above, since these surface defects are considered to be caused by SiC dust falling on the SiC substrate wafer before epitaxial growth, the cause of the middle leak is SiC dust falling on the SiC substrate wafer before epitaxial growth. Will be considered.

  The third type (characteristic curve 91 in FIG. 15) has a small reverse leakage current. Here, the low reverse leakage current means that the electric field of the pn junction according to the one-dimensional model is 75% of the breakdown electric field (reverse voltage is about 91 V) and the leakage current is 10 nA or less. In the majority of pn diodes in this group, an avalanche breakdown current flows in the vicinity of 160 V, which is a theoretical breakdown voltage according to a one-dimensional model of a pn junction including the drift layer 53 and the body layer 55a. When observed with an emission microscope, a plurality of light emission bands extending in the off direction of the SiC substrate were observed in the device from around the reverse voltage of 150V. The reason for not emitting light uniformly is not clear, but it is considered that avalanche is generated in this light emission band.

Note that the pn diodes fabricated in this comparative example and the following examples have a high dielectric breakdown electric field of about 4 MV / cm because the doping of the drift layer 53 is as high as 10 ¹⁷ cm ⁻³ . In a device having a practical withstand voltage of 1 kV or more, the drift layer is doped in the lower half of 10 ¹⁶ cm ⁻³ , and the dielectric breakdown electric field in the doping is 3 MV / cm or less. Even if the leakage current increases at a reverse voltage of 91 V or more in FIG.

  From the above, in this comparative example and the following examples, the breakdown voltage yield is represented by a yield that does not show a large leak or a medium leak in a 1 mm square pn diode (referred to as a typical breakdown voltage yield). . In this comparative example, the typical breakdown voltage yield was about 40%.

  In the embodiments described below, a pn diode is manufactured as a device. However, the epitaxial growth layer manufactured by the epitaxial film forming apparatus which is the gist of the present invention is not only a pn diode but also a Schottky diode, a field effect transistor, or the like. It can be preferably used for various electronic devices, particularly power devices.

  FIG. 2 and FIG. 4 show the principal cross-sectional views of the epitaxial film forming apparatus according to the first embodiment. FIG. 2 is a cross-sectional view of the main part taken along a plane including the gas flow direction. A heat insulating material 2 is provided inside a quartz furnace body (quartz tube) 1 and a susceptor 3 is installed therein. The interior of the susceptor 3 is hollowed out, and an upper plate 11 is installed near the upper surface and a lower plate 13 is installed near the lower surface, and the space between them is a reaction chamber (gas channel) 4. The SiC substrate 5 is installed on the lower plate 13. The upstream end of the lower plate 13 extends to the upstream side of the upstream end surface of the susceptor 3 and the heat insulating material 2, and the upstream end surface of the upper plate 11 is from the upstream end surface of the lower plate 13. Is further extended to the upstream side.

  In FIG. 2, the lengths of the upper plate 11 and the lower plate 13 are drawn differently. However, as shown in FIG. 3, they are the same length and the upper plate 11 is shifted upstream from the lower plate 13. May be arranged. 2 and 3, the object of preventing the SiC dust from falling on the SiC substrate 5 before the epitaxial growth is achieved. 2 and 3, only one SiC substrate 5 is drawn, but it does not exclude that a plurality of SiC substrates are juxtaposed on one lower plate 13.

  FIG. 4 is a longitudinal sectional view of an essential part taken along a plane perpendicular to the gas flow (or the axis of the cylindrical tube). The upper plate 11 and the lower plate 13 are inserted and carried so as to fit together along a groove 7-1 provided on the side wall of the susceptor 3. The groove 7-1 shown in FIG. 4 has a groove width in the height direction drawn almost the same as the thickness of the plate. However, like the groove 7-2 in FIG. 5, the groove 7-1 is sufficiently thicker than the plate thickness. And / or may have a wide groove width. In particular, in the case where the loading and unloading of the plate is carried by a machine, it is better to provide a sufficient clearance as shown in FIG. In FIGS. 4 and 5, the space (reaction chamber) in which the susceptor 3 is cut out is vertically long for the convenience of drawing, but it may actually be square or horizontally long.

  The epitaxial film forming apparatus is preferably operated as follows. That is, when the SiC substrate 5 is carried into the apparatus, first, the heat insulating material 2 and the susceptor 3 are first installed in the furnace body (quartz tube) 1, and then the upper plate 11 is placed in the upper groove of the susceptor 3. Insert and push in. Thereafter, the lower plate 13 on which the SiC substrate 5 is placed is similarly inserted into the lower groove and pushed in. According to this procedure, even if SiC dust is generated when the upper plate 11 is pushed in, it does not fall on the SiC substrate 5.

  In taking out the SiC substrate 5, first, the lower plate 13 is taken out, and the SiC substrate 5 is removed from the lower plate 13. Next, the upper plate 11 is taken out, and is etched together with the lower plate 13 (not necessarily at the same time) on the surfaces of the upper plate 11 and the lower plate 13 (collectively simply referred to as plates) that cause SiC dust. The polycrystal SiC adhering gently is removed.

  As an etching method at this time, for example, the etching is performed in a mixed gas of hydrogen and hydrogen chloride of 80 to 760 Torr (1 Torr = 133.32 Pa) at about 1300 to 1700 ° C., or like chlorine trifluoride at several hundred ° C. There are methods such as performing in a strong oxidizing gas. As an apparatus for performing this etching, the epitaxial film forming apparatus may be used, but another apparatus may be used. When etching with other equipment, it is possible to select a structure that can process a large number of plates at the same time, and during that time, another plate can be used for epitaxial growth, improving the epitaxial growth throughput. ,preferable.

  In order to etch the plate, it is necessary that the material is composed mainly of SiC crystal (etched together with the plate) or can withstand the process of etching polycrystalline SiC. At the same time, this material must not introduce unnecessary impurities during the epitaxial growth of SiC. In reality, such materials are extremely limited. For example, high purity graphite may be able to withstand the process of etching polycrystalline SiC, but introduces impurities such as aluminum, boron, titanium, etc. during epitaxial growth. From this point of view, the material of the plate is preferably a material mainly composed of SiC crystal.

  With the epitaxial film forming apparatus according to the present invention and the manufacturing method using the apparatus, the epitaxial growth layers 53 and 55a shown in FIG. 13 are formed, and the pn diode is manufactured as in the comparative example. About 80%. Since the yield of the pn diode in the case of the comparative example described above was 40%, it can be seen that the yield was greatly improved. The reason for this is thought to be that since SiC dust was prevented from falling on the SiC substrate before epitaxial growth, surface defects that caused large leaks or medium leaks were reduced. The reason why the pressure-resistant yield did not become close to 100% is considered to be that SiC dust was generated slightly by rubbing against the susceptor 3 when the lower plate 13 was installed.

  As described above, according to Example 1, SiC dust can be prevented from falling on the SiC substrate before epitaxial growth, and an epitaxial growth layer suitable for manufacturing a large area power device can be provided.

  The epitaxial film forming apparatus according to Example 2 is shown in the longitudinal sectional view of the main part in FIG. Constituent elements similar to those in FIGS. 2 and 4 that are the film forming apparatus of Example 1 are assigned the same reference numerals, and redundant descriptions are omitted.

  6 is a cross-sectional view cut along a cross section perpendicular to the gas flow direction (axial direction of the cylindrical tube). Grooves 8-1 are provided on the upper surface and the lower surface of the susceptor 3, and the wall base material 10 is disposed inside the susceptor 3 near both side walls along the grooves. The upper plate 11 and the lower plate 13 are fitted along a groove 9-1 provided in the wall base material 10.

  It is desirable that the groove 9-1 provided in the wall base material 10 has a certain degree of clearance with respect to the plates 11 and 13 in the same manner as the groove 7-2 provided in the susceptor 3 of FIG. The reaction chamber (gas channel) 4 is a space sandwiched between the upper plate 11, the lower plate 13 and the wall substrate 10. As shown in FIG. 7, the wall base material 10 is one in which both walls are integrated, and the susceptor 3 is placed on the susceptor 3 as it is without providing the groove 8-1. There may be. 6 and 7, the object of preventing the SiC dust from falling on the SiC substrate 5 before the epitaxial growth is achieved. In FIGS. 6 and 7, for the sake of drawing, the gap formed by hollowing out the susceptor 3 is vertically long, but may actually be square or horizontally long.

  The epitaxial film forming apparatus is preferably operated as follows. That is, when installing the SiC substrate 5, first, the heat insulating material 2 and the susceptor 3 are first installed in the furnace body 1, then the wall base material 10 is installed, and then the upper plate 11 is installed. . Thereafter, the lower plate 13 on which the SiC substrate 5 is placed is installed. This procedure is preferable because even if SiC dust is generated when the wall base material 10 and the upper plate 11 are installed, they do not fall on the SiC substrate 5.

  In taking out the SiC substrate 5, first, the lower plate 13 is taken out, and the SiC substrate 5 is removed from the lower plate 13. Next, the upper plate 11 and the wall base material 10 are taken out and etched together with the lower plate 13 (not necessarily at the same time) as described above to cause SiC dust, the wall base material 10, the upper plate 11 and The polycrystalline SiC gently adhering to the lower plate 13 is removed. As for the material of the wall base material 10, it is desirable that the main component is a SiC crystal as in the case of the upper plate 11 and the lower plate 13.

  When the epitaxial growth layer of FIG. 13 was formed by the epitaxial film forming apparatus and the manufacturing method using this apparatus, and a pn diode was manufactured in the same manner as in Example 1, the typical breakdown voltage yield was about 90%. . The reason why the yield is slightly improved compared to 80% of the first embodiment is that, when the lower plate 13 is installed, it is the wall substrate 10 that rubs against the susceptor 3, so that the polycrystalline SiC is appropriately etched. This is probably because SiC dust is hardly generated.

  However, in this apparatus, when the growth temperature is high, depending on the heat distribution, the wall base material 10 and the upper plate 11 or the lower plate 13 may adhere to each other at a high temperature. Need to design. As described above, according to Example 2, it is possible to prevent SiC dust from falling on the SiC substrate before epitaxial growth, and it is possible to provide an epitaxial growth layer suitable for manufacturing a large area power device. In particular, there is an advantage that generation of SiC dust is further suppressed as compared with the first embodiment.

  FIGS. 8 and 10 are cross-sectional views of a main part of the epitaxial film forming apparatus according to Example 3. FIG.

  FIG. 8 is a cross-sectional view of the main part taken along a plane including the gas flow direction (axial direction of the cylindrical tube). A heat insulating material 2 is provided inside a quartz furnace body 1, and a susceptor 3 is installed therein. The inside of the susceptor 3 is hollowed, an upper plate 11 is installed near the upper surface, a lower plate 13 is installed near the lower surface, and one or more intermediate plates 12 are installed between the upper and lower plates (see FIG. 8). (Only one intermediate plate is shown between the upper and lower plates 11, 13). A space between the plates becomes a reaction chamber (gas channel) 4. The SiC substrate 5 is installed on the intermediate plate 12 and the lower plate 13.

  The upstream end surface of the lower plate 13 is extended to the upstream side of the upstream end surface of the susceptor 3 and the heat insulating material 2, and the upstream end surfaces of the upper plate 11 and the intermediate plate 12 are spaced from each plate. Therefore, the plate extends further to the upstream side than the upstream end of the lower plate.

  In FIG. 8, the horizontal lengths of the upper plate 11, the intermediate plate 12 and the lower plate 13 are drawn differently. However, as shown in the cross-sectional view of the main part of FIG. In other words, the plate located above may be shifted to the upstream side. 8 and 9, the object of preventing SiC dust from falling on the SiC substrate 5 before epitaxial growth is achieved. In FIGS. 8 and 9, one SiC substrate 5 is drawn on each of the intermediate plate 12 and the lower plate 13, but a plurality of SiC substrates may be arranged on each plate, It is not excluded to dispose different numbers of SiC substrates.

  FIG. 10 shows a longitudinal sectional view of the main part taken along a cross section perpendicular to the gas flow (axial direction of the cylindrical tube). Grooves 8-1 are provided on the upper surface and the lower surface of the susceptor 3, and the wall base material 10 is fitted along the grooves 8-1, and is disposed on the inner side near both side walls of the susceptor 3. The upper plate 11, the intermediate plate 12, and the lower plate 13 are installed along the groove 9-1 provided in the wall base material 10.

  It is desirable that the groove 9-1 provided in the wall base material 10 has a certain degree of clearance with respect to the plate as in the second embodiment. The reaction chamber (gas channel) 4 is a space sandwiched between two adjacent plates and the wall substrate 10.

  As in the second embodiment, the wall base material 10 shown in the longitudinal sectional view of FIG. 11 is one in which both walls are integrated, and the susceptor 3 is installed as it is without providing a groove or the like. There may be. 10 and 11, the object of preventing the SiC dust from falling on the SiC substrate 5 before the epitaxial growth is achieved.

  Further, in comparison with these configurations, SiC dust may be slightly generated as in the first embodiment. However, a groove is provided in the susceptor 3 without using the wall base material 10, and an upper portion is formed along the groove. The configuration in which the plate 11, the intermediate plate 12, and the lower plate 13 are installed is not excluded.

  Furthermore, in FIG. 10 and FIG. 11, for the convenience of drawing, the gap formed by hollowing out the susceptor 3 is vertically long, but may actually be square or horizontally long.

  The epitaxial film forming apparatus is preferably operated as follows. That is, when installing the SiC substrate 5, first, the heat insulating material 2 and the susceptor 3 are installed inside the furnace body 1, then the wall base material 10 is installed, and then the upper plate 11 is installed. Thereafter, the intermediate plate 12 on which the SiC substrate 5 is placed is placed in order from the spatially upper position, and finally the lower plate 13 on which the SiC substrate 5 is placed is placed. According to this procedure, even if SiC dust is generated when the wall base material 10, the upper plate 11 and the intermediate plate 12 are installed, they will not fall on the SiC substrate 5.

  In taking out the SiC substrate 5, first, the lower plate 13 is taken out, and then the intermediate plate 12 is taken out in order from the spatially lower position, and the SiC substrate 5 is removed from the taken out plate. Thereafter, the upper plate 11 and the wall base material 10 are taken out, and together with the intermediate plate 12 and the lower plate 13 (not necessarily at the same time) are etched in the same manner as in Example 1 above, and cause the SiC dust. The polycrystalline SiC gently adhering to the base material 10, the upper plate 11, the intermediate plate 12, and the lower plate 13 is removed.

  As in the first and second embodiments, the wall base material 10, the upper plate 11, the intermediate plate 12, and the lower plate 13 are preferably made of SiC crystal as a main component.

  When the epitaxial growth layer of FIG. 13 is formed by the epitaxial film forming apparatus and the manufacturing method using this apparatus, and a pn diode is manufactured in the same manner as in Example 2, the typical breakdown voltage yield is about 90%. It was almost the same as Example 2.

  In the epitaxial film forming apparatus, a larger number of epitaxially grown SiC substrates can be produced by one epitaxial growth than in the second embodiment.

As described above, according to Example 3, it is possible to prevent the SiC dust from falling on the SiC substrate before the epitaxial growth, and to provide an epitaxial growth layer suitable for manufacturing a large area power device. it can. In particular, there is an advantage that a larger number of epitaxially grown SiC substrates can be manufactured in one epitaxial growth than in the second embodiment.
(Examples concerning suppression of memory effect)
Next, according to the present invention, secondly, when layers having different doping densities are formed by the simultaneous doping method during epitaxial growth, the memory effect in the simultaneous doping can be suppressed and repeated epitaxial growth can be performed many times. Will be described in detail below.

  The inventors based on the assumption that the cause of the memory effect lies in the doping gas adsorbed on the porous member such as a heat insulating material, in particular, the low temperature portion in contact with the upstream side of the gas flow during the epitaxial growth, It has been found that by extending the plate to the upstream side of the gas flow, diffusion of the doping gas into the thermal insulation during epitaxial growth can be suppressed. If possible, this plate is provided not only on the bottom surface of the reaction chamber (gas channel), but also on the top surface and, if present, on the side surface. Sometimes). This plate is removed every time after the epitaxial growth is completed once. This plate may be reused for epitaxial growth after the adsorbed doping gas is removed by etching or the like. The memory effect is that the doping density is extremely different between the highly doped layer and the lightly doped layer (in the example shown in the prior art, three orders of magnitude or more), and particularly in the case of a SiC substrate, the epitaxial growth temperature is 1500 ° C. I found out that it was caused by the above and high.

  In the case of the epitaxial film forming apparatus as shown in the cross-sectional view of FIG. 17 shown in the background art described above, for example, the heat insulating material 2 is not all at the same temperature as the susceptor 3 for that purpose. The diffusion of reactive species in the gas phase proceeds from the susceptor 3 having a high temperature toward the heat insulating material 2 regardless of Si species, C species, and dopants. Even if there is a fast gas flow in the reaction chamber (gas channel) 4, there is always a gas stagnant layer in the immediate vicinity of the solid susceptor 3 and the heat insulating material 2, so that the low temperature part of the reaction species (for example, heat insulation) Diffusion into the material is inevitable. In forming the highly doped layer, it is necessary to flow a large amount of doping gas in order to obtain a high doping density. This doping gas (or a decomposition product thereof, the same shall apply hereinafter) is also applied from the susceptor 3 to the heat insulating material. It spreads toward 2. Since the heat insulating material 2 is porous, the doping gas is adsorbed by the heat insulating material 2. Organometallics such as trimethylaluminum and triethylaluminum, which are preferably used for co-doping aluminum on SiC substrates, are particularly noticeably adsorbed. If there is a low temperature part other than the heat insulating material 2, the doping gas is also adsorbed in the same place, but since the adsorption by the heat insulating material is the most, the following description will be continued assuming that the heat insulating material 2 has adsorbed.

  Next, when an attempt is made to form a lightly doped layer such as an n-type drift layer on the SiC substrate, the doping gas is not flowing, or even if it is flowing, it is a very small amount suitable for forming the lightly doped layer. Therefore, the concentration of the doping gas is higher in the vicinity of the heat insulating material 2 due to diffusion from the heat insulating material 2, and back diffuses toward the susceptor 3 or the reaction chamber (gas channel) 4 due to the concentration gradient. Back-diffusion is equivalent to flowing more doping gas than expected. Moreover, the amount of back diffusion depends on the amount of the doping gas adsorbed on the heat insulating material 2 and its distribution, and therefore strongly depends on the previous process history. If the variation of the doping amount due to the back-diffused doping gas due to the process history is a non-negligible amount compared to the planned doping amount of the low doping layer, it is observed that the doping of the low doping layer cannot be controlled, and the memory The effect is manifested. This memory effect is particularly serious when the conductivity type of the highly doped layer is different from that of the lightly doped layer, and extremely causes a fatal problem that the conductivity type of the lightly doped layer is different from the expected one. However, even with the same conductivity type, it is a problem in that a large manufacturing margin must be taken at the expense of the performance of the device to be manufactured in order to compensate for batch-to-batch variation due to the memory effect. Is no different.

  On the other hand, the present invention is characterized in that a plate is provided that is arranged so as to extend from the inside of the susceptor to the upstream side of the gas flow beyond the end of the susceptor. As will be shown later in the examples, this plate should be shaped to approximately surround the reaction chamber (gas channel), so that this plate is not only the bottom surface of the reaction chamber (gas channel) but also the top surface and If present, it is also preferably provided on the side surface.

  This plate is removed every time one epitaxial growth is completed. This plate may be reused for epitaxial growth after the adsorbed doping gas is removed by etching or the like.

  It should be noted that the extended form of the plate needs to be designed so that at least the doping gas does not directly flow outside the reaction chamber (gas channel). The extension form of the plate may be the same as the extension form of the plate described in the first, second, and third embodiments. In the portion of the plate that extends outward from the end of the susceptor, the temperature decreases as the distance from the susceptor increases due to radiation. On the reaction chamber (gas channel) side of the plate, the doping gas diffuses toward the upstream side of the gas due to the temperature gradient. On the other hand, on the side of the plate opposite to the reaction chamber (gas channel), the doping gas tends to diffuse in the direction along the downstream side of the gas due to the concentration gradient. However, since the temperature gradient is directed in the direction along the upstream side of the gas, similarly to the reaction chamber (gas channel) side, the diffusion of the gas in the direction along the downstream side is delayed. In the direction perpendicular to the gas flow direction, both the concentration gradient and the temperature gradient are in the direction of promoting the diffusion of the doping gas. Moreover, a considerable distance can be set from the end of the plate to the heat insulating material. Thus, the doping gas mainly diffuses toward the furnace body (quartz tube) and does not diffuse much toward the heat insulating material. Since the furnace body is not as hot as the heat insulating material, its vapor pressure is low even if the doping gas is adsorbed. Further, since the furnace body is usually not porous, the amount of adsorption is significantly smaller than that of the heat insulating material. Furthermore, the distance between the plate and the furnace body is significantly larger than the distance between the susceptor and the heat insulating material. Therefore, if the adsorbed doping gas is appropriately removed by removing only the plate and etching it at the end of each epitaxial growth, the back diffusion of the adsorbed doping gas is remarkably suppressed in the next epitaxial growth, and the memory effect. Is suppressed. In particular, when a doping gas such as trimethylaluminum or triethylaluminum that is easily adsorbed by a heat insulating material is used, the memory effect is remarkably suppressed.

  The memory effect is particularly suppressed as described above, which has an epitaxial growth process in which a highly doped layer is formed at the final stage of one epitaxial growth and a low doped layer is formed in the next epitaxial growth, particularly at the initial stage. Is the case. That is, a low-doped layer such as a drift layer is first formed by epitaxial growth on a SiC substrate, and a high-doped layer such as a p-type body contact layer is finally formed by epitaxial growth. The epitaxial growth layer having such a layer structure can be preferably used for an electronic device having an electrode that is in ohmic contact with the surface of the epitaxial growth layer, particularly a power device.

Among such power devices, in the switching device, the electrical resistance between the electrodes provided on the surface of the epitaxial growth layer and the back surface of the substrate is controlled by another electrical signal, for example, as shown in FIG. There is a trench type MOSFET as shown in a partial sectional view. In this trench MOSFET, a drift layer 53, which is a low-doped n-type SiC layer, and a body region 55, which is a p-type SiC layer, are laminated by epitaxial growth in this order on a SiC substrate 51 that is highly doped n-type. On the upper surface of the body region 55, a source contact region 56 that is a highly doped n-type SiC region and a body contact region 57 that is a highly doped p-type SiC region are formed by epitaxial growth and selective ion implantation. An ohmic contact is formed with the electrode 73. A trench 60 that penetrates through the source contact region 56 and the body region 55 to reach the drift layer 53 or at least an n-type region (not shown) in contact with the drift layer 53 is formed. A gate electrode 62 is provided on the inner wall of the trench 60 via a gate insulating film 61. The gate electrode 62 and the source electrode 73 are formed so as to be insulated by the interlayer insulating film 71. The drain electrode 72 is in ohmic contact with the back surface of the SiC substrate 51. A channel 63 (not shown) that is inverted to n-type by a voltage applied to the gate electrode 62 is formed on a portion of the inner wall surface of the trench 60 facing the gate electrode 62, and a source electrode 73 and a drain electrode are formed. The electrical resistance between 72 is controlled. A MOSFET structure in which all of the n-type and p-type in the above description are replaced is possible, but in 4H-SiC, electrons have a drift mobility about 5 to 7 times higher than holes. Therefore, it is preferable that carriers in the SiC substrate 51, the drift layer 53, and the channel 63, which are main resistance components in the ON state, are electrons. Usually, a MOSFET having the polarity described in the above description is preferable. Depending on device characteristics and other requirements, an n-type layer having a different doping amount may be included between the SiC substrate 51 and the drift layer 53, or between the drift layer 53 and the body region 55, but the n-type dopant is usually nitrogen. Since the vapor pressure is significantly higher than that of trimethylaluminum or the like, the adsorption to the low temperature portion is small and the memory effect is hardly caused originally. A problem with the conventional technique is the p ⁺ -type body contact region 57 formed on the body region 55. If this is to be formed by epitaxial growth, in order to obtain ohmic contact with the source electrode 73, p-type doping of at least 2 to 3 × 10 ¹⁹ cm ⁻³ is required, preferably 10 ²⁰ cm ^−3. More than a stand is necessary. This doping amount is three digits or more larger than the doping amount of the drift layer 53, which is normally about 5 × 10 ¹⁵ cm ^{−3 to} 3 × 10 ¹⁶ cm ⁻³ with a breakdown voltage of 600 V to 2 kV class, and is p-type Since the gas used for doping is trimethylaluminum or the like, the drift layer 53 is easily affected by the memory effect.

However, according to the present invention, since the memory effect can be suppressed in such a situation, the drift layer 53 and the body contact region 57 can be sequentially formed in one epitaxial growth. As a supplement, the doping of the body region 55 is suitably about 2 to 3 × 10 ¹⁷ cm ⁻³ . This is intermediate between doping of the drift layer 53 and the body contact region 57. If it is higher than this, the mobility of the channel 63 is remarkably lowered, so that the resistance of the channel 63 increases in the on state. On the other hand, if it is too low, the depletion layer extends not only to the drift layer 53 but also to the body region 55 at the time of OFF, so that a so-called punch-through state in which the depletion layer is in contact with the source contact region 56 occurs. In order to prevent this, if the body region 55 is made thicker, the channel length of the MOSFET becomes longer in proportion thereto, so that the resistance of the channel 63 also increases in the ON state. In FIG. 12, the trench 60 has a side wall perpendicular to the surface of the epitaxial growth layer. However, this is not necessarily the case, and the trench 60 may have an inclination that reduces the resistance of the channel 63 as a whole. .

  In the trench MOSFET shown in FIG. 12, after the body contact region 57 is formed by the above epitaxial growth, the source contact region 56 is formed by selectively doping phosphorus. Since this selective doping has to rely on ion implantation, a design with an extremely high dose amount or a deep doping is not preferable. Since the doping amount of phosphorus must be at least higher than the doping amount of aluminum in the body contact region 57, it can be said that it is not preferable to set the doping amount of aluminum in the body contact region 57 too high. Further, in a general 400 keV class ion implantation apparatus, since the ion implantation depth using monovalent phosphorus ions is less than 0.4 μm, it can be said that it is not preferable to make the body contact region 57 too thick. Thereafter, the trench 60 is formed by anisotropic etching, and the gate insulating film 61 is formed in the formed trench 60 by thermal oxidation or deposition, and annealed as necessary. Subsequently, highly doped polysilicon is deposited and etched back by the same technique as in the Si process to form the gate electrode 62, and then the interlayer insulating film 71 is formed. A contact hole is opened on the surface side of the interlayer insulating film 71, Ni is formed by sputtering, and then patterned, and unnecessary deposits and the like on the back surface are removed to form Ni, and as necessary. Pattern. Thereafter, annealing is performed, for example, in an Ar flow at 1000 ° C. to obtain ohmic contact between the Ni film and the surface of the source contact region 56, the surface of the body contact region 57, and the back surface of the SiC substrate 51. Unreacted Ni and nickel silicide as a reaction product become part of the source electrode 73 and the drain electrode 72. After this, it is the same as the Si process, and a source pad and a gate pad (not shown) are formed on the front surface, and a laminated metal electrode film is formed as necessary so that the back surface becomes an appropriate metal electrode.

  In the structure shown in the cross-sectional view of FIG. 12, it is known that the electric field concentrates on the bottom of the trench 60 and no breakdown voltage is generated. Protective measures such as providing areas are necessary. In addition, it is necessary to provide a withstand voltage structure in the peripheral portion surrounding the active portion of the device. In the cross-sectional view of FIG. 12, only one trench 60 is drawn because it is not complicated, but in reality, a large number of trenches are formed, and the gate electrode 62 embedded in them is the same as in the Si device. Then, they are aggregated at a part of the surface of the device and taken out to the gate pad (Al film).

  Note that the SiC device structure that can achieve the effects of the present invention is not limited to the trench MOSFET as shown in the cross-sectional view of FIG. For example, it may be a trench IGBT, or it may be a storage MOSFET whose channel is constituted by an n-type region from the beginning, and has metal electrodes on at least the surface of the epitaxial growth layer and the back surface of the SiC substrate, respectively. , Having a trench dug from the epitaxial growth layer toward the SiC substrate, and having a gate electrode disposed on at least a side surface of the trench via a gate insulating film, and by a voltage applied to the gate electrode, Any electronic device that changes the electrical resistance between the surface of the epitaxial growth layer and the electrode provided on the back surface of the SiC substrate can receive the effects of the present invention.

  However, since the highly doped layer is formed using epitaxial growth, the highly doped layer is formed on the entire surface of the epitaxially grown layer. Therefore, it is not suitable for a planar electronic device in which a gate electrode is provided on the surface of the epitaxial growth layer and the electric resistance between the electrode having ohmic contact and another electrode is changed on the surface of the epitaxial growth layer. is there. Furthermore, according to the present invention, the number of substrates that can be processed at one time can be greatly increased by the following modifications. In the present invention, the number of the plates installed on the susceptor may be more than two. If three or more are installed, the substrate can be installed on two plates other than the plate installed on the top. Similarly, when n plates are installed, the substrate can be installed on n-1 plates other than the plate installed at the top. That is, (n-1) times more substrates can be processed at a time than when two plates are installed.

  FIGS. 1 and 6 are sectional views of essential parts of an epitaxial film forming apparatus according to Example 4. FIG. FIG. 1 is a cross-sectional view of an essential part taken along a plane including a gas flow direction. A heat insulating material 2 is provided inside a quartz furnace body 1, and a susceptor 3 is installed therein. The susceptor 3 is hollowed out so that the inside is a reaction chamber (gas channel). An upper plate 11 is installed near the upper surface, and a lower plate 13 is installed near the lower surface, and the space between them is a reaction chamber (gas channel). 4. The SiC substrate 5 is placed on the lower plate 13. The upstream ends of the lower plate 13 and the upper plate 11 are extended to the upstream side from the upstream ends of the susceptor 3 and the heat insulating material 2.

  A broken line in FIG. 1 is a range where a wall base material 10 to be described later exists. In order to suppress the memory effect, as shown in FIG. 1, the positions of the upstream ends of the lower plate 13 and the upper plate 11 may be coincident with each other. However, SiC dust that lowers the breakdown voltage yield of the device is not increased before the epitaxial growth. As shown in FIG. 2, the upstream end of the upper plate 11 is arranged to extend further upstream than the upstream end of the lower plate 13 in the sense of suppressing the falling onto the SiC substrate 5. It is preferable to do this. In FIGS. 1 and 2, it is depicted that only one SiC substrate 5 is placed, but this does not exclude the arrangement of a plurality of SiC substrates on one lower plate 13. Absent. In FIG. 2, the upper plate 11 and the lower plate 13 are drawn with different lengths. However, the upper plate 11 and the lower plate 13 are arranged to be shifted toward the upstream side of the lower plate 13 with the same length. It may be.

  FIG. 6 is a cross-sectional view of the principal part of the epitaxial film forming apparatus shown in FIG. 1 cut along a cross section perpendicular to the gas flow. Since FIG. 6 is the same as the cross-sectional view described in the second embodiment, description thereof is omitted. Although not clearly shown in FIG. 6, referring to the broken line portion in FIG. 1, the upstream end of the wall base material 10 extends to the upstream side of the upstream end of the susceptor 3 and the heat insulating material 2. Is different from FIG. 2 in the first and second embodiments.

  Of the broken lines in FIG. 1, the upstream end is substantially perpendicular to the upper plate 11 and the lower plate 13, but this is not necessarily the case, and the upstream end of the broken line in FIG. In addition, the extension length from the susceptor end to the upstream side may be different. Further, in FIG. 6, for the convenience of drawing, the gap formed by hollowing out the susceptor 3 is vertically long, but may actually be square or horizontally long. In this epitaxial film forming apparatus, at least the wall base material 10, the upper plate 11, and the lower plate 13 are installed in the susceptor 3 each time before the epitaxial growth, and are taken out every time after the epitaxial growth (not necessarily simultaneously). Etching is preferably performed to remove the adsorbed doping gas.

  As the etching method of the extraction plate at this time, it is a common treatment that can remove the slowly adhering polycrystalline SiC described in the first embodiment together with the adsorbed doping gas. Since the additional effect that it can suppress is exhibited, it is preferable. For this purpose, for example, it is performed in a mixed gas of hydrogen and hydrogen chloride of 80 to 760 Torr at about 1300 to 1700 ° C., or in a strong oxidizing gas such as chlorine trifluoride at several hundred degrees C. There is a way. The apparatus for performing this etching may be the epitaxial growth furnace, but may be another apparatus. When etching with other equipment, it is possible to select a structure that can process a large number of wall substrates and plates at one time, and during that time, another wall substrate and plate can be used for epitaxial growth. The throughput of epitaxial growth is improved. In order to be able to etch the wall base material and the plate, the material is mainly composed of SiC itself (etched together with the wall base material and the plate) or can withstand the process of etching polycrystalline SiC. It is necessary to be. At the same time, this material must not introduce unnecessary impurities during the epitaxial growth of SiC. In reality, such materials are extremely limited. For example, high purity graphite may be able to withstand the process of etching polycrystalline SiC, but introduces impurities such as aluminum, boron, titanium, etc. during epitaxial growth. From such a viewpoint, the material of the wall base material and the plate is preferably one containing SiC as a main component.

By the epitaxial film forming apparatus and the manufacturing method using this apparatus, the doping in the range described in the description of the trench MOSFET in FIG. 12 can be controlled. In particular, the doping of the drift layer 51 is arbitrarily between 5 × 10 ¹⁵ cm ⁻³ and 3 × 10 ¹⁶ cm ⁻³ even though the doping of the body contact layer 57 is as high as 2 to 10 × 10 ¹⁹ cm ^−3. The value can be controlled in the same manner as when the body contact layer 57 is never formed.

  As described above, according to the present embodiment, the memory effect can be suppressed, and an epitaxial growth layer suitable for producing a power device having a low doped layer and a highly doped layer on the surface can be provided.

  FIG. 8 and FIG. 10 are sectional views of essential parts of an epitaxial film forming apparatus according to Example 5. Since the configuration of FIG. 8 is the same as that described in the third embodiment, the description thereof is omitted.

  The broken line shown in FIG. 8 is a range where the wall base material 10 described later exists.

  It is desirable that the groove 9-1 provided in the wall base material 10 has a certain amount of clearance with respect to the plate as in the first embodiment. The reaction chamber (gas channel) 4 is a space sandwiched between two adjacent plates and the wall substrate 10. Note that the wall base material 10 has a single wall as shown in FIG. 7 and is placed on the bottom surface of the susceptor 3 as it is without providing the groove 8-1 or the like in the susceptor 3. It may be a thing. Although not clearly shown in FIG. 10, referring to the broken line portion in FIG. 8, the upstream end of the wall base material 10 extends to the upstream side of the upstream end of the susceptor 3 and the heat insulating material 2.

  Of the broken lines in FIG. 8, the upstream end is substantially perpendicular to the upper plate 11, the intermediate plate 12, and the lower plate 13, but this is not necessarily the case, and the upstream end of the broken line in FIG. It may be inclined according to the extension length of the plates 11, 12, 13. The epitaxial film forming apparatus is preferably operated as follows. That is, at least the wall substrate 10, the upper plate 11, the intermediate plate 12, and the lower plate 13 are installed in the susceptor 3 each time before the epitaxial growth, and taken out after the epitaxial growth (not necessarily simultaneously) Etching is performed in the same manner as in Example 1 to remove the adsorbed doping gas.

As in the first, second, third, and fourth embodiments, the wall base material 10, the upper plate 11, the intermediate plate 12, and the lower plate 13 are preferably made of SiC as a main component. By the epitaxial film forming apparatus and the manufacturing method using this apparatus, the doping in the range described in the description of the trench MOSFET in FIG. 12 can be controlled. In particular, the doping of the drift layer 51 is arbitrarily between 5 × 10 ¹⁵ cm ⁻³ and 3 × 10 ¹⁶ cm ⁻³ even though the doping of the body contact layer 57 is as high as 2 to 10 × 10 ¹⁹ cm ^−3. The value can be controlled in the same manner as when the body contact layer 57 is never formed. In the epitaxial film forming apparatus, a larger number of epitaxially grown substrates can be manufactured in one epitaxial growth than in the epitaxial film forming apparatuses according to the first and fourth embodiments.

As described above, according to Example 5, the memory effect can be suppressed, and an epitaxial growth layer suitable for producing a power device having a low doped layer and a highly doped layer on the surface can be provided. In particular, there is an advantage that a larger number of epitaxially grown substrates can be manufactured in one epitaxial growth than in the first and fourth embodiments.
(Comparative Example 2)
As shown in FIG. 17, when the doping in the range described in the description of the trench MOSFET in FIG. 12 is to be controlled in the structure in which the wall base material and the plate are not provided, the first time using a new susceptor / heat insulating material is used. In the second and subsequent epitaxial growth, in particular, the drift layer 51 is controlled to be n-type with doping less than half of the design, or p-type when it is severe. It has become impossible.

It is the principal part cross-sectional view cut | disconnected by the surface containing the flow direction of gas of the SiC epitaxial film-forming apparatus concerning this invention. It is the principal part cross-sectional view cut | disconnected by the surface containing the flow direction of gas of the SiC epitaxial film-forming apparatus concerning this invention. It is the principal part cross-sectional view cut | disconnected by the surface containing the flow direction of gas of the SiC epitaxial film-forming apparatus concerning this invention. It is the principal part longitudinal cross-sectional view cut | disconnected by the surface perpendicular | vertical to the gas flow of the SiC epitaxial film-forming apparatus concerning this invention. It is the principal part longitudinal cross-sectional view cut | disconnected by the surface perpendicular | vertical to the gas flow of the SiC epitaxial film-forming apparatus in Example 1. FIG. It is the principal part longitudinal cross-sectional view cut | disconnected by the surface perpendicular | vertical to the gas flow of the SiC epitaxial film-forming apparatus in Example 2. FIG. It is the principal part longitudinal cross-sectional view cut | disconnected by the surface perpendicular | vertical to the gas flow of the SiC epitaxial film-forming apparatus in Example 2. FIG. It is the principal part cross-sectional view cut | disconnected by the surface containing the gas flow direction of the SiC epitaxial film-forming apparatus in Example 3. FIG. It is another example of the principal part cross-sectional view cut by the surface containing the gas flow direction of the SiC epitaxial film-forming apparatus in Example 3. It is the principal part longitudinal cross-sectional view cut | disconnected by the surface perpendicular | vertical to the gas flow of the SiC epitaxial film-forming apparatus in Example 3. FIG. It is the principal part longitudinal cross-sectional view cut | disconnected by the surface perpendicular | vertical to the gas flow of the SiC epitaxial film-forming apparatus in Example 3. FIG. It is principal part sectional drawing of the trench type MOSFET concerning this invention. It is sectional drawing which shows the layer structure of the semiconductor substrate which has an epitaxial growth layer. It is principal part sectional drawing of a pn diode using a SiC substrate. It is a current-voltage characteristic view of a pn diode using a SiC substrate. It is a principal part cross-sectional view of the conventional SiC epitaxial film-forming apparatus. It is a principal part cross-sectional view of the SiC epitaxial film-forming apparatus which has a support substrate (plate) for carrying in / out a SiC substrate.

Explanation of symbols

1 Furnace, cylindrical tube, quartz tube 2 Heat insulation material 3 Susceptor 4 Reaction chamber (gas channel)
5 SiC substrate 6 Substrate loading / unloading jig, plate 7-1 groove 7-2 groove 8-1 groove 9-1 groove 10 wall base material 11 flat plate support substrate, upper plate 12 flat plate support substrate, intermediate plate 13 flat plate support Substrate, lower plate 51 SiC substrate 53 Drift layer 55, 55a Body layer 56 Source contact region 57 Body contact region 60 Trench 61 Gate insulating film 62 Gate electrode 63 Channel 71 Interlayer insulating film 72 Drain electrode 73 Source electrode 91 Reverse characteristic curve 92 Reverse characteristic curve 93 Reverse characteristic curve.

Claims (8)

A susceptor of a predetermined length along the axial direction of the cylindrical tube in a heat-resistant cylindrical tube having a reactive gas inlet and outlet at the end in the axial direction and capable of depressurization protects the cylindrical tube from softening due to high temperature. A plurality of plate-like support substrates for placing the SiC crystal substrate in a reaction chamber space provided inside the susceptor are arranged in parallel with each other with a space in the vertical direction. An inductive heating device for inductively heating the susceptor is installed on the outside of the cylindrical tube facing the susceptor and installed in a form that can be carried in and out, and the upper support of the plurality of plate-like support substrates An epitaxial SiC film forming apparatus, wherein the substrate is installed so as to protrude more from the end face of the susceptor or the heat insulating material to the upstream side of the gas flow. 2. The epitaxial SiC film forming apparatus according to claim 1, wherein the heat-resistant cylindrical tube is a quartz tube. 3. The epitaxial SiC film forming apparatus according to claim 1, wherein the flat support substrate is mainly made of SiC crystal. The flat support substrate is installed in the groove formed in the reaction chamber side wall inside the susceptor and formed in a direction parallel to the axis of the cylindrical tube so as to be able to be carried in and out. The epitaxial SiC film forming apparatus according to any one of claims 1 to 3. The flat support substrate can be carried in and out of a groove formed in a direction parallel to the axis of the cylindrical tube, on a side wall base material made of SiC crystal, which is provided adjacent to the reaction chamber side wall inside the susceptor. The epitaxial SiC film forming apparatus according to any one of claims 1 to 3, wherein the epitaxial SiC film forming apparatus is installed in the apparatus. The epitaxial SiC film forming apparatus according to any one of claims 1 to 5, wherein the number of the plurality of flat support substrates is three or more. Using the epitaxial SiC film forming apparatus according to any one of claims 1 to 6, after the epitaxial growth, the plurality of flat plate-like support substrates are taken out from the film forming apparatus, and after removing the SiC substrate, the flat plate shape is removed. A method for manufacturing a SiC semiconductor device, comprising: a step of etching away SiC adhering to a support substrate. The epitaxial SiC film forming apparatus according to any one of claims 1 to 6, wherein the plurality of flat plate-like support substrates are spatially arranged in order from the flat plate-like support substrate before epitaxial growth. A method of manufacturing an SiC semiconductor device, comprising an epitaxial growth step including a process of carrying in a reaction chamber in the step of FIG.

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