JP2012080032A - Printed wiring board for device chip mount package, and method of manufacturing the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a printed wiring board for a device chip mount package which allows the achievement of further downsizing in thickness while surely keeping the mechanical strength and durability, but never interferes with the transportability and the stable workability in a production line, and to provide a method of manufacturing the printed wiring board.SOLUTION: The printed wiring board for a device chip mount package is set so that a chip-type capacitor device 10 on which a device chip can be mounted. The printed wiring board includes: an insulating film base 1; a terminal pattern 2(2-1 and 2-2) for device chip connection which is provided on one face of the insulating film base 1; a terminal pattern 3(3-1 and 3-2) for external connection provided on the other face of the insulating film base 1 opposite to the one face thereof; and a via-hole 4(4-1 and 4-2) for connection between the two faces which runs through the insulating film base 1 and electrically connects between the terminal pattern 2 for device chip connection and the terminal pattern 3 for external connection.

Description

  The present invention relates to a printed wiring board for a chip-type element mounting package used as a main component part of a mounting package of, for example, a chip-type capacitor element and other various chip-type elements, and a method for manufacturing the same.

  Various chip-type elements including chip-type capacitor elements are used in portable electronic devices such as mobile phones and mobile personal computers. In recent years, with the reduction in size and thickness of portable electronic devices, various chip-type elements are also required to be reduced in size and thickness.

As a typical example of a chip-type element mounting package according to the prior art, when a chip-type capacitor element is mounted, it is proposed that the structure shown in FIG. Has been. 4A is a plan view of a chip-type element mounting package according to the prior art, and FIG. 4B is a cross-sectional view taken along the line A-B of the side surface.
The mounting package shown in FIG. 4 includes an insulating film substrate 101, element connection terminal patterns 102 and 104, external connection terminals 103 and 105, a chip capacitor element 106, an anode terminal 107, and an anode connection. The strip 108, the cathode connection strip 109, the protective film 110, the adhesive layer 111, the surface plating 112, 113, 114, 115, and the sealing resin 116 are included as constituent elements. .

  On one surface of the insulating film substrate 101, a conductor foil such as a copper foil bonded through an adhesive layer 111 is patterned by an etching method or the like to form element connection terminal patterns 102 and 104. ing. Surface plating 112, 114 is performed on those surfaces, respectively.

The insulating film base 101 is provided with an opening 117 as shown in FIG. When the mounting package is completed as shown in FIG. 4, the openings 117 become two openings 117a and 117b that are provided apart from each other.
The opening 117 is provided with external connection terminals 103 and 105 by, for example, filling copper (Cu) or a copper alloy by a so-called embedded copper plating method. By dividing the continuous copper plating filled in the opening 170, independent external connection terminals 103 and external connection terminals 105 are obtained.
Surface plating 113 and 115 is applied to the surfaces of the external connection terminals 103 and 105, respectively.

An anode connection piece 108 is connected to the upper surface of the element connection terminal pattern 102 via a surface plating 112. The anode connection piece 108 is connected to an anode terminal 107 attached to the chip capacitor element 106. A cathode connection piece 109 is connected to the upper surface of the element connection terminal pattern 104 via a surface plating 114. The cathode connection piece 109 is connected to a cathode terminal (not shown) of the chip capacitor element 106.
External connection terminals 103 are provided in direct contact with the lower surface of the element connection terminal pattern 102. Further, the external connection terminals 105 are provided in direct contact with the lower surface of the element connection terminal pattern 104.

With such a structure, the anode of the chip capacitor element 106 is formed with the external connection terminal 103 through the anode terminal 107, the anode connection piece 108, the surface plating 112, and the element connection terminal pattern 102. Further, the cathode of the chip capacitor element 106 is formed with an external connection terminal 105 through a cathode terminal (not shown), a cathode connection piece 109, a surface plating 114, and an element connection terminal pattern 104.

The surface plating 112, 113, 114, 115 is, for example, tin (Sn), gold (Au), or an alloy thereof (Sn—Au alloy), or multilayer plating of nickel (Ni) and gold (Au). It can be made up of:
As the protective film 110, for example, a solder resist can be used.
The anode connecting piece 108 can be made of, for example, a conductive adhesive or a conductive wire. The cathode connection piece 109 can be made of, for example, a conductive adhesive or a conductive adhesive sheet.
The opening 117 can be provided by, for example, a pressing method or a laser processing method.

A printed wiring board used for such a chip-type capacitor element mounting package is manufactured by a manufacturing method as shown in FIG.
First, for example, an insulating film substrate 101 provided with a thermosetting adhesive layer 111 on one side is prepared, and a transport hole 119 and an opening 117 are formed by punching by a press working method or the like (FIG. 6A). . At this time, as shown in FIG. 5, the openings 117 are desirably arranged densely in a lattice pattern so that a so-called number per unit area can be earned as much as possible.
Subsequently, the copper foil 120 is bonded to one surface of the insulating film substrate 101 via the adhesive layer 111, and the adhesive layer 111 is cured (FIG. 6B).
Subsequently, the copper plating 121 is filled into the opening 117 (FIG. 6C). At this time, in order to avoid that the same plating film as the copper plating 121 adheres to the upper surface of the copper foil 120, the upper surface of the copper foil 120 is masked (not shown). This copper plating 121 is later separated by press cutting or the like to become external connection terminals 103 and 105.

Subsequently, a resist (not shown) is applied to the surface of the copper foil 120, and a resist pattern is formed by performing exposure to development of a predetermined pattern. Then, the copper foil 120 is patterned by an etching method using the resist pattern. As a result, element connection terminal patterns 102 and 104 are formed (FIG. 6D).
Subsequently, a protective film 110 made of a solder resist or a photo solder resist is formed at a predetermined position near the element connection terminal pattern 102 (FIG. 6E).
Thereafter, surface plating 112, 114, 113, and 115 is applied to the exposed surfaces of the element connection terminal patterns 102 and 104 and the external connection terminals 103 and 105, respectively (FIG. 6F).

Then, although not shown in FIG. 6, a chip-type element such as the chip-type capacitor element 106 is mounted at a predetermined position using the printed wiring board for chip-type element mounting package manufactured as described above. After an electrical connection structure is formed on each of the anode and the cathode, sealing is performed with a sealing resin 116. Then, the copper plating 121 is separated into the external connection terminals 103 and the external connection terminals 105 by press cutting or the like, and is separated into individual pieces as chip-type element mounting packages. The main part is completed (see Patent Document 1 above).
In addition to the above-described configuration and manufacturing method, although not shown, there are cases in which the external connection terminal 103 and the external connection terminal 105 are provided as independent ones from the beginning.

  The printed wiring board used for such a chip-type capacitor element mounting package according to the prior art can be manufactured in-line and flow-by-line with a continuously transportable tape carrier system, thus reducing costs and improving throughput. Etc. can be achieved.

JP 2003-283086 A

  Portable electronic devices are becoming increasingly smaller and thinner, and chip-type device mounting packages used therefor are required to be thinner and smaller. Since the package has many standard dimensions and various other technical restrictions, it is necessary to reduce the thickness of the printed wiring board used to achieve further reduction in thickness and size of the package. It becomes. At the same time, it is required to ensure mechanical strength of a predetermined level or higher.

  However, the above-described printed wiring board for chip-type element mounting package according to the prior art requires an opening 117 for filling the copper plating 121 to form the external connection terminals 103 and 105. The size (area) 117 occupies most of the area of each individual package region. Moreover, in order to improve the so-called number per unit area of a printed wiring board such as a tape carrier, the openings 117 are arranged in a lattice shape and in a high density in a large number in the vertical and horizontal directions. Become. For this reason, the ratio of the area of the opening 117 occupying in the total area of the printed wiring board for chip-type element mounting package is extremely high, and the mechanical printed circuit board for the chip-type element mounting package as a whole has insufficient mechanical strength and durability. As a result, there is a risk that it may be difficult to ensure transportability and stable workability in the production line. In addition, this is a significant obstacle that prevents further reduction in the thickness of the entire mounting package.

  The present invention has been made in view of such problems, and its purpose is to ensure mechanical strength and durability without impairing transportability and stable workability in the production line, An object of the present invention is to provide a printed wiring board for a chip-type element mounting package and a method for manufacturing the same, which can achieve further reduction in thickness.

The printed wiring board for chip-type element mounting package of the present invention is a printed wiring board for chip-type element mounting package set so that the chip-type element is mounted, the insulating film substrate, and the insulating film A chip-type element connection terminal pattern provided on one side of the substrate, an external connection terminal pattern provided on the side opposite to the one side of the insulating film substrate, and the insulating film substrate And a double-sided connection via provided to electrically connect the chip-type element connection terminal pattern and the external connection terminal pattern.
The method for manufacturing a printed wiring board for chip-type element mounting package according to the present invention is a method for manufacturing a printed wiring board for chip-type element mounting package which is set so that the chip-type element is mounted. A step of forming a chip-type element connection terminal pattern by patterning the copper foil on one side of the double-sided copper-clad film substrate by etching using a double-sided copper-clad film substrate in which copper foils are bonded to both sides of the substrate And patterning the copper foil on the opposite side to the one side of the double-sided copper-clad film substrate by an etching method to form an external connection terminal pattern, and penetrating through the insulating film substrate Forming a double-sided connection via for electrically connecting the chip-type element connection terminal pattern and the external connection terminal pattern. There.

  According to the present invention, further reduction in thickness of the printed wiring board for chip-type element mounting packages is achieved while ensuring mechanical strength and durability that do not impair transportability and stable workability in the production line. It becomes possible to do.

It is a top view which shows the main structures of the printed wiring board for chip-type element mounting packages which concerns on embodiment of this invention. It is side surface sectional drawing of the printed wiring board for chip-type element mounting packages which concerns on embodiment of this invention. It is a figure which shows the flow of the main manufacturing processes contained in the manufacturing method of the printed wiring board for chip type element mounting packages which concerns on embodiment of this invention. The main structure of the printed wiring board for chip-type element mounting packages which concerns on a prior art is shown, (a) is a top view, (b) is side sectional drawing. It is a figure which shows an example of the state in which the opening was provided of the single-sided copper clad film board used for the printed wiring board for chip-type element mounting packages which concerns on a prior art. It is a figure which shows the flow of the main manufacturing processes contained in the manufacturing method of the printed wiring board for chip-type element mounting packages which concerns on a prior art.

Hereinafter, a printed wiring board for a chip-type element mounting package and a manufacturing method thereof according to embodiments of the present invention will be described with reference to the drawings.
FIG. 1 is a plan view showing a main configuration of a printed wiring board for chip-type element mounting package according to an embodiment of the present invention, and FIG. 2 is a side sectional view thereof. 1 and 2, not only the printed wiring board body for the chip-type element mounting package according to the embodiment of the present invention but also the chip-type capacitor element 10 is mounted thereon and sealed with the sealing resin 12. The stopped state is shown.

  The printed wiring board for chip-type element mounting package includes an insulating film substrate 1, a chip-type element connection anode terminal pattern 2-1, a chip-type element connection cathode terminal pattern 2-2, and an external connection anode. The terminal pattern 3-1, the external connection cathode terminal pattern 3-2, the anode via 4-1, and the cathode via 4-2 are provided as main parts, and the chip capacitor element 10 is mounted. Is set to

  The insulating film substrate 1 is an insulating substrate for printed wiring boards of a kind such as a tape carrier, which is made of a resin film such as a very thin polyimide film having a thickness of 12.5 μm, for example. In the printed wiring board for chip-type element mounting package according to the embodiment of the present invention, it is possible to use such an extremely thin film substrate without impairing the predetermined mechanical strength and durability.

  On one side of the insulating film substrate 1, an anode terminal pattern 2-1 for chip-type element connection and a cathode terminal pattern 2-2 for chip-type element connection are provided. For example, tin (Sn) plating, tin (Sn) / silver (Ag) alloy plating, nickel (on the surface of the anode terminal pattern 2-1 for chip type element connection, and the cathode terminal pattern 2-2 for chip type element connection Surface plating 5-1 and 5-2 made of a material such as Ni) / gold (Au) multi-layer plating are applied.

  The anode terminal 11 of the chip type capacitor element 10 is set to be connected to the chip type element connecting anode terminal pattern 2-1 through the surface plating 5-1 and the anode connecting piece 7-1. Further, the cathode terminal (not shown) of the chip capacitor element 10 is connected to the cathode terminal pattern 2-2 for chip type element connection via the surface plating 5-2 and the cathode connection piece 7-2. Is set.

  An external connection anode terminal pattern 3-1 and an external connection cathode terminal pattern 3-2 are provided on the surface of the insulating film substrate 1 opposite to the one side as described above. On these surfaces, plating layers 9-1 and 9-2 made of a plating metal such as copper (Cu) plating are formed. The plated layers 9-1 and 9-2 are formed at the same time in the same plating process as the anode via 4-1 and the cathode via 4-2. Therefore, they are all made of the same kind of plated metal. It has become.

  On the surface of the plating layers 9-1 and 9-2, for example, tin (Sn) plating, tin (Sn) / silver (Ag) alloy plating, nickel (Ni) / gold (Au) multilayer plating, etc. Surface plating 6-1 and 6-2 made of various materials are respectively applied.

The anode via 4-1 is a double-sided connection via, penetrates the insulating film substrate 1, and has an anode terminal pattern 2 for chip-type element connection on one side thereof (the upper surface of the insulating film substrate 1 in FIG. 2). -1 and the other surface (the lower surface of the insulating film substrate 1 in FIG. 2) are provided together with the plating layer 9-1 by a plating process so as to be electrically connected to the external connection anode terminal pattern 3-1. It has been.
The cathode via 4-2 is a via for double-sided connection, penetrates the insulating film substrate 1, and is connected to the chip-type element connecting cathode terminal pattern 2-2 on one side (upper surface) and the other surface (lower surface). It is provided together with the plating layer 9-2 by a plating process so as to be electrically connected to the external connection cathode terminal pattern 3-2.

  The protective film 8 is provided at a predetermined position near the chip-type element connecting anode terminal pattern 2-1. As the protective film 8, for example, a solder resist or a photo solder resist can be used.

  The main part of the printed wiring board for chip-type element mounting package according to the embodiment of the present invention is manufactured by a manufacturing method as shown in the flow of the main steps in FIG. Here, in the present embodiment (that is, in FIG. 3), three pieces of pieces 20-1, 20-2, and 20-3 are arranged in the width direction of one printed wiring board (carrier tape). A case of forming and finally press-cutting and separating into individual pieces will be described.

A double-sided copper-clad film substrate is prepared by laminating copper foils 21a and 21b on both the front and back sides of the insulating film substrate 1, and the conveyance holes 22 are formed by punching by a press working method or the like (FIG. 3A).
Subsequently, via holes 23 are provided by, for example, a laser processing method so as to penetrate through the copper foil 21b and the insulating film substrate 1 and stop at the lower surface of the copper foil 21a (FIG. 3B).
Then, copper plating is performed on the entire surface of the copper foil 21b including the via hole 23, thereby forming the double-sided connection via 4 (that is, the anode via 4-1 and the cathode via 4-2; the same applies hereinafter). Moreover, the plating layer 9 (9-1, 9-2) will be formed on the surface of the copper foil 21b by copper plating at this time (FIG. 3C).
It is desirable to perform desmearing, DPS treatment, etc. before applying this copper plating. However, the copper foils 21a and 21b may be slightly thinned by performing such pretreatment. Therefore, when such a decrease in thickness is within a negligible range, a pretreatment may be performed. Alternatively, such a decrease in thickness may be anticipated in advance, and thicker copper foils 21a and 21b may be used accordingly.

Subsequently, a resist (not shown) is applied to the surfaces of the copper foils 21a and 21b, and a resist pattern is formed by performing exposure to development of a predetermined pattern. Then, the copper foils 21a and 21b are etched using the resist pattern. Pattern processing is performed, and on one side of the insulating film substrate 1 (the upper surface of the insulating film substrate 1 in FIG. 3), the anode terminal pattern 2-1 for chip-type element connection, the cathode terminal for chip-type element connection The pattern 2-2 is formed, and the external connection anode terminal pattern 3-1 and the external connection cathode terminal pattern 3-2 are formed on the surface opposite to the pattern 2-2 (the lower surface of the insulating film substrate 1 in FIG. 3). It forms (FIG.3 (d)).
At this stage, the chip-type element connection anode terminal pattern 2-1 and the chip-type element connection cathode terminal pattern 2-2 are connected together, and the external connection anode terminal pattern 3-1 and the outside are connected. The connecting cathode terminal pattern 3-2 is connected to one another.

Subsequently, a protective film 8 made of a solder resist or a photo solder resist is formed at a predetermined position near the chip-type element connecting anode terminal pattern 2-1 in each individual region (FIG. 3E).
Then, the exposed chip-type element connection anode terminal pattern 2-1, chip-type element connection cathode terminal pattern 2-2, external connection anode terminal pattern 3-1, and external connection cathode terminal pattern 3-2. Each surface is subjected to surface plating 5-1, 5-2, 6-1, and 6-2 (FIG. 3F).

  Thereafter, although not shown in the drawings, a chip-type element such as the chip-type capacitor element 10 is mounted at each predetermined position using the printed wiring board for chip-type element mounting package whose main part is manufactured as described above. Then, after an electrical connection structure is formed on each of the anode and the cathode, the whole chip-type capacitor element 10 and the surrounding mounting portion are sealed with a sealing resin 12. The chip-type element connection anode terminal pattern 2-1 and the chip-type element connection cathode terminal pattern 2-2 are separated from each other by press cutting or the like, and the external connection anode terminal pattern 3-1 and the external connection cathode terminal are separated. The main part of the chip-type element mounting package having the structure as shown in FIGS. 1 and 2 is completed by separating the pattern 3-2 and the individual pieces of the chip-type element mounting package.

  As described above, in the printed wiring board for chip-type element mounting package and the manufacturing method thereof according to the embodiment of the present invention, the double-sided copper obtained by bonding the copper foils 21a and 21b to the front and back surfaces of the insulating film substrate 1 respectively. Using a tension film substrate, the copper foil 21a on one side (the upper surface of the insulating film substrate 1 in FIGS. 1, 2, and 3) is patterned to form a chip-type element connecting anode terminal pattern 2-1, chip type A cathode terminal pattern 2-2 for device connection is formed, and a copper foil 21b on the opposite side (the lower surface of the insulating film substrate 1 in FIGS. 1 and 2) is patterned to form an anode terminal pattern for external connection. 3-1, Forming external connection cathode terminal pattern 3-2, chip type element connection anode terminal pattern 2-1 and external connection on both sides (upper and lower sides) with insulating film substrate 1 sandwiched therebetween Anode end The pattern 3-1 is electrically connected by the anode via 4-1, and the chip-type element connecting cathode terminal pattern 2-2 and the external connecting cathode terminal pattern 3-2 are electrically connected by the cathode via 4-2. I try to connect.

By doing so, it is not necessary to provide openings 117 (117a, 117b; the same applies hereinafter) that require an extremely large area, which is essential in the prior art as shown in FIG. Therefore, it is only necessary to provide an extremely small via hole 23 which requires a minimum necessary area so that a sufficient connection can be made.
In addition, the area of the region where the chip-type element connection anode terminal pattern 2-1, the insulating film substrate 1, and the external connection anode terminal pattern 3-1 are arranged to overlap with each other, and the chip-type element connection The area of the region where the cathode terminal pattern 2-2, the insulating film base material 1 and the external connection cathode terminal pattern 3-2 are overlapped is an extremely small portion where the via hole 23 is formed. The chip-type element connection anode terminal pattern 2-1, the chip-type element connection cathode terminal pattern 2-2, the external connection anode terminal pattern 3-1, and the external connection cathode terminal pattern 3-2. It will be almost the whole surface.

In contrast to this, in the case of the prior art, the large opening 117 (117a, 117b) is provided, and the external connection terminals 103, 105 are formed by plating metal there, so the opening diameter is the external connection terminal. Directly connected to the size. However, in the case of the present embodiment, the size of the external connection terminal patterns 3-1 and 3-2 can be appropriately changed depending on the design as long as the conduction between the upper and lower patterns is reliable. By doing so, even if the package is downsized, the area of the external connection terminal can be secured.
In the case of the prior art, since the large opening 117 is provided, the insulating film substrate 101 inevitably has a very small area, and the entire printed wiring board for the chip-type element mounting package. As a result, the mechanical strength is significantly reduced. For this reason, in order to reinforce the lowered mechanical strength, the thickness of the insulating film substrate 101 has to be made thick, for example, 50 μm or more. At the same time, the thicknesses of the external connection terminals 103 and 105 must be as thick as the insulating film substrate 101.

  Further, in the printed wiring board for chip-type element mounting package and the manufacturing method thereof according to the embodiment of the present invention, a metal such as a copper plating film is formed with the formation of the anode via 4-1 and the cathode via 4-2. Since the plating layers 9-1 and 9-2 made of films are respectively formed on the surfaces of the external connection anode terminal pattern 3-1 and the external connection cathode terminal pattern 3-2, the plating layers 9-1 and The presence of 9-2 further enhances the mechanical strength and durability of the entire printed wiring board for chip-type element mounting package.

  Thus, according to the printed wiring board for chip-type element mounting package and the manufacturing method thereof according to the embodiment of the present invention, the anode terminal pattern 2-1 for chip-type element connection, the insulating film substrate 1, and the external connection Chip-type element mounting by the laminated structure of the anode terminal pattern 3-1 for use and the laminated structure of the cathode terminal pattern 2-2 for chip-type element connection, the insulating film substrate 1, and the cathode terminal pattern 3-2 for external connection Mainly insulating film substrate 1 (corresponding to insulating film substrate 101 in the prior art shown in FIG. 6) and external connection while securing or further enhancing the mechanical strength and durability of the entire printed wiring board for package The anode terminal pattern 3-1 for external connection and the cathode terminal pattern 3-2 for external connection (corresponding to the external connection terminals 103 and 105 in the prior art shown in FIG. 6) can be made thin. By occupying not, it is possible to achieve thinning and miniaturization of the entire chip-type element mounting package for a printed wiring board.

A printed wiring board for chip-type element mounting package as described in the above embodiment was manufactured.
First, a double-sided copper-clad film substrate in which 9 μm-thick copper foils 21 a and 21 b were bonded to both front and back surfaces of an insulating film substrate 1 having a thickness of 12.5 μm was prepared. And the conveyance hole 22 was punched and formed by the press work method (FIG. 3 (a)). The thickness of the insulating film substrate is preferably in the range of 12.5 μm to 25 μm, and the thickness of the copper foil is 9 μm ± 4 μm (when using a copper foil thinner than 9 μm, a copper foil with a carrier is used. Range) is preferred.
Subsequently, via holes 23 having a diameter of 40 μm were formed by laser processing so as to penetrate the copper foil 21b and the insulating film substrate 1 and stop at the lower surface of the copper foil 21a (FIG. 3B).
Then, after desmearing, DPS treatment, and the like, the anode via 4-1 and the cathode via 4-2 are formed on the surface on which the copper foil 21b is bonded by applying copper plating to a thickness of 7 μm. did. Moreover, with the copper plating at this time, the plating layer 9 was formed on the surface of the copper foil 21b (FIG. 3C).
By applying desmear, DPS treatment, etc. as a pretreatment of the copper plating, the copper foils 21a, 21b were thinned by about 2 μm, and their thickness after the treatment was about 7 μm.

  Subsequently, a resist (not shown) is applied to the surfaces of the copper foils 21a and 21b, and a resist pattern is formed by performing exposure to development of a predetermined pattern. Then, the copper foils 21a and 21b are etched by using the resist pattern. The chip-type element connection anode terminal pattern 2-1 and the chip-type element connection cathode terminal pattern 2-2 are formed on one side of the insulating film substrate 1, and the opposite side of the pattern processing is performed. On the surface, an external connection anode terminal pattern 3-1 and an external connection cathode terminal pattern 3-2 were formed (FIG. 3D).

Subsequently, a protective film 8 made of a solder resist or a photo solder resist was formed at a predetermined position near the chip-type element connecting anode terminal pattern 2-1 in each piece (FIG. 3E). The thickness of the protective film 8 was in the range of 10 to 20 μm.
Then, the exposed chip-type element connection anode terminal pattern 2-1, chip-type element connection cathode terminal pattern 2-2, external connection anode terminal pattern 3-1, and external connection cathode terminal pattern 3-2. Surface plating 5-1, 5-2, 6-1, and 6-2 formed by laminating gold (Au) plating with a thickness of 0.1 μm and nickel (Ni) plating with a thickness of 1.5 μm on each surface. FIG. 3 (f) applied respectively.

  Thereafter, although not shown in the drawings, the chip capacitor element 10 is mounted at each predetermined position using the printed wiring board for chip-type element mounting package whose main part is manufactured as described above, and its anode and cathode Then, an electrical connection structure was formed respectively, and then the entire chip capacitor element 10 and the surrounding mounting portion were sealed with a sealing resin 12. The chip-type element connection anode terminal pattern 2-1 and the chip-type element connection cathode terminal pattern 2-2 are separated from each other by press cutting or the like, and the external connection anode terminal pattern 3-1 and the external connection cathode terminal are separated. The pattern 3-2 was separated and separated into individual pieces as a chip-type element mounting package, thereby completing a chip-type element mounting package having a structure as shown in FIGS.

The printed wiring board for chip-type element mounting package according to the embodiment of the present invention thus produced has an insulating film substrate 1 having a thickness of about 12.5 μm and a chip-type element connection anode terminal pattern 2- 1. The thickness of the cathode terminal pattern 2-2 for chip-type element connection, the anode terminal pattern 3-1 for external connection, and the cathode terminal pattern 3-2 for external connection are all about 7 μm, surface plating 5-1, 5 -2, 6-1 and 6-2 are about 1.6 μm in total of about 0.1 μm of gold (Au) plating and about 1.5 μm of nickel (Ni) plating, and the plating layers 9-1 and 9-2 The total thickness was about 7 μm, and the total thickness was about 36.7 μm.
In contrast, in the case of the printed wiring board for chip-type element mounting package according to the prior art as shown in FIGS. 4, 5, and 6, the thickness of the insulating film substrate 101 is about 50 μm, The thickness of the adhesive layer 111 is about 12 μm, the thickness of the element connection terminal patterns 102 and 104 is about 25 μm, the thickness of the surface plating 112, 113, 114, and 115 is about 0.1 μm of gold (Au) plating and nickel The total thickness was about 90.2 μm with a total of about 1.6 μm with (Ni) plating of about 1.5 μm. This was 53.5 μm thick (about 2.5 times thicker) than the thickness of the printed wiring board for chip-type element mounting package according to the example of the present invention.

From these results, it was confirmed that the thickness of the entire printed wiring board for chip-type element mounting package can be made 53.5 μm thinner than that of the prior art according to this example. . In other words, according to the present embodiment, the entire thickness of the printed wiring board for chip-type element mounting package can be drastically reduced to less than half (about 40% or less) of the prior art. It can be done.

Further, in the prior art, since the contact allowance between the element connection terminal patterns 102 and 104 and the insulating film substrate 1 around the openings 117a and 117b is about 35 to 50 μm on one side, the chip type device mounting When the overall external dimensions of the package printed wiring board are reduced, the size of the external connection terminals 103 and 105 is at least from the overall external dimensions of the chip type device mounting package printed wiring board regardless of the size. It must be about 35-50 μm. In addition, it is substantially impossible to avoid the positional restriction.
However, according to the present embodiment, the chip-type element connecting anode terminal pattern 2-1 and the chip-type element connecting cathode terminal pattern 2-2 provided on one side, and the external connection provided on the opposite side surface are provided. The anode terminal pattern 3-1 and the external connection cathode terminal pattern 3-2 can be formed independently without being restricted at all in terms of securing the conventional so-called hanging allowance. It is possible to make the degree of freedom of setting the position and position extremely high.

  As described above in detail, according to the printed wiring board for chip-type element mounting package and the manufacturing method thereof according to the above-described embodiments and examples, the double-sided copper-clad film substrate is used, and the chip-type element connection is provided on one side thereof. The anode terminal pattern 2-1 for the chip and the cathode terminal pattern 2-2 for connecting the chip-type element are formed, and the anode terminal pattern 3-1 for external connection and the cathode terminal pattern 3-2 for external connection are formed on the opposite surface. Are formed and electrically connected by the anode via 4-1 and the cathode via 4-2 respectively, so that a conventional single-sided copper-clad film substrate is used and an external connection anode terminal and external connection are used. When the cathode terminal is formed by filling the plated metal, it is extremely difficult or impossible to ensure the predetermined mechanical strength, durability, transportability and stable workability, and the chip. The achievement of further thinning of the entire element mounting package for printed wiring board, it is possible to achieve both a high level.

In the above-described embodiments and examples, the case where the chip-type element to be mounted is a chip-type capacitor element is described. However, as the chip-type element, in addition, an electric resistance element, a coil element, and a transistor An element or the like can be set to be mounted.
As a specific example, the case where a three-terminal transistor element is mounted will be briefly described. Three terminal patterns for chip-type element connection are provided on one side of the insulating film substrate 1 corresponding to the three terminals. In addition to providing three external connection terminal patterns on the opposite surface, and double-sided connection vias for making electrical connections between the front and back terminal patterns for each pair of front and back terminal patterns It is sufficient to provide a total of three at least one by one.
Alternatively, it goes without saying that various types of passive elements and active elements other than those described above can be mounted.
Moreover, in said embodiment and Example, although the case where the polyimide resin film base material for tape carriers was used as the insulating film base material 1, as the insulating film base material 1, in addition, For example, it is also possible to use an insulating film substrate for a sheet-like printed wiring board set so as to be manufactured on a so-called single-wafer processing type production line. Or it is also possible to use the film base material, sheet-like base material, etc. which consist of synthetic resins other than a polyimide resin film.

DESCRIPTION OF SYMBOLS 1 Insulating film base material 2-1 Anode terminal pattern for chip type element connection 2-2 Cathode terminal pattern for chip type element connection 3-1 Anode terminal pattern for external connection 3-2 Cathode terminal pattern for external connection 4-1 Anode Via 4-2 Cathode via 5, 6 Surface plating 7-1 Anode connection piece 7-2 Cathode connection piece 8 Protective film 9 Plating layer 10 Chip capacitor element

Claims (4)

A printed wiring board for a chip-type element mounting package set so that the chip-type element is mounted,
An insulating film substrate;
A chip-type element connection terminal pattern provided on one side of the insulating film substrate;
An external connection terminal pattern provided on the surface opposite to the one surface of the insulating film substrate;
A double-sided connection via provided so as to pass through the insulating film base material and electrically connect the terminal pattern for chip-type element connection and the terminal pattern for external connection is provided. Printed wiring board for chip-type device mounting packages. In the printed wiring board for chip-type element mounting packages according to claim 1,
The chip-type element connecting terminal pattern is formed by patterning a copper foil bonded to one side of the insulating film substrate,
For the chip-type element mounting package, wherein the external connection terminal pattern is formed by patterning a copper foil bonded to a surface opposite to one surface of the insulating film substrate Printed wiring board. In the printed wiring board for chip-type element mounting packages according to claim 1 or 2,
The double-sided connection via is made of plated metal,
The printed wiring board for chip-type element mounting packages, wherein the surface of the external connection terminal pattern is plated with a plating metal of the same type as the plating metal of the double-sided connection via. A method of manufacturing a printed wiring board for a chip-type element mounting package set so that the chip-type element is mounted,
Using a double-sided copper-clad film substrate in which copper foils are bonded to both sides of an insulating film substrate, the copper foil on one side of the double-sided copper-clad film substrate is patterned by an etching method, and a chip-type element connection terminal pattern Forming a step;
Patterning the copper foil on the opposite side of the double-sided copper-clad film substrate by an etching method to form an external connection terminal pattern; and
Forming a double-sided connection via for electrically connecting the chip-type element connection terminal pattern and the external connection terminal pattern through the insulating film substrate. A method of manufacturing a printed wiring board for an element mounting package.

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