JP2012064802A - Manufacturing method for bonded wafer - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method for manufacturing an SOI wafer with a high-concentration layer at a bottom of an SOI layer at lost cost in a manner that a bonded SOI wafer manufactured by an ion implantation separation method with a wafer with general dopant concentration used as a bonding wafer is subjected to epitaxial growth after the dopant concentration of a seed layer is increased.SOLUTION: A manufacturing method for a bonded wafer comprises the steps of: manufacturing a bonded wafer with a silicon thin film on a base wafer by an ion implantation separation method; performing flattening thermal treatment in an atmosphere including hydrogen or hydrogen chloride on the bonded wafer; and performing thermal treatment after the flattening thermal treatment while feeding a dopant gas to a thermal treatment chamber where the flattening thermal treatment has been performed in order to control the dopant concentration of the silicon thin film.

Description

  The present invention relates to a bonded wafer having a silicon thin film using an ion implantation delamination method, and in particular, has a high-concentration layer in the vicinity of the interface between an SOI layer that is a silicon thin film and a buried oxide film layer (that is, at the bottom of the SOI layer). The present invention relates to a method for manufacturing a bonded SOI wafer.

  As a method for manufacturing a bonded wafer, there are known a method in which two wafers are bonded together, and then one wafer is thinned by grinding and polishing, and an ion implantation separation method (also referred to as Smart Cut (registered trademark) method). However, if the silicon thin film is limited to the manufacture of bonded wafers having a thickness of 500 nm or less, the ion implantation delamination method has become the mainstream.

  In this method, at least one of hydrogen ions and rare gas ions is implanted into one main surface of at least one of two silicon wafers (bond wafer) to form an ion implantation layer (separation layer) inside the wafer. Thereafter, the ion-implanted surface and one main surface of the other silicon wafer (base wafer) are bonded together directly or through an oxide film, and then heat treatment is performed to separate them by a release layer. When a wafer is manufactured, it has an advantage that a thin-film SOI wafer having an SOI layer thickness uniformity of ± 10 nm or less can be easily manufactured, and an advantage that a bonded bond wafer can be reused multiple times to reduce costs. Because.

  By the way, an SOI wafer having an SOI layer thickness of several μm to several tens of μm and having excellent film thickness uniformity is strongly demanded for power devices or CMOS image sensor applications. As described above, an SOI wafer having a desired SOI layer thickness and excellent film thickness uniformity is produced by a method of performing epitaxial growth on a thin film SOI wafer produced by an ion implantation separation method.

  In the SOI wafer for the power device or the CMOS image sensor described above, a region containing a high concentration of dopant in the vicinity of the interface between the SOI layer and the buried oxide film layer (that is, the bottom of the SOI layer) in order to improve device characteristics. An SOI wafer having a structure having a (high concentration layer) is desired.

In order to realize this, as described in Patent Document 2, as a bond wafer for forming an SOI layer, a wafer made from a silicon single crystal containing a high concentration of dopant can be used. However, a silicon single crystal containing a dopant at a high concentration (1 × 10 ¹⁸ / cm ³ or more) is mirror-polished compared to a normal dopant concentration (relatively low concentration of the order of 1 × 10 ¹⁵ / cm ³ ). Due to the slow polishing speed when performing the wafer processing, the wafer processing becomes difficult and the cost increases, and due to surface roughness after polishing and polishing scratches, bonding of voids and blisters in the manufacturing process of bonded SOI wafers Many defects tend to occur. For this reason, a special surface treatment (plasma treatment or the like) for increasing the bonding strength is required separately, which increases the manufacturing cost.

  Furthermore, the SOI layer of the thin film SOI wafer produced from the bond wafer containing the dopant at a high concentration is used as a seed layer, and the SOI layer is thickened by epitaxial growth on the surface thereof. Since the concentration is reduced by diffusion in the growth process, when the epi growth is completed, the concentration is significantly lower than the initial concentration, and the required standard may not be satisfied.

JP2000-30995 JP 2010-153637 A

  The present invention has been made in view of the above problems, and in a bonded SOI wafer manufacturing process in which a high concentration dopant is contained in a seed layer, the dopant is diffused outward during the planarization heat treatment, thereby increasing the seed layer. The purpose is to suppress resistance, to suppress bonding defects such as voids and blisters, and to reduce costs when processing bond wafers.

  In order to solve the above-mentioned problem, the present invention forms an ion implantation layer by implanting at least one kind of gas ions of hydrogen ions and rare gas ions from the surface of the bond wafer, and the ion-implanted surface of the bond wafer. And the surface of the base wafer are bonded directly or through an oxide film, and then the bond wafer is peeled off by the ion implantation layer to produce a bonded wafer having a silicon thin film on the base wafer. In the method for manufacturing a bonded wafer in which planarizing heat treatment is performed in an atmosphere containing hydrogen or hydrogen chloride on the bonded wafer, the planarizing heat treatment is performed after the planarizing heat treatment in order to control the dopant concentration of the silicon thin film. A bonding process characterized by flowing a dopant gas into the heat treatment apparatus and performing heat treatment. To provide a process for the preparation of Doha.

Thus, since the dopant concentration of the seed layer can be easily changed by controlling the dopant gas concentration in the dopant gas heat treatment, a wafer having a normal dopant concentration can be used as the bond wafer. For this reason, since the incidence rate of voids and blisters on the SOI layer after peeling can be suppressed and a special surface treatment process such as plasma treatment can be omitted, the cost can be reduced. Further, the polishing rate can be increased as compared with a wafer having a high dopant concentration, and the substrate cost associated with the production of the bond wafer can be reduced. Furthermore, the process can be shared with the bonded SOI wafer having other specifications until the planarization process, and the cost can be further reduced.
Further, after the planarization heat treatment, the dopant concentration in the silicon thin film is surely set to a desired concentration, particularly 1 × 10 ¹⁸ / cm, by performing a heat treatment by flowing a dopant gas into the heat treatment apparatus that has performed the planarization heat treatment. It can be adjusted to a high density of ³ or more. Further, as in the case where a low-resistance crystal is used as a bond wafer from the beginning, it is possible to suppress an increase in resistance due to the outward diffusion of the dopant during the heat treatment.

At this time, it is preferable to use a bond wafer having a dopant concentration of less than 1 × 10 ¹⁸ / cm ³ . Furthermore, it is preferable to use a dopant concentration of 1 × 10 ¹⁷ / cm ³ or less. Furthermore, it is more preferable to use a dopant concentration of 1 × 10 ¹⁵ / cm ³ or less.

Thus, the said bond wafer can use the thing of a normal dopant concentration whose dopant concentration is less than 1 * 10 < ¹⁸ > / cm < ³ >. If the dopant concentration of the bond wafer to be used is less than 1 × 10 ¹⁸ / cm ³ , the concentration does not become high, so that a decrease in the polishing rate is suppressed. As a result, bonding failure, high cost, resistivity due to outward diffusion Defects etc. can be suppressed and the effects of the present invention can be sufficiently obtained.

At this time, it is preferable to control the dopant concentration contained in the silicon thin film after the heat treatment by flowing the dopant gas to 1 × 10 ¹⁸ / cm ³ or more.

Thus, the dopant concentration contained in the silicon thin film after the heat treatment by flowing the dopant gas can be controlled to 1 × 10 ¹⁸ / cm ³ or more. In the present invention, an SOI wafer having a desired high dopant concentration of 1 × 10 ¹⁸ / cm ³ or more can be obtained even if a normal-resistance bond wafer is used.

  Moreover, in this invention, silicon epitaxial growth is performed on the said silicon | silicone thin film of the said bonded wafer after the said dopant gas heat processing, The manufacturing method of the bonded wafer characterized by the above-mentioned is provided.

  Thus, by performing silicon epitaxial growth on the silicon thin film of the bonded wafer after the dopant gas heat treatment, an SOI wafer having a desired SOI layer thickness and excellent film thickness uniformity can be produced. Furthermore, an SOI wafer having a structure having an SOI layer (epitaxial layer) having a higher resistivity on an SOI layer (seed layer) having a lower resistivity can be obtained.

  At this time, it is preferable that the planarization heat treatment, the dopant gas heat treatment, and the silicon epitaxial growth are successively processed in the same apparatus.

  As described above, the planarized heat treatment, the dopant gas heat treatment, and the silicon epitaxial growth are successively processed in the same apparatus, whereby a thick bonded wafer can be manufactured more efficiently.

  Further, at this time, it is preferable to perform a process of purging the dopant gas while being kept at a temperature lower than the dopant gas heat treatment temperature after the end of the dopant gas heat treatment and before performing the silicon epitaxial growth.

  As described above, the dopant gas purge process is performed by purging the dopant gas while being held at a temperature lower than the dopant gas heat treatment temperature after the dopant gas heat treatment is completed and before the silicon epitaxial growth is performed. As a result, it is possible to suppress the outward diffusion of boron incorporated in the seed layer and to prevent unintentional doping from occurring in the epitaxial layer.

  At this time, it is preferable that the temperature at which the dopant gas purge process is performed is 1050 ° C. or lower.

  Thus, by setting the temperature at which the dopant gas purging process is performed to 1050 ° C. or less, the outward diffusion of boron taken into the seed layer can be reliably suppressed.

  As described above, according to the present invention, the SOI wafer after the bonding and peeling process is heat-treated in an atmosphere containing hydrogen or hydrogen chloride, and after planarizing the wafer surface, the dopant gas is contained in the heat treatment apparatus. The concentration of the entire surface of the SOI layer can be increased by performing a heat treatment and then the epitaxial growth is performed, whereby the dopant concentration of the seed layer can be easily changed by controlling the dopant gas concentration in the dopant gas heat treatment. it can. Therefore, since a wafer having a normal dopant concentration can be used as a bond wafer, the generation rate of voids and blisters on the SOI layer after peeling can be suppressed, and a special surface treatment process such as plasma treatment can be omitted. Therefore, the cost can be reduced. Further, the polishing rate can be increased as compared with a wafer having a high dopant concentration, and the substrate cost associated with the production of the bond wafer can be reduced. Furthermore, the process can be shared with the bonded SOI wafer having other specifications until the planarization process, and the cost can be further reduced.

3 shows a manufacturing flow of an SOI wafer having a high concentration seed layer according to the present invention. The flow for producing an SOI wafer having a high concentration seed layer by a conventional method is shown. The heat treatment is performed with the gas flow rate and the heat treatment temperature constant, and the relationship between the seed layer resistivity after the heat treatment, the B ₂ H ₆ concentration, and the heat treatment time is shown. 3 shows a boron concentration profile at an epi temperature of 1080 ° C. of an SOI wafer having a high-concentration seed layer manufactured according to a comparative example and an example. 3 shows a boron concentration profile at an epi temperature of 1000 ° C. of an SOI wafer having a high-concentration seed layer manufactured according to a comparative example and an example.

Hereinafter, the present invention will be described more specifically.
As described above, conventionally, in a bonded SOI wafer manufacturing process in which a seed layer contains a high-concentration dopant, it is possible to suppress the seed layer from increasing in resistance due to the dopant diffusing out during the planarization heat treatment, There has been a demand for a method of suppressing bonding defects such as voids and blisters, and further reducing costs when processing bond wafers.

  As a result of various studies by the present inventors, the SOI wafer after the bonding and peeling process is heat-treated in an atmosphere containing hydrogen or hydrogen chloride to flatten the wafer surface, and then a dopant gas is flowed into the heat treatment apparatus. By performing the heat treatment, the entire surface of the SOI layer is highly concentrated, and the dopant concentration of the seed layer can be easily changed by controlling the dopant gas concentration in the dopant gas heat treatment. For this reason, since a wafer having a normal dopant concentration can be used as a bond wafer, the generation rate of voids and blisters on the SOI layer after peeling can be suppressed, and a special surface treatment process such as plasma treatment can be performed. Cost can be reduced. Further, the polishing rate can be increased as compared with a wafer having a high dopant concentration, and the substrate cost associated with the production of the bond wafer can be reduced. Furthermore, the process can be shared with the bonded SOI wafer having other specifications until the flattening process, and the cost can be further reduced. As a result, the present invention has been completed.

  That is, according to the present invention, an ion implantation layer is formed by implanting at least one kind of hydrogen ion or rare gas ion from the surface of the bond wafer, and the surface of the bond wafer and the surface of the base wafer are implanted. Is bonded directly or through an oxide film, and then the bond wafer is peeled off by the ion implantation layer to produce a bonded wafer having a silicon thin film on the base wafer. In a method for manufacturing a bonded wafer in which planarization heat treatment is performed in an atmosphere containing hydrogen chloride, in order to control the dopant concentration of the silicon thin film, after the planarization heat treatment, a dopant gas is contained in the heat treatment apparatus that has performed the planarization heat treatment. Is a method for manufacturing a bonded wafer, characterized in that .

Hereinafter, embodiments of the present invention will be described with reference to FIG. 1, but the present invention is not limited thereto. For comparison, FIG. 2 shows a flow according to the conventional method.
First, as shown in FIG. 1A, heat treatment is performed using a P ^- wafer as a bond wafer 1 to form an oxide film 3. Thereafter, hydrogen ion implantation is performed to form the ion implantation layer 4.

Here, as the bond wafer 1, a wafer having a normal dopant concentration (for example, 2 × 10 ¹⁵ / cm ³ ) can be used. At this time, a special process (plasma process) for increasing the bonding strength is not required, and can be directly bonded to the base wafer 2 (no oxide film) as shown in FIGS. The thickness and the like of the oxide film 3 should be determined according to the specifications and are not particularly limited. For example, an oxide film having a thickness of about 150 nm can be formed. As thermal oxidation conditions, for example, pyrogenic oxidation, temperature can be 800 to 1200 ° C., and oxidation time can be 30 to 120 minutes.
The dopant concentration of the bond wafer 1 is prepared, bonding defects, high cost, suppressing the outward resistivity such as defective by diffusion, to obtain a sufficient effect according to the invention, of less than 1 × 10 18 ^/ cm ³ Can be used. Preferably, a dopant concentration of 1 × 10 ¹⁷ / cm ³ or less can be used. More preferably, a dopant concentration of 1 × 10 ¹⁵ / cm ³ or less can be used. On the other hand, in the conventional method, as shown in FIG. 2A, a P ⁺ wafer having a dopant concentration of 1 × 10 ¹⁸ / cm ³ or more is prepared as a bond wafer 1 ′.

  Next, as shown in FIG. 1C, the heat treatment for peeling the bond wafer 1 is performed to produce an SOI wafer having a normal concentration SOI layer 5 (seed layer).

Here, as a peeling condition, for example, the bond wafer 1 can be peeled by performing a heat treatment at about 500 ° C. in an inert gas atmosphere.
As for the occurrence rate of voids and blisters after peeling, when a wafer with a normal dopant concentration is used as the bond wafer 1, no special treatment (plasma treatment) is performed to increase the bond strength before bonding. In the conventional SOI wafer manufacturing method shown in FIG. 2, the bond wafer surface of the high-concentration dopant is plasma-treated before bonding to increase the bond strength (to suppress the generation of voids after peeling) (FIG. 2B )). When these inventions are compared with conventional manufacturing methods, the same results can be obtained in the incidence of voids and blisters.

Next, in FIG. 1 (d), planarization heat treatment is performed in an HCl gas-containing atmosphere, and then the temperature of the planarization heat treatment is maintained or adjusted to a desired temperature, and then the introduced gas is HCl. Switching from the containing atmosphere to an atmosphere containing a dopant gas such as B ₂ H ₆ gas or PH ₃ gas, a dopant gas heat treatment is performed. Thereafter, in order to purge the dopant gas, the temperature is lowered to a temperature lower than the temperature when the dopant gas heat treatment is once performed, and the purge is performed only with hydrogen gas. Thereafter, as shown in FIG. 1E, a source gas such as silane gas is introduced, and silicon epitaxial growth is performed on the SOI layer 5 to form an epitaxial layer 6.
In the present invention, since the dopant gas heat treatment is performed after the planarization heat treatment of the low dopant concentration SOI layer manufactured using the bond wafer having a low dopant concentration, the outward diffusion of the dopant in the planarization heat treatment is not a problem. First, the dopant concentration of the seed layer can be set to a desired value under the conditions during the dopant gas heat treatment. On the other hand, as shown in FIG. 2, in the conventional method, a planarization heat treatment is performed on a high dopant concentration SOI layer manufactured using a bond wafer having a high dopant concentration, which causes a problem of high resistance due to outward diffusion. .

Here, the planarization heat treatment conditions are not particularly limited, but for example, an atmosphere containing HCl gas (hydrogen gas: 80 slm, HCl gas: 400 sccm), 1100 ° C., and normal pressure (1013 hPa) can be used.
In order to increase the concentration in the vicinity of the interface between the SOI layer and the buried oxide film layer, the dopant concentration contained in the SOI layer 5 after the dopant gas heat treatment can be set to, for example, 1 × 10 ¹⁸ / cm ³ or more. The dopant gas heat treatment conditions are not particularly limited, for example, _B 2 _{H 6} gas containing atmosphere (hydrogen gas: _80slm, B 2 _{H 6} gas: 180 sccm), time may be between 1.5 minutes.
Furthermore, silicon epitaxial growth can be performed on the SOI layer 5 of the bonded wafer after the dopant gas heat treatment. As a result, an SOI wafer having a desired SOI layer thickness and excellent film thickness uniformity can be manufactured, and a higher resistivity SOI layer (seed layer) is formed on the lower resistivity SOI layer (seed layer). An SOI wafer having a structure having an epitaxial layer) can be obtained.

Further, by performing the planarization heat treatment, the dopant gas heat treatment and the epitaxial growth continuously in the same apparatus, a thick-film SOI wafer can be produced more efficiently.
Furthermore, since the dopant gas heat treatment and the epitaxial growth were performed in the same apparatus, the temperature was lowered to a temperature lower than the temperature when the dopant gas heat treatment was performed once after the dopant gas heat treatment was completed until the epitaxial growth was performed. The dopant layer is auto-doped into the epitaxial layer, and in order to reduce this, the dopant gas needs to be purged for a predetermined time after the dopant gas heat treatment, and this is caused by holding this time at a high temperature. This is to suppress a decrease in concentration due to the outward diffusion of the dopant incorporated in.
Further, in order to surely suppress the outward diffusion of boron taken into the seed layer by the dopant gas purge process, the dopant gas purge process temperature can be set to, for example, 1050 ° C. or less.

  As described above, when the bonded wafer manufacturing method of the present invention is used, the dopant concentration of the seed layer can be easily changed by controlling the dopant gas concentration in the dopant gas heat treatment. Dopant concentration wafers can be used. For this reason, since the incidence rate of voids and blisters on the SOI layer after peeling can be suppressed and a special surface treatment process such as plasma treatment can be omitted, the cost can be reduced. Further, the polishing rate can be increased as compared with a wafer having a high dopant concentration, and the substrate cost associated with the production of the bond wafer can be reduced. Furthermore, the process can be shared with the bonded SOI wafer having other specifications until the planarization process, and the cost can be further reduced.

  Hereinafter, the present invention will be described more specifically with reference to experimental examples, examples, and comparative examples, but the present invention is not limited thereto.

(Experimental example)
In FIG. 3, the following SOI wafer is set in a single wafer epitaxial growth apparatus, heat treatment is performed at a constant gas flow rate (hydrogen gas: 53 slm, B ₂ H ₆ gas: 180 sccm) and heat treatment temperature (1100 ° C.). 3 shows the relationship between the seed layer (SOI layer) resistivity, the B ₂ H ₆ concentration, and the heat treatment time (1.5 minutes, 3 minutes, 5 minutes). The resistivity was measured by the four probe method.
According to FIG. 3, the resistivity decreases as the B ₂ H ₆ concentration increases and the treatment time increases, and the boron doping amount can be controlled by the B ₂ H ₆ concentration and time. It shows that there is. Further, in the range of this experiment, it is shown that high concentration doping of 1 × 10 ¹⁹ / cm ³ or more is possible.

(Epitaxial SOI wafer)
SOI layer (seed layer): p-type, <100>, dopant concentration 1 × 10 ¹⁵ / cm ³
BOX layer: 145 nm
Base wafer: p-type, <100>, dopant concentration 1 × 10 ¹⁵ / cm ³
Diameter: 300mm

(Comparative example)
FIG. 2 shows a flow of manufacturing an SOI wafer having a high concentration seed layer by a conventional method. A P ⁺ wafer (B concentration: 1 × 10 ¹⁹ / cm ³ ) was prepared as a bond wafer, and after forming an oxide film of 150 nm, hydrogen ion implantation was performed.
Next, in order to increase the bond strength (to suppress the generation of voids and blisters after peeling), the wafer surface is plasma treated, bonded to a base wafer (no oxide film), and subjected to peeling heat treatment at 500 ° C. An SOI wafer having a concentration SOI layer (seed layer) was produced.
Next, planarization heat treatment (1100 ° C., normal pressure (1013 hPa)) is performed in an HCl gas-containing atmosphere (hydrogen gas: 80 slm, HCl gas: 400 sccm) using a single wafer type epi apparatus, and then the following conditions are continuously applied. Then, epitaxial growth of 3.5 μm was performed.

(Epi growth conditions)
Pressure: Normal pressure (1013 hPa (760 torr))
Temperature: 1080 ° C, 1000 ° C
Gas: H ₂ 60 slm, SiHCl ₃ 7 slm

(Example)
FIG. 1 shows a manufacturing flow of an SOI wafer having a high concentration seed layer according to the present invention. A P ^- wafer (B concentration: 2 × 10 ¹⁵ / cm ³ ) was used as a bond wafer, and after forming a thermal oxide film of 150 nm, hydrogen ion implantation was performed.
Since the bond wafer has a normal dopant concentration (relatively low concentration), no special treatment (plasma treatment) to increase the bond strength is required, and it is directly bonded to the base wafer (no oxide film) and subjected to a peeling heat treatment at 500 ° C. Then, an SOI wafer having a normal concentration SOI layer (seed layer) was produced.
Next, planarization heat treatment (1100 ° C., normal pressure (1013 hPa)) is performed in an HCl gas-containing atmosphere (hydrogen gas: 80 slm, HCl gas: 400 sccm) by a single wafer epi apparatus, and then, while maintaining 1100 ° C., The introduction gas of the single wafer type epi apparatus is switched from an HCl gas-containing atmosphere to a B ₂ H ₆ gas-containing atmosphere (hydrogen gas: 53 slm, B ₂ H ₆ gas (100 ppm): 180 sccm), and a dopant gas heat treatment is performed for 1.5 minutes. went. Thereafter, in order to purge the dopant gas, the temperature was once lowered to 1000 ° C., and after purging with only hydrogen gas for 1 minute, epitaxial growth of 3.5 μm was performed under the same conditions as in the comparative example. (At this time, the planarization heat treatment, the dopant gas heat treatment, and the epi growth were performed by continuous treatment in the same apparatus.)

4 and 5 show boron concentration profiles of an SOI wafer having a high-concentration seed layer produced by a comparative example (conventional process) and an example (process of the present invention).
Table 1 shows a comparison between the comparative example (conventional process) and the example (process of the present invention) regarding the boron concentration in the seed layer.
In the comparative example (conventional process), even if a wafer having an initial boron concentration of 1 × 10 ¹⁹ / cm ³ is used, the boron concentration (peak concentration) of the seed layer is less than half of the initial concentration after the SOI manufacturing. Yes. On the other hand, in the example (process of the present invention), the boron concentration (peak concentration) of the seed layer after epitaxial growth by the dopant gas heat treatment is 1 × 10 ¹⁹ even when a wafer having a boron concentration of 2 × 10 ¹⁵ / cm ³ is used. It shows that it can be increased to about / cm ³ .
Further, the boron concentration of the seed layer is also affected by the epitaxial growth temperature, and the lowering of the boron concentration of the seed layer can be suppressed as the temperature is low.
Note that BOX and BASE in FIGS. 4 and 5 indicate a buried oxide film and a base wafer, respectively.

The present invention is not limited to the above embodiment. The above-described embodiment is an exemplification, and the present invention has any configuration that has substantially the same configuration as the technical idea described in the claims of the present invention and that exhibits the same effects. Are included in the technical scope.
Although the present invention has been described mainly using a high-resistance wafer as a bond wafer, it does not exclude the use of a low-resistance wafer having a dopant concentration of 1 × 10 ¹⁸ / cm ³ or more as the bond wafer. Even in this case, in the present invention, since the dopant gas heat treatment is performed after the flattening heat treatment, the problem of increasing the resistance of the seed layer due to outward diffusion in the flattening heat treatment can be improved.

DESCRIPTION OF SYMBOLS 1,1 '... Bond wafer, 2 ... Base wafer, 3 ... Oxide film, 4 ... Ion implantation layer, 5 ... SOI layer, 6 ... Epitaxial layer.

Claims (7)

At least one kind of hydrogen ion or rare gas ion is implanted from the surface of the bond wafer to form an ion implantation layer, and the surface of the bond wafer and the surface of the base wafer are directly or oxide-coated. Then, a bonded wafer having a silicon thin film is produced on the base wafer by peeling the bond wafer with the ion implantation layer, and the bonded wafer is flattened in an atmosphere containing hydrogen or hydrogen chloride. In the manufacturing method of the bonded wafer that performs the chemical heat treatment,
In order to control the dopant concentration of the silicon thin film, after the planarization heat treatment, a thermal treatment is performed by flowing a dopant gas into a heat treatment apparatus that has performed the planarization heat treatment. The method for producing a bonded wafer according to claim 1, wherein the bond wafer has a dopant concentration of less than 1 × 10 ¹⁸ / cm ³ . ^{3. The} bonded wafer according to claim 1, wherein the dopant concentration contained in the silicon thin film after the heat treatment by flowing the dopant gas is controlled to 1 × 10 ¹⁸ / cm ³ or more. Manufacturing method.   The method for producing a bonded wafer according to any one of claims 1 to 3, wherein silicon epitaxial growth is performed on the silicon thin film of the bonded wafer after the dopant gas heat treatment.   The method for producing a bonded wafer according to claim 4, wherein the planarization heat treatment, the dopant gas heat treatment, and the silicon epitaxial growth are successively processed in the same apparatus.   6. The process of purging the dopant gas in a state where the temperature is lower than the dopant gas heat treatment temperature after the dopant gas heat treatment is completed and before the silicon epitaxial growth is performed. Manufacturing method for bonded wafers. The method for producing a bonded wafer according to claim 6, wherein a temperature at which the dopant gas purge process is performed is set to 1050 ° C. or less.

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