JP2011124280A - Method of manufacturing soi wafer, and the soi wafer - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method of manufacturing an SOI (Silicon On Insulator) wafer, wherein an SOI wafer can be manufactured which can be adjusted to a desired resistivity by controlling the dopant concentration of an SOI layer even if a buried oxide film is thin when a silicon single-crystal wafer having a high-concentration layer containing a dopant to a high concentration is used as a base wafer and whose defect is suppressed. <P>SOLUTION: The method of manufacturing the SOI wafer includes: a sticking step of sticking a bond wafer and the base wafer together, with a silicon oxide film interposed; a film thinning step of performing film thinning of the bond wafer and forming the SOI layer on the buried oxide film; and a step of performing a heat treatment for reducing the thickness of the buried oxide film. The method of manufacturing the SOI wafer is characterized by having a step of performing a heat treatment for adjusting the resistivity of the SOI layer by reducing the dopant included in the SOI layer after the step of performing the heat treatment for reducing the thickness of the buried oxide film. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to an SOI (Silicon On Insulator) wafer manufactured by bonding silicon single crystal wafers, and in particular, a thin buried oxide using a low resistivity silicon single crystal wafer containing a high concentration of dopant as a base wafer. The present invention relates to a method for manufacturing an SOI wafer having a film.

  As device generation progresses, in order to meet the trend target for higher performance, it is not possible to cope with scaling effects using conventional bulk silicon wafers, but a new device structure is required. Has been. In addition, due to the wide range of types of devices using SOI wafers, there is a demand in a wide range for the thickness of the buried oxide film as well as the thickness of the SOI layer.

  In general, there are a bonding method, a SIMOX method, and the like as a method for manufacturing an SOI wafer. In manufacturing an SOI wafer having a thin SOI layer, from the viewpoint of flexibility in manufacturing an SOI layer in a wide film thickness range. A manufacturing method using an ion implantation separation method (also referred to as a smart cut (registered trademark) method), which is one of the bonding methods, has become the mainstream.

In this ion implantation separation method, the buried oxide film is formed by growing an oxide film on the wafer at the stage before bonding, and by controlling the oxide film growth thickness before bonding, the SOI wafer is formed. The thickness of the buried oxide film is controlled.
However, when the buried oxide film is thin (especially about 100 nm or less), defects called voids and blisters are likely to occur in the SOI wafer, and it is difficult to obtain a good product, and the yield may be deteriorated.

  In addition, even after forming the SOI layer by peeling off the ion-implanted layer, various heat treatments may be performed for the purpose of adjusting the thickness and surface condition of the SOI layer. It is known that not only the thickness of the SOI layer but also the thickness of the buried oxide film changes, and in controlling the thickness of the buried oxide film, it is necessary to control the heat treatment process during the manufacture of the SOI wafer. .

  Therefore, a method has been developed in which the thickness of the buried oxide film is positively adjusted by controlling the heat treatment process when manufacturing the SOI wafer. That is, an SOI wafer with fewer defects is obtained by bonding the oxide film in a state thicker than the final target thickness of the buried oxide film, and adjusting the thickness of the buried oxide film in a heat treatment process when manufacturing the SOI wafer later. (See Patent Documents 1 and 2).

On the other hand, in order to propose an SOI wafer having sufficient heavy metal gettering ability to suppress the influence of metal impurities in the device process, dopants such as boron, phosphorus, antimony, and arsenic are added to the entire wafer or at least the wafer surface layer. There is a method of manufacturing an SOI wafer using a base wafer containing a high concentration.
In this case, the dopant diffuses from the base wafer to the SOI layer by the heat treatment during the manufacturing of the SOI wafer as described above.

  Patent Document 3 discloses a method for suppressing diffusion of such a dopant by controlling the formation and thickness of an oxide film.

JP 2004-221198 A JP 2006-156770 A JP 2008-244019 A

  The SOI layer serving as the device active layer in the SOI wafer needs to maintain a desired resistance value according to the device design. However, in the method of manufacturing an SOI wafer using a base wafer containing a high concentration of the dopant as described above, a relatively high heat treatment temperature (for example, 1200 ° C. or more) for thinning the buried oxide film is used. Depending on the heat treatment time, the dopant in the base wafer diffuses into the SOI layer through the buried oxide film, and the resistivity of the SOI layer decreases. In particular, when the buried oxide film is thin, the dopant in the base wafer diffuses and easily reaches the SOI layer, so that there is a problem that the influence of the change in the resistivity of the SOI layer is high.

  Further, in Patent Document 3 described above, it is necessary to select a sufficient oxide film thickness in order to suppress the diffusion of the dopant. Usually, the thickness of the buried oxide film of the SOI wafer is based on a requirement from the device design. Therefore, it is not always possible to select a buried oxide film thickness that can suppress dopant diffusion.

  The present invention has been made in view of the problems as described above, and when a silicon single crystal wafer having a high concentration layer containing a high concentration of dopant is used as a base wafer, even if the buried oxide film is thin, An object of the present invention is to provide an SOI wafer manufacturing method capable of manufacturing an SOI wafer in which the dopant concentration of the SOI layer can be controlled and adjusted to a desired resistivity and defects are suppressed, and to provide such an SOI wafer.

  In order to achieve the above object, according to the present invention, a base wafer composed of a silicon single crystal wafer having a high concentration layer containing a dopant at a high concentration in at least the wafer surface layer portion, and a higher concentration layer of the base wafer. A step of preparing a bond wafer made of a silicon single crystal wafer containing a low-concentration dopant, a bonding step of bonding the bond wafer and the base wafer via a silicon oxide film, and the bond wafer In a method for manufacturing an SOI wafer, including a thinning step of forming a SOI layer on the buried oxide film by thinning and a heat treatment for reducing the thickness of the buried oxide film, the thickness of the buried oxide film is reduced. After the step of reducing the heat treatment, the dopant contained in the SOI layer is reduced to reduce the SOI layer. The method for manufacturing an SOI wafer, comprising a step of performing heat treatment to adjust the resistivity is provided.

  Thus, after the step of performing the heat treatment for reducing the thickness of the buried oxide film, an SOI wafer having a step of performing a heat treatment for adjusting the resistivity of the SOI layer by reducing the dopant contained in the SOI layer. In the case of a manufacturing method, when a silicon single crystal wafer having a high concentration layer containing a dopant at a high concentration is used as a base wafer, a heat treatment is performed to reduce the thickness of the buried oxide film even if the buried oxide film is thin. When the buried oxide film is made to have a desired thickness in the process, the concentration of the dopant excessively incorporated in the SOI layer can be controlled and reduced by heat treatment, so that the SOI layer has a desired resistivity. An SOI wafer in which defects such as voids and blisters are controlled can be manufactured.

  At this time, the bond wafer to be prepared is formed by implanting at least one of hydrogen ions or rare gas ions into the bond wafer to form an ion implantation layer, and thinning the bond wafer in the thinning step Is preferably performed by peeling off the bond wafer in the ion-implanted layer.

  Ion implantation has high control accuracy of the implantation depth, and it is possible to implant ions to a predetermined depth in the bond wafer to form an ion implantation layer, and after bonding, the bond wafer can be peeled off at the ion implantation layer. is there. In this way, the thickness of the remaining bond wafer can be adjusted to a high degree to reduce the thickness.

At this time, the base wafer to be prepared is a p ⁺ silicon single crystal wafer having a high concentration layer by containing boron at a high concentration in the entire wafer, and the dopant concentration of the base wafer is set to 5 × 10 ¹⁸ atoms / cm ³ or more.

As described above, the base wafer to be prepared is a p ⁺ silicon single crystal wafer having a high concentration layer by containing boron at a high concentration in the entire wafer, and the dopant concentration of the base wafer is set to 5 × 10 ¹⁸ atoms / Even in the case of cm ³ or more, according to the method for manufacturing an SOI wafer of the present invention, the resistivity of the SOI layer can be adjusted by controlling the dopant concentration of the SOI layer. Further, if such a base wafer is used, an SOI wafer having a high gettering capability and a smaller warpage can be manufactured.

  Further, at this time, a heat treatment for reducing the thickness of the buried oxide film is performed at a temperature of 1000 ° C. or higher in an atmosphere of hydrogen gas, argon gas, or a mixed gas thereof, and a heat treatment for adjusting the resistivity of the SOI layer is performed. It is preferable that the temperature be lower than the temperature of the heat treatment for reducing the thickness of the buried oxide film in an atmosphere of hydrogen gas or a reducing mixed gas containing hydrogen.

As described above, if the heat treatment for reducing the thickness of the buried oxide film is performed at a temperature of 1000 ° C. or higher in an atmosphere of hydrogen gas, argon gas, or a mixed gas thereof, the effect of reducing the thickness of the buried oxide film is sufficiently obtained. Therefore, a long-time heat treatment is not required to obtain a desired thickness.
In addition, if the heat treatment for adjusting the resistivity of the SOI layer is performed in an atmosphere of hydrogen gas or a reducing mixed gas containing hydrogen, the dopant excessively taken into the SOI layer is efficiently diffused out of the SOI layer. It is possible to adjust the dopant concentration inside in a relatively short time. Further, if the temperature is lower than the temperature of the heat treatment for reducing the thickness of the buried oxide film, it is possible to suppress the incorporation of a new dopant from the base wafer into the SOI layer, so that the resistivity of the SOI layer can be adjusted more reliably. In addition, it is possible to prevent the buried oxide film from being newly reduced in thickness.

At this time, a heat treatment for reducing the thickness of the buried oxide film is performed at a temperature of 1200 ° C. to 1350 ° C., and a heat treatment for adjusting the resistivity of the SOI layer is performed at a temperature of 1000 ° C. to 1200 ° C. Is preferred.
As described above, if the heat treatment for reducing the thickness of the buried oxide film is performed at a temperature of 1200 ° C. or higher and 1350 ° C. or lower, the occurrence of heavy metal contamination and slip dislocation from the heat treatment furnace can be suppressed in a shorter time. The thickness of the buried oxide film can be reduced.
In this case, if the heat treatment for adjusting the resistivity of the SOI layer is performed at a temperature of 1000 ° C. or more and 1200 ° C. or less, the dopant excessively incorporated in the SOI layer can be diffused out very efficiently. The dopant concentration can be adjusted in a short time.

According to the present invention, the buried oxide film manufactured by the method for manufacturing an SOI wafer of the present invention has a thickness of 50 nm or less, and the dopant concentration of the base wafer is 5 × 10 ¹⁸ atoms / cm ³ or more. There is provided an SOI wafer in which the dopant concentration of the SOI layer is 5 × 10 ¹⁷ atoms / cm ³ or less.

Thus, the thickness of the buried oxide film manufactured by the SOI wafer manufacturing method of the present invention is 50 nm or less, the dopant concentration of the base wafer is 5 × 10 ¹⁸ atoms / cm ³ or more, and If the SOI wafer has an SOI layer with a dopant concentration of 5 × 10 ¹⁷ atoms / cm ³ or less, the base wafer has a high dopant concentration of 5 × 10 ¹⁸ atoms / cm ³ or more, high gettering capability, and buried oxidation. Although the film thickness is as thin as 50 nm or less, the dopant concentration of the SOI layer is controlled to 5 × 10 ¹⁷ atoms / cm ³ or less, and defects such as voids and blisters are suppressed. Is an extremely effective SOI wafer.

  According to the present invention, in a method for manufacturing an SOI wafer, including a thinning process for forming a SOI layer on the buried oxide film by thinning the bond wafer and a heat treatment for reducing the thickness of the buried oxide film, the buried oxide film After the step of performing the heat treatment to reduce the thickness, the step of performing the heat treatment to adjust the resistivity of the SOI layer by reducing the dopant contained in the SOI layer, so that the high concentration layer containing the dopant in a high concentration Even if the silicon single crystal wafer is used as a base wafer and the buried oxide film is thin, the thickness of the buried oxide film is reduced to a desired thickness in the heat treatment process to reduce the thickness of the buried oxide film. In addition, the concentration of dopant excessively incorporated in the SOI layer can be controlled and reduced by heat treatment, and the SOI layer is adjusted to a desired resistivity. It is possible to manufacture an SOI wafer defects such as voids or blisters is suppressed.

It is a flowchart which shows an example of the manufacturing method of the SOI wafer of this invention.

Hereinafter, although an embodiment is described about the present invention, the present invention is not limited to this.
Generally, in an SOI wafer manufacturing method using a bonding method, the thickness of a buried oxide film is controlled mainly by controlling the oxide film thickness before bonding, and the control range (oxide film film) The thickness range can be widely implemented. However, when the buried oxide film is thin (especially about 100 nm or less), defects called voids and blisters are likely to occur in the SOI wafer, and it is difficult to obtain a good product and the yield may be deteriorated.

Therefore, the oxide film is bonded in a state where it is thicker than the final target thickness of the buried oxide film, and the bonding is performed without causing defects, and the buried oxide film is subjected to a heat treatment process in the subsequent manufacturing of the SOI wafer. A method of manufacturing an SOI wafer with few defects by adjusting the thickness of the substrate has been developed.
However, in such a conventional manufacturing method, a dopant such as boron in the base wafer according to the temperature and heat treatment time of a relatively high temperature (for example, 1200 ° C. or more) for the purpose of thinning the buried oxide film. Diffuses into the SOI layer through the buried oxide film, and the resistivity of the SOI layer decreases. In particular, when the base wafer has a high-concentration layer of a dopant of 1 × 10 ¹⁸ atoms / cm ³ or more, and further 5 × 10 ¹⁸ atoms / cm ³ or more, and the buried oxide film is thin, Since the dopant diffuses easily and reaches the SOI layer, there is a problem that the influence of changing the resistivity of the SOI layer is high.

  Therefore, the present inventors have made extensive studies to solve such problems. As a result, after the heat treatment for thinning the buried oxide film, a heat treatment for outward diffusion of the dopant in the SOI layer of the SOI wafer is added to obtain a buried oxide film having a desired thickness. The inventors have conceived that the resistivity of the SOI layer can be adjusted by reducing the dopant contained in the SOI layer, and the present invention has been completed.

FIG. 1 shows an example of a method for manufacturing an SOI wafer according to the present invention. Here, the case where the bond wafer is thinned by an ion implantation separation method will be described. However, the SOI wafer manufacturing method of the present invention is not limited to this, and the bond wafer is thinned by grinding, polishing, etching, or the like. You can also
First, a base wafer 1 and a bond wafer 2 are prepared (step a).
At this time, the base wafer 1 is a silicon single crystal wafer having a high concentration layer containing a dopant at a high concentration in at least the wafer surface layer portion, and the bond wafer 2 has a lower concentration dopant than the high concentration layer of the base wafer 1. The silicon single crystal wafer is contained.

Here, the “high concentration” of the dopant of the base wafer 1 indicates that it is higher than the dopant concentration of the bond wafer 2, specifically, 1 × 10 ¹⁸ atoms / cm ³ or more. This is because the influence of the resistivity on the SOI layer due to the diffusion of the dopant in the heat treatment becomes a problem at a high concentration higher than such a concentration. Further, the base wafer 1 may have a high concentration layer only in the wafer surface layer portion or may be in the entire wafer. The conductivity type of the base wafer 1 may be either n-type or p-type, and the dopant species is not particularly limited. For example, the dopant may be boron and the conductivity type may be p-type, or the dopant may be phosphorus, antimony, or arsenic and the conductivity type may be n-type.
The conductivity type of the bond wafer 2 may be either n-type or p-type, and the dopant species is not particularly limited, and can be appropriately selected according to the purpose.

Here, the base wafer 1 is a p ⁺ silicon single crystal wafer having a high concentration layer by containing boron at a high concentration in the entire wafer, and the dopant concentration of the base wafer 1 is 5 × 10 ¹⁸ atoms / cm ^3. Description will be made by taking the above (0.014Ωcm or less) as an example.
If such a low resistivity p ⁺ silicon single crystal wafer having a high concentration layer by containing a dopant at a high concentration of 5 × 10 ¹⁸ atoms / cm ³ or more, the gettering ability of the base wafer 1 is improved. The strength can be increased and the strength can be increased to reduce warping.

In this case, the bond wafer 2 can be a p-type silicon single crystal wafer having a normal resistivity (for example, about 1 to 10 Ωcm).
Next, an oxide film 3 of, for example, 20 to 100 nm is formed on the surface of the bond wafer 2 (step b).
The oxide film 3 becomes a buried oxide film. The thickness of the oxide film 3 is made thicker than the thickness of the buried oxide film layer required from the device design, and a heat treatment is performed to reduce the thickness of the buried oxide film later. To achieve the desired thickness.

Next, ion implantation layer 4 is formed by ion-implanting hydrogen through bond film 2 having oxide film 3 formed on the surface through oxide film 3 (step c).
The depth of the ion implantation layer 4 at this time is reflected in the thickness of the SOI layer finally formed. Therefore, the thickness of the SOI layer can be controlled by performing ion implantation while controlling the implantation energy and the like.

Next, the ion-implanted bond wafer 2 is bonded to the base wafer 1 through the surface oxide film 3 (step d). At this time, the bonding surface of the bond wafer 2 is a surface on which ion implantation is performed in step c.
Here, if the bonding surface is subjected to plasma treatment, the bonding strength at room temperature is increased. Therefore, even if the oxide film thickness is, for example, 100 nm or less, void or blister free bonding is possible, but still 20 to The limit is about 30 nm. Therefore, when manufacturing an SOI wafer having a buried oxide film thickness lower than that, the oxide film is bonded in a state thicker than the final target thickness of the buried oxide film, and the buried oxide film is formed in a later process. The SOI wafer manufacturing method of the present invention in which heat treatment is performed to reduce the thickness of the present invention can be suitably applied.

Next, the bond wafer 2 is thinned to form an SOI layer on the buried oxide film. Here, as shown in FIG. 1, the bonded two wafers are subjected to a heat treatment for separation, separated by a hydrogen ion implantation layer 4, and an SOI layer 5 is formed on the buried oxide film 6 (step e). ).
For example, if a bonded wafer 2 is subjected to a heat treatment at a temperature of about 500 ° C. or higher for 30 minutes or more in an inert gas atmosphere such as Ar, the bond wafer 2 is formed by crystal rearrangement and agglomeration of bubbles. It can be peeled off by the ion implantation layer 4.

Next, heat treatment is performed on the obtained bonded wafer 7 to reduce the thickness of the buried oxide film 6 (step f). By this heat treatment, the thickness of the buried oxide film 6 can be reduced to a desired thickness. The thickness of the buried oxide film 6 can be reduced to about 5 to 50 nm.
At this time, the heat treatment for reducing the thickness of the buried oxide film is preferably performed at a temperature of 1000 ° C. or higher in an atmosphere of hydrogen gas, argon gas, or a mixed gas thereof. By setting such a heat treatment condition, the thickness of the buried oxide film 6 can be effectively reduced, so that it is not necessary to perform the heat treatment for a long time in order to obtain a desired thickness.

At this time, it is more preferable to perform the heat treatment for reducing the thickness of the buried oxide film at a temperature of 1200 ° C. or higher and 1350 ° C. or lower. The thickness of the buried oxide film 6 can be reduced with time.
However, during the heat treatment for reducing the thickness of the buried oxide film, boron diffuses from the base wafer through the buried oxide film 6 into the SOI layer 5 and the boron concentration in the SOI layer 5 increases.

Therefore, after the step of performing the heat treatment for reducing the thickness of the buried oxide film, the heat treatment for adjusting the resistivity of the SOI layer by reducing the dopant contained in the SOI layer is performed (step g). By performing this heat treatment while controlling conditions such as temperature and time, an SOI wafer having an SOI layer 5 ′ adjusted to a desired resistivity can be obtained.
This heat treatment is preferably performed at a temperature lower than the temperature of the heat treatment for reducing the thickness of the buried oxide film in an atmosphere of hydrogen gas or a reducing mixed gas containing hydrogen.

  In such a hydrogen gas-containing atmosphere, dopants excessively incorporated into the SOI layer can be efficiently outwardly diffused, and the dopant concentration in the SOI layer can be adjusted in a relatively short time. If the heat treatment temperature at this time is lower than the heat treatment temperature of the heat treatment for reducing the thickness of the buried oxide film, it is possible to suppress the incorporation of a new dopant from the base wafer into the SOI layer. Adjustment can be performed more reliably, and the buried oxide film can be prevented from being newly reduced in thickness.

  At this time, it is preferable to perform heat treatment for adjusting the resistivity of the SOI layer at a temperature of 1000 ° C. or higher and 1200 ° C. or lower. By heat-treating in such a temperature range, dopants excessively incorporated in the SOI layer can be diffused out very efficiently, so the dopant concentration in the SOI layer can be adjusted in a short time, for example, 1 hour or less. Is possible. Thereby, the thickness reduction of the buried oxide film during the heat treatment for adjusting the resistivity of the SOI layer can be minimized.

By the SOI wafer manufacturing method of the present invention as described above, the dopant concentration of the base wafer is high, particularly 5 × 10 ¹⁸ atoms / cm ³ or more, and the gettering capability is high, and the thickness of the buried oxide film is 50 nm. An SOI wafer in which the dopant concentration of the SOI layer is controlled to 5 × 10 ¹⁷ atoms / cm ³ or less and the crystallinity of the SOI layer in which defects such as voids and blisters are suppressed is extremely effective despite being thin. Can be obtained.

  EXAMPLES Hereinafter, the present invention will be described more specifically with reference to examples and comparative examples of the present invention, but the present invention is not limited to these.

Example 1
As described below, an SOI wafer was manufactured according to the SOI wafer manufacturing method of the present invention as shown in FIG.
An oxide film of 30 nm was formed on a silicon single crystal wafer having a diameter of 300 mm, a p-type, a crystal orientation <100>, and a resistivity of 10 Ωcm (boron concentration = 1.3 × 10 ¹⁵ atoms / cm ³ ). Thereto, hydrogen ions were implanted at a dose of 5.5 × 10 ¹⁶ atoms / cm ² .

The implanted wafer was bonded to a base wafer made of a p ⁺ silicon single crystal wafer having a resistivity of 0.007 Ωcm (boron concentration = 1.3 × 10 ¹⁹ atoms / cm ³ ). An exfoliated heat treatment was applied to the bonded wafer to produce an SOI wafer.
Note that a nitrogen plasma treatment (treatment conditions: room temperature, gas flow rate 115 sccm, pressure 0.4 Torr (53.3 Pa), output 100 W, 15 seconds) was performed on the bonding surface of the base wafer before bonding.

This SOI wafer was subjected to heat treatment in an Ar 100% atmosphere, 1200 ° C. for about 3 hours with fine adjustment of the time so that the buried oxide film became 10 nm, and a 10 nm buried oxide film was actually obtained. It was confirmed by a spectroscopic ellipsometer. Thereafter, adjustment was performed by oxidation and cleaning so that the thickness of the SOI layer became a target of 70 nm.
Thereafter, heat treatment for adjusting the resistivity by reducing the dopant contained in the SOI layer of the SOI wafer was performed. The heat treatment was performed in an epitaxial growth furnace manufactured by Applied Materials in an atmosphere of 100% hydrogen at 1050 ° C. for 5 minutes and 10 minutes.

When the boron concentration of the SOI layer of the SOI wafer thus obtained is measured by SIMS, it is 2.21 × 10 ¹⁷ atoms / cm ³ (about 0.11 Ωcm) for an SOI wafer subjected to hydrogen heat treatment for 5 minutes, 10 The boron concentration was reduced in 1.5 minutes compared to 1.57 × 10 ¹⁷ atoms / cm ³ (about 0.15 Ωcm) and 7.49 × 10 ¹⁷ atoms / cm ³ (about 0.052 Ωcm) in the comparative example described later. .
The boron concentration of the SOI layer is increased by diffusion from the base wafer, decreased by incorporation of boron into the oxide film due to oxide film growth on the SOI layer surface, and in an atmosphere of 100% hydrogen. It is determined by the balance between the decrease in boron concentration from the bond wafer surface due to out-diffusion due to the heat treatment at 1050 ° C., and boron can be changed by changing the heat treatment time at 1050 ° C. in an atmosphere of 100% hydrogen. It has been shown that the density can be adjusted to any density.

(Example 2)
A SOI wafer was manufactured in the same manner as in Example 1 except that the heat treatment conditions for adjusting the resistivity were set to conditions of 5 minutes, 10 minutes, and 15 minutes at 1100 ° C. in an atmosphere of 100% hydrogen. The SOI wafer was evaluated in the same manner as in Example 1.
When the boron concentration of the SOI layer of the obtained SOI wafer is measured by SIMS, the SOI wafer subjected to the hydrogen heat treatment for 5 minutes is 1.56 × 10 ¹⁷ atoms / cm ³ (about 0.15 Ωcm) and 8. 93 × 10 ¹⁶ atoms / cm ³ (about 0.22 Ωcm), 6.26 × 10 ¹⁶ atoms / cm ³ (about 0.29 Ωcm) for 15 minutes, and 3.32 × 10 ¹⁶ atoms / cm ³ (about 20 minutes) 0.49Ωcm).

  In this way, it is possible to adjust the boron concentration to an arbitrary concentration by changing the heat treatment time. Compared with Example 1, the temperature is increased to 1100 ° C. in an atmosphere of 100% hydrogen. Thus, it is shown that the boron concentration of the SOI layer can be changed to a low level by a shorter heat treatment.

(Comparative example)
An SOI wafer was manufactured by a conventional SOI wafer manufacturing method that does not include a heat treatment step for adjusting the resistivity, and the SOI wafer was evaluated in the same manner as in Example 1.
When the boron concentration after adjusting the thickness of the SOI layer of the obtained SOI wafer was measured by SIMS, it was 7.49 × 10 ¹⁷ atoms / cm ³ (about 0.052 Ωcm) in the SOI layer.
The boron concentration in the SOI layer is a balance between the increase due to diffusion from the base wafer and the decrease due to the incorporation of boron into the oxide film due to the oxide film growth on the SOI layer surface when adjusting the thickness of the SOI layer. It is shown that it is determined by.

  The present invention is not limited to the above embodiment. The above-described embodiment is an exemplification, and the present invention has any configuration that has substantially the same configuration as the technical idea described in the claims of the present invention and that exhibits the same effects. Are included in the technical scope.

DESCRIPTION OF SYMBOLS 1 ... Base wafer, 2 ... Bond wafer, 3 ... Oxide film, 4 ... Ion implantation layer,
5 ... SOI layer before resistivity adjustment, 5 '... SOI layer after resistivity adjustment,
6 ... buried oxide film, 7 ... SOI wafer.

Claims (6)

A base wafer made of a silicon single crystal wafer having a high concentration layer containing a dopant at a high concentration at least in the wafer surface layer portion, and a bond made of a silicon single crystal wafer containing a dopant at a lower concentration than the high concentration layer of the base wafer A step of preparing a wafer, a bonding step of bonding the bond wafer and the base wafer via a silicon oxide film, and a thin film for forming an SOI layer on the buried oxide film by thinning the bond wafer And a method of manufacturing an SOI wafer, including a step of performing a heat treatment to reduce the thickness of the buried oxide film,
An SOI wafer comprising a step of performing a heat treatment for adjusting a resistivity of the SOI layer by reducing a dopant contained in the SOI layer after the step of performing a heat treatment for reducing the thickness of the buried oxide film. Manufacturing method.   The bond wafer to be prepared is formed by implanting at least one of hydrogen ions or rare gas ions into the bond wafer to form an ion implantation layer, and thinning the bond wafer in the thinning step, The method for manufacturing an SOI wafer according to claim 1, wherein the bonding wafer is peeled off from the ion-implanted layer. The base wafer to be prepared is a p ⁺ silicon single crystal wafer having a high concentration layer by containing boron at a high concentration in the entire wafer, and the dopant concentration of the base wafer is 5 × 10 ¹⁸ atoms / cm ³ or more. The method for manufacturing an SOI wafer according to claim 1, wherein:   The heat treatment for reducing the thickness of the buried oxide film is performed at a temperature of 1000 ° C. or higher in an atmosphere of hydrogen gas, argon gas, or a mixed gas thereof, and the heat treatment for adjusting the resistivity of the SOI layer is performed using hydrogen gas or hydrogen 4. The SOI wafer according to claim 1, wherein the SOI wafer is performed at a temperature lower than a temperature of a heat treatment for reducing a thickness of the buried oxide film in an atmosphere of a reducing mixed gas containing oxygen. 5. Manufacturing method.   The heat treatment for reducing the thickness of the buried oxide film is performed at a temperature of 1200 ° C. or higher and 1350 ° C. or lower, and the heat treatment for adjusting the resistivity of the SOI layer is performed at a temperature of 1000 ° C. or higher and 1200 ° C. or lower. The manufacturing method of the SOI wafer as described in any one of Claims 1 thru | or 4. 6. An SOI wafer manufactured by the method for manufacturing an SOI wafer according to claim 1, wherein the buried oxide film has a thickness of 50 nm or less, and the dopant concentration of the base wafer is 5 ×. 10. An SOI wafer characterized by being 10 ¹⁸ atoms / cm ³ or more and the SOI layer having a dopant concentration of 5 × 10 ¹⁷ atoms / cm ³ or less.

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