JP2011228594A - Method for manufacturing silicon substrate - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method for manufacturing a high-quality silicon substrate, in which a silicon epitaxial layer is grown on a SIMOX wafer, with high efficiency.SOLUTION: If a silicon substrate is a SIMOX substrate, firstly, oxygen ion implantation into a silicon wafer 1 is performed at an accelerating energy of 80 keV or less at a dosage of 5×10to 5×10ions/cmat a substrate temperature of 200 to 600°C. Second oxygen ion implantation is performed at a dosage of 5×10to 5×10ions/cmat a substrate temperature of a room temperature to 300°C. Then, the silicon wafer 1 is transferred into an epitaxial growth chamber and is pre-baked at a temperature of 1000 to 1200°C. After that, an epitaxial layer 7 having a predetermined thickness is grown at a substrate temperature of 1050 to 1150°C.

Description

  The present invention relates to a method for manufacturing a silicon substrate, and more particularly to a method for manufacturing a silicon substrate having a silicon epitaxial layer on a wafer having an oxygen ion implanted layer inside the substrate.

  In recent years, a wafer having an SOI (Silicon on Insulator) structure (hereinafter referred to as an “SOI wafer”) has attracted attention for further improvement in device performance. The SOI wafer has a structure in which a silicon single crystal layer (SOI layer) is formed on a buried oxide film (Buried Oxide, BOX layer), and has a parasitic capacitance much higher than that of a device manufactured on a bulk substrate. It is expected to be a next-generation high-performance VLSI wafer excellent in high-speed operation, low power consumption, high withstand voltage characteristics, radiation resistance, etc. due to its small and simple manufacturing process and easy device miniaturization.

  As a method for manufacturing an SOI wafer, there are mainly a bonding method and a SIMOX (Separation by IM planted Oxygen) method.

  In the bonding method, the surface-oxidized silicon support substrate is bonded to the active substrate for manufacturing the device, and heat treatment is performed at a high temperature of about 1200 ° C. to bond the oxide film of the support substrate and the silicon of the active substrate. This is a method of manufacturing an SOI wafer.

  On the other hand, in the SIMOX method, oxygen ions are implanted into a predetermined depth of a silicon wafer by an ion implantation apparatus, and then a BOX layer is formed by high-temperature heat treatment and crystallinity of the SOI layer formed on the BOX layer is recovered. This is a method for manufacturing an SOI wafer.

  An SOI wafer manufactured by the SIMOX method that is currently commercially available (hereinafter referred to as “SIMOX wafer”) is mainly manufactured by a method called an MLD (Modified Low Dose) method. In this method, oxygen ion implantation into a silicon wafer is performed in two stages. That is, the first oxygen ion implantation is performed by heating the silicon wafer to 200 ° C. or higher, and the second oxygen ion implantation is performed by cooling the temperature of the silicon wafer to about room temperature (see, for example, Patent Document 1).

  At this time, since the first oxygen ion implantation is performed while the silicon wafer is heated, a high oxygen concentration layer is formed inside the silicon wafer while the surface of the silicon wafer is maintained as a single crystal. In the second oxygen ion implantation, an amorphous layer is formed above the high oxygen concentration layer, and a defective layer is formed on the amorphous layer and the upper layer. After that, oxygen and argon called ITOX (Internal Oxidation) treatment is performed. By performing oxidation treatment at a high temperature in a mixed gas atmosphere, the BOX layer is efficiently thickened and the quality of the BOX layer is improved to form an SOI structure.

  By the way, when considering application of the SIMOX substrate to the next-generation advanced device of 22 nm or later, further thinning of the SOI layer and the BOX layer (50 nm or less, preferably 20 nm or less) is required with the progress of miniaturization. . In the SIMOX substrate, the SOI layer can be thinned by sacrificial oxidation or etching of the surface Si layer. However, in order to thin the BOX layer, it is necessary to reduce the dose of oxygen ions. However, if the dose is simply lowered, the BOX layer becomes discontinuous and good quality cannot be maintained. Therefore, it is known that when the acceleration energy of oxygen ions is lowered, the distribution of implanted oxygen becomes steep, so that a continuous BOX layer can be formed with a smaller dose (see Non-Patent Document 1, for example). .

For example, in the vicinity of an acceleration energy of 200 keV, the MLD method requires a dose amount of 2.0 × 10 ¹⁷ ions / cm ² or more. However, when the acceleration energy is lowered to 50 keV, the dose amount is 1.0 × 10 ¹⁷ ions / A continuous BOX layer can be formed even if it is reduced to near cm ² . On the other hand, in order to obtain a good quality SIMOX substrate, ITOX treatment during heat treatment in a high temperature region is indispensable. In the MLD method, an oxide film having a thickness of about 7000 mm is formed by a high-temperature annealing process including a normal ITOX. Therefore, a Si layer of about 4000 mm or more is required on the substrate surface before the heat treatment in a high temperature region. The oxygen ion implantation range Rp is about 5000 mm at an acceleration energy of 200 keV. However, when the acceleration energy is 50 keV, the implantation range becomes shallow at about 1000 mm, so that the SOI structure is maintained after the ITOX treatment to maintain the SOI structure. Further, it is necessary to form an additional silicon layer by epitaxial growth before the heat treatment step in the high temperature region. From the above, in order to use a SIMOX substrate for a future advanced device, a low energy implantation + epitaxial growth technique capable of realizing formation of a high quality and thin BOX layer (50 nm or less) becomes important.

US Pat. No. 5,930,643

Meng Chen, Xiang Wang, Jing Chen, Xianghua Liu, Yeming Dong, Yuhui Yu and Xi Wang, Applied Physics Letters, 2002, Vol. 80, no. 5, pp. 880

However, at present, when a silicon epitaxial layer is grown after oxygen ion implantation, stacking faults (Stacking Fault, SF) are formed in the epitaxial layer. Therefore, in order to suppress the formation of stacking faults, conventionally, before the epitaxial layer is grown, the substrate into which oxygen ions have been implanted is once subjected to a heat treatment in a high temperature region of 1200 ° C. or higher. However, since such a heat treatment is disadvantageous in terms of productivity, there has been a demand for a proposal for an efficient method at a lower cost.
Similarly, in the production of a proximity gettering substrate, which is another application of oxygen ion implantation and silicon epitaxial growth technology, high quality and low cost without stacking faults in the epitaxial layer without performing heat treatment in a high temperature region of 1200 ° C. or higher. The proposal of the efficient method of was demanded.

  SUMMARY OF THE INVENTION An object of the present invention is to provide a method for producing a high-quality silicon substrate in which a silicon epitaxial layer is grown on a substrate into which oxygen ions have been implanted with high efficiency.

  In order to solve the above problems, the inventors have intensively studied the cause of stacking faults in the epitaxial layer. As a result of the temperature rise and pre-bake when growing the epitaxial layer, oxygen collects on the surface of the wafer. Then, a minute oxygen precipitate layer (hereinafter referred to as “DOT defect layer”) in which minute oxygen precipitates are formed is formed, and it has been found that a stacking fault is formed starting from this DOT defect layer. Thus, when the conditions under which this oxygen precipitate was not formed were examined, it was found that this was closely related to the acceleration energy during ion implantation. That is, ion implantation in the SIMOX method is normally performed at about 200 keV. However, when ion implantation is performed with this acceleration energy reduced to a predetermined range, formation of a DOT defect layer during temperature rise and pre-bake is suppressed. As a result, the present invention has been completed.

  That is, the silicon substrate manufacturing method of the present invention is characterized in that oxygen ions are implanted into a silicon wafer under an acceleration energy of 80 keV or less, and then silicon is epitaxially grown on the silicon wafer without performing a heat treatment in a high temperature region. It is what. Thereby, a high-quality silicon substrate having no stacking faults in the epitaxial layer can be manufactured with high efficiency.

Further, the dose amount of the oxygen ions is 5 × 10 ¹⁶ ions / cm ² or more and 5 × 10 ¹⁷ ions / cm ² or less when the silicon substrate is a SIMOX substrate, and the silicon substrate is a proximity gettering substrate. In some cases, it is 1 × 10 ¹⁴ ions / cm ² or more and 1 × 10 ¹⁷ ions / cm ² or less.

According to the present invention, a high-quality silicon substrate in which no stacking fault is formed in the epitaxial layer can be manufactured with high efficiency.
In addition, since oxygen ions are implanted with low energy, the oxygen concentration distribution in the silicon wafer becomes steep, and a SIMOX substrate can form a continuous BOX layer with a smaller dose than when implanted with high energy. it can. Since a low dose can be realized, a thin BOX layer (50 nm or less) can be formed, and it can be applied to a substrate for next-generation advanced devices.
Furthermore, since the acceleration energy at the time of implanting oxygen ions is 80 keV or less, there is no need for subsequent acceleration, and the apparatus cost can be reduced in designing the ion implantation apparatus.

(A)-(d) has shown the relationship between heat processing temperature and the cross-sectional structure of a surface Si layer. The relationship between the depth of the surface Si layer and the oxygen concentration at each heat treatment temperature is shown. (A)-(c) has shown the cross-sectional structure of the surface Si layer with respect to the heat processing in 1100, 1150, and 1200 degreeC, respectively. The relationship between the depth of the surface Si layer and the oxygen concentration at each heat treatment temperature is shown. (A) and (b) show the manufacturing process of the silicon substrate according to the prior art, and (c) shows the manufacturing process of the silicon substrate according to the present invention.

Here, the experimental results that led to the present invention will be described in detail.
First, ion implantation was performed on the silicon wafer by the MLD method. That is, after the first ion implantation with an acceleration energy of 210 keV and a dose of 2.7 × 10 ¹⁷ ions / cm ² , the acceleration energy is set to 195 keV and the dose is set to 3.5 × 10 ¹⁵ ions / cm ^2. A second ion implantation was performed. Thereafter, heat treatment was performed at 600, 800, 1000 and 1200 ° C. for 10 minutes. FIG. 1 shows the cross-sectional structure of the surface Si layer by TEM for each heat treatment temperature. From this figure, it is understood that when the heat treatment temperature is 600 ° C. to 1000 ° C., cavities that are aggregates of holes are formed in the region near the surface. On the other hand, such a cavity is not formed when the heat treatment temperature is 1200 ° C. In other words, it can be seen that the cavity disappears by heat treatment at 1200 ° C. or higher.

  Next, in order to investigate the oxygen concentration distribution in the surface Si layer after the above heat treatment, analysis by secondary ion mass spectrometry (SIMS) was performed. FIG. 2 shows the relationship between the depth from the silicon wafer surface and the oxygen concentration in each heat treatment. First, in the heat treatment at a heat treatment temperature of 600 ° C. and 800 ° C., As-Impla. It can be seen that the same oxygen concentration distribution is shown. On the other hand, in the heat treatment at a heat treatment temperature of 1000 ° C., the movement of oxygen begins to occur, and the profile fluctuations accompanying the formation of fine precipitates can be seen. Further, when the heat treatment temperature is increased to 1200 ° C., oxygen in the surface Si layer is taken into the implantation layer, and part of the oxygen escapes out of the substrate by out-diffusion, resulting in a reduction below the SIMS detection limit. I understand that. That is, it can be seen that oxygen ion-implanted into the silicon wafer starts to move when heat treatment at 1000 ° C. or higher is performed.

  Further, in order to examine in detail the behavior of oxygen between 1000 ° C. and 1200 ° C., the oxygen concentration distribution was examined by SIMS in the case of heat treatment at 1100, 1150 and 1200 ° C. 3 and 4 show the cross-sectional structure of the surface Si layer and the oxygen concentration in the depth direction when the heat treatment temperatures are 1100, 1150, and 1200 ° C., respectively. Referring to FIG. 4, when the heat treatment temperature is 1100 ° C., the heat treatment temperature shown in FIG. 2 is greatly changed from the case of 1000 ° C., and oxygen precipitates are formed in the depth region of 0.1 μm to 0.2 μm. It turns out that it has the peak accompanying formation. FIG. 4 shows that this peak decreases with increasing heat treatment temperature and disappears at 1200 ° C. In other words, when the heat treatment temperature is increased from 1000 ° C. to 1100 ° C., which is close to the growth temperature of the epitaxial layer, the surface Si layer is promoted by the existence of cavities that are aggregates of vacancies. Oxygen precipitates are formed. From the results of TEM and SIMS, it is clear from the results of TEM and SIMS that between 1100 ° C. and 1200 ° C., the minute oxygen precipitates begin to dissolve due to Ostwald growth and at 1200 ° C., the minute oxygen precipitates on the surface Si layer are completely dissolved. became.

  From the above results, the mechanism by which stacking faults occur in the epitaxial layer is considered as follows. That is, when the temperature is raised to 1100 ° C., which is the growth temperature, in the epitaxial growth chamber after ion implantation, the implanted oxygen forms minute oxygen precipitates in a region where a large number of cavities formed by ion implantation exist. A defective layer is produced. Next, when an epitaxial layer is grown on the ion-implanted silicon wafer, the formed fine oxygen precipitates are the starting points, and stacking faults are formed in the epitaxial layer. The above behavior of oxygen was observed not only in the two-stage ion implantation method by the MLD method but also in the one-time ion implantation in the proximity gettering substrate. Therefore, in order not to cause a stacking fault in the epitaxial layer, it is only necessary to form a DOT defect layer on the surface of the silicon wafer. As described above, since the formation of oxygen precipitates is promoted by the presence of vacancies, it is important that no vacancies (cavities) exist on the surface of the silicon wafer during the growth of the epitaxial layer.

  As a result of intensive studies on a method for eliminating the presence of vacancies on the surface of the silicon wafer, it was newly found that ion implantation with low acceleration energy is effective. That is, when oxygen ions are implanted with low energy, the region into which oxygen is implanted becomes shallow, and the region where vacancies formed by ion implantation are present is also close to the surface. As a result, in the oxygen ion implantation process, the vacancies diffuse to the surface that is the sink, so that a state in which the cavities that are aggregates of vacancies do not exist on the surface of the silicon wafer appears after the oxygen ion implantation. It can be done. Therefore, even if an epitaxial layer is grown on the silicon wafer into which oxygen ions are implanted in this way, the formation of the DOT defect layer can be suppressed, so that no stacking fault is formed in the epitaxial layer.

  Here, the acceleration energy capable of diffusing vacancies into the surface sink during oxygen ion implantation was specifically examined. That is, it was found that if the acceleration energy during oxygen ion implantation is 80 keV or less, vacancies exist in a sufficiently shallow region of the silicon wafer during ion implantation, so that they diffuse and disappear as they are on the surface serving as the sink. .

Next, the manufacturing method of the silicon substrate of the present invention based on the above knowledge will be described.
FIG. 5A-1 shows a manufacturing process of a conventional silicon substrate growth method. That is, when oxygen ion implantation is performed from the surface of the silicon wafer 1 as indicated by the arrows in the figure, an implantation damage layer 2 and a surface Si layer 3 are formed, and a cavity layer 4 having a cavity formed on the surface is also formed. The Next, when the temperature is raised to 1100 ° C., which is the growth temperature, in the epitaxial growth chamber, minute oxygen precipitates are formed in the cavity layer 4 having a large number of cavities formed by oxygen ion implantation, and the DOT defect layer 6 is formed. The implantation damage layer 2 becomes an oxygen precipitation layer 5. When the epitaxial layer 7 is grown thereon, a stacking fault 8 (black triangular region) is formed in the epitaxial layer 7 starting from the DOT defect layer 6 as shown in FIG.

  FIG. 5B shows a conventional method for manufacturing a silicon substrate in which heat treatment is performed at a high temperature before the growth of the epitaxial layer 7 in order to suppress the formation of the stacking fault 8 shown in FIG. 5A-2. . That is, when heat treatment is performed at about 1200 ° C. after oxygen ion implantation is performed on the silicon wafer 1 as in FIG. 5 (a-1), the cavity in the cavity layer 4 is formed as shown in FIG. 5 (b-2). The formed fine oxygen precipitates dissolve and the DOT defect layer 6 disappears. Thereafter, when the epitaxial layer 7 is grown, the epitaxial layer 7 without the stacking fault 8 is obtained as shown in FIG.

FIG. 5C shows a process for manufacturing a silicon substrate according to the present invention. That is, as shown in FIG. 5 (c-1), when oxygen ions are first implanted into the silicon wafer 1 with a low energy of 80 keV or less, the implanted damage layer 2 is the same as in FIGS. 5 (a) and 5 (b). The surface Si layer 3 is formed. However, since the acceleration energy is low, the position of the implantation damage layer 2 becomes shallow, and the cavity layer 4 is not formed because the vacancies diffused to the surface serving as the sink. Thereafter, even if the silicon wafer 1 is moved from the ion implantation apparatus to the epitaxial growth chamber and the temperature is raised to about 1100 ° C. to grow the epitaxial layer 7, there is no cavity, so the DOT defect layer 6 is formed on the surface Si layer 3. It will never be done. Thereafter, even when the epitaxial layer 7 is grown, the stacking fault 8 is not formed as shown in FIG.
Hereinafter, each manufacturing process of the silicon substrate according to the present invention will be described in more detail.

First, oxygen ions are implanted into the silicon wafer 1 with an acceleration energy of 80 keV or less. In the present invention, the ion implantation method is not particularly limited, but in the case of a method in which ion implantation is completed only once in the fabrication of a proximity gettering substrate, the acceleration energy is 80 keV or less and the dose amount is 1 × 10 ¹⁴ to 1 × 10 ¹⁷ ions. / Cm ² , oxygen ion implantation is performed at a substrate temperature of room temperature to 600 ° C.

The reason why the acceleration energy is limited to 80 keV or less under the above ion implantation conditions is as follows.
This is because the cavity layer 4 is not formed in the surface Si layer 3 after ion implantation. The lower limit of the acceleration energy is a value larger than 0 and is not particularly limited. However, in consideration of the specification performance of the ion implantation apparatus, it is preferably 20 keV or more.
The reason why the dose amount of oxygen ions is in the range of 1 × 10 ¹⁴ to 1 × 10 ¹⁷ ions / cm ² is that when the dose amount is less than 1 × 10 ¹⁴ ions / cm ² , the getter of the oxygen precipitation layer 5 is obtained. This is because the ring ability is insufficient, and when it exceeds 1 × 10 ¹⁷ ions / cm ² , warpage of the substrate is deteriorated due to an increase in the density and size of oxygen precipitates in the implantation damage layer 2.
Furthermore, the reason why the substrate temperature is in the range of room temperature to 600 ° C. is that when the temperature is lower than room temperature, it is necessary to separately attach a substrate cooling mechanism, and when it exceeds 600 ° C., the roughness of the substrate surface is deteriorated. .

Further, when oxygen ion implantation is performed in two steps as in the MLD method described above, the acceleration energy is set to 80 keV or less, preferably 20 keV or more, and the dose amount of oxygen ions is set to 5 × 10 ^{16 to} 5 × 10 ^17. ions / cm ² , the substrate temperature is 200 to 600 ° C., the first ion implantation is performed, the acceleration energy is 80 keV or less, preferably 20 keV or more, and the dose amount of oxygen ions is 5 × 10 ^{14 to} 5 × 10 ^16. ions / cm ² , the substrate temperature is from room temperature to 300 ° C., and a second oxygen ion implantation is performed.

In the first ion implantation described above, the reason for limiting the acceleration energy is the same as in the method of performing ion implantation only once. The reason why the dose of oxygen ions is in the range of 5 × 10 ^{16 to} 5 × 10 ¹⁷ ions / cm ² is that when the dose is less than 5 × 10 ¹⁶ ions / cm ² , a continuous BOX layer is formed. This is because it cannot be formed, and when it exceeds 5 × 10 ¹⁷ ions / cm ² , the BOX breakdown voltage characteristics deteriorate due to the formation of Si islands in the BOX layer. Furthermore, the reason why the substrate temperature is in the range of 200 ° C. to 600 ° C. is that when the temperature is lower than 200 ° C., the crystallinity of the surface Si layer 3 cannot be maintained, and the defect density increases, which exceeds 600 ° C. In this case, the roughness of the substrate surface deteriorates.

In the second ion implantation, if the acceleration energy is not set lower than that in the first ion implantation, the BOX breakdown voltage deteriorates because the amorphous layer is formed at a position deeper than the first implantation damage peak. Occurs. The reason why the dose amount of oxygen ions is set to 5 × 10 ^{14 to} 5 × 10 ¹⁶ ions / cm ² is that an amorphous layer cannot be formed when the dose amount is less than 5 × 10 ¹⁴ ions / cm ² . This is because the crystallinity of the surface Si layer 3 deteriorates when it exceeds 5 × 10 ¹⁶ ions / cm ² . Furthermore, the reason for setting the substrate temperature in the range of room temperature to 300 ° C. is that if the substrate temperature is lower than room temperature, it is necessary to separately attach a substrate cooling mechanism. This is because it is not formed.

Next, after removing the ion-implanted silicon wafer 1 from the ion implantation apparatus, the silicon wafer 1 is transferred to an epitaxial growth chamber, pre-baked at 1000 to 1200 ° C., and then an epitaxial layer 7 having a predetermined thickness is formed at a substrate temperature of 1050 to 1150 ° C. Grow.
In the present invention, there is a possibility that the surface Si layer 3 becomes thin, but this can be sufficiently dealt with by controlling the thickness of the epitaxial layer 7.

The reason why the substrate temperature is limited to 1050 to 1150 ° C. during the epitaxial growth is that the epitaxial layer 7 is polycrystallized from a single crystal when the temperature is lower than 1050 ° C., and when it exceeds 1150 ° C. This is because the transparent quartz constituting the chamber window becomes cloudy due to the increase in the film.
Thus, a high-quality silicon substrate free from stacking faults in the epitaxial layer 7 can be manufactured with high efficiency.

  By growing the epitaxial layer 7 having a sufficient thickness by the above manufacturing method and subjecting the obtained silicon substrate to ITOX treatment, the quality of the BOX layer can be improved.

Examples of the present invention will be described below.
(Invention Examples 1-3)
First, oxygen ions were implanted into a 300 mm diameter silicon wafer using an ion implantation apparatus. At that time, the wafer was heated to about 400 ° C., and the dose was 2 × 10 ¹⁷ (Invention Example 1), 5 × 10 ¹⁶ (Invention Example 2), and 1 × 10 ¹⁵ (Invention Example 3) ions / cm ² . .
Next, after the ion-implanted silicon wafer is taken out from the ion implantation apparatus and placed in the epitaxial growth chamber, the temperature is raised and prebaked at 1100 ° C., and then the substrate temperature is 1130 ° C. for 2 minutes (Invention Example 1). An epitaxial layer was grown for 4 minutes (Invention Example 2) and 2 minutes (Invention Example 3) to obtain a silicon substrate. Table 1 shows the number of epi defects and the growth conditions of the obtained silicon substrate.

(Comparative Examples 1-4)
The acceleration energy at the time of ion implantation was 81 keV (Comparative Example 1), 100 keV (Comparative Example 2) and 200 keV (Comparative Examples 3 and 4), respectively. For Comparative Example 4, an argon atmosphere was further added before the growth of the epitaxial layer. A pre-annealing treatment was performed at 1200 ° C. for 1 hour. Otherwise, the silicon substrate was manufactured under the same conditions as in Invention Example 1. As a result, a stacking fault 10 times or more that of Invention Example 1 was formed. Table 1 shows the number of epi defects and the growth conditions of the obtained silicon substrate.

(Comparative Examples 5 to 8)
The acceleration energy at the time of ion implantation is 81 keV (Comparative Example 5), 100 (Comparative Example 6) and 200 (Comparative Examples 7 and 8), respectively. A pre-annealing treatment was performed at 1200 ° C. for 1 hour. Other than that, the silicon substrate was manufactured on the same conditions as invention example 2. As a result, as in the case of Invention Example 1, a stacking fault of 10 times or more that of Invention Example 2 was formed. Table 1 shows the number of epi defects and the growth conditions of the obtained silicon substrate.

(Comparative Examples 9-12)
The acceleration energy at the time of ion implantation was 81 keV (Comparative Example 9), 100 (Comparative Example 10), and 200 (Comparative Examples 11 and 12), respectively. In Comparative Example 12, 1200 was further grown in an argon atmosphere before the growth of the epitaxial layer. A pre-annealing treatment was performed at a temperature of 1 hour. Except for this, a silicon substrate was manufactured under the same conditions as in Invention Example 3. As a result, no epi defect was formed in Invention Example 3, whereas 20 or more epi defects were formed in the comparative example. Table 1 shows the number of epi defects and the growth conditions of the obtained silicon substrate.

  According to the present invention, since a stacking fault is not formed when growing an epitaxial layer, it is useful as a silicon substrate that requires high quality.

DESCRIPTION OF SYMBOLS 1 Silicon wafer 2 Implanted damage layer 3 Surface Si layer 4 Cavity layer 5 Oxygen precipitation layer 6 DOT defect layer 7 Epitaxial layer 8 Stacking fault

Claims (2)

  A method for producing a silicon substrate, comprising implanting oxygen ions into a silicon wafer under an acceleration energy of 80 keV or less, and then epitaxially growing the silicon on the silicon wafer without performing a heat treatment in a high temperature region. The oxygen ion dose is 5 × 10 ¹⁶ ions / cm ² or more and 5 × 10 ¹⁷ ions / cm ² or less when the silicon substrate is a SIMOX substrate, and the silicon substrate is a proximity gettering substrate. The manufacturing method according to claim 1, wherein is 1 × 10 ¹⁴ ions / cm ² or more and 1 × 10 ¹⁷ ions / cm ² or less.

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