JP5585319B2 - Manufacturing method of bonded SOI wafer - Google Patents

Description

  The present invention relates to a method for manufacturing a bonded wafer using an ion implantation separation method.

  In a bonded SOI wafer manufactured by an ion implantation delamination method, an SOI wafer composed of a p-type low-resistivity SOI layer or a p-type low-resistivity SOI layer is used as a seed layer on the basis of device structure requirements. In some cases, an SOI wafer having an epitaxial layer formed thereon is required. In that case, a p-type silicon single crystal wafer with low electrical resistivity is used as the bond wafer, and the SOI layer of the manufactured SOI wafer needs to maintain its electrical resistivity (boron concentration).

  However, when a thermal oxide film is formed on a bond wafer as an insulating film to be a buried oxide film (BOX film) of an SOI wafer, a portion (thermal oxide film) that becomes an SOI layer after peeling due to segregation of p-type dopant in the oxide film. As a result, the boron concentration in the surface layer portion immediately below the thermal oxide film of the bond wafer on which is formed decreases.

  Also, in the ion implantation separation method, the surface roughness after peeling is not sufficient, and the damaged layer of the ion implantation remains on the surface after peeling, so that the surface roughness can be improved and the damaged layer can be removed. It is essential. As a method for improving the surface roughness, a method for improving the surface roughness by annealing with hydrogen or an inert gas (see Patent Document 1 and Patent Document 2) has been used. In the annealing, since boron is diffused out during the annealing, a decrease in boron concentration cannot be avoided, and the electrical resistivity of the SOI layer cannot be maintained.

  Further, as a method of removing the damaged layer, a method of removing the damaged layer by sacrificial oxidation treatment (treatment of removing the formed thermal oxide film after forming the thermal oxide film) has been used. Thus, the suction effect accompanying the segregation of boron was observed, and it was difficult to apply to the production of an SOI wafer having the low resistivity layer as the SOI layer.

  Roughness improvement and thinning by CMP (Chemical Mechanical Polishing) have been conventionally performed as a method for simultaneously improving the roughness and removing the damaged layer by ion implantation. In addition to deterioration of the in-plane thickness distribution, damage due to CMP is formed on the SOI surface. Therefore, further sacrificial oxidation treatment is required after CMP, and boron segregates in the sacrificial oxide film. Since boron is sucked out by the above method, it is difficult to apply the method to manufacture an SOI wafer having a low resistivity layer as an SOI layer.

  On the other hand, in the production of an SOI wafer composed of an SOI layer having a normal resistivity (for example, about 1 to 10 Ωcm) by an ion implantation delamination method, the boron in the SOI layer is hydrogenated or reduced after delamination using a low resistivity bond wafer. SOI wafer fabrication methods have been devised that increase the resistivity and improve the surface roughness by diffusing outwardly by atmospheric annealing, etc., but all of these methods actively diffuse boron outward. The purpose of this is to increase the electrical resistivity of the SOI layer (see Patent Document 3 and Patent Document 4).

JP 10-275905 A WO2003 / 009386 WO2005 / 024917 JP 2007-59704 A

  The present invention has been made in view of the above problems, and an SOI wafer made of a p-type low resistivity SOI layer, or an epitaxial layer formed thereon using a p-type low resistivity SOI layer as a seed layer. In the manufactured SOI wafer manufacturing method, the boron concentration in the SOI layer is prevented from lowering due to the segregation of boron during the formation of the thermal oxide film on the bond wafer, and the outward diffusion of the p-type dopant after peeling and the sucking out due to oxidation are suppressed. A method of maintaining a low resistivity of the SOI layer.

  In order to solve the above-described problem, in the present invention, a thermal oxide film is formed on the surface of a bond wafer, and at least one kind of gas ions of hydrogen or a rare gas is passed from the surface of the bond wafer through the thermal oxide film. Ion implantation is performed to form an ion implantation layer in the bond wafer, and the ion-implanted surface of the bond wafer and the surface of the base wafer are bonded together via the thermal oxide film, and the bond wafer is bonded with the ion implantation layer. In the bonded SOI wafer manufacturing method for manufacturing an SOI wafer by peeling, a p-type silicon single crystal wafer of 0.2 Ωcm or less is used as the bond wafer, and the thermal oxidation film is formed on the bond wafer. On the other hand, the bonding is characterized by performing a heat treatment in a non-reducing atmosphere before performing the ion implantation. To provide a process for the preparation of OI wafer.

  As described above, in the production of the low resistivity SOI by the ion implantation separation method using the p-type low resistivity layer as the SOI layer, a wafer having a p-type conductivity type and an electric resistivity of 0.2 Ωcm or less is used as a bond wafer. If annealing in a non-reducing atmosphere is performed after the thermal oxide film is formed, the boron concentration is higher on the bulk side than in the vicinity of the oxide film / Si interface, so boron diffuses from the bulk side to the vicinity of the oxide film / Si interface. Since the supplied boron concentration in Si near the oxide film / Si interface can be made higher than that immediately after thermal oxidation, the boron concentration in the SOI layer immediately after the thinning process can be increased.

  At this time, it is preferable that the dopant of the bond wafer is boron and the resistivity is 0.003 Ωcm or more.

  Thus, the dopant of the bond wafer can be boron and the resistivity can be 0.003 Ωcm or more and 0.2 Ωcm or less. This is because, in such a low resistivity wafer having a resistivity of 0.003 Ωcm or more and 0.2 Ωcm or less by boron doping, a high resistance of the SOI layer due to thermal oxide film formation becomes a problem.

  At this time, the non-reducing atmosphere is nitrogen gas, argon gas, or a mixed gas atmosphere thereof, or an atmosphere obtained by adding a small amount of oxygen gas (for example, 3% or less in flow rate ratio) to these atmosphere gases. Is preferred.

  Thus, the atmosphere of the heat treatment performed before the ion implantation is performed on the bond wafer after the thermal oxide film is formed is nitrogen gas, argon gas, or a mixed gas atmosphere thereof, or these atmospheres. An atmosphere in which a small amount (for example, 3% or less) of oxygen gas is added to the gas can be used. By mixing a small amount of oxygen gas in such an atmospheric gas, surface roughness of the oxide film surface can be prevented during heat treatment, and bonding to the base wafer can be performed satisfactorily. Further, in an atmosphere in which a large amount of oxygen gas is added, the p-type dopant concentration of the SOI layer may decrease due to the progress of segregation.

  At this time, the heat treatment temperature in the non-reducing atmosphere is preferably higher than the temperature for forming the thermal oxide film formed on the surface of the bond wafer.

  Thus, the heat treatment temperature of the non-reducing atmosphere can be higher than the formation temperature of the thermal oxide film formed on the surface of the bond wafer. By making the heat treatment temperature in the non-reducing atmosphere higher than the oxidation temperature for forming the thermal oxide film on the bond wafer, the boron concentration in the SOI layer can be effectively increased.

  At this time, it is preferable to use gas etching with HCl in order to improve the roughness and thin the SOI layer after peeling.

  As described above, gas etching with HCl can be used for improving the roughness and thinning of the SOI layer after the peeling. Compared to annealing with hydrogen or inert gas, such HCL gas etching has a faster SOI thinning speed than boron out-diffusion, so it can suppress the boron concentration reduction in the SOI layer remaining after etching, At the same time, it is possible to improve the surface roughness and thin the surface to remove the damaged layer.

The present invention also provides a method for manufacturing a bonded SOI wafer, wherein an epitaxial layer is deposited on the SOI layer of the SOI wafer manufactured by the method for manufacturing a bonded SOI wafer.
In this way, if an epitaxial layer is deposited on the SOI layer of the SOI wafer that has been subjected to the thinning process, an SOI layer (epitaxial layer) having a higher resistivity is formed on the SOI layer (seed layer) having a lower resistivity. An SOI wafer having a structure having the following can be obtained.

  As described above, according to the present invention, an SOI wafer composed of a p-type low resistivity SOI layer or an SOI wafer in which an epitaxial layer is formed thereon using a p-type low resistivity SOI layer as a seed layer. In the manufacturing method, it is possible to suppress a decrease in the boron concentration of the SOI layer due to the segregation of boron when forming the thermal oxide film on the bond wafer. In addition, it is possible to maintain the low resistivity of the SOI layer by suppressing the outward diffusion of the p-type dopant after peeling and the sucking due to oxidation. Furthermore, the low resistivity can be maintained to improve the surface roughness and remove the damaged layer on the surface.

It is a flowchart which shows an example of the manufacturing method of the bonded wafer of this invention. The result of Experimental example 1 in this invention is made into a graph.

Hereinafter, the present invention will be described more specifically.
As described above, in a conventional method for manufacturing an SOI wafer composed of a p-type low resistivity SOI layer or an SOI wafer in which an epitaxial layer is formed thereon using a p-type low resistivity SOI layer as a seed layer, Maintains low resistivity of SOI layer by suppressing decrease in boron concentration of SOI layer due to boron segregation during thermal oxide film formation on wafer, and suppressing p-type dopant outward diffusion and exhalation due to oxidation after peeling. It was sought to do.

  As a result of various studies by the present inventors, a bond wafer having a p-type conductivity and an electrical resistivity of 0.003 to 0.2 Ωcm was used, and after thermal oxide film formation, annealing was performed in a non-reducing atmosphere. Since boron concentration is higher on the bulk side than in the vicinity of the oxide film / Si interface, boron is supplied by diffusion from the bulk side to the vicinity of the oxide film / Si interface, and boron in Si near the oxide film / Si interface It was found that the concentration could be higher than that immediately after thermal oxidation. As a result, it was found that the boron concentration in the SOI layer immediately after the thinning process can be increased, and the present invention was completed.

  That is, in the present invention, a thermal oxide film is formed on the surface of the bond wafer, and at least one gas ion of hydrogen or a rare gas is ion-implanted from the surface of the bond wafer through the thermal oxide film. An SOI layer is formed by forming an ion implantation layer in the bond wafer, bonding the ion-implanted surface of the bond wafer and the surface of the base wafer through the thermal oxide film, and peeling the bond wafer with the ion-implanted layer. In the method for manufacturing a bonded SOI wafer for manufacturing a wafer, a p-type silicon single crystal wafer of 0.2 Ωcm or less is used as the bond wafer, and the ion is applied to the bond wafer after the thermal oxide film is formed. Manufacturing a bonded SOI wafer characterized by performing non-reducing atmosphere heat treatment before implantation It is the law.

Hereinafter, embodiments of the present invention will be described with reference to FIG. 1, but the present invention is not limited thereto.
First, in FIG. 1A, two silicon mirror wafers used as the bond wafer 1 and the base wafer 2 are prepared.
Here, in the method for producing a bonded wafer according to the present invention, an ion implantation layer is formed in the bond wafer 1 in a later step. At this time, the resistivity is 0.2 Ωcm or less, preferably 0.05 Ωcm or less. More preferably, a p-type silicon single crystal wafer of 0.01 Ωcm or less is used as the bond wafer 1. Further, it is preferable to use a p-type silicon single crystal wafer having a resistivity of 0.003 Ωcm or more as the bond wafer 1. This is because thermal resistance of a bond wafer having a low resistivity of 0.2 Ωcm or less causes a problem of high resistance due to segregation of the dopant into the oxide film. When the resistance is higher than 0.2 Ωcm, the dopant concentration This is because the effect of the present invention cannot be sufficiently obtained. On the other hand, a resistivity lower than 0.003 Ωcm is close to the solid solution limit, so that it becomes difficult to manufacture a wafer.
FIG. 1A shows an example in which a p-type silicon single crystal wafer in which boron as a dopant is uniformly doped on the entire wafer is prepared as the bond wafer 1.

  When the bond wafer 1 and the base wafer 2 are bonded together via a thermal oxide film, at least one of the bond wafer 1 and the base wafer 2, as shown in FIG. A thermal oxide film 3 is formed on 1. The thickness and the like of the thermal oxide film 3 should be determined according to specifications and are not particularly limited. For example, the thermal oxide film 3 having a thickness of about 0.01 to 2.0 μm may be formed. it can. The thermal oxide film 3 can be manufactured not only on the bond wafer 1 side but also on the base wafer 2 side. However, the thermal oxide film 3 formed on the base wafer 2 is an SOI layer by sucking out dopants such as boron. There is no direct effect on the problem of lowering the concentration of sucrose. As thermal oxidation conditions, for example, pyrogenic oxidation, temperature can be 800 to 1200 ° C., and oxidation time can be 30 to 120 minutes. At this time, the dopant on the surface of the bond wafer is segregated and incorporated into the thermal oxide film formed on the surface of the bond wafer, and the dopant concentration in the vicinity of the interface with the oxide film is lowered to increase the resistance.

Next, in FIG. 1C, heat treatment (hereinafter referred to as additional annealing) in a non-reducing atmosphere is performed. At this time, the heat treatment temperature for the additional annealing can be made higher than the oxidation temperature for forming the thermal oxide film 3 on the bond wafer 1. By increasing the heat treatment temperature for additional annealing rather than the oxidation temperature for forming a thermal oxide film on the bond wafer, it promotes outward diffusion from the bulk part to the surface, and increases the boron concentration in the SOI layer. Can be done automatically.
The atmosphere for the additional annealing is not particularly limited as long as it is a reducing atmosphere in which outward diffusion of the p-type dopant to the outside of the wafer proceeds or an oxidizing atmosphere in which the concentration of the p-type dopant is lowered by the progress of segregation. However, it is possible to use highly versatile nitrogen gas or argon gas in consideration of cost. Moreover, a trace amount (for example, 3% or less by flow rate ratio) oxygen gas can be mixed with these gases. Even if a small amount of oxygen gas is mixed, the oxidation rate is extremely slow, so that the concentration of p-type dopant hardly decreases due to the progress of segregation. The surface roughness of the film can be prevented, and the bonding with the base wafer can be performed satisfactorily.

  Next, as shown in FIG. 1D, at least one kind of gas ion of hydrogen or rare gas is ion-implanted from the surface of the bond wafer 1 to form an ion-implanted layer 4 in the bond wafer 1.

  Next, in FIG. 1E, the ion-implanted surface of the bond wafer 1 and the surface of the base wafer 2 are bonded together via a thermal oxide film 3. Normally, the wafers are bonded to each other without using an adhesive or the like by bringing the surfaces of the bond wafer 1 and the base wafer 2 into contact with each other in a clean atmosphere at room temperature.

Next, in FIG. 1F, the bond wafer 1 is peeled off by heat treatment or external force with the ion implantation layer. Although it does not specifically limit as this peeling method, For example, the bond wafer 1 can be peeled by performing the heat processing at about 500-600 degreeC with respect to the bonded wafer, for example by inert gas atmosphere.
As described above, in the present invention, since the ion implantation layer 4 can be reliably formed in the low resistivity region, the dose amount for peeling can be reduced, and therefore the surface roughness immediately after peeling. Can be improved. Moreover, the allowance by the HCL gas etching mentioned later can also be reduced. If the allowance for gas etching is reduced, in addition to improving the productivity of gas etching, the allowance distribution for gas etching can be narrowed, and the SOI film thickness distribution can also be improved.

Next, in FIG. 1 (g), a thinning process for improving the surface roughness of the peeled surface is performed to obtain a bonded wafer (SOI wafer) 6 (FIG. 1 (h)). In the present invention, the thinning process of the peeling surface can be performed by gas etching using a gas containing HCl. Although it does not specifically limit as this etching condition, For example, it can carry out at 1000-1200 degreeC and 1 to 30 minutes.
In the method for manufacturing a bonded wafer in the present invention, the surface roughness immediately after peeling in FIG. 1 (f) is improved, so that the allowance for gas etching during the thinning process can be reduced. As a result, the SOI layer 5 The deterioration of the film thickness distribution can be suppressed.
Further, since the etching is performed by gas etching using a gas containing HCl, the film can be thinned in a short time. Therefore, the speed of thinning of the SOI layer 5 is faster than the outward diffusion of the dopant in the SOI layer 5, and the reduction of the boron concentration in the SOI layer 5 remaining after etching can be suppressed.
Thus, if the manufacturing method of the bonded wafer of this invention is used, the SOI wafer 6 which could maintain the low resistivity can be obtained.

Moreover, the epitaxial layer 7 can also be deposited on the SOI wafer 6 obtained as described above (FIG. 1 (i)).
That is, if the epitaxial layer 7 is formed on the surface of the SOI layer 5 of the SOI wafer 6 that has been subjected to the thinning process (gas etching with HCl) and the SOI wafer 6 ′ is manufactured, the manufactured SOI layer is a low resistance layer. A desired structure having an epitaxial layer thereon is obtained, and the film thickness distribution is improved.

  As described above, by using the bonded wafer manufacturing method of the present invention, it is possible to increase the boron concentration in the SOI layer immediately after the thinning process. Furthermore, a low resistivity SOI wafer with improved surface roughness can be produced by using this.

  Hereinafter, the present invention will be described more specifically with reference to experimental examples, examples, and comparative examples, but the present invention is not limited thereto.

(Experimental example 1)
The following results were obtained by simulation.
When a thermal oxide film of 150 nm is formed at 950 ° C. on a Si substrate having an electrical resistivity of 0.008 Ωcm (boron concentration: 1.1 × 10 ¹⁹ / cm ³ ), and then annealing at 1000 ° C. is continuously added And the boron concentration in the vicinity of the oxide film / Si interface when a 150 nm thermal oxide film is formed at 950 ° C. for comparison. It is shown in the table and FIG.
It was found that the boron concentration from the oxide film / Si interface to a depth of about 150 nm can be increased when the additional heat treatment is performed as compared with the case where the additional heat treatment is not performed. In the case of the ion implantation delamination method, Si in the vicinity of the oxide film / Si becomes the SOI layer after delamination. Therefore, if the boron concentration in the vicinity of the oxide film / Si interface can be increased, the boron concentration in the SOI layer can be maintained at a high concentration. .
The oxidation conditions at 950 ° C. were common to each level, and H ₂ : O ₂ = 7.5: 5 (gas flow ratio) pyrogenic oxidation, and the oxidation time was 55 minutes. The additional annealing conditions were 1000 ° C. or 1050 ° C., N ₂ atmosphere, and the time was 20 minutes.

(Experimental example 2)
The following results were obtained by simulation.
When a thermal oxide film of 150 nm is formed at 1000 ° C. on a Si substrate having an electrical resistivity of 0.2 Ωcm (boron concentration: 1.0 × 10 ¹⁷ / cm ³ ), and then annealing at 1100 ° C. is continuously added And the boron concentration near the oxide film / Si interface when annealing at 1150 ° C. is added, and for comparison, the boron concentration near the oxide film / Si interface when a 150 nm thermal oxide film is formed at 1000 ° C. is shown in the table below. Shown in
It was found that the boron concentration from the oxide film / Si interface to a depth of about 100 nm can be increased when the additional heat treatment is performed as compared with the case where the additional heat treatment is not performed. In the case of the ion implantation delamination method, Si in the vicinity of the oxide film / Si becomes the SOI layer after delamination. Therefore, if the boron concentration in the vicinity of the oxide film / Si interface can be increased, the boron concentration in the SOI layer can be maintained at a high concentration. .
The oxidation conditions at 1000 ° C. were common to all levels, and H ₂ : O ₂ = 7.5: 5 (gas flow rate ratio) pyrogenic oxidation, and the oxidation time was 45 minutes. The additional annealing conditions were 1100 ° C. or 1150 ° C., N ₂ atmosphere, and the time was 20 minutes.

(Examples and comparative examples)
On a silicon single crystal wafer having a diameter of 300 mm, a crystal orientation (100), and a p-type of 0.008 Ωcm (boron concentration: 1.1 × 10 ¹⁹ / cm ³ ), a thermal oxide film of 150 nm is formed at an oxidation temperature of 950 ° C. A bond wafer (Example) that was annealed at 1050 ° C. as an additional heat treatment and a bond wafer (Comparative Example) that was not subjected to the additional heat treatment were prepared.
The oxidation conditions at 950 ° C. were pyrogenic oxidation of H ₂ : O ₂ = 7.5: 5 (gas flow ratio), and the oxidation time was 55 minutes. The additional annealing conditions were 1050 ° C., an atmosphere of Ar: O ₂ = 99: 1 (flow rate ratio), and the time was 20 minutes.
Hydrogen ion implantation was performed on these bond wafers. As ion implantation conditions, H ⁺ ion implantation energy was 50 keV, and the dose was 5.0 × 10 ¹⁶ / cm ² . Thereafter, the bond wafer was bonded to a base wafer (same specifications as the bond wafer, no thermal oxide film), and subjected to a peeling heat treatment at 500 ° C. to obtain an SOI wafer. After the peeled SOI layer was thinned to 100 nm by HCl gas etching, epitaxial growth was performed on the SOI layer using the SOI layer as a seed layer.
The HCl etching conditions are 1050 ° C., the HCl flow rate is 400 sccm, and the H ₂ flow rate is 55 slm. The epitaxial growth conditions are the growth temperatures of 1000 ° C., 1030 ° C., and 1080 ° C., the dopant is phosphorus, and the thickness of the epitaxial layer is The thickness was 3 μm. The boron concentration after the epitaxial growth was measured by SIMS, and the measurement result of the boron concentration peak value of the SOI layer portion which is the seed layer is shown below.

各エピタキシャル成長条件で、９５０℃酸化のみと１０５０℃アニールを追加した場合を比較すると、各条件共に１０５０℃のアニールを追加した方が、エピタキシャル成長後のボロン濃度を高濃度に維持できることがわかった。

Comparing the cases where only 950 ° C. oxidation and 1050 ° C. annealing were added under each epitaxial growth condition, it was found that the boron concentration after epitaxial growth could be maintained at a higher concentration when 1050 ° C. annealing was added for each condition.

  The present invention is not limited to the above embodiment. The above-described embodiment is an exemplification, and the present invention has any configuration that has substantially the same configuration as the technical idea described in the claims of the present invention and that exhibits the same effects. Are included in the technical scope.

DESCRIPTION OF SYMBOLS 1 ... Bond wafer, 2 ... Base wafer, 3 ... Thermal oxide film, 4 ... Ion implantation layer, 5 ... SOI layer, 6 ... Bonded wafer (SOI wafer), 6 '... SOI wafer in which the epitaxial layer was deposited, 7 ... epitaxial layer.

Claims (5)

A thermal oxide film is formed on the surface of the bond wafer, and at least one gas ion of hydrogen or a rare gas is ion-implanted from the surface of the bond wafer through the thermal oxide film to ion-implant into the bond wafer. Bonding for forming an SOI wafer by forming a layer, bonding the ion-implanted surface of the bond wafer and the surface of the base wafer through the thermal oxide film, and peeling the bond wafer with the ion-implanted layer In the SOI wafer manufacturing method,
As the bond wafer, using a p-type silicon single crystal wafer of 0.2 Ωcm or less,
With respect to the bond wafer after the formation of the thermal oxide film, formed on the have line heat treatment of non-reducing atmosphere before the ion implantation, the heat treatment temperature of the non-reducing atmosphere, the surface of the bond wafer A method for manufacturing a bonded SOI wafer, characterized in that the temperature is higher than a temperature for forming the thermal oxide film .   2. The method for producing a bonded SOI wafer according to claim 1, wherein the bond wafer has boron as a dopant and has a resistivity of 0.003 Ωcm or more.   The bonding according to claim 1 or 2, wherein the non-reducing atmosphere is a nitrogen gas, an argon gas, or a mixed gas atmosphere thereof, or an atmosphere in which an oxygen gas is added to the atmosphere gas. A method for manufacturing a laminated SOI wafer. The SOI layer of the bonded SOI wafer after the peeling, the production of bonded SOI wafer as set forth claim 1, characterized in that a thin film in any of claims 3 by gas etching using a gas containing HCl Method. An epitaxial layer is deposited on an SOI layer of an SOI wafer manufactured by the method for manufacturing a bonded SOI wafer according to any one of claims 1 to 4 . Production method.

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