JP2012049385A - Semiconductor light-emitting element, light-emitting device, luminaire, display device and method of manufacturing semiconductor light-emitting element - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor light-emitting element which can ensure desired brightness without requiring an external circuit such as a resistor, and to provide a light-emitting device, a luminaire, a display device and a method of manufacturing a semiconductor light-emitting element.SOLUTION: An n-type semiconductor layer 2 is formed, as a resistive layer, on a substrate 1 separately from the n-type semiconductor layer 2 of a light-emitting semiconductor layer. The n-type semiconductor layer 2 (resistive layer) is arranged along one side of the substrate 1 with an appropriate width. A second bonding electrode 62 is formed near one end of the n-type semiconductor layer 2 (resistive layer). Wiring layers 631, 632, 633 connected with the light-emitting n-type semiconductor layer 2 and separated electrically from each other are connected, respectively, to a plurality of parts of the n-type semiconductor layer 2 (resistive layer) having different separation dimensions from the second bonding electrode 62. The wiring layers 631, 632 are cut by means of a laser, or the like, while leaving the wiring layer 633.

Description

  The present invention relates to a semiconductor light emitting device in which a semiconductor layer in which an n-type semiconductor layer, an active layer, and a p-type semiconductor layer are stacked on a substrate, a light emitting device including the semiconductor light emitting device, an illumination device including the light emitting device, and a display. The present invention relates to an apparatus and a method for manufacturing the semiconductor light emitting element.

  Light emitting diodes have been attracting attention as a light source because of their low power consumption and long life compared to fluorescent lamps and incandescent lamps that have been used as light sources in the past. It has come to be used in a wide range of fields, such as backlight light sources, illumination light sources, and amusement equipment decorations.

  Such light-emitting diodes can emit required single colors such as blue, blue-green, green and red according to the application, or can emit red, green and blue multicolors in one package. is there. In addition, light-emitting diodes that can emit white light in combination with phosphors have been commercialized.

  For example, a white light-emitting diode (light-emitting device) having a surrounding portion that surrounds an LED chip (semiconductor light-emitting element), including a phosphor that emits light when excited by light of a predetermined wavelength, and has good light emission efficiency and light emission intensity It is disclosed (see Patent Document 1).

JP 2004-161789 A

  However, the light-emitting diode (light-emitting device) of Patent Document 1 includes one LED chip (semiconductor light-emitting element) in the package, and in order to obtain a desired brightness, the brightness depends on the brightness. It was necessary to provide an external circuit such as a resistance element so as to allow the current to flow and to design the external circuit.

  The present invention has been made in view of such circumstances, and there is no need to provide an external circuit such as a resistor, and a semiconductor light emitting element capable of obtaining desired brightness, a light emitting device including the semiconductor light emitting element, and the light emission An object of the present invention is to provide a lighting device and a display device including the device, and a method for manufacturing the semiconductor light emitting element.

  A semiconductor light emitting device according to a first aspect of the present invention is a semiconductor light emitting device in which a semiconductor layer in which an n type semiconductor layer, an active layer, and a p type semiconductor layer are stacked is formed on a substrate, the p type semiconductor layer (or n) of the semiconductor layer. A first bonding electrode connected to the type semiconductor layer), a resistance layer connected to the n-type semiconductor layer (or p-type semiconductor layer), a second bonding electrode connected to the resistance layer, and the resistance layer And an adjustment mark after adjusting the resistance value.

  According to a second aspect of the present invention, there is provided the semiconductor light emitting device according to the first aspect, wherein the n-type semiconductor layer (or the p-type semiconductor layer) is connected to each of a plurality of locations having different separation dimensions of the resistance layer from the second bonding electrode. A plurality of wiring layers are provided, and the adjustment mark is a cut portion obtained by cutting any of the wiring layers.

  According to a third aspect of the present invention, there is provided the semiconductor light emitting device according to the first aspect, wherein the resistance layer is connected to the n-type semiconductor layer (or p-type semiconductor layer) at a plurality of locations having different separation dimensions from the second bonding electrode. It has a plurality of connecting parts, and the adjustment trace is a cut part which cut off any of the connecting parts.

  According to a fourth aspect of the present invention, there is provided a semiconductor light emitting device according to the first aspect, further comprising: a wiring layer that connects the resistance layer and the n-type semiconductor layer (or p-type semiconductor layer); And a portion where the resistance layer is cut away between the wiring layer and a portion where the wiring layer is connected.

  According to a fifth aspect of the present invention, in any one of the first to fourth aspects, the resistance layer is an n-type semiconductor layer or a conductive layer.

  A light-emitting device according to a sixth aspect of the present invention includes the semiconductor light-emitting element according to any one of the first to fifth aspects of the present invention and a housing portion that houses the semiconductor light-emitting element.

  A lighting device according to a seventh aspect includes the light emitting device according to the sixth aspect.

  A display device according to an eighth aspect includes the light emitting device according to the sixth aspect.

  According to a ninth aspect of the present invention, there is provided a method for manufacturing a semiconductor light emitting device, comprising: a semiconductor light emitting device having a semiconductor layer in which an n-type semiconductor layer, an active layer, and a p-type semiconductor layer are stacked on a substrate; Forming a first bonding electrode connected to the n-type semiconductor layer (or n-type semiconductor layer), forming a resistance layer connected to the n-type semiconductor layer (or p-type semiconductor layer), and the resistance layer Forming a second bonding electrode connected to the second bonding electrode, and connecting the n-type semiconductor layer (or the p-type semiconductor layer) to each of a plurality of locations having different separation dimensions of the resistive layer from the second bonding electrode. The method includes a step of forming a plurality of wiring layers and a step of cutting any of the wiring layers.

  According to a tenth aspect of the present invention, there is provided a method for manufacturing a semiconductor light emitting device, comprising: a semiconductor light emitting device having a semiconductor layer formed by stacking an n-type semiconductor layer, an active layer, and a p-type semiconductor layer on a substrate; Forming a first bonding electrode connected to the n-type semiconductor layer (or n-type semiconductor layer), and a resistor having a plurality of connection portions connected to the n-type semiconductor layer (or p-type semiconductor layer) at a plurality of locations Forming a layer; forming a second bonding electrode connected to the resistance layer apart from the plurality of locations; and cutting any one of the connecting portions. .

  According to an eleventh aspect of the present invention, there is provided a method for manufacturing a semiconductor light emitting device, wherein a semiconductor layer in which an n-type semiconductor layer, an active layer, and a p-type semiconductor layer are stacked on a substrate is formed. Forming a first bonding electrode connected to the n-type semiconductor layer (or n-type semiconductor layer), forming a resistance layer connected to the n-type semiconductor layer (or p-type semiconductor layer), and the resistance layer Forming a second bonding electrode connected to the wiring layer; forming a wiring layer connecting the resistance layer and the n-type semiconductor layer (or p-type semiconductor layer); and the second bonding electrode and the wiring. Cutting away a portion of the resistive layer between where the layers are connected.

  In the first invention, the first bonding electrode connected to the p-type semiconductor layer (or n-type semiconductor layer) of the semiconductor layer and the resistance layer connected to the n-type semiconductor layer (or p-type semiconductor layer) And a second bonding electrode connected to the resistance layer, and an adjustment mark after adjusting the resistance value of the resistance layer. That is, a semiconductor layer including a p-type semiconductor layer and an n-type semiconductor layer and a resistance layer whose resistance value is set to a required value are connected in series, and bonding electrodes are provided at both ends of the series circuit. Thereby, since the semiconductor layer for light emission and the resistance element (resistance layer) are included in one semiconductor light emitting element, an external circuit such as a resistance element for setting a current flowing in the light emitting element becomes unnecessary. Further, since the resistance value of the resistance layer can be set to a required value, a desired brightness can be obtained without an external circuit.

  In the second and ninth inventions, the n-type semiconductor layer (or the p-type semiconductor) of the semiconductor layer and each of a plurality of locations having different separation dimensions from the second bonding electrode of the resistance layer to which the second bonding electrode is connected Layer) in advance by a plurality of wiring layers. Then, one or more of the wiring layers are cut, leaving at least one of the wiring layers connected to the plurality of locations. Note that a laser can be used for cutting. Select the dimension of the resistance layer between the second bonding and the point where the wiring layer is connected by cutting the other wiring layer while leaving one of the wiring layers where the distance to the second bonding is different Thus, the resistance value of the resistance layer can be set. Thereby, the resistance value of the resistance layer can be set to a required value, and the resistance value in the semiconductor light emitting element (also referred to as a chip or a light emitting element) can be adjusted at the manufacturing stage of the semiconductor light emitting element. The brightness of the element can be controlled to a desired brightness.

  In the third and tenth inventions, the resistance layer to which the second bonding electrode is connected is connected to an n-type semiconductor layer (or a semiconductor layer for light emission) at a plurality of locations having different separation dimensions from the second bonding electrode (or The p-type semiconductor layer) is connected in advance by a plurality of connecting portions. Then, at least one of the connection portions of the resistance layer connected to the semiconductor layer at the plurality of locations is left, and any (one or more) of the connection portions is cut. Note that a laser can be used for cutting. By disconnecting the other connecting portion while leaving the connecting portion of one of the resistance layers at a location where the separation distance to the second bonding is different, between the second bonding and the location where the resistance layer is connected to the semiconductor layer The resistance value of the resistance layer can be set by selecting the dimension of the resistance layer. Thereby, the resistance value of the resistance layer can be set to a required value, and the resistance value in the semiconductor light emitting element (also referred to as a chip or a light emitting element) can be adjusted at the manufacturing stage of the semiconductor light emitting element. The brightness of the element can be controlled to a desired brightness.

  In the fourth invention and the eleventh invention, the wiring layer connected to the n-type semiconductor layer (or p-type semiconductor layer) of the light emitting semiconductor layer is connected to the resistance layer to which the second bonding electrode is connected. deep. Then, a part of the resistance layer between the second bonding electrode and the portion where the wiring layer is connected is cut off. Note that laser can be used for excision. For example, when the resistance layer is cut in the length direction along the direction of the wiring layer from the second bonding electrode and the direction perpendicular to the length direction is the width direction, a part of the resistance layer is cut in the width direction. Cut out and cut along the length along the way. Thereby, the cross-sectional area and length of the resistance layer can be adjusted, and the resistance value of the resistance layer can be set while further finely adjusting to a required value. Thereby, the resistance value of the resistance layer can be set to a required value, and the resistance value in the semiconductor light emitting element (also referred to as a chip or a light emitting element) can be adjusted at the manufacturing stage of the semiconductor light emitting element. The brightness of the element can be controlled to a desired brightness.

In the fifth invention, the resistance layer is an n-type semiconductor layer or a conductive layer. The conductive layer is, for example, a current diffusion layer. The conductive layer may be an oxide, a metal, or a mixture thereof.
Thus, a resistance element can be formed in the semiconductor light emitting element (also referred to as a chip or a light emitting element) at the manufacturing stage of the semiconductor light emitting element.

  In the sixth invention, the light-emitting device accommodates the above-described semiconductor light-emitting element. Accordingly, it is not necessary to provide an external circuit such as a resistor, and a light emitting device that can obtain desired brightness can be provided.

  In 7th invention and 8th invention, it is not necessary to provide external circuits, such as resistance, by providing the above-mentioned light-emitting device, and provides the illuminating device or display apparatus which can obtain desired brightness. Can do.

  According to the present invention, since a semiconductor layer for light emission and a resistance element (resistance layer) are included in one semiconductor light emitting element, an external circuit such as a resistance element for setting a current flowing in the semiconductor layer for light emission is provided. It becomes unnecessary. Further, since the resistance value of the resistance layer can be set to a required value, a desired brightness can be obtained without an external circuit.

FIG. 3 is a schematic diagram illustrating an example of a planar structure of the semiconductor light emitting element of the first embodiment. FIG. 3 is a cross-sectional view showing an example of a cross-sectional structure of the semiconductor light emitting element of the first embodiment. It is a schematic diagram which shows an example of the method of setting the resistance value of the n-type semiconductor layer as a resistance layer. FIG. 6 is an explanatory diagram showing a manufacturing process of the semiconductor light-emitting element of the first embodiment. FIG. 6 is an explanatory diagram showing a manufacturing process of the semiconductor light-emitting element of the first embodiment. FIG. 6 is a schematic diagram illustrating an example of a planar structure of a semiconductor light emitting element according to a second embodiment. FIG. 5 is a cross-sectional view showing an example of a cross-sectional structure of a semiconductor light emitting element in a second embodiment. FIG. 10 is an explanatory diagram showing a manufacturing process of the semiconductor light-emitting element of the second embodiment. FIG. 10 is an explanatory diagram showing a manufacturing process of the semiconductor light-emitting element of the second embodiment. FIG. 6 is a schematic diagram illustrating an example of a planar structure of a semiconductor light emitting element according to a third embodiment. FIG. 6 is a cross-sectional view showing an example of a cross-sectional structure of a semiconductor light emitting element in a third embodiment. It is a schematic diagram which shows an example of the method of setting the resistance value of the n-type semiconductor layer as a resistance layer. FIG. 10 is an explanatory diagram showing a manufacturing process of the semiconductor light emitting element of the third embodiment. FIG. 10 is an explanatory diagram showing a manufacturing process of the semiconductor light emitting element of the third embodiment. FIG. 6 is a schematic diagram illustrating an example of a planar structure of a semiconductor light emitting element according to a fourth embodiment. FIG. 6 is a cross-sectional view showing an example of a cross-sectional structure of a semiconductor light emitting element in a fourth embodiment. FIG. 10 is an explanatory diagram showing a manufacturing process of the semiconductor light-emitting element of the fourth embodiment. FIG. 10 is an explanatory diagram showing a manufacturing process of the semiconductor light-emitting element of the fourth embodiment. FIG. 10 is a schematic diagram showing an example of a planar structure of a semiconductor light emitting element in a fifth embodiment. FIG. 6 is a cross-sectional view showing an example of a cross-sectional structure of a semiconductor light emitting element in a fifth embodiment. FIG. 10 is an explanatory diagram showing a manufacturing process of the semiconductor light emitting element of the fifth embodiment. FIG. 10 is an explanatory diagram showing a manufacturing process of the semiconductor light emitting element of the fifth embodiment. It is a schematic diagram which shows an example of a structure of the light-emitting device of this Embodiment.

(Embodiment 1)
Hereinafter, the present invention will be described with reference to the drawings illustrating embodiments thereof. FIG. 1 is a schematic view showing an example of a planar structure of the semiconductor light emitting device 100 of the first embodiment, and FIG. 2 is a cross sectional view showing an example of a cross sectional structure of the semiconductor light emitting device 100 of the first embodiment. FIG. 2 is a cross-sectional view taken along line II-II in FIG.

  The semiconductor light emitting device 100 (hereinafter also referred to as “LED chip” or “light emitting device”) of the present embodiment is obtained by cutting a wafer on which a plurality of light emitting devices are formed into a rectangular parallelepiped shape with predetermined dimensions. For example, an LED chip. In FIG. 2, 1 is a sapphire substrate. The sapphire substrate 1 (hereinafter referred to as “substrate”) has a rectangular shape in plan view, and the vertical and horizontal dimensions are, for example, about 0.35 mm, but the dimensions are not limited thereto.

  As shown in FIGS. 1 and 2, a semiconductor light emitting device 100 includes a semiconductor layer (a light emitting n-type semiconductor layer 2, an active layer (not shown), and a p-type semiconductor layer 3 stacked on a rectangular substrate 1). LED structure) is formed.

  As shown in FIG. 2, an AlN buffer layer (not shown), an undoped GaN layer (not shown) having a thickness of about 2 μm, an n-type semiconductor layer 2, an active layer (not shown), and a p-type semiconductor layer are formed on a substrate 1. 3 are stacked in this order. The n-type semiconductor layer 2 includes, for example, an n-GaN (gallium nitride) layer having a thickness of about 2 μm, an n-AlGaInN cladding layer, and the like. The active layer is composed of a GaN / InGaN-MQW (Multi-quantum Well) type active layer or the like. The p-type semiconductor layer 3 includes a p-AlGaInN layer, a p-GaN layer of about 0.3 μm, a p-InGaN layer as a contact layer, and the like. Thus, a compound semiconductor layer is formed to form an LED structure as a semiconductor layer for a light emitting element. In addition, the structure which does not form an undoped GaN layer may be sufficient.

  A current diffusion layer 4 is formed on the surface of the p-type semiconductor layer 3 of the semiconductor layer (LED structure). The current diffusion layer 4 is, for example, an ITO film (indium tin oxide film) that is a conductive transparent film. A first bonding electrode 61 is formed on the surface of the current diffusion layer 4, and the p-type semiconductor layer 3 is electrically connected to the first bonding electrode 61 through the current diffusion layer 4.

  An n ohmic electrode 5 is formed on the surface of the n-type semiconductor layer 2 of the semiconductor layer (LED structure). The n-ohmic electrode 5 is formed by, for example, forming a film of V / Au / Al / Ni / Au by vacuum deposition, patterning by a lift-off method, and heating to about 500 ° C. in a mixed atmosphere of nitrogen and oxygen. Can do. The n ohmic electrode 5 is a portion that performs electrical junction with the n-type semiconductor layer 2.

  On the substrate 1, an n-type semiconductor layer 2 as a resistance layer is formed separately from the n-type semiconductor layer 2 of the light-emitting semiconductor layer (LED structure). An n ohmic electrode 5 is formed on the surface of the n-type semiconductor layer 2 as a resistance layer. A second bonding electrode 62 is formed on the surface of the n-ohmic electrode 5. The n-type semiconductor layer 2 of the resistance layer is electrically connected to the second bonding electrode 62 through the n ohmic electrode 5.

  The ohmic electrode 5 formed on the surface of the n-type semiconductor layer 2 as the resistance layer and the ohmic electrode 5 formed on the surface of the n-type semiconductor layer 2 of the light-emitting semiconductor layer (LED structure) are the wiring layer 63. Connected by. The wiring layer 63 includes wiring layers 631, 632, and 633 that are spaced apart from each other by an appropriate length and arranged in parallel.

  More specifically, as shown in FIG. 1, the n-type semiconductor layer 2 as a resistance layer has an appropriate width and is arranged along one side of the substrate 1. A second bonding electrode 62 is formed in the vicinity of one end of the n-type semiconductor layer 2 (resistive layer). The wiring layers 631, 632, and 633 are electrically separated from each other through the n-ohmic electrode 5 at a plurality of locations having different separation dimensions from the second bonding electrode 62 of the n-type semiconductor layer 2 (resistance layer). Connected.

  The first bonding electrode 61, the second bonding electrode 62, and the wiring layer 63 (including the wiring layers 631 to 633) can be formed, for example, by depositing Ti / Au by vacuum deposition. Since Ti / Au is used as the material of the first bonding electrode 61 and the second bonding electrode 62, the mechanical strength is excellent and the bonding is easy and the peeling is difficult. In addition, as a material of the first bonding electrode 61 and the second bonding electrode 62, a metal such as Ni / Au can be used.

A protective film 7 is formed on the side and upper surfaces of the n-type semiconductor layer 2, the p-type semiconductor layer 3, the current diffusion layer 4, the wiring layer 63, and the like that are not electrically connected. The protective film 7 is, for example, a SiO ₂ film.

  With the above-described configuration, the semiconductor light emitting device 100 has the first bonding electrode 61 connected to the anode side of the LED, and one end side of the resistance element (resistance layer) connected to the cathode side of the LED via the wiring layer 63. It has a circuit configuration in which a second bonding electrode 62 is connected to the other end of the element (resistive layer).

  The n-type semiconductor layer 2 as the resistance layer can be set to a required resistance value. FIG. 3 is a schematic diagram showing an example of a method for setting the resistance value of the n-type semiconductor layer 2 as the resistance layer. In FIG. 3, a rectangular region 20 is an adjustment mark after adjusting the resistance value of the resistance layer, and represents a cut portion cut by a laser or the like. That is, in the example of FIG. 3, among the wiring layers 631, 632, and 633, only the wiring layer 633 is left and the other wiring layers 631 and 632 are cut with a laser. The laser cutting is performed until the substrate 1 is exposed.

  As shown in FIG. 3, leaving one of the wiring layers where the separation distance to the second bonding 62 is different (wiring layer 633 in the example of FIG. 3) and other wiring layers (wiring in the example of FIG. 3). By cutting the layers 631 and 632), it is possible to set the resistance value of the resistance layer by selecting the dimension of the resistance layer between the second bonding 62 and the portion where the wiring layer 633 is connected. Thereby, the resistance value of the resistance layer can be set to a required value, and the resistance value in the semiconductor light emitting element (also referred to as a chip or a light emitting element) 100 can be adjusted in the manufacturing stage of the semiconductor light emitting element 100. The brightness of the semiconductor light emitting device 100 can be controlled to a desired brightness.

  Further, since the semiconductor layer for light emission and the resistance element (resistance layer) are included in one semiconductor light emitting element 100, an external circuit such as a resistance element for setting a current flowing in the semiconductor layer for light emission becomes unnecessary. . Further, since the resistance value of the resistance layer can be set to a required value, a desired brightness can be obtained without an external circuit.

  In the example of FIG. 3, the wiring layer 633 is left and the other wiring layers 631 and 632 are cut. However, the present invention is not limited to this. For example, the wiring layer 631 is left and other wiring layers are separated. The structure which cut | disconnects the layers 632 and 633 may be sufficient, or the structure which cut | disconnects other wiring layers 631 and 633 leaving the wiring layer 632 may be sufficient. Further, the number of wiring layers left without being cut is not limited to one, and may be two. Moreover, it can also be set as the structure which does not cut | disconnect a wiring layer. Further, the number of wiring layers 631 to 633 provided separately is not limited to three, and may be two or four or more. As described above, the resistance value of the internal resistance of the semiconductor light emitting device 100 can be set to a desired value by adopting several different forms.

  Next, a method for manufacturing the semiconductor light emitting device 100 of the first embodiment will be described. 4 and 5 are explanatory views showing the manufacturing steps of the semiconductor light emitting device 100 of the first embodiment. As shown in FIG. 4A, an AlN buffer layer (not shown) is first grown on a substrate (sapphire substrate) 1 at about 400 ° C. by metal organic chemical vapor deposition (MO-CVD). Thereafter, an n-type semiconductor layer 2 including an undoped GaN layer of about 2 μm, an n-GaN layer of about 2 μm and an n-AlGaInN cladding layer, a GaN / InGaN-MQW type active layer (not shown), and p-AlGaInN An LED structure is generated in which a p-type semiconductor layer 3 composed of a layer, a p-GaN layer of about 0.3 μm, and a p-InGaN layer as a contact layer is formed in this order. While irradiating the substrate 1 taken out from the MO-CVD apparatus with ultraviolet rays, the substrate 1 is heated to about 400 ° C. to activate the p-type semiconductor layer 3.

  As shown in FIG. 4B, the n-type semiconductor layer 2 (including the light-emitting semiconductor layer and the resistance layer) for connection to the n-ohmic electrode 5 is exposed by photolithography and dry etching using the photoresist as a mask. The etching depth is, for example, 500 nm.

  As shown in FIG. 4C, a transparent current diffusion layer 4 of an ITO film (indium tin oxide film) is formed to a thickness of about 400 nm by a film forming method such as vacuum evaporation or sputtering, and patterned by a lift-off method. Thereby, the current diffusion layer 4 is formed on the light emitting surface of the semiconductor light emitting device 100.

  As shown in FIG. 4D, a V / Au / Al / Ni / Au film is formed by vacuum deposition, and patterning is performed by a lift-off method to form an n ohmic electrode 5. A portion where the film is left, that is, a portion where the n-ohmic electrode 5 is formed is an ohmic junction provided in a portion where the semiconductor layer for light emission and the n-type semiconductor layer 2 as the resistance layer are exposed. After patterning, the n ohmic electrode 5 and the current diffusion layer 4 are annealed simultaneously by heating to about 500 ° C. in a tube furnace in a mixed atmosphere of nitrogen and oxygen.

  As shown in FIG. 5E, in order to form a resistance layer having an arbitrary width dimension, etching is performed by photolithography and dry etching until the peripheral n-type semiconductor layer 2 forming the resistance layer is exposed to the substrate 1.

  As shown in FIG. 5F, a Ti / Au film is formed by vacuum deposition and patterned by lift-off to form a first bonding electrode 61, a second bonding electrode 62, and a wiring layer 63 (including wiring layers 631 to 633). .

As shown in FIG. 5G, a SiO ₂ film (protective film) 7 is formed on the entire surface by plasma CVD, and the SiO ₂ film of the portion where the first bonding electrode 61 and the second bonding electrode 62 of the light emitting element 100 are provided by diluted hydrofluoric acid. _{2 The} film 7 is removed. As a result, an LED wafer in which a circuit in which one LED structure and a resistance element are connected in series is formed in one package (LED chip) is completed.

  Thereafter, the characteristics of the semiconductor light emitting device 100 are measured by a wafer prober or the like. At the same time, the connection portion is cut by leaving any one of the wiring layers 631 to 633 connecting the semiconductor layer for light emission and the resistance layer with a laser or the like. Thereby, the semiconductor light emitting element 100 having a desired resistance value can be obtained.

  Thereafter, the element (LED chip) is separated by laser scribing to complete the semiconductor light emitting element 100 (LED chip) and assemble into a package.

  Note that the timing at which the wiring layers 631 to 633 are cut by the laser is not limited to before element isolation, and can be after element isolation.

  Since the semiconductor light emitting element (LED chip) 100 according to the first embodiment includes a resistance element in the LED chip, it is not necessary to mount a resistor as an external circuit of the semiconductor light emitting element 100. Furthermore, by cutting (processing) the resistance layer with a laser or the like, the resistance value of the resistance element in the LED chip can be varied during the manufacturing process, so that the resistance value in the LED chip is changed at the final stage of the manufacturing process. Can be adjusted. As a result, the semiconductor light emitting element (LED chip) 100 alone can be controlled to a desired brightness. For example, as described above, in the first embodiment, since the three wiring layers 631 to 633 are formed, when the wiring layer is not cut, when two wiring layers are cut, only one wiring layer is cut. In such a case, different resistance values can be obtained and set to a desired resistance value. Thereby, it is possible to obtain a desired brightness only by applying a predetermined voltage to the semiconductor light emitting element 100 from the outside.

(Embodiment 2)
In Embodiment 1, the n-type semiconductor layer 2 is used as the resistance layer. However, the resistance layer is not limited to the n-type semiconductor layer 2 and may be, for example, a conductive layer. For example, the current diffusion layer 4 can be used as the conductive layer. Hereinafter, a configuration using the current diffusion layer 4 as the resistance layer will be described.

  FIG. 6 is a schematic view showing an example of a planar structure of the semiconductor light emitting device 120 of the second embodiment, and FIG. 7 is a cross sectional view showing an example of a cross sectional structure of the semiconductor light emitting device 120 of the second embodiment. FIG. 7 is a cross-sectional view taken along line VII-VII in FIG. In addition, the same code | symbol is attached | subjected to the location similar to Embodiment 1, and description is simplified.

  As shown in FIGS. 6 and 7, the semiconductor light emitting device 120 includes a semiconductor layer (on which a light emitting n-type semiconductor layer 2, an active layer (not shown), and a p-type semiconductor layer 3 are stacked on a rectangular substrate 1). LED structure) is formed.

  A current diffusion layer 4 is formed on the surface of the p-type semiconductor layer 3 of the semiconductor layer (LED structure). A first bonding electrode 61 is formed on the surface of the current diffusion layer 4, and the p-type semiconductor layer 3 is electrically connected to the first bonding electrode 61 through the current diffusion layer 4.

  A current diffusion layer 4 as a resistance layer is formed on the surface of the substrate 1 and the surface of the n-type semiconductor layer 2 of the semiconductor layer (LED structure). The current spreading layer 4 is connected to the n-type semiconductor layer 2 via an n-ohmic electrode 5 and a wiring layer 63 formed on the surface of the n-type semiconductor layer 2. The current spreading layer 4 includes current spreading layers 41, 42, and 43 as connecting portions arranged in parallel at an appropriate distance.

  More specifically, as shown in FIG. 6, the current diffusion layer 4 as a resistance layer has an appropriate width and is disposed along one side of the substrate 1. A second bonding electrode 62 is formed in the vicinity of one end of the current spreading layer 4 (resistive layer). The current diffusion layers 41, 42, and 43 serving as connecting portions are connected to the wiring layer 63 at a plurality of locations where the separation size of the current diffusion layer 4 (resistance layer) from the second bonding electrode 62 is different.

  With the above-described configuration, the semiconductor light emitting device 120 has the first bonding electrode 61 connected to the anode side of the LED, and one end side of the resistance element (resistance layer) connected to the cathode side of the LED via the wiring layer 63. It has a circuit configuration in which a second bonding electrode 62 is connected to the other end of the element (resistive layer).

  The current spreading layer 4 as the resistance layer can be set to a required resistance value. That is, by a method similar to the method illustrated in FIG. 3 of the first embodiment, only the current diffusion layer 43 is left out of the current diffusion layers 41, 42, 43, and the other current diffusion layers 41, 42 are laser-exposed. Cut until the substrate 1 is exposed. Similar to the first embodiment, the semiconductor light emitting element 120 has the cut region 20 as an adjustment mark after adjusting the resistance value of the resistance layer.

  In the illustration of FIG. 6, for example, leaving any current diffusion layer at a location where the separation distance to the second bonding 62 is different (in the example of FIG. 6, for example, the current diffusion layer 43), other current diffusion layers ( In the example of FIG. 6, the resistance value of the resistance layer is set by selecting the dimension of the resistance layer between the second bonding 62 and the current diffusion layer 43 by cutting the current diffusion layers 41, 42). Can do. Thereby, the resistance value of the resistance layer can be set to a required value, and the resistance value in the semiconductor light emitting element (also referred to as a chip or a light emitting element) 120 can be adjusted in the manufacturing stage of the semiconductor light emitting element 120. The brightness of the semiconductor light emitting element 120 can be controlled to a desired brightness.

  In the example of FIG. 6, the current diffusion layer 43 is left and the other current diffusion layers 41 and 42 are cut. However, the present invention is not limited to this. For example, the current diffusion layer 41 is left. The other current spreading layers 42 and 43 may be cut off, or the other current spreading layers 41 and 43 may be cut while leaving the current spreading layer 42. Further, the number of current diffusion layers left without being cut is not limited to one, and may be two. Moreover, it can also be set as the structure which does not cut | disconnect the current spreading | diffusion layers 41-43. The number of current spreading layers 41 to 43 provided separately is not limited to three, and may be two or four or more. As described above, the resistance value of the internal resistance of the semiconductor light emitting device 120 can be set to a desired value by using several different forms.

  Next, a method for manufacturing the semiconductor light emitting device 120 of the second embodiment will be described. 8 and 9 are explanatory views showing manufacturing steps of the semiconductor light emitting device 120 of the second embodiment. As shown in FIG. 8A, an AlN buffer layer (not shown) is first grown at about 400 ° C. on a substrate (sapphire substrate) 1 by metal organic chemical vapor deposition (MO-CVD). Thereafter, an n-type semiconductor layer 2 including an undoped GaN layer of about 2 μm, an n-GaN layer of about 2 μm and an n-AlGaInN cladding layer, a GaN / InGaN-MQW type active layer (not shown), and p-AlGaInN An LED structure is generated in which a p-type semiconductor layer 3 composed of a layer, a p-GaN layer of about 0.3 μm, and a p-InGaN layer as a contact layer is formed in this order. While irradiating the substrate 1 taken out from the MO-CVD apparatus with ultraviolet rays, the substrate 1 is heated to about 400 ° C. to activate the p-type semiconductor layer 3.

  As shown in FIG. 8B, by photolithography and dry etching, the photoresist is used as a mask to connect to the n-type semiconductor layer 2 and the n-ohmic electrode 5 at portions other than the portion (region) where the semiconductor layer for light emission is formed. N-type semiconductor layer 2 (semiconductor layer for light emission) is exposed. The etching depth is, for example, 500 nm.

  As shown in FIG. 8C, etching is performed by photolithography and dry etching using the photoresist as a mask until a portion other than a portion (region) where a semiconductor layer for light emission is formed is exposed.

  As shown in FIG. 8D, a transparent current diffusion layer 4 of an ITO film (indium tin oxide film) is formed to a thickness of about 400 nm by a film forming method such as vacuum evaporation or sputtering, and patterned by a lift-off method. Thereby, the light emitting surface of the semiconductor layer for light emission, the region for forming the resistance layer (resistance element), the connection portion between the resistance layer and the n-type semiconductor layer for light emission, and the formation of the first and second bonding electrodes 61 and 62 are formed. An ITO film is formed at a location (region).

  As shown in FIG. 9E, a V / Au / Al / Ni / Au film is formed by vacuum deposition, and patterning is performed by a lift-off method to form an n ohmic electrode 5. A portion where the film is left, that is, a portion where the n-ohmic electrode 5 is formed is an ohmic junction provided in a portion where the n-type semiconductor layer 2 of the semiconductor layer for light emission is exposed. After patterning, the n ohmic electrode 5 and the current diffusion layer 4 are annealed simultaneously by heating to about 500 ° C. in a tube furnace in a mixed atmosphere of nitrogen and oxygen.

  As shown in FIG. 9F, a Ti / Au film is formed by vacuum deposition and patterned by lift-off to form a first bonding electrode 61, a second bonding electrode 62, and a wiring layer 63.

As shown in FIG. 9G, a SiO ₂ film (protective film) 7 is formed on the entire surface by plasma CVD, and the SiO ₂ film of the portion where the first bonding electrode 61 and the second bonding electrode 62 of the light emitting element 120 are provided by diluted hydrofluoric acid. _{2 The} film 7 is removed. As a result, an LED wafer in which a circuit in which one LED structure and a resistance element are connected in series is formed in one package (LED chip) is completed.

  Thereafter, the characteristics of the semiconductor light emitting device 120 are measured by a wafer prober or the like. At the same time, the connection portion is cut by leaving any one of the current diffusion layers 41 to 43 that connect the semiconductor layer for light emission and the resistance layer with a laser or the like. Thereby, the semiconductor light emitting device 120 having a desired resistance value can be obtained.

  Thereafter, the element (LED chip) is separated by laser scribing, and the semiconductor light emitting element 120 (LED chip) is completed and assembled into a package.

  Note that the timing of cutting the current diffusion layers 41 to 43 with the laser is not limited to before element isolation, and can be after element isolation.

  In the above example, the current diffusion layer 4 is used as the resistance layer, but the material (material) used for the resistance layer is not limited to the current diffusion layer 4. For example, a conductive layer such as another oxide, metal, or a mixture thereof can be used as the resistance layer.

  Similar to the first embodiment, the semiconductor light emitting element (LED chip) 120 according to the second embodiment includes a resistance element in the LED chip, so that it is not necessary to mount a resistor as an external circuit of the semiconductor light emitting element 120. Furthermore, by cutting (processing) the resistance layer with a laser or the like, the resistance value of the resistance element in the LED chip can be varied during the manufacturing process, so that the resistance value in the LED chip is changed at the final stage of the manufacturing process. Can be adjusted. As a result, the semiconductor light emitting element (LED chip) 120 alone can be controlled to a desired brightness. For example, as described above, in the second embodiment, the three current diffusion layers 41 to 43 are formed. Therefore, when the current diffusion layer is not cut, one current diffusion is obtained when two current diffusion layers are cut. In the case of cutting only the layer, different resistance values can be obtained, and the desired resistance value can be set. Thereby, it is possible to obtain a desired brightness only by applying a predetermined voltage to the semiconductor light emitting element 120 from the outside.

(Embodiment 3)
In the first and second embodiments, the connection portion (such as the wiring layer or the current diffusion layer) between the resistance layer and the n-type semiconductor layer 2 of the light emitting semiconductor layer is cut. The setting method is not limited to this. For example, the length and cross-sectional area of the region where the current flows can be adjusted by cutting off a part of the region of the resistance layer.

  FIG. 10 is a schematic diagram showing an example of a planar structure of the semiconductor light emitting device 140 according to the third embodiment. FIG. 11 is a cross sectional view showing an example of a sectional structure of the semiconductor light emitting device 140 according to the third embodiment. FIG. 11 is a cross-sectional view taken along line XI-XI in FIG. In addition, the same code | symbol is attached | subjected to the location similar to Embodiment 1, and description is simplified.

  As shown in FIGS. 10 and 11, the semiconductor light emitting device 140 includes a semiconductor layer (a light emitting n-type semiconductor layer 2, an active layer (not shown), and a p-type semiconductor layer 3 stacked on a rectangular substrate 1). LED structure) is formed.

  A current diffusion layer 4 is formed on the surface of the p-type semiconductor layer 3 of the semiconductor layer (LED structure). A first bonding electrode 61 is formed on the surface of the current diffusion layer 4, and the p-type semiconductor layer 3 is electrically connected to the first bonding electrode 61 through the current diffusion layer 4.

  On the surface of the n-type semiconductor layer 2 of the semiconductor layer (LED structure), an n-ohmic electrode 5 for connection to a wiring layer 63 described later is formed.

  On the substrate 1, an n-type semiconductor layer 2 as a resistance layer is formed separately from the n-type semiconductor layer 2 of the light-emitting semiconductor layer (LED structure).

  More specifically, as shown in FIG. 10, the n-type semiconductor layer 2 as the resistance layer has an appropriate width and is arranged along one side of the substrate 1. A second bonding electrode 62 is formed in the vicinity of one end of the n-type semiconductor layer 2 (resistive layer). The vicinity of the other end of the n-type semiconductor layer 2 (resistive layer) is connected to the n-type semiconductor layer 2 of the semiconductor layer for light emission via the wiring layer 63.

  With the above-described configuration, the semiconductor light emitting element 140 has the first bonding electrode 61 connected to the anode side of the LED, and one end side of the resistance element (resistance layer) connected to the cathode side of the LED via the wiring layer 63. It has a circuit configuration in which a second bonding electrode 62 is connected to the other end of the element (resistive layer).

  The n-type semiconductor layer 2 as the resistance layer can be set to a required resistance value. FIG. 12 is a schematic diagram showing an example of a method for setting the resistance value of the n-type semiconductor layer 2 as the resistance layer. In FIG. 12, a substantially L-shaped region 20 in a plan view is an adjustment mark after adjusting the resistance value of the resistance layer, and represents an excision site cut by a laser or the like. That is, in the example of FIG. 12, when the length direction is along the direction of the connection portion from the second bonding electrode 62 to the wiring layer 63 and the direction perpendicular to the length direction is the width direction, n as the resistance layer A part of the type semiconductor layer 2 is cut along the width direction, and cut along the length direction in the middle. The n-type semiconductor layer 2 (resistive layer) is removed until the substrate 1 is exposed. Thereby, the length and cross-sectional area of the n-type semiconductor layer 2 (resistive layer) can be adjusted, and the resistance value of the resistive layer can be set in a wide range and set while finely adjusting to a required value. it can. The resistance value of the resistance layer can be set to a required value, and the resistance value in the semiconductor light emitting element 140 (also referred to as a chip or a light emitting element) can be adjusted in the manufacturing stage of the semiconductor light emitting element 140. The brightness of 140 can be controlled to a desired brightness.

  In the example of FIG. 12, the region 20 to be excised has an L shape in plan view, but the shape of the region to be excised is not limited to the L shape. A region having an arbitrary shape can be cut according to a desired resistance value.

  Next, a method for manufacturing the semiconductor light emitting device 140 of Embodiment 3 will be described. 13 and 14 are explanatory views showing the manufacturing process of the semiconductor light emitting device 140 of the third embodiment. As shown in FIG. 13A, an AlN buffer layer (not shown) is first grown at about 400 ° C. on a substrate (sapphire substrate) 1 by metal organic chemical vapor deposition (MO-CVD). Thereafter, an n-type semiconductor layer 2 including an undoped GaN layer of about 2 μm, an n-GaN layer of about 2 μm and an n-AlGaInN cladding layer, a GaN / InGaN-MQW type active layer (not shown), and p-AlGaInN An LED structure is generated in which a p-type semiconductor layer 3 composed of a layer, a p-GaN layer of about 0.3 μm, and a p-InGaN layer as a contact layer is formed in this order. While irradiating the substrate 1 taken out from the MO-CVD apparatus with ultraviolet rays, the substrate 1 is heated to about 400 ° C. to activate the p-type semiconductor layer 3.

  As shown in FIG. 13B, the n-type semiconductor layer 2 (including the light-emitting semiconductor layer and the resistance layer) for connection to the n-ohmic electrode 5 is exposed by photolithography and dry etching using the photoresist as a mask. The etching depth is, for example, 500 nm.

  As shown in FIG. 13C, a transparent current diffusion layer 4 of an ITO film (indium tin oxide film) is formed to a thickness of about 400 nm by a film forming method such as vacuum evaporation or sputtering, and patterned by a lift-off method. As a result, the current diffusion layer 4 is formed on the light emitting surface of the semiconductor light emitting device 140.

  As shown in FIG. 13D, a V / Au / Al / Ni / Au film is formed by vacuum deposition, and patterning is performed by a lift-off method to form an n ohmic electrode 5. A portion where the film is left, that is, a portion where the n-ohmic electrode 5 is formed is an ohmic junction provided in a portion where the semiconductor layer for light emission and the n-type semiconductor layer 2 as the resistance layer are exposed. After patterning, the n ohmic electrode 5 and the current diffusion layer 4 are annealed simultaneously by heating to about 500 ° C. in a tube furnace in a mixed atmosphere of nitrogen and oxygen.

  As shown in FIG. 14E, in order to form a resistance layer having an arbitrary width dimension, the peripheral n-type semiconductor layer 2 on which the resistance layer is formed is etched by photolithography and dry etching until the substrate 1 is exposed.

  As shown in FIG. 14F, a Ti / Au film is formed by vacuum deposition and patterned by lift-off to form a first bonding electrode 61, a second bonding electrode 62, and a wiring layer 63.

As shown in FIG. 14G, the SiO ₂ film (protective film) 7 is formed on the entire surface by plasma CVD, and the SiO ₂ film of the portion where the first bonding electrode 61 and the second bonding electrode 62 of the light emitting element 140 are provided by diluted hydrofluoric acid. _{2 The} film 7 is removed. As a result, an LED wafer in which a circuit in which one LED structure and a resistance element are connected in series is formed in one package (LED chip) is completed.

  Thereafter, the characteristics of the semiconductor light emitting device 140 are measured by a wafer prober or the like. At the same time, for example, as illustrated in FIG. 12, the length and the cross-sectional area of the n-type semiconductor layer 2 (resistive layer) are adjusted by cutting off a part of the n-type semiconductor layer 2 as a resistive layer with a laser or the like. To do. Thereby, the semiconductor light emitting device 140 having a desired resistance value can be obtained.

  Thereafter, the element (LED chip) is separated by laser scribing, and the semiconductor light emitting element 140 (LED chip) is completed and assembled into a package.

  Note that the timing at which a part of the n-type semiconductor layer 2 (resistive layer) is cut with a laser is not limited to before element isolation, and can be after element isolation.

  Since the semiconductor light emitting element (LED chip) 140 of Embodiment 3 includes a resistance element in the LED chip, it is not necessary to mount a resistor as an external circuit of the semiconductor light emitting element 140. Further, by cutting (processing) a part of the resistance layer with a laser or the like, the resistance value of the resistance element in the LED chip can be varied during the manufacturing process, so that in the LED chip at the final stage of the manufacturing process. The resistance value can be adjusted. As a result, the semiconductor light emitting element (LED chip) 140 alone can be controlled to a desired brightness. In particular, in Embodiment 3, since the length and cross-sectional area of the resistance layer can be continuously varied, the resistance value can be set over a wide range and the resistance value can be finely adjusted. Thereby, it is possible to obtain a desired brightness only by applying a predetermined voltage from the outside to the semiconductor light emitting device 140.

(Embodiment 4)
Although the n-type semiconductor layer 2 is used as the resistance layer in the third embodiment, the resistance layer is not limited to the n-type semiconductor layer 2 and may be, for example, a conductive layer. For example, the current diffusion layer 4 can be used as the conductive layer. Hereinafter, a configuration using the current diffusion layer 4 as the resistance layer will be described.

  FIG. 15 is a schematic view showing an example of a planar structure of the semiconductor light emitting device 160 of the fourth embodiment, and FIG. 16 is a cross sectional view showing an example of a sectional structure of the semiconductor light emitting device 160 of the fourth embodiment. FIG. 16 is a cross-sectional view taken along line XVI-XVI in FIG. Note that the same parts as those in the third embodiment are denoted by the same reference numerals to simplify the description.

  As shown in FIGS. 15 and 16, the semiconductor light emitting device 160 includes a semiconductor layer (a semiconductor layer in which an n-type semiconductor layer 2 for light emission, an active layer (not shown), and a p-type semiconductor layer 3 are stacked on a rectangular substrate 1. LED structure) is formed.

  A current diffusion layer 4 is formed on the surface of the p-type semiconductor layer 3 of the semiconductor layer (LED structure). A first bonding electrode 61 is formed on the surface of the current diffusion layer 4, and the p-type semiconductor layer 3 is electrically connected to the first bonding electrode 61 through the current diffusion layer 4.

  On the surface of the n-type semiconductor layer 2 of the semiconductor layer (LED structure), an n-ohmic electrode 5 for connection to a wiring layer 63 described later is formed.

  On the substrate 1, a current diffusion layer 4 as a resistance layer is formed separately from the n-type semiconductor layer 2 of the light emitting semiconductor layer (LED structure).

  More specifically, as shown in FIG. 15, the current diffusion layer 4 as a resistance layer has an appropriate width and is arranged along one side of the substrate 1. A second bonding electrode 62 is formed in the vicinity of one end of the current spreading layer 4. The vicinity of the other end of the current diffusion layer 4 is connected to the n-type semiconductor layer 2 of the light emitting semiconductor layer via the wiring layer 63.

  With the above-described configuration, the semiconductor light emitting device 160 has the first bonding electrode 61 connected to the anode side of the LED, and one end side of the resistance element (resistance layer) connected to the cathode side of the LED via the wiring layer 63. It has a circuit configuration in which a second bonding electrode 62 is connected to the other end of the element (resistive layer).

  The current spreading layer 4 as the resistance layer can be set to a required resistance value by a method similar to the method illustrated in FIG. That is, the n-type semiconductor layer 2 as the resistance layer in the example of FIG. As a result, the length and cross-sectional area of the current spreading layer 4 can be adjusted so that the resistance value of the resistance layer can be set in a wide range and further set while finely adjusting to a required value. The resistance value of the resistance layer can be set to a required value, and the resistance value in the semiconductor light emitting element 160 (also referred to as a chip or a light emitting element) can be adjusted in the manufacturing stage of the semiconductor light emitting element 160. The brightness of the light emitting element 160 can be controlled to a desired brightness.

  Also in Embodiment 4, the shape of the region to be excised is not limited to the L shape. A region having an arbitrary shape can be cut according to a desired resistance value.

  Next, a method for manufacturing the semiconductor light emitting device 160 of the fourth embodiment will be described. 17 and 18 are explanatory views showing the manufacturing process of the semiconductor light emitting device 160 of the fourth embodiment. As shown in FIG. 17A, an AlN buffer layer (not shown) is first grown on a substrate (sapphire substrate) 1 at about 400 ° C. by metal organic chemical vapor deposition (MO-CVD). Thereafter, an n-type semiconductor layer 2 including an undoped GaN layer of about 2 μm, an n-GaN layer of about 2 μm and an n-AlGaInN cladding layer, a GaN / InGaN-MQW type active layer (not shown), and p-AlGaInN An LED structure is generated in which a p-type semiconductor layer 3 composed of a layer, a p-GaN layer of about 0.3 μm, and a p-InGaN layer as a contact layer is formed in this order. While irradiating the substrate 1 taken out from the MO-CVD apparatus with ultraviolet rays, the substrate 1 is heated to about 400 ° C. to activate the p-type semiconductor layer 3.

  As shown in FIG. 17B, by photolithography and dry etching, the photoresist is used as a mask to connect to the n-type semiconductor layer 2 and the n-ohmic electrode 5 at portions other than the portion (region) where the semiconductor layer for light emission is formed. N-type semiconductor layer 2 (semiconductor layer for light emission) is exposed. The etching depth is, for example, 500 nm.

  As shown in FIG. 17C, etching is performed by photolithography and dry etching using the photoresist as a mask until a portion other than a portion (region) where a semiconductor layer for light emission is formed is exposed.

  As shown in FIG. 17D, a transparent current diffusion layer 4 of an ITO film (indium tin oxide film) is formed to a thickness of about 400 nm by a film forming method such as vacuum evaporation or sputtering, and patterned by a lift-off method. Thereby, the light emitting surface of the semiconductor layer for light emission, the region for forming the resistance layer (resistance element), the connection portion between the resistance layer and the n-type semiconductor layer for light emission, and the formation of the first and second bonding electrodes 61 and 62 are formed. An ITO film is formed at a location (region).

  As shown in FIG. 18E, a V / Au / Al / Ni / Au film is formed by vacuum deposition, and patterning is performed by a lift-off method to form an n ohmic electrode 5. A portion where the film is left, that is, a portion where the n-ohmic electrode 5 is formed is an ohmic junction provided in a portion where the n-type semiconductor layer 2 of the semiconductor layer for light emission is exposed. After patterning, the n ohmic electrode 5 and the current diffusion layer 4 are annealed simultaneously by heating to about 500 ° C. in a tube furnace in a mixed atmosphere of nitrogen and oxygen.

  As shown in FIG. 18F, a Ti / Au film is formed by vacuum deposition and patterned by lift-off to form a first bonding electrode 61, a second bonding electrode 62, and a wiring layer 63.

As shown in FIG. 18G, a SiO ₂ film (protective film) 7 is formed on the entire surface by plasma CVD, and the SiO ₂ film of the portion where the first bonding electrode 61 and the second bonding electrode 62 of the light emitting element 160 are provided by diluted hydrofluoric acid. _{2 The} film 7 is removed. As a result, an LED wafer in which a circuit in which one LED structure and a resistance element are connected in series is formed in one package (LED chip) is completed.

  Thereafter, the characteristics of the semiconductor light emitting device 160 are measured by a wafer prober or the like. At the same time, for example, as illustrated in FIG. 12, the length and the cross-sectional area of the current diffusion layer 4 are adjusted by cutting a part of the current diffusion layer 4 as a resistance layer with a laser or the like. Thereby, the semiconductor light emitting element 160 having a desired resistance value can be obtained.

  Thereafter, the element (LED chip) is separated by laser scribing to complete the semiconductor light emitting element 160 (LED chip) and to be assembled into a package.

  Note that the timing at which a part of the current diffusion layer 4 is cut off by the laser is not limited to before element isolation, and can be after element isolation.

  Similar to the third embodiment, the semiconductor light emitting element (LED chip) 160 according to the fourth embodiment includes a resistance element in the LED chip, and thus it is not necessary to mount a resistor as an external circuit of the semiconductor light emitting element 160. . Further, by cutting (processing) a part of the resistance layer with a laser or the like, the resistance value of the resistance element in the LED chip can be varied during the manufacturing process, so that in the LED chip at the final stage of the manufacturing process. The resistance value can be adjusted. As a result, the semiconductor light emitting element (LED chip) 160 alone can be controlled to a desired brightness. Particularly in Embodiment 4, since the length and cross-sectional area of the resistance layer can be continuously varied, the resistance value can be set over a wide range and the resistance value can be finely adjusted. Thereby, it is possible to obtain a desired brightness only by applying a predetermined voltage from the outside to the semiconductor light emitting device 160.

  In the first to fourth embodiments described above, the first bonding electrode 61 is connected to the anode side of the LED, the one end side of the resistance element (resistance layer) is connected to the cathode side of the LED, and the other elements of the resistance element (resistance layer). Although it has a circuit configuration in which the second bonding electrode 62 is connected to the end side, it is not limited to this. For example, the first bonding electrode 61 is connected to the cathode side of the LED, one end side of a resistance element (resistance layer) is connected to the anode side of the LED, and the second bonding electrode is connected to the other end side of the resistance element (resistance layer). A circuit configuration in which 62 is connected may be employed.

(Embodiment 5)
In Embodiments 1 to 4, the GaN-based semiconductor layer is used. However, the present invention is not limited to this. For example, a semiconductor layer such as AlGaInP can also be used. As a result, the emission color of the LED chip can be changed from red to yellow as well as blue.

  FIG. 19 is a schematic view showing an example of a planar structure of the semiconductor light emitting device 180 of the fifth embodiment, and FIG. 20 is a cross sectional view showing an example of a cross sectional structure of the semiconductor light emitting device 180 of the fifth embodiment. FIG. 20 is a cross-sectional view taken along line XX-XX in FIG.

  As shown in FIGS. 19 and 20, the semiconductor light emitting device 180 includes a light emitting n-type semiconductor layer 2, an unillustrated light emitting layer (active layer), and a rectangular sapphire substrate 1 (hereinafter referred to as “substrate”). A semiconductor layer (LED structure) in which the p-type semiconductor layer 3 is stacked is formed.

  As shown in FIG. 20, a p-ohmic electrode layer 9, a p-type semiconductor layer 3, a light emitting layer (not shown), and an n-type semiconductor layer 2 are stacked in this order on a substrate 1. The p-type semiconductor layer 3 includes a p-GaP layer as a contact layer and a p-AlGaInP cladding layer having a thickness of about 0.3 μm stacked in this order. The light emitting layer is an AlGaInP layer having a thickness of about 0.5 μm. The n-type semiconductor layer 2 is an -AlGaInP cladding layer having a thickness of about 2 μm. Thus, a compound semiconductor layer is formed to form an LED structure as a semiconductor layer for a light emitting element.

  A first bonding electrode 81 is formed on the surface of the n-type semiconductor layer 2. A current diffusion layer 4 is formed on the substrate 1 so as to be separated from the p-type semiconductor layer 3. The shape of the first bonding electrode 81 is not limited to the shape illustrated in FIG. Any shape may be used as long as a current flows through the entire surface of the n-type semiconductor layer 2.

  More specifically, as shown in FIG. 19, the current diffusion layer 4 as a resistance layer has an appropriate width and is arranged along one side of the substrate 1. A second bonding electrode 82 is formed in the vicinity of one end of the current spreading layer 4. The vicinity of the other end of the current diffusion layer 4 is connected to the p-type semiconductor layer 3 of the light emitting semiconductor layer via the p ohmic electrode layer 9.

  With the above-described configuration, in the semiconductor light emitting device 180, the first bonding electrode 81 is connected to the cathode side of the LED, and one end side of the resistance element (resistance layer) is connected to the anode side of the LED via the p ohmic electrode layer 9. The second bonding electrode 82 is connected to the other end of the resistance element (resistance layer).

  The current spreading layer 4 as the resistance layer can be set to a required resistance value by a method similar to the method illustrated in FIG. That is, the n-type semiconductor layer 2 as the resistance layer in the example of FIG. As a result, the length and cross-sectional area of the current spreading layer 4 can be adjusted so that the resistance value of the resistance layer can be set in a wide range and further set while finely adjusting to a required value. The resistance value of the resistance layer can be set to a required value, and the resistance value in the semiconductor light emitting element 180 (also referred to as a chip or a light emitting element) can be adjusted in the manufacturing stage of the semiconductor light emitting element 180. The brightness of the light emitting element 180 can be controlled to a desired brightness.

  Next, a method for manufacturing the semiconductor light emitting element 180 of the fifth embodiment will be described. 21 and 22 are explanatory views showing the manufacturing steps of the semiconductor light emitting device 180 of the fifth embodiment. As shown in FIG. 21A, an AlGaInP buffer layer as an etching stop layer and an about 2 μm n− layer as an n-type semiconductor layer 2 are formed on an n-type GaAs substrate 11 by metal organic chemical vapor deposition (MO-CVD). An LED structure in which an AlGaInP layer, an approximately 0.5 μm AlGaInP light emitting layer (not shown), an approximately 0.3 μm p-AlGaInP cladding layer as a p-type semiconductor layer 3 and a p-GaP layer as a contact layer are formed in this order. Generate.

  As shown in FIG. 21B, AuZn is deposited as a p-ohmic electrode layer by vacuum deposition, and patterned by a lift-off method. Next, Al is deposited as a reflective film, Ti as a reaction preventing film, AuSn is deposited as an adhesive layer, and patterning is performed by a lift-off method.

  As shown in FIG. 21C, Ti and Au patterned in advance are vapor-deposited, and the sapphire substrate 1 and the AlGaInP epiwafer on which the p ohmic electrode layer 9 is formed are bonded at about 300 ° C. while being pressurized in a vacuum.

  As shown in FIG. 21D, the GaAs substrate 11 is peeled off by etching GaAs using an etching solution (for example, ammonia / hydrogen peroxide mixed solution). Thereafter, the etching stop layer which is the AlGaInP buffer layer is peeled off using another etching solution (for example, a hydrochloric acid / hydrogen peroxide mixed solution).

  As shown in FIG. 22E, by photolithography and wet etching (for example, using a hydrochloric acid / hydrogen peroxide mixture), a region other than the region where the semiconductor layer for light emission is formed is formed on the sapphire substrate 1 using the photoresist as a mask. Etch until exposed.

  As shown in FIG. 22F, a transparent current diffusion layer 4 of an ITO film (indium tin oxide film) is formed by a film forming method such as vacuum evaporation or sputtering, and patterned by a lift-off method. As a result, an ITO film is formed in the region where the resistance layer (resistance element) is formed and the location (region) where the second bonding electrode 82 is formed.

  As shown in FIG. 22G, a first bonding electrode 81 is formed by depositing AuGe by vacuum deposition and patterning by a lift-off method. Thereafter, the first bonding electrode 81 is annealed by heating to about 450 ° C. in a tube furnace in a nitrogen atmosphere.

As shown in FIG. 22H, a SiO ₂ film (protective film) 7 is formed on the entire surface by plasma CVD, and SiO _{2 in} a portion where the first bonding electrode 81 and the second bonding electrode 82 of the light emitting element 180 are provided by diluted hydrofluoric acid. _{2 The} film 7 is removed. As a result, an LED wafer in which a circuit in which one LED structure and a resistance element are connected in series is formed in one package (LED chip) is completed.

  Thereafter, the characteristics of the semiconductor light emitting device 180 are measured by a wafer prober or the like. At the same time, for example, as illustrated in FIG. 12, the length and the cross-sectional area of the current diffusion layer 4 are adjusted by cutting a part of the current diffusion layer 4 as a resistance layer with a laser or the like. Thereby, the semiconductor light emitting device 180 having a desired resistance value can be obtained.

  Thereafter, the element (LED chip) is separated by laser scribing, and the semiconductor light emitting element 180 (LED chip) is completed and assembled into a package.

  Note that the timing at which a part of the current diffusion layer 4 is cut off by the laser is not limited to before element isolation, and can be after element isolation.

  Since the semiconductor light emitting element (LED chip) 180 according to the fifth embodiment includes a resistance element in the LED chip, it is not necessary to mount a resistor as an external circuit of the semiconductor light emitting element 180. Further, by cutting (processing) a part of the resistance layer with a laser or the like, the resistance value of the resistance element in the LED chip can be varied during the manufacturing process, so that in the LED chip at the final stage of the manufacturing process. The resistance value can be adjusted. As a result, the semiconductor light emitting element (LED chip) 180 alone can be controlled to a desired brightness. In particular, in the fifth embodiment, the length and the cross-sectional area of the resistance layer can be continuously varied, so that the resistance value can be set over a wide range and the resistance value can be finely adjusted. Accordingly, desired brightness can be obtained only by applying a predetermined voltage from the outside to the semiconductor light emitting device 180.

  FIG. 23 is a schematic diagram illustrating an example of the configuration of the light-emitting device 200 of the present embodiment. The light-emitting device 200 is a light-emitting diode and includes any one of the above-described semiconductor light-emitting elements 100, 120, 140, 160, and 180 and a housing portion that houses any one of the semiconductor light-emitting elements. Hereinafter, although the case where the semiconductor light emitting element 100 is used will be described, the same applies to other semiconductor elements.

  As shown in FIG. 23, the light emitting device (light emitting diode) 200 includes lead frames 201 and 202, and a recess 201 a serving as a housing portion is provided at one end of the lead frame 201. A semiconductor light emitting element (LED chip) 100 is bonded and fixed to the bottom of the recess 201a by die bonding.

  One bonding electrode of the LED chip 100 is wire-bonded to the lead frame 201 by a wire 204, and the other bonding electrode is wire-bonded to the lead frame 202 by a wire 204. The recess 201a is filled with a translucent resin to form a cover 203 that covers the LED chip 100. In addition, the fluorescent substance 205 according to the emission color of the LED chip 100 can also be contained in the coating | coated part 203. FIG.

  The end portions of the lead frames 201 and 202 on which the covering portion 203 is formed are housed in a lens 206 having a convex end portion. The lens 206 is formed of a translucent resin such as an epoxy resin.

  The light emitting device (light emitting diode) 200 accommodates the semiconductor light emitting element 100 described above. Accordingly, it is not necessary to provide an external circuit such as a resistor, and a light emitting device that can obtain desired brightness can be provided.

  In addition, a circuit board on which a large number of the above-described light emitting diodes 200 are mounted, and a power supply unit that drives a predetermined voltage to the light emitting diodes 200 in order to obtain a required brightness include a lighting device, a display device, a signal lamp, or a road information device. It can also be incorporated into such devices. For example, a lighting device, a display device, a signal lamp, or a road information device includes the light emitting device (light emitting diode) 200 of the present embodiment as a light source. Thus, there is no need to provide an external circuit such as a resistor, and an illumination device, a display device, a signal lamp, or a road information device that can reduce the number of components, save space, reduce size, or reduce costs can be provided. Can do. In addition, it is possible to provide a lighting device, a display device, a signal lamp, or a road information device that can obtain a desired brightness only by applying a predetermined voltage.

1 Sapphire substrate (substrate)
2 n-type semiconductor layer 3 p-type semiconductor layer 4 current diffusion layer 41, 42, 43 current diffusion layer (connection portion)
5 n ohmic electrode 61, 81 1st bonding electrode 62, 82 2nd bonding electrode 63 wiring layer 631, 632, 633 wiring layer 9 p ohmic electrode layer

Claims (11)

In a semiconductor light emitting device in which a semiconductor layer in which an n-type semiconductor layer, an active layer, and a p-type semiconductor layer are stacked on a substrate is formed.
A first bonding electrode connected to the p-type semiconductor layer (or n-type semiconductor layer) of the semiconductor layer;
A resistance layer connected to the n-type semiconductor layer (or p-type semiconductor layer);
A second bonding electrode connected to the resistance layer;
A semiconductor light emitting element comprising: an adjustment mark after adjusting a resistance value of the resistance layer. A plurality of wiring layers that connect the n-type semiconductor layer (or the p-type semiconductor layer) with a plurality of locations where the separation distance of the resistance layer from the second bonding electrode is different;
The adjustment mark is
The semiconductor light emitting element according to claim 1, wherein the semiconductor light emitting element is a cut portion obtained by cutting any one of the wiring layers. The resistance layer is
A plurality of connecting portions connected to the n-type semiconductor layer (or p-type semiconductor layer) at a plurality of locations having different separation dimensions from the second bonding electrode;
The adjustment mark is
The semiconductor light emitting element according to claim 1, wherein the semiconductor light emitting element is a cut portion obtained by cutting any one of the connection portions. A wiring layer connecting the resistance layer and the n-type semiconductor layer (or p-type semiconductor layer);
The adjustment mark is
2. The semiconductor light emitting element according to claim 1, wherein the semiconductor light emitting element is an excision portion obtained by excising a part of the resistance layer between the second bonding electrode and the portion where the wiring layer is connected. The resistance layer is
The semiconductor light-emitting element according to claim 1, wherein the semiconductor light-emitting element is an n-type semiconductor layer or a conductive layer.   A light-emitting device comprising: the semiconductor light-emitting element according to claim 1; and a housing portion that houses the semiconductor light-emitting element.   An illumination device comprising the light-emitting device according to claim 6.   A display device comprising the light emitting device according to claim 6. In a method for manufacturing a semiconductor light emitting device, wherein a semiconductor layer in which an n-type semiconductor layer, an active layer, and a p-type semiconductor layer are stacked on a substrate is formed.
Forming a first bonding electrode connected to the p-type semiconductor layer (or n-type semiconductor layer) of the semiconductor layer;
Forming a resistance layer connected to the n-type semiconductor layer (or p-type semiconductor layer);
Forming a second bonding electrode connected to the resistive layer;
Forming a plurality of wiring layers that connect the n-type semiconductor layer (or the p-type semiconductor layer) with each of a plurality of locations having different separation dimensions of the resistance layer from the second bonding electrode;
Cutting any one of the wiring layers. A method for manufacturing a semiconductor light emitting device. In a method for manufacturing a semiconductor light emitting device, wherein a semiconductor layer in which an n-type semiconductor layer, an active layer, and a p-type semiconductor layer are stacked on a substrate is formed.
Forming a first bonding electrode connected to the p-type semiconductor layer (or n-type semiconductor layer) of the semiconductor layer;
Forming a resistance layer having a plurality of connection portions connected to the n-type semiconductor layer (or p-type semiconductor layer) at a plurality of locations;
Forming a second bonding electrode separated from the plurality of locations and connected to the resistance layer;
Cutting any one of the connecting portions. A method for manufacturing a semiconductor light emitting element. In a method for manufacturing a semiconductor light emitting device, wherein a semiconductor layer in which an n-type semiconductor layer, an active layer, and a p-type semiconductor layer are stacked on a substrate is formed.
Forming a first bonding electrode connected to the p-type semiconductor layer (or n-type semiconductor layer) of the semiconductor layer;
Forming a resistance layer connected to the n-type semiconductor layer (or p-type semiconductor layer);
Forming a second bonding electrode connected to the resistive layer;
Forming a wiring layer connecting the resistance layer and the n-type semiconductor layer (or p-type semiconductor layer);
Cutting a part of the resistance layer between the second bonding electrode and a portion where the wiring layer is connected. A method for manufacturing a semiconductor light emitting device, comprising:

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