JP2012023654A - Time synchronization device via network - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a time synchronization device via a network, capable of suppressing deteriorated synchronization accuracy produced in the event of a trouble in a main device or a line and by line congestion.SOLUTION: In the time synchronization device for synchronizing the time of a subordinate device with the time of a main device by exchanging packets for synchronization via a packed-based network, the subordinate device exchanges the packets for synchronization between with a plurality of main devices, and calculates each priority order of the plurality of main devices, and based on the priority order of the main devices and the packets for synchronization, synchronizes the time of the subordinate device with the time of the main device.

Description

  The present invention relates to a time synchronization device that synchronizes the time of a plurality of devices with high accuracy and high reliability via a packet-based network.

  As a time synchronization protocol via a packet-based network, for example, IEEE 1588 Precision Time Protocol (PTP) of Non-Patent Document 1 is available. In this protocol, a master device (master) having a time reference and a slave device (slave) subordinate thereto are defined, and the time of the slave is corrected by periodically exchanging time synchronization packets between them. Specifically, the master transmission time and slave reception time of the packet (Sync message) transmitted from the master to the slave, and the slave transmission time and master reception time of the packet (Delay_Req message) transmitted from the slave to the master are used. The frequency drift and time offset of the slave clock with respect to the master clock are estimated and corrected.

  The following two factors can be cited as causes of deterioration of synchronization accuracy in time synchronization via a network.

  The first factor is the interruption of synchronization packet exchange due to a failure occurring in the master device or the line. On the other hand, by preparing a plurality of masters as shown in FIG. 1, when a failure occurs in the master device that exchanges the synchronization packet or in the line, the slave device synchronizes with another master device. By exchanging packets for use, it is possible to suppress degradation of synchronization accuracy.

  The time synchronization protocol defined by IEEE 1588 defines a Best Master Clock (BMC) algorithm for automatically determining the operation state of each device when multiple time synchronization devices exist on the network. . In this algorithm, a domain for time synchronization management (PTP domain) is defined, and only one device that operates as a master is defined in one PTP domain. When there are a plurality of master candidate devices, a packet (Announce message) including information such as clock performance of each device and intentionally set priority is periodically exchanged, and a determination condition defined by the BMC algorithm Based on the above, a master device is determined. Although the BMC algorithm is executed by each device, since the device information used for the determination is exchanged by the Announce message, the determination result of the best master is the same in any device in the PTP domain.

  The BMC algorithm is composed of a state decision algorithm and a data set comparison algorithm. A data set is a collection of device information (clock accuracy, priority, etc.), and is periodically transmitted by the master device using an Announce message. The device that has received the Announce message compares the data set of the received message with the data set of its own device using the Data Set Comparison algorithm, and determines which of the two devices to be compared is superior. From the determination result, the best device and the recommended operation state of the device itself are determined by the State Decision algorithm.

  A device whose recommended operation state is the master starts exchanging synchronization packets with the slave. In a device whose recommended operation state is a slave, a master device (best master) to be synchronized is determined, and synchronization with the master is started. On the other hand, the other master candidate devices that do not operate as the master shift to the passive mode, and do not transmit / receive the synchronization message, and continue to receive the Announce message periodically transmitted from the current master device.

  If a failure occurs in the current master or a failure occurs in the network path, the Announce message does not arrive from the master. Thereby, the remaining master candidate devices detect the occurrence of a failure, and a new master is determined from the master candidate devices. The slave device exchanges synchronization packets with the new master device and continues time synchronization.

  A second factor that degrades the synchronization accuracy is a fluctuation in the transmission delay time of the synchronization packet due to network congestion. As described in Non-Patent Document 1, in IEEE 1588, the offset between the time of the slave device and the time of the master device is obtained by calculating the time difference between the slave reception time of the Sync packet and the master transmission time of the packet. This is obtained by reducing the transmission delay time between the master device and the slave device of the synchronization packet. This transmission delay time needs to be obtained in advance, specifically, from the master transmission time and slave reception time of the Sync packet and the slave transmission time and master reception time of the Delay_Req packet.

  At this time, if the transmission delay time of the synchronization packet is constant, the slave can correct the time accurately. However, in a general network, the transmission delay time fluctuates, and the slave time correction value includes an error.

  One of the causes of fluctuations in the packet transmission delay time is a queuing delay of packets generated at a switch in the middle of the transmission path. When the time synchronization packet and other packets arrive at the switch at the same time, when the transfer destination ports of these packets are the same, a transfer waiting time, that is, a queuing delay occurs at the transmission destination port. The occurrence of queuing and the queuing delay time are random.

  On the other hand, Non-Patent Document 2 estimates whether or not a queuing delay has occurred in a time synchronization packet that has arrived at a slave by a method based on Patent Document 1, and determines only packets that have no queuing delay By extracting and using it for time synchronization processing, deterioration of time synchronization accuracy is suppressed.

JP 2010-74600 A

“IEEE Standard for a Precision Clock Synchronization Protocol for Networked Measurement and Control Systems,” IEEE Standard 1588-2008. “Improvement of synchronization accuracy in IEEE 1588 using a queuing estimation method,” Proceedings of 2009 IEEE International Symposium on Precision Clock Synchronization for Measurement, Control, and Communications, pp. 12-16.

  As described above, in order to suppress deterioration of time synchronization accuracy, it is effective to install a plurality of master devices and continue synchronization with the standby master device when a failure occurs in the master device or the line. . Furthermore, if communication between each master and slave is performed through different paths, the slaves can preferentially synchronize with the master device that communicates using a non-congested path, thereby suppressing deterioration in time synchronization accuracy. . However, the conventional method has the following two problems.

  The first problem is that in the conventional method, only one master device can exist on the network, and when the master device or the transmission path fails, the synchronization accuracy of the slave device deteriorates.

  As described above, in IEEE 1588, only one master can exist in one time synchronization management domain (PTP domain). If the Announce message is not received from the current master due to a failure in the current master or a failure in the network path, the remaining master candidate devices detect the failure and A new master is determined. At this time, the slave does not transmit / receive the synchronization packet with any device, that is, it does not synchronize with any device for a certain period of time, and it is necessary to reestablish synchronization with the new master every time the master is switched. In the meantime, the slave clock itself operates at the performance, and the synchronization accuracy may deteriorate.

  The second problem is that, in the BMC algorithm for determining the operation state of each device, only the performance of the master candidate device is used as the determination condition, and the congestion level of the line is not considered. Even if the performance of the master device is the best among the candidate devices in the PTP domain, the synchronization accuracy deteriorates if the route between the master and the slave is congested. Although the synchronization accuracy can be improved by using the method as described in Non-Patent Document 2, there is a limit in the case where the route is extremely congested or the congestion continues for a long time. In addition, when a plurality of master candidate devices are installed, the devices do not necessarily have a difference in performance, and devices having equivalent performance are often used. In such a case, the accuracy and stability of the clock of the slave device can be expected to be improved by detecting the congestion of the route and establishing synchronization with the master that can communicate via another available route.

  Therefore, in order to solve the two problems described above, the present invention improves the redundancy function and operates a plurality of master devices at the same time, and suppresses the deterioration of synchronization accuracy even when a failure occurs in the master device or the line. In addition, an object of the present invention is to provide a time synchronization device via a network that can detect congestion of a route, select a master via a route with less congestion, and suppress deterioration in synchronization accuracy due to line congestion.

  To achieve the above object, a time synchronizer according to the present invention comprises a plurality of master devices having time references and slave devices synchronized with the clocks of the master devices, and exchanges synchronization packets via a packet-based network. In the time synchronization device for synchronizing the time of the slave device with the time of the master device, the slave device exchanges the synchronization packets with the plurality of master devices, and the priority order of the master devices. And calculating means for calculating, and synchronizing means for synchronizing the time of the slave device with the time of the master device based on the priority order of the plurality of master devices and the synchronization packet.

  In addition, the information processing apparatus further includes an estimation unit that estimates a route congestion degree of a route between the plurality of master devices and the slave device, and the calculation unit calculates a priority order of the plurality of master devices based on the route congestion degree. Is also preferable.

  Further, the synchronization means corrects the time of the slave device using the clock error obtained from the synchronization packet of the master device having the highest priority, or the clock error obtained from the synchronization packets of the plurality of master devices. It is also preferable to correct the time of the slave device using a value obtained by weighted average of the priority values of the plurality of master devices.

  Further, it is preferable that the apparatus further includes means for estimating occurrence of transmission delay fluctuation in the synchronization packet, and the clock error is obtained from the synchronization packet estimated that transmission delay fluctuation has not occurred.

  In addition, it is preferable that the estimation unit estimates a route congestion degree based on the number of synchronization packets estimated that transmission delay fluctuation does not occur.

  Further, the calculation means has an algorithm for selecting the main device to be determined as the best based on the degree of congestion of the route and the performance of the main device, and the highest priority is determined by the algorithm from the plurality of main devices. A main device is selected, a main device of the next priority is selected from the plurality of main devices excluding the main device of the highest priority by the algorithm, and the main device of the highest and the next priority is selected. It is also preferable to calculate the priority order of the plurality of main devices by repeatedly selecting the main device having the third priority order from the plurality of main devices excluding the main device.

  Further, it is also preferable that the algorithm is a data set comparison algorithm in which a comparison for determining that the main device with a low degree of route congestion is the best is inserted.

  In the present invention, when a plurality of master devices are simultaneously operated in the same network (or in the same PTP domain), a failure occurs in one master device, or a failure occurs in a path between the master and the slave. Alternatively, even when the route is congested, the slave device can continue to synchronize with another master device and suppress degradation in accuracy of the own clock. It is possible to select the best master device for the slave device by providing route congestion degree estimation means and adopting the route congestion degree as a determination condition when determining the master priority using the BMC algorithm. It becomes. As a result, the clock synchronization accuracy of the slave device can be improved, and the reliability of the slave device can be improved by suppressing the deterioration of the synchronization accuracy due to a failure occurring in the device or path or congestion of the line.

The installation form of a time synchronizer is shown. The function structure of the time synchronizer of this embodiment is shown. The transmission / reception sequence of the synchronization message is shown. Indicates the transmission interval and reception interval of synchronization messages. An example of packet queuing delay estimation is shown. The flowchart of the Data Set Comparison algorithm changed in consideration of the route congestion degree is shown. The structural example of a clock control part is shown. The structural example of a drift offset estimation part is shown. The network configuration assumed in computer simulation is shown. The cross traffic load fluctuation (1) assumed in the simulation is shown. An example of simulating time synchronization accuracy when the cross traffic of FIG. 10 exists is shown. An example of estimating the degree of route congestion when the cross traffic in FIG. 10 exists is shown. The cross traffic load fluctuation (2) assumed in the simulation is shown. An example of time synchronization accuracy simulation when the cross traffic of FIG. 13 exists is shown. FIG. 14 shows an example of estimating the route congestion level when there is cross traffic in FIG.

  The best mode for carrying out the present invention will be described in detail below with reference to the drawings. In the present invention, as shown in FIG. 1, it is composed of a plurality of master devices and one or more slave devices. As shown in FIG. 2, a typical configuration of each device includes a network interface unit 1, a time stamp processing unit 2, a protocol stack processing unit 3, a time synchronization control unit 4, a clock control unit 5, a local clock unit 6, and a clock. The interface unit 7 is configured. The network interface unit 1, the time stamp processing unit 2, and the protocol stack processing unit 3 have the same functions as described in Non-Patent Document 1.

  The time synchronization control unit 4 is configured to enable a plurality of master candidate devices to simultaneously operate as a master, a slave device to determine a priority of a plurality of masters, and a slave device to determine a master priority. The clock control unit 5 estimates the clock frequency deviation and the offset with each master for clock correction by the slave controller exchanging synchronization packets in parallel with a plurality of masters. Having the means to use solves the above two problems. In the following, an embodiment will be described by taking a time synchronization apparatus using IEEE 1588 as a time synchronization protocol as an example.

  The local clock unit 6 includes a rubidium oscillator, an oscillator with a temperature compensation function (TCXO), an oscillator with a temperature control function (OCXO), and the like depending on the required clock accuracy. In the master device, a reference time such as GPS is acquired via the clock interface unit 7 as necessary, and the clock control unit 5 corrects the drift and offset of the local clock unit 6 to synchronize with the external reference time. In the slave device, the drift and offset of the local clock estimated by the time synchronization control unit 4 and the clock control unit 5 with respect to the clock of the master device are corrected, and a clock signal such as a PPS (pulse per second) signal, A 10 MHz clock signal, ToD (time of day), etc. are generated and output to an external device.

  The time synchronization control unit 4 controls transmission / reception of the time synchronization packet, collects the transmission / reception time of the packet and PTP data transmitted in the same packet, and performs processing related to time synchronization. Non-Patent Document 1 describes data included in the time synchronization packet. The time synchronization processing is processing as described in Non-Patent Document 1, that is, execution of the BMC algorithm, control of drift / offset estimation processing in the clock control unit 5, and the like. Hereinafter, processing in the time synchronization control unit 4, the clock control unit 5, and the local clock unit 6 will be described.

  In the apparatus used in the present invention, first, the BMC algorithm is improved so that a plurality of apparatuses can simultaneously operate as a master. This device is realized by forcibly shifting the operation state of the node whose recommended operation state of the node becomes passive as a result of executing the algorithm to the master.

  Next, when determining the priority of the master, it becomes possible to consider the degree of path congestion between each master and the slave. The time synchronization control unit 4 estimates the degree of route congestion using a technique such as that disclosed in Patent Document 1. In the present apparatus, the message sequence shown in FIG. 3 is used to realize the route congestion degree estimation. This is a sequence based on the Delay-request response mechanism defined in IEEE 1588, and transmits a probe packet (probing packet) before and after the Sync message and Delay_Req message. When queuing occurs in the switch in the middle of the transmission path, the packet interval varies as shown in FIG.

FIG. 5 shows an example of packet queuing delay estimation. The device that received the synchronization packet first calculates the transmission interval τ _{dep (j)} of the j-th packet and the subsequent (j + 1) -th packet from the transmission time included in those packets, and further measures by the own device The packet arrival interval τ _{arr (j)} is calculated from the received time. Next, for this j-th packet (where 1 <j <N _p +1), the transmission interval and the reception interval of the packet before and after the packet are compared, and the occurrence of queuing delay occurs based on the following conditions: Presence or absence is estimated.
a−i) If (τ _{arr (j−1)} −τ _{dep (j−1)} )> Δτ or (τ _{arr (j)} −τ _{dep (j)} ) <− Δτ, the queue for the jth packet Ing delay occurred.
a-ii) In cases other than the above, no queuing delay occurs in the j-th packet.

  Δτ is a determination threshold, and is 200 nanoseconds in the subsequent verification. This determination threshold is determined in consideration of a change in packet interval caused by a cause other than packet queuing. For example, it is necessary to consider transfer processing jitter of a switch that passes during transmission and time stamp processing accuracy of a slave device.

In order to improve the estimation accuracy, this device discards the packet estimated as “occurrence of queuing delay” in the first estimation, and performs the estimation process again only with the packet estimated as “no queuing delay occurred”. Do. Among the packets estimated not to cause a queuing delay, the transmission interval and reception interval of the kth packet and the subsequent (k + 1) th packet are τ _{org (k)} and τ _{srv (k)} , respectively, and Presence of occurrence of queuing delay is estimated based on the condition.
b−i) If (τ _{srv (k−1)} −τ _{org (k−1)} )> Δτ or (τ _{srv (k)} −τ _{org (k)} ) <− Δτ, the queue is queued for the kth packet. Ing delay occurred.
b-ii) In cases other than the above, no queuing delay occurs in the kth packet.

  In the example of FIG. 5, it is estimated that the queuing delay does not occur in the 5th packet in the first estimation. However, in the second estimation, it is estimated that the queuing delay occurs and is discarded. For the time synchronization process, one of the packets estimated not to cause a queuing delay in the second estimation is selected and used.

上式のｎ_ｓｒｖはキューイング遅延推定において「キューイング遅延発生せず」と判定されたパケットの個数である。またＮ_ｐはSyncパケットあるいはDelay_Reqパケットと一緒に送信されるプローブパケットの個数である。 Subsequently, an index u indicating the degree of route congestion is calculated from the packet queuing estimation result using the following equation.

In the above equation, n _srv is the number of packets determined as “no queuing delay occurs” in the queuing delay estimation. The N _p is the number of probe packets sent with Sync packet or Delay_Req packet.

  These estimations are performed every time a Sync message and a probe packet transmitted accompanying it arrive at the slave device. On the other hand, in the master device, it is executed each time a Delay_Req message and a probe packet transmitted accompanying it arrive from the slave, and the estimation result is transmitted to the slave by a Delay_Resp message. Note that the time synchronization processing of this apparatus, that is, the correction processing of the clock frequency deviation and time offset using the transmission / reception time stamps of the Sync message and Delay_Req message, uses the same method as in Non-Patent Document 1 and Non-Patent Document 2. .

ｗ_ｍ、ｗ_ｓは重み付け係数であり、同期メッセージの送信間隔などにより決定する。以降の検証では簡単のためにｗ_ｍ＝ｗ_ｓとしている。この係数を以降ではestimatedPathCongestionと呼ぶ。マスタ優先度の決定では、この値をさらに過去何回かの計算値を平均して用いる。平均値を数式中ではａｖｇ［ρ］と表記し、以降の検証では過去５回の計算値を平均して用いる。データセットＡおよびデータセットＢに含まれる経路混雑度は、次の条件で比較する。
ｃ−ｉ） ａｖｇ［ρ_Ａ］−ａｖｇ［ρ_Ｂ］＞Δρならば、データセットＢは同Ａより良い
ｃ−ｉｉ） ａｖｇ［ρ_Ｂ］−ａｖｇ［ρ_Ａ］＞Δρならば、データセットＡは同Ｂより良い
ｃ−ｉｉｉ） 上記以外の場合は、データセットＡと同Ｂは同等である
Δρは判定スレッショルドであり、ａｖｇ［ρ］の推定確度、時間変動などを考慮して決定する。この比較は、従来のData Set Comparisonアルゴリズムの任意の箇所に挿入する（以下、修正ＢＭＣアルゴリズムと言う）。以降の検証では、図６に示すようにGM priority1値の比較処理の前に挿入する。 The route congestion degree obtained as described above is applied to the Data Set Comparison algorithm so that it can be considered in determining the master priority. Route congestion degree is two is a master-slave direction u _m and its opposite direction u _s, in this apparatus for determining the average value weighted by the following equation.

w _m and w _s are weighting factors, and are determined by the transmission interval of the synchronization message. In the subsequent verification, w _m = w _s is set for simplicity. This coefficient is hereinafter referred to as estimatedPathCongestion. In determining the master priority, this value is further used by averaging the calculated values in the past several times. The average value is expressed as avg [ρ] in the formula, and the calculation values of the past five times are averaged and used in the subsequent verification. The route congestion levels included in data set A and data set B are compared under the following conditions.
c-i) If avg [ρ _A ] -avg [ρ _B ]> Δρ, then data set B is better than A. c-ii) If avg [ρ _B ] -avg [ρ _A ]> Δρ, the data set A is better than B. c-iii) In all other cases, Δρ, which is equivalent to data sets A and B, is a determination threshold, and is determined in consideration of the estimation accuracy of avg [ρ], time variation, and the like. . This comparison is inserted at an arbitrary location in the conventional Data Set Comparison algorithm (hereinafter referred to as a modified BMC algorithm). In the subsequent verification, as shown in FIG. 6, it is inserted before the comparison processing of the GM priority1 value.

When operating a plurality of devices simultaneously as a master, it is convenient in slave redundancy processing to determine priorities after this in addition to the conventional best master. In this device, master devices below best master are defined as second best master, third best master... And determined by the following procedure.
Execute the modified BMC algorithm to determine the node that will be the best master.
If the recommended operation state of the device is not the master and is not passive, the data set of the best master node is discarded, and the modified BMC algorithm is executed using the remaining data set.
The node determined as the best by the modified BMC algorithm executed the second time is set as the second best master.
If the second best master data set is discarded and a data set other than its own node remains, the modified BMC algorithm is further executed to determine the third best master. Thereafter, the same is repeated.

  The priority order of the master device obtained in the above procedure is used in the redundancy control process described below.

  FIG. 7 shows the configuration of the clock control unit 5 of the slave device. In this apparatus, a plurality of drift / offset estimation units 51 are provided, and the clock frequency drift and the time offset of the slave apparatus are estimated in parallel for each master apparatus. The drift / offset estimation unit 51 is configured as shown in FIG. 8, for example. The estimation result is input to the redundancy control unit 52, and an input value to the PI (proportional-integral) control unit 53 is calculated. PI control is a control method generally used in automatic control. The control unit includes two PI controllers for drift correction and offset correction, or any one PI controller, and a drift correction value and an offset correction value input from the redundancy control unit 52 are used as PI. A function for calculating a value to be input to the controller is provided. Further, the priority order of the master device is input from the time synchronization control unit 4 to the redundancy control unit 52.

  The redundancy control unit 52 actually determines the drift correction amount and the offset correction amount of the own clock from the estimation result with each master. In this apparatus, one of the following two methods is used.

  The first method uses only the frequency drift and time offset estimated from the best master for correcting the own clock. When the best master is updated, the value input to the PI control unit 53 is switched to the new best master by the redundancy control unit. At this time, the PI control unit 53 is not initialized, and the previous state is maintained. Hereinafter, this method is referred to as a “switching control method”.

ここで、ｗは重み付係数である。Best masterが更新された場合も、ＰＩ制御部５３は初期化されずそれまでの状態が保持される。以降ではこの方法を「加重平均法」と呼ぶ。 The second method is a weighted average of the estimation results with each master in consideration of the master priority. Priority n-th respectively O _n offset estimate and drift estimate value with the _master, when the D _n, drift correction value is input to the PI control unit 53 D _w and the offset correction value O _w are expressed respectively as: The

Here, w is a weighting coefficient. Even when the Best master is updated, the PI control unit 53 is not initialized and the previous state is maintained. Hereinafter, this method is referred to as “weighted average method”.

Then, the example which verified operation | movement of the said apparatus by computer simulation is shown. The network is assumed to have the configuration shown in FIG. 9, and the line speed is 100 Mbps. We assumed that Master # 1 and Master # 2 time exactly coincide. The synchronization packet transmission interval was 0.5 seconds for Sync and Delay_Req messages, and 1 second for Announce messages. The number of probe packets to be transmitted together with the Sync and Delay_Req messages is 20, and the transmission interval between the packets ₍ interval corresponding to τ _{dep (1)} ,..., Τ _{dep (np)} in FIG. 4) is 139.04 microseconds. It was. A line load (cross traffic) was generated by the traffic generators 1 to 4. As shown in FIG. 9, the cross traffic was generated between the traffic generator 1 and 2 and between 3 and 4. The cross traffic frame size was 1518 bytes. The line occupancy rate was fixed at 40% between the traffic generator 1 and the same 2 as in the traffic generator 1, and the time between 3 and 4 was set so as to change with time as described later.

  FIG. 11 shows the time error of the slave device when the simulation is performed so that the cross traffic has the time fluctuation of the line occupation rate as shown in FIG. The figure also shows the best master node at each time. FIG. 12 shows estimated route congestion values from the master to the slave. It can be seen that the estimated value of the route congestion changes according to the time fluctuation of the cross traffic, and as a result, the master device that communicates via the route with the low route congestion is the best master. It can be seen that the fluctuation amount of the time error of the apparatus using the redundancy method is smaller than that of the apparatus not using the redundancy control.

  As another simulation result, FIG. 14 and FIG. 15 show the results when the cross traffic has the time fluctuation of the line occupation rate as shown in FIG. It can be seen that the best master is updated according to the cross traffic time fluctuation, and the time error fluctuation is suppressed as compared with the apparatus not using the redundancy method. In this example, the route congestion degree fluctuates abruptly, and therefore error fluctuation occurs when updating the best master. When such a rapid change in the degree of congestion of the route is noticed, the time error fluctuation can be suppressed by performing a process such as stopping input to the PI control unit 53 for a certain period of time.

  The time synchronization apparatus of the present invention has been described using IEEE 1588 as an example of the time synchronization protocol. However, the present invention can also be applied to a protocol having a similar mechanism.

  Moreover, all the embodiments described above are illustrative of the present invention and are not intended to limit the present invention, and the present invention can be implemented in other various modifications and changes. Therefore, the scope of the present invention is defined only by the claims and their equivalents.

DESCRIPTION OF SYMBOLS 1 Network interface part 2 Time stamp process part 3 Protocol stack process part 4 Time synchronization control part 5 Clock control part 6 Local clock part 7 Clock interface part 51 Drift offset estimation part 52 Redundancy control part 53 PI control part

Claims (7)

A plurality of master devices having a time reference and a slave device that synchronizes with the clocks of the master devices, and exchanging synchronization packets via a packet-based network to change the slave device time to the master device time In the time synchronization device to synchronize,
Means for the slave device to exchange the synchronization packet with the plurality of master devices;
Calculating means for calculating priorities of the plurality of main devices;
A time synchronization device comprising: synchronization means for synchronizing the time of the slave device with the time of the master device based on the priority order of the plurality of master devices and the synchronization packet. An estimation means for estimating a route congestion degree of a route between the plurality of master devices and slave devices;
The time synchronization apparatus according to claim 1, wherein the calculation unit calculates a priority order of the plurality of main apparatuses based on the route congestion degree.   The synchronization means corrects the time of the slave device using the clock error obtained from the synchronization packet of the master device having the highest priority, or the clock error obtained from the synchronization packets of the plurality of master devices. The time synchronization apparatus according to claim 1 or 2, wherein the time of the slave apparatus is corrected using a value obtained by weighted averaging with priority orders of a plurality of master apparatuses. Means for estimating occurrence of transmission delay fluctuations in the synchronization packet;
4. The time synchronization apparatus according to claim 3, wherein the clock error is obtained from a synchronization packet estimated that transmission delay fluctuation does not occur.   The time synchronization apparatus according to claim 4, wherein the estimation unit estimates a path congestion degree based on the number of synchronization packets estimated that transmission delay fluctuation does not occur. The calculation means has an algorithm for selecting a main device that is determined to be the best based on the degree of congestion of the route and the performance of the main device,
From among the plurality of master units, the master unit with the highest priority is selected by the algorithm,
From the plurality of master devices excluding the master device with the highest priority, the master device with the next priority is selected by the algorithm,
The priority order of the plurality of main units is repeated by repeatedly selecting a main unit having the third priority order from the plurality of main units excluding the main unit having the highest priority and the next priority order. The time synchronizer according to claim 1, wherein the time synchronizer is calculated.   The time synchronization apparatus according to claim 6, wherein the algorithm is a data set comparison algorithm in which a comparison for determining that the main apparatus having a low degree of route congestion is the best is inserted.

Images