JP2012013741A - Display device and display driving method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent a light emitting luminance from changing before and after a temporary extinction operation during a light emitting period in a pixel circuit operation.SOLUTION: For a light emission operation during a light emitting period of a pixel circuit, a driving voltage of a predetermined voltage value is applied to a pixel circuit to allow a light emitting element to emit a light of luminance in accordance with a video signal voltage. Upon this, a temporary extinction is carried out to reduce a flicker by applying a light emission dormant voltage Vm at a voltage value where a both end voltage (a voltage between an anode and a cathode) of the light emitting element is a threshold voltage of the light emitting element during the light emitting period.

Description

  The present invention relates to a display device having a pixel array in which pixel circuits are arranged in a matrix, and a display driving method thereof, for example, a display device using an organic electroluminescence element (organic EL element) as a light emitting element.

JP 2003-255856 A JP 2003-271095 A JP 2008-304491 A

For example, as seen in Patent Documents 1 and 2, image display devices using organic EL elements as pixels have been developed. Since the organic EL element is a self-luminous element, it has advantages such as higher image visibility than a liquid crystal display, no need for a backlight, and high response speed. Further, the luminance level (gradation) of each light emitting element can be controlled by the value of the current flowing therethrough (so-called current control type).
In the organic EL display, similarly to the liquid crystal display, there are a simple matrix method and an active matrix method as driving methods. Although the former has a simple structure, there is a problem that it is difficult to realize a large-sized and high-definition display. Therefore, the active matrix method is actively developed at present. In this method, a current flowing through a light emitting element in each pixel circuit is controlled by an active element (generally a thin film transistor: TFT) provided in the pixel circuit.

By the way, as a countermeasure against flickering of the display panel, for example, as disclosed in Patent Document 3, temporary extinction is performed within a light emission period within one frame, and as a result, light emission is performed twice or more with an appropriate period length. It has been proposed to let
An object of the present invention is to perform an appropriate light emission operation in the driving method in which the extinction period is provided during the light emission period.

  The display device of the present invention is a pixel circuit that performs a non-light emission period operation for inputting a video signal voltage and a light emission period operation for light emission of a light emitting element as light emission operations of one cycle (for example, one frame). In the light emission period, pixel circuits that emit light of gradation based on the video signal voltage by causing a current corresponding to the video signal voltage to flow through the light emitting element in a state where a driving voltage is applied are arranged in a matrix. A pixel array. Further, the light emitting element is configured to apply the driving voltage having a predetermined voltage value to the pixel circuit for the light emitting operation of the pixel circuit, and to temporarily stop light emission of the light emitting element during the light emitting period. And a drive control scanner for applying a light emission pause voltage having a voltage value at which the voltage between both ends of the light emitting element becomes a threshold voltage of the light emitting element.

For example, the picture circuit includes a driving transistor that applies a current corresponding to a gate-source voltage to the light emitting element connected to the source side by applying a driving voltage between the light emitting element and the drain-source. And connected between the sampling transistor for inputting the video signal voltage applied to the signal line to the gate of the driving transistor and the gate and the source of the driving transistor to hold the input video signal voltage. Holding capacity. The display device further includes a signal selector for supplying the video signal voltage to each signal line arranged in a column on the pixel array, and each writing control arranged in a row on the pixel array. A writing scanner that applies a scanning pulse to the line to control the sampling transistor of the pixel circuit and to input the video signal voltage from the signal line to each pixel circuit. In this configuration, the drive control scanner applies a power pulse to each power control line arranged in a row on the pixel array, so that the drive voltage to the drive transistor of the pixel circuit and the light emission pause voltage can be reduced. Apply.
For example, the drive control scanner applies an initial voltage applied to the drive transistor during the non-light emission period of the pixel circuit, the drive voltage, and a ternary pulse voltage of the light emission pause voltage to each power supply control line.
The source node of the drive transistor in the light emission period is an anode node of the light emitting element having an anode and a cathode, and the drive control scanner is connected to the drain node of the drive transistor in the light emission period. A voltage at which the anode-cathode voltage of the light emitting element becomes the threshold voltage of the light emitting element is applied as the light emission pause voltage to be applied to each power control line.

  The display driving method of the present invention applies the drive voltage having a predetermined voltage value to the pixel circuit for the light emission operation of the pixel circuit in the light emission period, and temporarily emits the light emission during the light emission period. This is a display driving method in which a light emission pause voltage having a voltage value at which the voltage across the light emitting element becomes the threshold voltage of the light emitting element is applied in order to pause the light emission of the element.

In the present invention, in the pixel circuit, one cycle of light emission operation is performed during the non-light emission period and the light emission period. In the non-light emission period, the video signal voltage is written to at least the pixel circuit, and in the light emission period, a light emission operation with luminance based on the video signal voltage is performed.
Here, as a countermeasure against flicker, temporary extinction is performed during the light emission period. That is, continuous light emission is performed twice or more during the light emission period.
Thus, in order to provide a temporary extinction period during the light emission period, the drive voltage application is temporarily stopped. In the present invention, the voltage value at which the voltage across the light emitting element becomes the threshold voltage of the light emitting element at that time It is assumed that a light emission pause voltage is applied. This prevents the current flowing through the light emitting element from fluctuating before and after temporary extinction.

  According to the present invention, in the display driving method in which the extinction period is temporarily provided during the light emission period, it is possible to prevent the amount of current flowing through the light emitting element from fluctuating before and after the extinction, thereby realizing an appropriate light emission operation.

It is explanatory drawing of a structure of the display apparatus of embodiment of this invention. It is a circuit diagram of a pixel circuit of an embodiment. 11 is an explanatory diagram of a pixel circuit operation of Comparative Example I. FIG. It is explanatory drawing of the pixel circuit operation | movement of the comparative example II which performs division | segmentation light emission. FIG. 10 is an explanatory diagram of an operation during temporary extinction in Comparative Example II. FIG. 10 is an explanatory diagram of an operation during temporary extinction in Comparative Example II. FIG. 11 is an explanatory diagram of the operation of the pixel circuit of the embodiment. It is an enlarged view of the DS pulse of the pixel circuit of the embodiment.

Hereinafter, embodiments of the present invention will be described in the following order.
[1. Configuration of Display Device and Pixel Circuit of Embodiment]
[2. Pixel circuit operation considered in the process leading to the present invention (Comparative Examples I and II)]
[3. Pixel Circuit Operation of Embodiment]

[1. Configuration of Display Device and Pixel Circuit]

FIG. 1 shows a configuration of an organic EL display device according to an embodiment.
This organic EL display device includes a pixel circuit 10 that uses an organic EL element as a light emitting element and performs light emission driving by an active matrix method.
As illustrated, the organic EL display device includes a pixel array 20 in which a large number of pixel circuits 10 are arranged in a matrix in the column direction and the row direction (m rows × n columns). Each of the pixel circuits 10 is a light emitting pixel of any one of R (red), G (green), and B (blue), and a color display device is configured by arranging the pixel circuits 10 of each color according to a predetermined rule. .

As a configuration for driving each pixel circuit 10 to emit light, a horizontal selector 11, a drive scanner 12, and a write scanner 13 are provided.
Also, signal lines DTL1, DTL2,... DTL (n), which are selected by the horizontal selector 11 and supply a voltage corresponding to the signal value (gradation value) of the luminance signal as display data to the pixel circuit 10, are on the pixel array. It is arranged in the column direction. The signal lines DTL1, DTL2,... DTL (n) are arranged by the number of columns (n columns) of the pixel circuits 10 arranged in a matrix in the pixel array 20.

  On the pixel array 20, write control lines WSL1, WSL2,... WSL (m) and power supply control lines DSL1, DSL2,. These write control lines WSL and power supply control lines DSL are arranged by the number of rows (m rows) of the pixel circuits 10 arranged in a matrix in the pixel array 20, respectively.

Write control lines WSL (WSL1 to WSL (m)) are driven by the write scanner 13.
The write scanner 13 sequentially supplies scanning pulses WS (WS1, WS2,... WS (m)) to each of the write control lines WSL1 to WSL (m) arranged in rows at a predetermined timing set. Then, the pixel circuit 10 is line-sequentially scanned in units of rows.

The power supply control lines DSL (DSL1 to DSL (m)) are driven by the drive scanner 12. The drive scanner 12 supplies power pulses DS (DS1, DS2,... DS (m)) to the power supply control lines DSL1 to DSL (m) arranged in a row in accordance with the line sequential scanning by the write scanner 13. To do. The power supply pulse DS (DS1, DS2... DS (m)) is a pulse voltage that switches to three values of the drive voltage Vcc, the initial voltage Vini, and the light emission pause voltage Vm.
The drive scanner 12 and the write scanner 13 set the timing of the power supply pulse DS and the scanning pulse WS based on the clock ck and the start pulse sp.

  The horizontal selector 11 supplies a signal line voltage as an input signal to the pixel circuit 10 to the signal lines DTL1, DTL2,... Arranged in the column direction in accordance with the line sequential scanning by the write scanner 13. In the present embodiment, the horizontal selector 11 time-divides a reference voltage Vofs used for threshold correction and a video signal voltage Vsig, which is a voltage corresponding to a gradation based on video data, as a signal line voltage for each signal line. Supply.

  In the display device of this embodiment, an example of the drive control scanner referred to in the claims of the present invention is the drive scanner 12, an example of the signal selector is the horizontal selector 11, and an example of the writing scanner is the write scanner 13. It is.

FIG. 2 shows a configuration example of the pixel circuit 10 of the embodiment. The pixel circuits 10 are arranged in a matrix like the pixel circuits 10 in the configuration of FIG.
In FIG. 2, only one pixel circuit 10 arranged at a portion where the signal line DTL intersects with the write control line WSL and the power supply control line DSL is shown for simplification.

The pixel circuit 10 includes an organic EL element 1 that is a light emitting element, a storage capacitor Cs, a sampling transistor Ts, and a drive transistor Td. Note that the capacitance Coled is a parasitic capacitance of the organic EL element 1.
The sampling transistor Ts and the drive transistor Td are composed of n-channel thin film transistors (TFTs).

The storage capacitor Cs has one terminal connected to the source (node ND2) of the drive transistor Td and the other terminal connected to the gate (node ND1) of the drive transistor Td.
The drain of the drive transistor Td is connected to the power control line DSL corresponding to the row of the pixel circuit 10. A connection point between the power supply control line DSL and the drive transistor Td is a node ND3.
The light emitting element of the pixel circuit 10 is, for example, the organic EL element 1 having a diode structure, and includes an anode and a cathode. The anode of the organic EL element 1 is connected to the source of the drive transistor Td, and the cathode is connected to a predetermined wiring (cathode voltage Vcat).

The source / drain of the sampling transistor Ts is connected in series between the signal line DTL and the gate (node ND1) of the drive transistor Td.
Therefore, when the sampling transistor Ts is turned on, the signal line voltage (video signal voltage Vsig / reference voltage Vofs) of the signal line DTL is input to the gate of the drive transistor Td.
The gate of the sampling transistor Ts is connected to the write control line WSL corresponding to the row of the pixel circuit 10.

The light emission driving of the organic EL element 1 is basically as follows.
At the timing when the video signal voltage Vsig is applied to the signal line DTL, the sampling transistor Ts is turned on by the scanning pulse WS supplied from the write scanner 13 via the write control line WSL. As a result, the video signal voltage Vsig from the signal line DTL is written to the storage capacitor Cs.

The drive transistor Td causes the current Ids to flow through the organic EL element 1 by supplying current from the power supply control line DSL to which the drive voltage Vcc is applied by the drive scanner 12, and causes the organic EL element 1 to emit light.
At this time, the current Ids becomes a value corresponding to the gate-source voltage Vgs of the driving transistor Td (a value corresponding to the voltage held in the holding capacitor Cs), and the organic EL element 1 emits light with luminance corresponding to the current value. To do.
That is, in the case of this pixel circuit 10, by writing the video signal voltage Vsig from the signal line DTL to the storage capacitor Cs, the gate applied voltage of the drive transistor Td is changed, thereby controlling the value of the current flowing through the organic EL element 1. To obtain the gradation of light emission.

Since the drive transistor Td is designed to always operate in the saturation region, the drive transistor Td becomes a constant current source having a value represented by the following expression 1.
Ids = (1/2) · μ · (W / L) · Cox · (Vgs−Vth) ² (Equation 1)
Where Ids is the current flowing between the drain and source of a transistor operating in the saturation region, μ is the mobility, W is the channel width, L is the channel length, Cox is the gate capacitance, and Vth is the threshold voltage of the driving transistor Td. Yes.
As apparent from Equation 1, the drain current Ids is controlled by the gate-source voltage Vgs in the saturation region. Since the gate-source voltage Vgs is kept constant, the drive transistor Td operates as a constant current source, and can emit the organic EL element 1 with constant luminance.

In this way, basically, in each frame period, an operation is performed in which the video signal voltage (gradation value) Vsig is written in the storage capacitor Cs in the pixel circuit 10, and thereby, the driving transistor according to the gradation to be displayed. The gate-source voltage Vgs of Td is determined.
The drive transistor Td functions as a constant current source for the organic EL element 1 by operating in the saturation region, and a current corresponding to the gate-source voltage Vgs is supplied to the organic EL element 1 so that each frame period is The organic EL element 1 emits light with a luminance corresponding to the gradation value of the video signal.

[2. Pixel circuit operation considered in the process leading to the present invention (Comparative Examples I and II)]

Here, in order to understand the present invention, the basic operation of the pixel circuit 10 will be described as Comparative Example I. This is a circuit operation including a threshold correction operation and a mobility correction operation for compensating for uniformity deterioration due to variations in the threshold and mobility of the driving transistor Td of each pixel circuit 10.

In the pixel circuit operation, the threshold value correction operation and the mobility correction operation itself have been performed conventionally. This necessity will be briefly described.
For example, in a pixel circuit using a polysilicon TFT or the like, the threshold voltage Vth of the drive transistor Td and the mobility μ of the semiconductor thin film constituting the channel of the drive transistor Td may change over time. Further, the transistor characteristics of the threshold voltage Vth and the mobility μ are different for each pixel due to variations in the manufacturing process.
If the threshold voltage and mobility of the drive transistor Td differ from pixel to pixel, the current value flowing through the drive transistor Td varies from pixel to pixel. For this reason, even if the same video signal value (video signal voltage Vsig) is given to all the pixel circuits 10, the light emission luminance of the organic EL element 1 varies from pixel to pixel. As a result, the screen uniformity (uniformity) ) Is damaged.
For this reason, the pixel circuit operation is provided with a correction function for fluctuations in the threshold voltage Vth and the mobility μ.

FIG. 3 shows a timing chart of the operation of the light emission cycle (each frame period) of the pixel circuit 10.
FIG. 3 shows the signal line voltage that the horizontal selector 11 applies to the signal line DTL. In the case of this operation example, the horizontal selector 11 uses the threshold correction reference voltage Vofs as a single predetermined voltage value and the pulse voltage as the video signal voltage Vsig as a signal line voltage in one horizontal period (1H) as a signal line. Give to DTL.
FIG. 3 shows a scan pulse WS applied to the gate of the sampling transistor Ts by the write scanner 13 via the write control line WSL. The n-channel sampling transistor Ts is turned on when the scanning pulse WS is set to the H level, and is turned off when the scanning pulse WS is set to the L level.
FIG. 3 shows a power pulse DS supplied from the drive scanner 12 via the power control line DSL. The drive voltage Vcc or the initial voltage Vini is given as the power supply pulse DS.
FIG. 3 shows changes in the gate voltage Vg and the source voltage Vs of the drive transistor Td as the voltages of the nodes ND1 and ND2 shown in FIG.

A time point ts in the timing chart of FIG. 3 is a start timing of one cycle in which the organic EL element 1 as a light emitting element is driven to emit light, for example, one frame period of image display.
Before reaching this time point ts, light emission of the previous frame is performed.
That is, the light emission state of the organic EL element 1 is a state where the power supply pulse DS is the drive voltage Vcc and the sampling transistor Ts is turned off. At this time, since the drive transistor Td is set to operate in the saturation region, the current Ids flowing through the organic EL element 1 is expressed by the above-described equation 1 according to the gate-source voltage Vgs of the drive transistor Td. Value.

The operation for light emission of the current frame is started at time ts.
The period from time ts to the next time ts is a period in which one cycle of light emission operation is performed in the pixel circuit 10, for example, as one frame period.
This one-cycle period is roughly divided into a non-light emitting period and a light emitting period. In FIG. 3, the periods LT1, LT2, and LT3 are non-light emitting periods, and the period LT4 is a light emitting period.

In the period LT1, preparation for extinction and threshold correction is performed.
First, power supply pulse DS = initial voltage Vini.
At this time, when the initial voltage Vini is smaller than the sum of the threshold voltage Vthel and the cathode voltage Vcat of the organic EL element 1, that is, Vini ≦ Vthel + Vcat, the organic EL element 1 is extinguished and a non-light emitting period is started. At this time, the power supply control line DSL becomes the source of the drive transistor Td. The anode (node ND2) of the organic EL element 1 is charged to the initial voltage Vini.
Further, the gate voltage (node ND1) of the drive transistor Td decreases as the source voltage decreases.

After a certain period, preparation for threshold correction is performed. That is, when the voltage of the signal line DTL is the threshold correction reference voltage Vofs, the scanning pulse WS is set to H level, and the sampling transistor Ts is turned on. Therefore, the gate (node ND1) of the drive transistor Td becomes the threshold correction reference voltage Vofs.
The gate-source voltage Vgs of the drive transistor Td is Vgs = Vofs−Vini.
Since the threshold value correction operation cannot be performed unless this Vofs−Vini is larger than the threshold voltage Vth of the drive transistor Td, the initial voltage Vini and the reference voltage Vofs are set so that Vofs−Vini> Vth. .
That is, as a preparation for threshold correction, the gate-source voltage of the drive transistor is sufficiently widened than the threshold voltage Vth.

Subsequently, threshold correction (Vth correction) is performed in the period LT2.
That is, while the signal line voltage is the threshold correction reference voltage Vofs, the write scanner 13 maintains the H level of the scanning pulse WS. The drive scanner 12 sets the power supply pulse DS to the drive voltage Vcc.
In this case, the anode (node ND2) of the organic EL element 1 serves as the source of the drive transistor Td, and a current flows. Therefore, the source node (node ND2) rises while the gate (node ND1) of the drive transistor Td is fixed to the threshold correction reference voltage Vofs.
As long as the anode voltage of the organic EL element 1 (the voltage at the node ND2) is equal to or lower than Vcat + Vthel (threshold voltage of the organic EL element 1), the current of the drive transistor Td charges the holding capacitor Cs, the parasitic capacitor Coled, and the auxiliary capacitor Csub. Used for. “As long as the anode voltage of the organic EL element 1 is equal to or lower than Vcat + Vthel” means that the leakage current of the organic EL element 1 is considerably smaller than the current flowing through the drive transistor Td.
For this reason, the voltage of the node ND2 (source voltage of the drive transistor Td) increases with time.

This threshold correction is an operation in which the gate-source voltage of the drive transistor Td is set to the threshold voltage Vth. Accordingly, the source voltage of the drive transistor Td is increased until the gate-source voltage of the drive transistor Td reaches the threshold voltage Vth.
After a certain period of time, the gate-source voltage of the drive transistor Td becomes the threshold voltage Vth.
In this example, the threshold correction operation is performed once. However, the threshold correction operation is divided and performed a plurality of times in order to secure time for the gate-source voltage of the drive transistor Td to be the threshold voltage Vth. There is also.

When the gate-source voltage of the drive transistor Td reaches the threshold voltage Vth at the end of the period LT2, the source voltage (node ND2: anode voltage of the organic EL element 1) = Vofs−Vth ≦ Vcat + Vthel. (Vcat is the cathode voltage, Vthel is the threshold voltage of the organic EL element 1)
At this time, the write scanner 13 sets the scanning pulse WS to L level, the sampling transistor Ts is turned off, and the threshold correction operation is completed.

  Thereafter, during a period LT3 in which the signal line voltage is the video signal voltage Vsig, the write scanner 13 sets the scanning pulse WS to the H level, and writing of the video signal voltage Vsig and mobility correction are performed. That is, the video signal voltage Vsig is input to the gate of the drive transistor Td.

The gate voltage of the drive transistor Td becomes the voltage of the video signal voltage Vsig. However, since the power supply control line DSL is at the drive voltage Vcc, a current flows and the source voltage increases with time.
At this time, if the source voltage of the drive transistor Td does not exceed the sum of the threshold voltage Vthel and the cathode voltage Vcat of the organic EL element 1, the current of the drive transistor Td charges the holding capacitor Cs, the parasitic capacitor Coled, and the auxiliary capacitor Csub. Used for. That is, the condition is that the leakage current of the organic EL element 1 should be much smaller than the current flowing through the drive transistor Td.
At this time, since the threshold value correcting operation of the drive transistor Td is completed, the current flowing through the drive transistor Td reflects the mobility μ.
Specifically, those with high mobility have a large current amount at this time, and the source rises quickly. On the other hand, when the mobility is low, the amount of current is small and the source rises slowly.
As a result, during the period LT4 when the scanning pulse WS is at the H level, the source voltage Vs of the drive transistor Td rises after the sampling transistor Ts is turned on, and when the sampling transistor Ts is turned off, the source voltage Vs becomes the mobility μ The voltage reflects. The gate-source voltage Vgs of the driving transistor Td is reduced to reflect the mobility, and becomes a voltage that completely corrects the mobility after a predetermined time has elapsed.

After writing the video signal voltage Vsig and correcting the mobility in this way, the gate-source voltage Vgs is determined, and the bootstrap and light emission states are entered.
That is, the scanning pulse WS is set to L level, the sampling transistor Ts is turned off, writing is completed, and the organic EL element 1 is caused to emit light.
In this case, a current Ids corresponding to the gate-source voltage Vgs of the drive transistor Td flows, the voltage of the node ND2 rises to a voltage at which the current flows in the organic EL element 1, and the organic EL element 1 emits light. At this time, the sampling transistor Ts is off, and the gate of the drive transistor Td (node ND1) rises at the same time as the voltage of the node ND2 rises. Therefore, the gate-source voltage Vgs remains constant. (Bootstrap operation)
Thus, the light emission period as the period LT4 is started. The light emission of the organic EL element 1 is continued until the start time ts of the next frame.

As described above, the pixel circuit 10 performs the operation for light emission of the organic EL element 1 including the threshold value correction operation and the mobility correction operation as the light emission drive operation of one cycle in one frame period.
A current corresponding to the signal voltage Vsig can be applied to the organic EL element 1 regardless of variations in the threshold voltage Vth of the drive transistor Td in each pixel circuit 10 and fluctuations in the threshold voltage Vth due to temporal fluctuations. . That is, variations in the threshold voltage Vth due to manufacturing or changes over time can be canceled, and high image quality can be maintained without causing uneven brightness on the screen.
In addition, since the drain current varies depending on the mobility of the driving transistor Td, the image quality deteriorates due to variations in the mobility of the driving transistor Td for each pixel circuit 10, but the mobility correction increases or decreases the mobility of the driving transistor Td. In response to this, the source voltage Vs is obtained. As a result, the gate-source voltage Vgs is adjusted so as to absorb the variation in mobility of the drive transistor Td of each pixel circuit 10, so that the deterioration in image quality due to the variation in mobility is also eliminated.

In FIG. 3, for the sake of simplicity of illustration and description, an example in which threshold correction is performed once has been described. However, threshold correction may be performed by dividing a plurality of times as described above. In that case, before the video signal voltage Vsig shown as the period LT3 in FIG. 3 is written, the operation of turning on the scanning pulse WS is performed a plurality of times when the voltage of the signal line DTL is the reference voltage Vofs. .
The reason why the threshold correction operation is divided and performed a plurality of times within one cycle of the pixel circuit operation is due to the demand for higher speed (higher frequency) of the display device.
As the frame rate is increased, the operation time of the pixel circuit is relatively shortened, so that it is difficult to secure a continuous threshold value correction period (signal line voltage = reference voltage Vofs period). In that case, a threshold correction operation is performed in a time-sharing manner to secure a necessary period as a threshold correction period, and the gate-source voltage of the drive transistor Td is converged to the threshold voltage Vth.
Note that the threshold correction operation may be performed a plurality of times as in the operation examples of FIGS. 4 and 7 described later.

By the way, in the comparative example I of FIG. 3, the organic EL element 1 is made to emit light continuously in the light emission period. When providing a non-light emitting period and a light emitting period within one frame period, it is desirable to set the light emitting period length appropriately in order to improve flicker.
Therefore, as shown as Comparative Example II in FIG. 4, it has been proposed to provide a light emission suspension period in which light emission is temporarily suspended within the light emission period.
In FIG. 4, the operations in the periods LT1, LT2, and LT3 are the same as those in FIG. In FIG. 4, the light emission period is divided into periods LT4a, LT5, and LT4b. The periods LT4a and LT4b are periods during which the organic EL element 1 actually emits light, and the period LT5 is a period during which light emission is suspended. In addition, the drive method in which the light emission operation is divided and executed within one cycle in this way is referred to as “divided light emission drive” for explanation.

In order to temporarily stop the light emission within the light emission period, the drive scanner 12 temporarily drops the power supply pulse DS to the initial voltage Vini in the period LT5.
As a result, the voltages at the nodes ND1 and ND2 are lowered, and the light emission is stopped when no current flows through the organic EL element 1. After a certain time, the drive scanner 12 sets the power supply pulse DS again to the drive voltage Vcc and resumes light emission.

  For example, flicker countermeasures can be achieved by performing the divided light emission operation in this way. However, in such a divided light emitting operation, it should be pointed out that the light emission luminance in the period LT4b is naturally lowered, and the light emission luminance in the period LT4b is lowered as described below. It became.

  The transition of the gate-source voltage Vgs of the drive transistor Td before and after the light emission stop in the period LT5 will be considered with reference to FIGS. For the sake of explanation, the gate-source voltage before the start of the period LT5 is expressed as “Vgs”, and the gate-source voltage after the period LT5 is expressed as “Vgs ′”.

FIG. 5A shows an enlarged waveform of the power supply pulse DS before and after the period LT5 during which light emission is suspended.
In this example, the drive voltage Vcc = 20V and the initial voltage Vini = −10V.
5B, 5C, and 6A, 6B, and 6C show a part of the pixel circuit 10. FIG.
It is assumed that the gate voltage Vg = 10 V and source voltage Vs = 5 V of the driving transistor Td when light is emitted before the period LT5, that is, during the period LT4a, and the gate-source voltage Vgs = 5 V.

Here, as a premise, a parasitic capacitance between the nodes ND1 to ND3 for each operating point of the driving transistor Td is considered.
When the node ND3 is the drain of the driving transistor Td and the node ND2 is the source as shown in FIG. 5B, the parasitic capacitance is Cgd and only the metal overlap capacitance can be seen, so the capacitance value is small (small capacitance). .
On the other hand, when the node ND2 is the drain of the driving transistor Td and the node ND3 is the source as shown in FIG. 5C, the parasitic capacitance is Cgs. At this time, the value of the parasitic capacitance increases (large capacitance).

As shown in FIG. 5A, the drive scanner 12 sets the power supply pulse DS to the initial voltage Vini in the period LT5. For example, the power supply pulse DS is lowered from the drive voltage Vcc = 20V to the initial voltage Vini = −10.
Here, as a process of decreasing from 20V to −10V, a period SP1 in FIG. 5A is a period until the node ND3 drops from 20V to 5V.
The period SP2 is a period during which the node ND3 falls from 5V to −10V.
The period SP3 is a period in which the node ND3 is −10V.
The period SP4 is a period during which the node ND3 rises from −10V to −8.65V.
The period SP5 is a period during which the node ND3 rises from −8.65V to 20V.

First, consider the operating point of the drive transistor Td when the node ND3 falls from 20V to 5V in the period SP1.
In this case, as shown in FIG. 5B, the operating point of the drive transistor Td is ND3: drain and ND2: source from the voltage relationship, and the capacitance is small as described above. The voltage between the nodes ND1 and ND2 is 5V.

  Next, when the node PND3 becomes 5 V or less in the period SP2, the drain and the source are reversed. That is, as shown in FIG. 5C, ND3: source, ND2: drain, and the parasitic capacitance contributing to coupling is the gate-source voltage Vgs of the drive transistor Td for saturation drive. The parasitic capacitance between ND3 and ND2 at the time of channel formation becomes “capacity large”, and a coupling voltage is larger in the period SP2 in which the power supply pulse DS changes from 5V to −10V than in the period SP1. It is assumed that node ND1 = 8.5V and node ND2 = 4.85V due to this coupling. The voltage between the nodes ND1 and ND2 is 3.65V.

Next, as the period SP3, when the power supply pulse DS drops to −10V, the node ND1 becomes a voltage satisfying ND1−ND3 = Vth (threshold voltage). When Vth = 5V, as shown in FIG. 6A, the node ND1 is changed from 8.5V to −5V.
At this time, the node ND2 is changed from 4.85V to −8.65V due to the fluctuation of the node ND1 through the storage capacitor Cs. At this time, the voltage between the nodes ND1 and ND2 is 3.65V.

  In the period SP4, when the power supply pulse DS rises, first, until the node ND3 reaches from −10V to −8.65V, the parasitic capacitance becomes Cgs, that is, “capacity is large” as shown in FIG. The node ND1 is changed from −5V to −4.87V.

As the period SP5, during the period when the node ND3 exceeds −8.65V and reaches 20V, the P source and drain of the driving transistor Td are inverted and the parasitic capacitance is Cgd, that is, “capacitance” as shown in FIG. "Small". At this time, the node ND1 is changed from −4.87V to 8.28V, and the node ND2 is changed from −8.65V to 4.5V. That is, the gate-source voltage Vgs ′ (voltage between the nodes ND1 and ND2) after the light emission is stopped = 3.78V.
That is, the gate-source voltage Vgs = 5 V at the time of light emission in the period LT4a, whereas when the light emission is resumed in the period LT4b, the gate-source voltage Vgs ′ = 3.78 V.

Thus, the appearance of the parasitic capacitance differs depending on the falling / rising of the power pulse DS. That is, the falling coupling appears to be larger than the rising coupling, and thus the gate-source voltage Vgs ′ after the light emission is stopped becomes smaller than the gate-source voltage Vgs before the light emission. Due to such a phenomenon, the current that flows through the organic EL element 1 after light emission is stopped in the divided light emission driving, and the light emission luminance is lowered.
FIG. 4 shows that the voltage at the node ND1 in the period LT4b is originally lower than the period LT4a as shown by a solid line, at a level indicated by a broken line.

[3. Pixel Circuit Operation of Embodiment]

Therefore, in the present embodiment, when the divided light emission driving is performed, the above-described fluctuation of the gate-source voltage Vgs due to the appearance of the coupling is avoided, and the same luminance is obtained during each light emission in the periods LT4a and LT4b. So that the light emission is maintained.

FIG. 7 shows drive waveforms of the present embodiment.
In FIG. 7, the basic operation is the same as in FIGS.
That is, a non-light emitting period and a light emitting period are provided as an operation of one cycle of one frame period from the time point ts to the next time point ts. The periods LT1, LT2, and LT3 are non-light emitting periods, and the period LT4a and later are light emitting periods.
Although avoiding redundant explanation, preparation for extinction and threshold correction is performed in the period LT1, threshold correction operation is performed in the period LT2, writing and mobility correction of the video signal voltage Vsig are performed in the period LT3, and then light emission in the period LT4a is performed. Is called.
In this example, the divided light emission driving is performed as in FIG. 4, and after the period LT4a, the light emission is temporarily stopped in the period LT5, and the light emission is resumed in the period LT4b. That is, to prevent flicker, the light emission is temporarily stopped during the light emission period.

  In the case of FIG. 4, the drive scanner 12 drops the power pulse DS to the initial voltage Vini in the period LT5. However, in the present embodiment, the drive scanner 12 stops emitting the power pulse DS in the period LT5. The voltage is Vm.

FIG. 8 shows an enlarged view of the power supply pulse DS before and after the period LT5. In FIG. 8, the case of Comparative Example II is indicated by a broken line for reference.
For example, based on the premise described in FIG. 5 above, the light emission pause voltage Vm = 5V.
Then, in the period LT5, when the power supply pulse DS decreases from 20V to 5V, when the light emission pause voltage Vm = 5V continues, and when the power supply pulse DS increases to 20V again, the pixel circuit 10 in FIG. ) State.
In other words, by reducing the power pulse DS to the appropriate light emission suspend voltage Vm without lowering to the initial voltage Vini, both the parasitic capacitances that appear to be the falling / rising of the power pulse DS are unified as “small capacity”. Coupling amount becomes equal. As a result, the nodes ND1 and ND2 do not fluctuate before and after the light emission is stopped, and in the period LT4b, the gate-source voltage Vgs is the same as that in the period LT4a. That is, the same current can be passed through the organic EL element 1 so that the emission luminance is not lowered.

The light emission resting voltage Vm may be around the driving voltage of the organic EL element 1. More specifically, in the case of the pixel circuit configuration of this example, a voltage value at which the voltage across the organic EL element 1 (anode-cathode voltage) becomes the threshold voltage Vthel of the organic EL element 1 may be used. In other words, the node ND2 (the anode of the organic EL element 1) only needs to be the threshold voltage Vthel + the cathode voltage Vcat. In the case of the circuit configuration of this example, the voltage of the node ND2 becomes the voltage of the power supply pulse DS. The light emission pause voltage Vm = Vthel + Vcat may be set.
That is, the voltage at the node ND2 may be a voltage that stops the light emission because no current flows through the organic EL element 1, and does not cause the node ND2 to become the drain of the driving transistor Td within the period LT5. That's what it means.

As described above, in the present embodiment, the drive scanner 12 uses the ternary pulse voltage of the initial voltage Vini, the drive voltage Vcc, and the light emission pause voltage Vm for the drive transistor Td in one cycle of light emission operation. Each power supply control line DSL is given. In particular, when light emission is suspended as the divided light emission drive, the light emission suspension voltage Vm is applied to the drive transistor Td.
By setting the light emission pause voltage Vm to an appropriate voltage value as described above, the gate-source voltage Vgs of the drive transistor Td is not changed before and after the light emission pause, and the organic EL element 1 emits light at each divided light emission. The brightness can be prevented from fluctuating.
That is, an appropriate light emission operation can be realized in the divided light emission drive as a countermeasure against flicker.

Although the embodiment has been described above, the present invention is not limited to the above example.
The configuration of the pixel circuit 10 is not limited to FIG. Further, depending on the circuit configuration, the voltage of the power supply pulse DS is not necessarily applied directly to the anode of the organic EL element 1, but in any case, the emission pause voltage Vm is the anode node of the organic EL element 1. May be set to a certain predetermined potential so that the anode-cathode voltage of the organic EL element 1 becomes the threshold voltage.
FIG. 7 shows an example in which the light emission is performed twice with one light emission pause during the light emission period as the divided light emission drive. However, the light emission pause may be performed twice or more during the light emission period. In this case, the drive scanner 12 may set the power supply pulse DS to the light emission pause voltage Vm at each light emission pause.

  DESCRIPTION OF SYMBOLS 1 Organic EL element, 10 pixel circuit, 11 horizontal selector, 12 drive scanner, 13 write scanner, 20 pixel array part, Cs holding capacity, Ts sampling transistor, Td drive transistor

Claims (5)

A pixel circuit that performs an operation in a non-light emitting period in which a video signal voltage is input and an operation in a light emitting period in which a light emitting element emits light as a one-cycle light emitting operation, and a driving voltage is applied in the light emitting period. A pixel array in which pixel circuits are arranged in a matrix to emit light of gradation based on the video signal voltage by passing a current corresponding to the video signal voltage to the light emitting element in a state;
The driving voltage of a predetermined voltage value is applied to the pixel circuit for the light emission operation of the pixel circuit, and the light emission of the light emitting element is temporarily stopped during the light emission period. A drive control scanner that applies a light emission pause voltage having a voltage value at which both-end voltage is a threshold voltage of the light emitting element;
A display device comprising: The pixel circuit is
The light emitting element;
A driving transistor that applies a current according to a gate-source voltage to the light-emitting element connected to the source side by applying a driving voltage between the drain and the source;
A sampling transistor that inputs the video signal voltage applied to the signal line to the gate of the drive transistor by being conducted; and
A holding capacitor connected between the gate and source of the driving transistor and holding the input video signal voltage;
Have
further,
A signal selector for supplying the video signal voltage to each signal line arranged in a row on the pixel array;
A scanning pulse is applied to each write control line arranged in a row on the pixel array to control the sampling transistor of the pixel circuit, and the video signal voltage from the signal line is input to each pixel circuit. A writing scanner to be executed,
With
The drive control scanner applies the drive voltage and the light emission pause voltage to the drive transistor of the pixel circuit by applying a power pulse to each power control line arranged in a row on the pixel array. The display device according to claim 1.   The drive control scanner applies an initial voltage applied to the drive transistor during a non-light-emission period of the pixel circuit, the drive voltage, and a ternary pulse voltage of the light emission pause voltage to each power supply control line. 2. The display device according to 2. The source node of the driving transistor in the light emission period is an anode node of the light emitting element having an anode and a cathode,
The drive control scanner is configured such that the anode-cathode voltage of the light-emitting element is a threshold voltage of the light-emitting element as the light-emission suspend voltage applied to each power supply control line connected to the drain node of the drive transistor during the light-emission period. The display device according to claim 3, wherein a voltage is applied. A pixel circuit that performs an operation in a non-light emitting period in which a video signal voltage is input and an operation in a light emitting period in which a light emitting element emits light as a one-cycle light emitting operation, and a driving voltage is applied in the light emitting period. A display driving method for a display device having a pixel array in which a pixel circuit that emits gradation light based on the video signal voltage by passing a current corresponding to the video signal voltage to the light emitting element in a state is arranged in a matrix As
For the light emission operation of the pixel circuit during the light emission period, the drive voltage having a predetermined voltage value is applied to the pixel circuit, and the light emission of the light emitting element is temporarily suspended during the light emission period. A display driving method of applying a light emission resting voltage having a voltage value at which a voltage across the light emitting element becomes a threshold voltage of the light emitting element.

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