JP2012009787A - Substrate for power module and method of manufacturing the same - Google Patents

Substrate for power module and method of manufacturing the same Download PDF

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JP2012009787A
JP2012009787A JP2010146877A JP2010146877A JP2012009787A JP 2012009787 A JP2012009787 A JP 2012009787A JP 2010146877 A JP2010146877 A JP 2010146877A JP 2010146877 A JP2010146877 A JP 2010146877A JP 2012009787 A JP2012009787 A JP 2012009787A
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metal layer
power module
layer
thickness
substrate
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JP5614127B2 (en
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Shinsuke Aoki
慎介 青木
Toshiyuki Nagase
敏之 長瀬
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Mitsubishi Materials Corp
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation

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Abstract

PROBLEM TO BE SOLVED: To provide a substrate for a power module that can prevent warpage caused by temperature variation under heating or cooling and enhance reliability to joint and a method of manufacturing thereof .SOLUTION: In a substrate for a power module in which metal layers 6, 7 having different thicknesses are laminated on both surfaces of a ceramic substrate 2, the average grain size of crystal particles is smaller in the thinner metal layer 6 than that in the thicker metal layer 7, whereby occurrence of warpage caused by a heating treatment such as brazing or the like or a subsequent temperature environment can be prevented and thus the reliability to joint can be enhanced.

Description

本発明は、大電流、高電圧を制御する半導体装置に用いられるパワーモジュール用基板及びその製造方法に関する。   The present invention relates to a power module substrate used in a semiconductor device that controls a large current and a high voltage, and a method for manufacturing the same.

従来のパワーモジュールとして、セラミックス基板の一方の面に、回路層となるアルミニウム金属層が積層され、この回路層の上に半導体チップなどの電子部品がはんだ付けされ、一方、セラミックス基板の他方の面に放熱層となるアルミニウムの金属層が形成され、この金属層にヒートシンクが接合された構成のものが知られている。   As a conventional power module, an aluminum metal layer as a circuit layer is laminated on one surface of a ceramic substrate, and an electronic component such as a semiconductor chip is soldered on the circuit layer, while the other surface of the ceramic substrate is There is known a structure in which a metal layer of aluminum serving as a heat dissipation layer is formed and a heat sink is joined to the metal layer.

このようなセラミックス基板に回路層又は放熱層となるアルミニウム金属層を積層状態に形成する方法として、例えば特許文献1では、セラミックス基板に、Al−Si系又はAl−Ge系のろう材を介在させてアルミニウム金属層を重ね合わせ、その積層体を加圧、加熱することにより、ろう材を溶融させて、セラミックス基板とアルミニウム金属層とを接合するようにしている。   As a method for forming an aluminum metal layer serving as a circuit layer or a heat dissipation layer on such a ceramic substrate, for example, in Patent Document 1, an Al—Si based or Al—Ge based brazing material is interposed in a ceramic substrate. Then, the aluminum metal layer is overlaid, and the laminated body is pressurized and heated to melt the brazing material and to join the ceramic substrate and the aluminum metal layer.

この場合、回路層及び放熱層とも同じ板材で形成されるのが一般的であったが、近年では、放熱層とヒートシンクとの間の熱伸縮を緩和するための緩衝機能を放熱層自身に持たせるために、放熱層を肉厚に形成することが検討されている。その結果、回路層と放熱層との厚さに差が生じることから、ろう付けのための加熱処理を経由すると、全体に薄肉の回路層側を凸とする反りが生じて、その後のヒートシンクへの取り付けを阻害するという問題が生じてきた。
また、ろう付け等の製造時に加わる熱だけでなく、使用環境においても、例えば50℃の比較的高温の状態で長期間使用され続けると、同様の反りが生じる。
In this case, the circuit layer and the heat dissipation layer are generally formed of the same plate material. However, in recent years, the heat dissipation layer itself has a buffer function for relaxing thermal expansion and contraction between the heat dissipation layer and the heat sink. Therefore, it has been studied to form the heat dissipation layer thick. As a result, there is a difference in the thickness between the circuit layer and the heat dissipation layer. Therefore, when the heat treatment for brazing is performed, the entire thin circuit layer side is warped, and the heat sink becomes The problem of obstructing the attachment of the device has arisen.
In addition to the heat applied during manufacturing such as brazing, the same warp occurs in the environment of use as long as it is used for a long time at a relatively high temperature of, for example, 50 ° C.

ろう付けに依存しない接合方法としては、特許文献2記載の技術がある。この接合方法では、セラミックス基板を鋳型内に設置して、その鋳型内に溶融状態のアルミニウム合金を注入することにより、セラミックス基板の両面にアルミニウム金属層を形成している。   As a joining method that does not depend on brazing, there is a technique described in Patent Document 2. In this joining method, an aluminum metal layer is formed on both surfaces of a ceramic substrate by placing the ceramic substrate in a mold and injecting a molten aluminum alloy into the mold.

特開2008−311296号公報JP 2008-311296 A 特開2007−36263号公報JP 2007-36263 A

しかしながら、このようにして形成される回路層及び放熱層においても、アルミニウムを溶融して凝固させたものであるため、結晶粒径が例えば数百μmと大きくなり、反りは発生していた。
本発明は、このような事情に鑑みてなされたものであって、加熱もしくは冷却時に発生する反りを解消し、接合の信頼性を高めることができるパワーモジュール用基板及びその製造方法を提供する。
However, even in the circuit layer and the heat dissipation layer formed in this way, since the aluminum is melted and solidified, the crystal grain size becomes as large as several hundred μm, for example, and warping has occurred.
This invention is made | formed in view of such a situation, Comprising: The curvature which generate | occur | produces at the time of a heating or cooling is eliminated, and the board | substrate for power modules which can improve the reliability of joining, and its manufacturing method are provided.

緩衝機能を放熱層自身にもたせるため、回路層より放熱層の方が厚肉に形成されるので、両金属層とも同じ組成、同じ性状であるとすると、前述したように、薄肉の回路層側を凸とする反りが生じる。ここで、本願発明者らは、回路層及び放熱層を、異なる結晶粒径の同じ厚さの金属層で形成する場合には、結晶粒径の大きい金属層側を凸とする反りが生じることを見出した。そして、セラミックス基板の両面に異なる厚さの金属層を積層する場合、厚みの厚い金属層よりも薄い金属層の方の結晶粒径を小さくすることにより、厚さの違いにより生じる反りと、結晶粒径の違いにより生じる反りとを相殺して、全体の反りを解消することができることを見出した。   Since the heat dissipation layer itself is provided with a buffer function, the heat dissipation layer is formed thicker than the circuit layer. Therefore, if both metal layers have the same composition and the same properties, as described above, the thin circuit layer side Warping occurs. Here, when the circuit layer and the heat dissipation layer are formed of metal layers having different crystal grain sizes and the same thickness, the inventors of the present application may warp the metal layer having a larger crystal grain size. I found. And when laminating metal layers with different thicknesses on both sides of the ceramic substrate, by reducing the crystal grain size of the thin metal layer than the thick metal layer, the warp caused by the difference in thickness and the crystal It has been found that the warpage caused by the difference in particle size can be offset and the overall warpage can be eliminated.

本発明のパワーモジュール用基板は、セラミックス基板の両面に異なる厚さの金属層が積層されたパワーモジュール用基板であって、両金属層を構成する結晶粒の平均粒径が、厚みの厚い金属層よりも薄い金属層の方が小さく形成されていることを特徴とする。
また、本発明のパワーモジュール用基板において、前記厚い金属層に対する前記薄い金属層の比率が0.2以上0.9以下であり、対応する結晶粒の平均粒径の比率が0.01以上1以下であるとよい。
The power module substrate of the present invention is a power module substrate in which metal layers having different thicknesses are laminated on both surfaces of a ceramic substrate, and the average grain size of the crystal grains constituting both metal layers is a thick metal. The metal layer thinner than the layer is formed smaller.
In the power module substrate of the present invention, the ratio of the thin metal layer to the thick metal layer is 0.2 or more and 0.9 or less, and the ratio of the average grain size of the corresponding crystal grains is 0.01 or more and 1 It may be the following.

本発明のパワーモジュール用基板において、さらに好ましくは、前記厚い金属層に対する前記薄い金属層の厚さの比率が0.2以上0.8以下であり、対応する結晶粒の平均粒径の比率が0.1以上0.8以下であるとよい。   In the power module substrate of the present invention, more preferably, the ratio of the thickness of the thin metal layer to the thick metal layer is 0.2 or more and 0.8 or less, and the ratio of the average grain size of the corresponding crystal grains is It is good that it is 0.1 or more and 0.8 or less.

このように、回路層及び放熱層となる金属層を、それぞれの厚さに合わせた結晶粒径で構成することにより、ろう付け等の加熱処理あるいはその後の温度環境に伴う反りの発生を防止して、パワーモジュール用基板の接合信頼性を向上させることができる。   In this way, the circuit layer and the metal layer serving as the heat dissipation layer are configured with crystal grain sizes that match the respective thicknesses, thereby preventing warping caused by heat treatment such as brazing or the subsequent temperature environment. Thus, the bonding reliability of the power module substrate can be improved.

そして、本発明のパワーモジュールは、上記のパワーモジュール用基板の前記金属層のうちの一方に電子部品がはんだ付けにより接合され、他方の金属層にヒートシンクが接合されていることを特徴とする。   The power module of the present invention is characterized in that an electronic component is joined to one of the metal layers of the power module substrate by soldering, and a heat sink is joined to the other metal layer.

また、本発明のパワーモジュール用基板の製造方法は、セラミックス基板の両面に異なる厚さの金属層が積層されたパワーモジュール用基板の製造方法であって、両金属層を構成する結晶粒の平均粒径を、厚みの厚い金属層よりも薄い金属層の方を小さく形成しておき、これら両金属層を前記セラミックス基板の両面にろう材を介して配置した状態で加熱して接合することを特徴とする。   The method for manufacturing a power module substrate of the present invention is a method for manufacturing a power module substrate in which metal layers having different thicknesses are laminated on both surfaces of a ceramic substrate, and is an average of crystal grains constituting both metal layers. The particle size is made smaller in the metal layer thinner than the thick metal layer, and both the metal layers are heated and bonded in a state where the both metal layers are disposed on both sides of the ceramic substrate via the brazing material. Features.

本発明によれば、パワーモジュール用基板の厚さの異なる金属層に、その厚みに合わせた結晶粒径の異なる金属層を用いることにより、ろう付け等の加熱処理あるいはその後の温度環境に伴う反りの発生を防止して、接合信頼性を向上させることができる。   According to the present invention, by using a metal layer having a different crystal grain size in accordance with the thickness of the metal layer having a different thickness for the power module substrate, warping due to heat treatment such as brazing or the subsequent temperature environment. It is possible to improve the bonding reliability.

本発明の実施形態のパワーモジュールの全体構成を示す縦断面図である。It is a longitudinal section showing the whole power module composition of an embodiment of the present invention. 金属層の厚み及び結晶粒径に起因する反りを説明する図である。It is a figure explaining the curvature resulting from the thickness and crystal grain diameter of a metal layer. パワーモジュール用基板の結晶粒径比と反り量との関係を示すグラフである。It is a graph which shows the relationship between the crystal grain size ratio and curvature amount of a power module substrate.

以下、本発明の一実施形態を図面を参照しながら説明する。
図1は、本発明の一実施形態のパワーモジュール用基板を用いたパワーモジュールを示している。この図1のパワーモジュール1は、セラミックス等からなるセラミックス基板2を有するパワーモジュール用基板3と、パワーモジュール用基板3の表面に搭載された半導体チップ等の電子部品4と、パワーモジュール用基板3の裏面に接合されたヒートシンク5とから構成される。
Hereinafter, an embodiment of the present invention will be described with reference to the drawings.
FIG. 1 shows a power module using a power module substrate according to an embodiment of the present invention. The power module 1 shown in FIG. 1 includes a power module substrate 3 having a ceramic substrate 2 made of ceramics, an electronic component 4 such as a semiconductor chip mounted on the surface of the power module substrate 3, and a power module substrate 3. And a heat sink 5 bonded to the back surface of the substrate.

パワーモジュール用基板3は、セラミックス基板2の両面に金属層6,7が積層されており、その一方の金属層6が回路層となり、その表面に電子部品4がはんだ付けされる。また、他方の金属層7は放熱層とされ、その表面にヒートシンク5が取り付けられる。
セラミックス基板2は、例えば、AlN(窒化アルミニウム)、Si(窒化珪素)等の窒化物系セラミックス、もしくはAl(アルミナ)等の酸化物系セラミックスにより形成され、その厚さは例えば0.635mmとされる。
金属層6,7は、いずれも純度99.9wt%以上のアルミニウムが用いられ、JIS規格では、1N90(純度99.9wt%以上:いわゆる3Nアルミニウム)又は1N99(純度99.99wt%以上:いわゆる4Nアルミニウム)を用いることができる。
このパワーモジュール用基板3は、放熱層となる金属層7に緩衝機能を持たせたるため、回路層となる金属層6よりも肉厚に形成されたものを用いている。
In the power module substrate 3, metal layers 6 and 7 are laminated on both surfaces of the ceramic substrate 2, one of the metal layers 6 becomes a circuit layer, and the electronic component 4 is soldered to the surface. The other metal layer 7 is a heat radiating layer, and the heat sink 5 is attached to the surface thereof.
The ceramic substrate 2 is made of, for example, nitride ceramics such as AlN (aluminum nitride), Si 3 N 4 (silicon nitride), or oxide ceramics such as Al 2 O 3 (alumina), and the thickness thereof is For example, it is set to 0.635 mm.
Both the metal layers 6 and 7 are made of aluminum having a purity of 99.9 wt% or higher. According to JIS standards, 1N90 (purity 99.9 wt% or higher: so-called 3N aluminum) or 1N99 (purity 99.99 wt% or higher: so-called 4N). Aluminum) can be used.
The power module substrate 3 is formed so as to be thicker than the metal layer 6 serving as a circuit layer because the metal layer 7 serving as a heat dissipation layer has a buffer function.

この場合、回路層及び放熱層となる金属層6,7の厚さは、その金属層7に対する金属層6の厚さの比率(金属層6の厚さ/金属層7の厚さ)が0.2以上0.9以下となるように形成され、これら金属層6,7を構成する結晶粒の平均粒径は、その比率(金属層6の平均粒径/金属層7の平均粒径)が0.01以上1以下とされている。より好ましくは、金属層7に対する金属層6の厚さの比率が0.2以上0.8以下であり、対応する結晶粒の平均粒径の比率が0.1以上0.8以下であるとよい。
本実施形態のパワーモジュール用基板3においては、例えば、回路層となる金属層6の厚さは0.6mmとされ、放熱層となる金属層7の厚さが1.6mmとされており、その厚さの比率は0.375となる。また、例示した厚さの場合、例えば、金属層6の平均粒径が0.5mmとされ、金属層7の平均粒径が1.0mmとされていることが好ましい。
In this case, the thickness of the metal layers 6 and 7 serving as the circuit layer and the heat dissipation layer is such that the ratio of the thickness of the metal layer 6 to the metal layer 7 (the thickness of the metal layer 6 / the thickness of the metal layer 7) is 0. The average grain size of the crystal grains forming these metal layers 6 and 7 is the ratio (average grain diameter of metal layer 6 / average grain diameter of metal layer 7). Is 0.01 or more and 1 or less. More preferably, the ratio of the thickness of the metal layer 6 to the metal layer 7 is 0.2 or more and 0.8 or less, and the ratio of the average grain size of the corresponding crystal grains is 0.1 or more and 0.8 or less. Good.
In the power module substrate 3 of the present embodiment, for example, the thickness of the metal layer 6 that is a circuit layer is 0.6 mm, and the thickness of the metal layer 7 that is a heat dissipation layer is 1.6 mm. The thickness ratio is 0.375. In the case of the exemplified thickness, for example, it is preferable that the average particle diameter of the metal layer 6 is 0.5 mm and the average particle diameter of the metal layer 7 is 1.0 mm.

これら金属層6,7は、プレス加工により所望の外形に打ち抜いたものをセラミックス基板2に接合するか、あるいは、平板状のものをセラミックス基板2に接合した後に、エッチング加工により所望の外形に形成するか、いずれの方法も採用することができる。   These metal layers 6 and 7 are formed into a desired external shape by etching after bonding a material punched into a desired external shape by pressing to the ceramic substrate 2 or joining a flat plate to the ceramic substrate 2. Either method can be employed.

なお、本実施形態のパワーモジュール用基板3は、放熱層となる金属層7の厚さの方が回路層となる金属層6の厚さよりも厚い例であるが、逆の形態として、放熱層となる金属層7の厚さの方が回路層となる金属層6の厚さよりも薄く設けられるものであってもよい。その場合、金属層6に対する金属層7の厚さの比率(金属層7の厚さ/金属層6の厚さ)が0.2以上0.9以下とされ、対応する平均粒径の比率(金属層7の平均粒径/金属層6の平均粒径)が0.01以上1以下とされ、より好ましくは、金属層6に対する金属層7の厚さの比率が0.2以上0.8以下であり、対応する結晶粒の平均粒径の比率が0.1以上0.8以下であるとよい。
以下、特に指定しない限り、金属層7の厚さの方が金属層6の厚さよりも厚いものとして説明する。
The power module substrate 3 of the present embodiment is an example in which the thickness of the metal layer 7 serving as a heat dissipation layer is thicker than the thickness of the metal layer 6 serving as a circuit layer. The thickness of the metal layer 7 to be used may be smaller than the thickness of the metal layer 6 to be the circuit layer. In that case, the ratio of the thickness of the metal layer 7 to the metal layer 6 (the thickness of the metal layer 7 / the thickness of the metal layer 6) is 0.2 or more and 0.9 or less, and the ratio of the corresponding average particle diameter ( The average particle size of the metal layer 7 / the average particle size of the metal layer 6) is 0.01 or more and 1 or less, and more preferably, the ratio of the thickness of the metal layer 7 to the metal layer 6 is 0.2 or more and 0.8. The ratio of the average grain size of the corresponding crystal grains is preferably 0.1 or more and 0.8 or less.
Hereinafter, unless otherwise specified, it is assumed that the thickness of the metal layer 7 is greater than the thickness of the metal layer 6.

セラミックス基板2と回路層及び放熱層となる金属層6,7とは、ろう付けにより積層されている。ろう材としては、Al−Si系、Al−Ge系、Al−Cu系、Al−Mg系またはAl−Mn系等が使用される。ろう材は、例えばろう材の箔により構成され、このろう材箔をセラミックス基板2と両金属層6,7との間に介在させて、これらを真空中で厚さ方向に加圧しながら、600〜650℃で約1時間加熱することにより、セラミックス基板と金属層6,7とを接合する。
なお、金属層6と電子部品4との接合には、Sn−Ag−Cu系,Zn−Al系もしくはPb−Sn系等のはんだ材が用いられる。図中符号8がそのはんだ接合層を示す。また、電子部品4と金属層6の端子部との間は、アルミニウムなどからなるボンディングワイヤ(図示略)により接続される。
一方、放熱層となる金属層7とヒートシンク5との間の接合法としては、ノコロックろう付け法、Sn−Ag−Cu系、Zn−AlもしくはPb−Sn系等のはんだ材によるはんだ付け法が用いられ、あるいは、シリコングリースによって密着させた状態でねじによって機械的に固定される。図1では、ろう付けした例を示している。
The ceramic substrate 2 and the metal layers 6 and 7 serving as a circuit layer and a heat dissipation layer are laminated by brazing. As the brazing material, Al—Si, Al—Ge, Al—Cu, Al—Mg, Al—Mn, or the like is used. The brazing material is made of, for example, a brazing material foil. The brazing material foil is interposed between the ceramic substrate 2 and the two metal layers 6 and 7, and these are pressed in the thickness direction in a vacuum 600 The ceramic substrate and the metal layers 6 and 7 are joined by heating at ˜650 ° C. for about 1 hour.
For joining the metal layer 6 and the electronic component 4, a solder material such as Sn—Ag—Cu, Zn—Al, or Pb—Sn is used. Reference numeral 8 in the figure indicates the solder joint layer. The electronic component 4 and the terminal portion of the metal layer 6 are connected by a bonding wire (not shown) made of aluminum or the like.
On the other hand, as a joining method between the metal layer 7 serving as a heat dissipation layer and the heat sink 5, a soldering method using a soldering material such as a nocolok brazing method, a Sn—Ag—Cu type, a Zn—Al, or a Pb—Sn type may be used. Used, or mechanically fixed with screws while being in close contact with silicon grease. FIG. 1 shows a brazed example.

ヒートシンク5は、その形状等は特に限定されないが、アルミニウム合金の押し出し成形によって形成され、パワーモジュール用基板3に接合される筒体15と、この筒体15の内部を複数の流路16に区画する縦壁17とが一体に形成された構成とされている。筒体15の天板部15aは、パワーモジュール用基板3の金属層7よりも大きい四角形の平面形状を有しており、各縦壁17は、筒体15の幅方向に等間隔で相互に平行に並べられ、筒体15の長さ方向に沿って設けられている。   The shape of the heat sink 5 is not particularly limited. The heat sink 5 is formed by extrusion molding of an aluminum alloy, and the cylinder 15 joined to the power module substrate 3 and the inside of the cylinder 15 are divided into a plurality of flow paths 16. The vertical wall 17 is integrally formed. The top plate portion 15 a of the cylindrical body 15 has a rectangular planar shape larger than the metal layer 7 of the power module substrate 3, and the vertical walls 17 are mutually spaced at equal intervals in the width direction of the cylindrical body 15. They are arranged in parallel and are provided along the length direction of the cylindrical body 15.

パワーモジュール1は、パワーモジュール用基板3を構成する回路層又は放熱層となる金属層6,7を異なる厚さとするとともに、その金属層6,7をそれぞれの厚さに合わせた結晶粒径で構成することにより、ろう付け等の加熱処理による温度変化に伴う反りの発生を防止できる。   In the power module 1, the metal layers 6, 7 serving as circuit layers or heat dissipation layers constituting the power module substrate 3 have different thicknesses, and the metal layers 6, 7 have crystal grain sizes matching the respective thicknesses. By comprising, the generation | occurrence | production of the curvature accompanying the temperature change by heat processing, such as brazing, can be prevented.

厚みの異なる金属層6,7により構成されたパワーモジュール用基板3において、仮に、回路層及び放熱層となる金属層6,7の結晶粒径を同じにして構成した場合、図2(a)に示すパワーモジュール用基板3aのように、回路層及び放熱層となる金属層6a,7aとの厚さに差が生じることから、ろう付け等の加熱処理あるいは高温環境下での使用によって、金属層6a側を凸とする反りが生じる。また、図2(b)に示すパワーモジュール用基板3bのように、回路層及び放熱層となる金属層6,7を異なる結晶粒径の同じ厚さの金属層6a,7bで形成する場合には、結晶粒径の大きい金属層7b側を凸とする反りが生じる。
そこで、本実施形態のパワーモジュール用基板3においては、図2(c)に示すパワーモジュール用基板3cのように、厚肉の金属層7cよりも薄肉の金属層6aの方の結晶粒の粒径を小さくしたことにより、厚さの違いにより生じる反りと、結晶粒径の違いにより生じる反りとを相殺して、反りの問題を解消させている。
In the power module substrate 3 composed of the metal layers 6 and 7 having different thicknesses, if the crystal grain sizes of the metal layers 6 and 7 serving as the circuit layer and the heat dissipation layer are configured to be the same, FIG. As shown in the power module substrate 3a shown in FIG. 2, the thickness of the circuit layers and the metal layers 6a and 7a serving as the heat dissipation layers is different, so that the metal can be used by heat treatment such as brazing or use in a high temperature environment. Warpage is generated with the layer 6a side convex. Further, as in the power module substrate 3b shown in FIG. 2B, when the metal layers 6 and 7 serving as the circuit layer and the heat dissipation layer are formed of the metal layers 6a and 7b having different crystal grain sizes and the same thickness. Causes a warp in which the metal layer 7b side having a large crystal grain size protrudes.
Therefore, in the power module substrate 3 of the present embodiment, as in the power module substrate 3c shown in FIG. 2C, the grain size of the thin metal layer 6a is smaller than that of the thick metal layer 7c. By reducing the diameter, the warpage caused by the difference in thickness and the warpage caused by the difference in crystal grain size are offset, and the problem of warpage is solved.

図3は、パワーモジュール用基板を構成する回路層及び放熱層となる金属層の結晶粒径比と、パワーモジュール用基板の反り量との関係を示したものである。   FIG. 3 shows the relationship between the crystal grain size ratio of the metal layer serving as the circuit layer and the heat dissipation layer constituting the power module substrate and the amount of warpage of the power module substrate.

アルミニウム純度99.99wt%の30mm角の金属層を用い、回路層となる金属層の厚さは0.6mm、放熱層となる金属層の厚さは1.6mmとした。これらの金属層の厚さの比率(回路層の厚さ/放熱層の厚さ)は0.375である。セラミックス基板には、AlNを用い、厚さ0.635mmとした。これら金属層とセラミックス基板とは、厚さ10μm〜15μmのAl−Si系ろう材を用いて630℃に加熱して接合した。このようにして接合したパワーモジュール用基板について全体の反りを測定し、28mm長さ当りの反り量をグラフに示した。
また、下記の表1に、図3のグラフ上の粒径比0.2(実施例1)及び粒径比0.67(実施例2)のデータを示す。
そして、下記の表2の実施例3〜5には、両金属層の平均粒径の比率(回路層の平均粒径/放熱層の平均粒径)を0.1とした場合の各金属層の厚さの比率(厚み比)に対するパワーモジュール用基板の反り量を示す。
A 30 mm square metal layer having an aluminum purity of 99.99 wt% was used, the thickness of the metal layer serving as the circuit layer was 0.6 mm, and the thickness of the metal layer serving as the heat dissipation layer was 1.6 mm. The ratio of the thicknesses of these metal layers (circuit layer thickness / heat dissipation layer thickness) is 0.375. The ceramic substrate was made of AlN and had a thickness of 0.635 mm. The metal layer and the ceramic substrate were joined by heating to 630 ° C. using an Al—Si brazing material having a thickness of 10 μm to 15 μm. The overall warpage of the power module substrate thus bonded was measured, and the amount of warpage per 28 mm length was shown in the graph.
Table 1 below shows data of a particle size ratio of 0.2 (Example 1) and a particle size ratio of 0.67 (Example 2) on the graph of FIG.
In Examples 3 to 5 in Table 2 below, each metal layer when the ratio of the average particle diameter of both metal layers (the average particle diameter of the circuit layer / the average particle diameter of the heat dissipation layer) is 0.1. The warpage amount of the power module substrate with respect to the thickness ratio (thickness ratio) is shown.

なお、結晶粒径の測定は、金属層をバレット氏液(塩酸、硝酸、フッ酸の混合液)によりマクロエッチングし、その面積率を偏光顕微鏡を用いて評価した。面積率から結晶粒径を求める方法は、材料表面や切断面において直径で切り取られる粒子の数から結晶粒径を見積もるインターセプト法を用いた。
また、使用した金属層は、焼却炉で200〜400℃の範囲で1〜24時間の任意の処理条件で熱処理を行い、結晶粒径比の異なるものを作製した。
The crystal grain size was measured by macro-etching the metal layer with Barrett's solution (mixed solution of hydrochloric acid, nitric acid and hydrofluoric acid) and evaluating the area ratio using a polarizing microscope. As a method for obtaining the crystal grain size from the area ratio, an intercept method was used in which the crystal grain size was estimated from the number of particles cut by diameter on the material surface or the cut surface.
Moreover, the used metal layer heat-processed on the arbitrary processing conditions for 1 to 24 hours in the range of 200-400 degreeC with the incinerator, and produced the thing from which a crystal grain diameter ratio differs.

Figure 2012009787
Figure 2012009787

Figure 2012009787
Figure 2012009787

図3から明らかなように、両金属板の結晶粒径が同じとされる粒径比1の場合に、反り量が125μm程度であったのに対して、粒径比0.1の場合には、65μm程度まで抑えられている。このように、パワーモジュール用基板の厚さの異なる金属層に、その厚みに応じて結晶粒径の異なる金属層を用いることにより、温度変化に伴う反りを抑制することができる。
また、表2から明らかなように、両金属層の粒径比が0.1とされるような各金属層の結晶粒径の差が大きい場合、対応する金属層の厚さも、差が大きい場合(表2の例では実施例3)に最も反り量を小さく抑えられている。このように、両金属層の粒径比と厚み比とを対応させてバランスをとることにより、温度変化に伴う反りを抑制することができる。
なお、上記の実施例1〜5の両金属層6,7の結晶粒径の比率は、ろう付け接合前の状態で説明したが、ろう付け接合後の状態においても、表1に示すように、それぞれの結晶粒径は大きくなるが、結晶粒径の比率はほとんど変化しない。
As can be seen from FIG. 3, when the crystal grain size of both metal plates is the same, the warpage amount was about 125 μm, whereas the grain size ratio was 0.1. Is suppressed to about 65 μm. Thus, the warp accompanying a temperature change can be suppressed by using a metal layer having a different crystal grain size depending on the thickness of the metal layer having a different thickness for the power module substrate.
As is clear from Table 2, when the difference in crystal grain size between the metal layers is such that the particle size ratio between the two metal layers is 0.1, the thickness of the corresponding metal layer is also large. In the case (Example 3 in Table 2), the amount of warpage is minimized. Thus, the warp accompanying a temperature change can be suppressed by making the particle size ratio and the thickness ratio of the two metal layers correspond to each other and achieving a balance.
In addition, although the ratio of the crystal grain size of both the metal layers 6 and 7 of the above-described Examples 1 to 5 was described in the state before the brazing joint, as shown in Table 1 even in the state after the brazing joint Each crystal grain size becomes large, but the ratio of crystal grain size hardly changes.

以上、本発明の実施形態について図面を参照して詳述したが、具体的な構成はこの実施形態に限られるものではなく、本発明の要旨を逸脱しない範囲の設計変更等も含まれる。
上記実施形態では、金属層をセラミックス基板にろう付けするものとしたが、セラミックス基板と金属層との接合面に真空中でイオンビームを照射して活性化させた状態として、これらを接合する、常温での直接接合としてもよい。
As mentioned above, although embodiment of this invention was explained in full detail with reference to drawings, the concrete structure is not restricted to this embodiment, The design change etc. of the range which does not deviate from the summary of this invention are included.
In the above embodiment, the metal layer is brazed to the ceramic substrate, but the bonded surfaces of the ceramic substrate and the metal layer are activated by irradiation with an ion beam in vacuum, and these are bonded. Direct bonding at room temperature is also possible.

1 パワーモジュール
2 セラミックス基板
3,3a,3b,3c パワーモジュール用基板
4 電子部品
5 ヒートシンク
6,6a,7,7a,7b,7c 金属層
8 はんだ接合層
15 筒体
15a 天板部
16 流路
17 縦壁
DESCRIPTION OF SYMBOLS 1 Power module 2 Ceramic substrate 3, 3a, 3b, 3c Power module substrate 4 Electronic component 5 Heat sink 6, 6a, 7, 7a, 7b, 7c Metal layer 8 Solder joint layer 15 Cylindrical body 15a Top plate part 16 Flow path 17 Vertical wall

Claims (5)

セラミックス基板の両面に異なる厚さの金属層が積層されたパワーモジュール用基板であって、両金属層を構成する結晶粒の平均粒径が、厚みの厚い金属層よりも薄い金属層の方が小さく形成されていることを特徴とするパワーモジュール用基板。   A power module substrate in which metal layers with different thicknesses are laminated on both sides of a ceramic substrate, and the average particle size of crystal grains constituting both metal layers is thinner than the thick metal layer. A power module substrate characterized by being formed small. 前記厚い金属層に対する前記薄い金属層の厚さの比率が0.2以上0.9以下であり、対応する結晶粒の平均粒径の比率が0.01以上1以下であることを特徴とする請求項1記載のパワーモジュール用基板。   The ratio of the thickness of the thin metal layer to the thick metal layer is 0.2 or more and 0.9 or less, and the ratio of the average grain size of the corresponding crystal grains is 0.01 or more and 1 or less. The power module substrate according to claim 1. 前記厚い金属層に対する前記薄い金属層の厚さの比率が0.2以上0.8以下であり、対応する結晶粒の平均粒径の比率が0.1以上0.8以下であることを特徴とする請求項2記載のパワーモジュール用基板。   The ratio of the thickness of the thin metal layer to the thick metal layer is 0.2 or more and 0.8 or less, and the ratio of the average grain size of the corresponding crystal grains is 0.1 or more and 0.8 or less. The power module substrate according to claim 2. 請求項1から3のいずれか一項に記載のパワーモジュール用基板の前記金属層のうちの一方に電子部品がはんだ付けにより接合され、他方の金属層にヒートシンクが接合されることを特徴とするパワーモジュール。   An electronic component is joined to one of the metal layers of the power module substrate according to any one of claims 1 to 3 by soldering, and a heat sink is joined to the other metal layer. Power module. セラミックス基板の両面に異なる厚さの金属層が積層されたパワーモジュール用基板の製造方法であって、両金属層を構成する結晶粒の平均粒径を、厚みの厚い金属層よりも薄い金属層の方を小さく形成しておき、これら両金属層を前記セラミックス基板の両面にろう材を介して配置した状態で加熱して接合することを特徴とするパワーモジュール用基板の製造方法。
A method for manufacturing a power module substrate in which metal layers having different thicknesses are laminated on both sides of a ceramic substrate, wherein the average grain size of crystal grains constituting both metal layers is smaller than that of a thick metal layer. A method for manufacturing a substrate for a power module, characterized in that the metal layer is formed in a small size, and both the metal layers are heated and bonded in a state of being disposed on both surfaces of the ceramic substrate via a brazing material.
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