JP2012004882A - Modulation power supply circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a high-efficiency modulation power supply circuit that suppresses an increase of a device size by reducing an overshoot/undershoot and also improve error amplifier efficiency.SOLUTION: A modulation power supply circuit 100 comprises: a controller 140 that compares an input envelope signal and a threshold in a threshold table 160 at a comparator 150 to generate a switching signal for switching each of the switches 121-123 in a switch section 120; a delay insertion part 200 that monitors the switching signal being input to the switch section 120 and inserts a delay to the switching signal to shift a timing so that each of the switches 121-123 in the switch section 120 does not turn on/off at the same time.

Description

  The present invention relates to a modulation power supply circuit of a power amplifier using a power supply modulation method, and more particularly to a modulation power supply circuit constituting a power supply unit of an ET (Envelope Tracking) method or an EE & R (Envelope Elimination and Restoration) method.

  ET or EE & R is attracting attention as a future high efficiency amplifier technology. The modulation power supply circuit constituting the ET or EE & R power supply unit is required to achieve both high efficiency and wide bandwidth.

  Patent Document 1 discloses a modulation power supply having a high-efficiency, non-linear multi-output power supply unit and a low-efficiency, linear error amplifier unit. The modulation power supply described in Patent Document 1 maintains a high efficiency by switching a plurality of high-efficiency power supplies with a switch and adding only a voltage error by a linear error amplifier although having a low efficiency. By controlling the threshold voltage for determination used in the multi-output power supply unit, the use opportunity of the low-efficiency error amplifier unit is reduced, and a high-efficiency modulation power supply is realized.

  FIG. 1 is a circuit diagram showing a configuration of a modulation power source using multi-output DC / DC, switch switching, and an error amplifier.

  As shown in FIG. 1, the modulation power supply circuit 10 includes a multi-output DC power supply unit 11, a switch unit 12, an envelope analog signal input unit 13, a control unit 14, a comparator 15, a threshold table 16, and a low-pass filter (LPF) unit 17. An envelope output unit 18 and an error amplifier 19.

  In the above configuration, the modulation power supply circuit 10 generates a plurality of voltages using the multi-output DC power supply unit 11. The switch unit 12 and the LPF unit 17 are connected to the subsequent stage. The control unit 14 controls the switch unit 12 in accordance with the input envelope analog signal. Specifically, the control unit 14 includes a comparator 15 and a threshold value table 16, and compares the input envelope analog signal and the threshold value of the threshold value table 16 with the comparator 15 to switch the switch unit 12. And the switches 12-1 to 12-3 of the switch unit 12 are controlled to be switched by this switching signal.

  The LPF unit 17 obtains an output voltage with less unnecessary components by eliminating unnecessary components from the output (point a) of the switch unit 12. As the switching frequency of the switches 12-1 to 12-3 of the switch unit 12 increases, switching loss occurs. Therefore, it is desired to reduce the switching of the switches as much as possible. Therefore, for example, as shown in FIG. 7A described later, when the maximum voltage Vmax of the control (output) voltage is output, the switches other than the uppermost switch 12-1 connected to Vmax are not turned off. I am doing so. That is, all switches are turned on when Vmax is output. Further, diodes D1 to D3 are inserted in series in a path other than outputting Vmax so that a reverse voltage is not applied to a power supply other than outputting Vmax.

JP 2006-514472 A

  However, in such a conventional modulation power supply circuit, since a switching device has a response limit, a plurality of switches are simultaneously turned on / off when high-speed control is performed, and a large overshoot / undershoot occurs. End up.

FIG. 2 is a diagram showing a switch unit output time axis waveform at the rise of the conventional modulation power supply circuit, and FIG. 3 is a diagram showing a switch unit output time axis waveform at the fall.
It is.

  If the overshoot / undershoot is not corrected, a large distortion component is generated in the output. In order to correct this overshoot / undershoot, a low-efficiency but linear error amplifier is required. The larger the overshoot / undershoot, the larger the dynamic range is required for the error amplifier, and it becomes necessary not only to increase the device size of the error amplifier, but also the efficiency as a modulation power source deteriorates. Error amplifiers with large device sizes are expensive.

  As described above, the switching device has a response limit. When high-speed control is performed, a plurality of switches are simultaneously turned on / off, and a large overshoot / undershoot occurs. A low-efficiency, linear error amplifier that compensates for this requires a large dynamic range, resulting in inefficient operation.

  An object of the present invention is to reduce the overshoot / undershoot that doubles when a plurality of switches are turned on / off at the same time, thereby suppressing an increase in device size and improving the efficiency of the error amplifier. A modulation power supply circuit is provided.

  The modulation power supply circuit of the present invention is inputted with a multi-output DC power supply unit that outputs a plurality of DC voltages, and a switch unit that has a plurality of switches for switching a plurality of DC voltages supplied from the multi-output DC power supply unit. A control unit that generates a switching signal for switching each switch of the switch unit, a low-pass filter unit that eliminates unnecessary components from the output waveform of the switch unit, and a low-pass filter unit A linear error amplifier that adds a voltage error to the output voltage and the switching signal input to the switch unit are monitored, and a delay that shifts the timing so that the switches of the switch unit do not turn on / off at the same time And a delay insertion unit to be inserted into the switching signal.

  According to the present invention, by monitoring an input switching signal and inserting a delay in the switching signal so that the plurality of switches are not simultaneously turned on / off, the plurality of switches are simultaneously turned on / off. The overshoot / undershoot that doubles can be reduced. As a result, an increase in device size and price can be suppressed, the efficiency of the error amplifier can be improved, and a highly efficient modulation power supply circuit can be realized.

Circuit diagram showing configuration of conventional modulation power supply The figure which shows the switch part output time base waveform at the time of the rise of the conventional modulation power supply circuit The figure which shows the switch part output time-axis waveform at the time of the fall of the conventional modulation power supply circuit 1 is a circuit diagram showing a configuration of a modulation power supply circuit according to a first embodiment of the present invention. The circuit diagram which shows the structure of the delay insertion part of the modulation power supply circuit which concerns on the said Embodiment 1. The flowchart which shows the delay insertion of the delay insertion part of the modulation power supply circuit which concerns on the said Embodiment 1. The figure which shows the control (output) voltage of the control signal of the modulation power supply circuit which concerns on Embodiment 1 of the said invention. The figure which shows the control (output) voltage in the ideal circuit of the modulation power supply circuit which concerns on Embodiment 1 of the said invention. The figure which shows the switch part output time-axis waveform at the time of the starting of the modulation | alteration power supply circuit which concerns on Embodiment 1 of the said invention The figure which shows the switch part output time-axis waveform at the time of the fall of the modulation power supply circuit which concerns on the said Embodiment 1. FIG. The circuit diagram which shows the structure of the delay insertion part of the modulation power supply circuit which concerns on Embodiment 2 of this invention

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

(Embodiment 1)
FIG. 4 is a circuit diagram showing a configuration of the modulation power supply circuit according to Embodiment 1 of the present invention. This embodiment can be applied to a high-efficiency and wide-band modulation power supply circuit used in an ET or EE & R power supply unit.

  As shown in FIG. 4, the modulation power supply circuit 100 includes a multi-output DC power supply unit 110, a switch unit 120, an envelope analog signal input unit 130, a control unit 140, a comparator 150, a threshold table 160, and a low-pass filter (LPF) unit 170. , An envelope output unit 180, an error amplifier 190, and a delay insertion unit 200.

  The multi-output DC power supply unit 110 is a highly efficient and non-linear multi-value DC voltage source that outputs a plurality of DC voltages.

  The switch unit 120 switches a plurality of DC voltages from the multi-output DC power supply unit 110 at high speed.

  The control unit 140 includes a comparator 150 and a threshold value table 160, and compares the envelope signal input to the envelope analog signal input unit 130 with the threshold value of the threshold value table 160 by the comparator 150. A switching signal for switching 121 to 123 is generated.

  The LPF unit 170 eliminates unnecessary components (high-frequency noise) generated by the switching operation of the switch unit 120 from the output waveform (point a) of the switch unit 120, and outputs an output voltage with less unnecessary components to the envelope output unit 180. .

  The error amplifier 190 is a low-efficiency, linear error amplifier unit, and adds only the voltage error to increase the waveform purity.

  The delay insertion unit 200 is inserted after the comparator 150, and the output of the comparator 150 is input to the switch unit 120 via the delay insertion unit 200.

  The delay insertion unit 200 inserts a delay into the switching signal so that the switches 121 to 123 of the switch unit 120 do not turn on / off at the same time. Specifically, the delay insertion unit 200 monitors the switching signal input to the switch unit 120 and inserts a delay that shifts the timing in the switching signal so that the switches 121 to 123 of the switch unit 120 are not simultaneously turned on / off. .

  FIG. 5 is a circuit diagram illustrating an example of the configuration of the delay insertion unit 200.

  As illustrated in FIG. 5, the delay insertion unit 200 includes a change detection unit 210 (211 to 213), a first delay unit 220 (221 to 223), a path switching unit 230 (231 to 233), and a second Delay unit 240 (241 to 243).

  The change detection unit 210 (211 to 213) detects a change in the switching signal of the switch unit 120 to each of the switches 121 to 123, and outputs a control signal based on a predetermined condition. Specifically, the change detection unit 210 performs the following change detection and delay insertion operation.

  (1) The change detection unit 210 detects a change in the switching signal to each of the switches 121 to 123 of the switch unit 120. If there is no change, the change detection unit 210 does not delay the switching signal to the corresponding switch.

  (2) The change detection unit 210 detects a change in the switching signal to each of the switches 121 to 123 of the switch unit 120. If there is a change, the change is the same for the switching signal of the upper or lower switch of the corresponding switch. If there is the same change, a delay signal is inserted into the switching signal to the corresponding switch.

  (2-1) The change detection unit 210 detects a change in the switching signal to each of the switches 121 to 123 of the switch unit 120, and when there is a voltage increase change, the switching signal of the switch having a lower voltage than the corresponding switch It is detected whether or not there is a change in voltage, and if there is a change in voltage, a delay signal is inserted into the switching signal to the corresponding switch.

  (2-2) The change detection unit 210 detects the change of the switching signal to each of the switches 121 to 123 of the switch unit 120, and when there is a voltage drop change, the switching signal of the switch having a higher voltage than the corresponding switch It is detected whether or not there is a voltage drop change. If there is a voltage drop change, a delay signal is inserted into the switching signal to the corresponding switch.

  The first delay unit 220 (221 to 223) inserts a first delay into the switching signal of the switch unit 120 to the switches 121 to 123. The first delay is, for example, a unit delay.

  The path switching unit 230 (231 to 233) switches between a path connected to the second delay unit 240 and a bypass path in accordance with a control signal from the change detection unit 210.

  The second delay unit 240 (241 to 243) is switched by the path switching unit 230 and inserts the second delay into the switching signal in which the first delay is inserted. The delay time of the second delay unit 240 is preferably smaller than the clock cycle of the comparator 150.

  Hereinafter, the operation of the modulation power supply circuit 100 configured as described above will be described.

  The comparator 150 determines whether the continuous envelope signal input from the envelope analog signal input unit 130 is larger or smaller than the threshold value table 160, and the digital output is input to the delay insertion unit 200.

  FIG. 6 is a flowchart showing the delay insertion of the delay insertion unit 200.

  In the delay insertion unit 200, the output signal of the comparator 150 is input to the change detection unit 210 and the first delay unit 220.

  In step S1, the change detection unit 210 detects changes of “0 (switch off) → 1 (switch on)” and “1 (switch on) → 0 (switch off)”, and the change detection unit 210 performs path switching. A control signal is sent to the unit 230. The path switching unit 230 connected to the output of the first delay unit 220 outputs the output of the path switching unit 230 when there is no change in its own bit (0 → 0, 1 → 1) (NO in step S1). A route directly connected to the switch unit 120 is selected, and no delay insertion is performed (step S2).

  When there is a change in its own bit (YES in step S1), in step S3, the change detection unit 210 determines whether the bit change is “0 → 1” or “1 → 0”.

  In the case of a change of “0 → 1” (voltage increases) (YES in step S3), in step S4, the change detection unit 210 determines that the same change “0 → 1” is applied to n bits or less (voltage is low). ”Is detected. When the same change “0 → 1” is present even in n bits or less (voltage is low), the process proceeds to step S6, and the same change “0 → 1” is not present in n bits (voltage is low). Shifts to step S2.

  On the other hand, in the above-described step S3, in the case of a change of “1 → 0” (voltage decreases) (NO in step S3), in step S5, the change detection unit 210 is higher than n (the voltage is high) It is detected whether or not the bit has the same change “1 → 0”. If the same change “1 → 0” is present even in bits above n (high voltage), the process proceeds to step S6, and the same change “1 → 0” is present in bits above n (high voltage). If not, the process proceeds to step S2.

  Thus, only when the same change occurs, in step S6, the path switching unit 230 selects a path where the output of the path switching unit 230 is connected to the second delay unit 240, and the n number of the second delay units 240 is n. Is inserted into its own path.

  For example, if there is a “0 → 1” change in n paths (low voltage), n unit delays are inserted into the self path. Similarly, in the case of a “1 → 0” change, it is detected whether there is a “1 → 0” change even in n bits (high voltage), and only when there is the same change, the path is switched. The unit 230 selects a path where the output of the path switching unit 230 is connected to the second delay unit 240, and the second delay unit 240 inserts n unit delays into its own path.

  Here, by setting the delay time of the second delay unit 240 to be smaller than the clock cycle of the comparator 150, each switch of the switch unit 120 at the rise / fall of the output voltage waveform of the switch unit 120 It becomes possible to avoid simultaneous ON / OFF of 121-123.

  FIG. 7 is a diagram showing the control (output) voltage of the control signal. FIG. 7 (a) shows the conventional control (output) voltage, and FIG. 7 (b) shows the control (output) voltage of the present embodiment. Show.

  In the delay insertion unit 200, the change detection unit 210 monitors the switching signal input to detect a change, and inserts a delay according to a condition. Specifically, in the delay insertion unit 200, the change detection unit 210 monitors the change signal input and detects the change, and only when there is the same change, the route switch unit 230 outputs the second output from the route switch unit 230. The route connected to the delay unit 240 is selected. The second delay unit 240 inserts n unit delays into its own path. By inserting a delay in the switching signal input to the switch unit 120, the switches 121 to 123 of the switch unit 120 are not simultaneously turned on / off.

  FIG. 8 is a diagram illustrating a control (output) voltage in an ideal circuit. As shown in FIG. 8, in an ideal circuit, the control voltage and the output voltage of the switch unit 120 substantially match. However, since the switching device has a response limit, a plurality of switches are simultaneously turned on / off when high-speed control is performed, and overshoot / undershoot occurs. Even in the present embodiment, it is difficult to completely eliminate overshoot / undershoot in the case of high speed control, but it can be greatly improved.

  FIG. 9 is a diagram showing a switch unit output time axis waveform when the modulation power supply circuit 100 rises, and FIG. 10 is a diagram showing a switch unit output time axis waveform when the modulation power supply circuit 100 falls.

  As can be seen by comparing the switching waveforms of the present embodiment of FIGS. 9 and 10 with the conventional output waveforms of FIGS. 2 and 3, the overshoot / undershoot is improved in the present embodiment.

  As described above in detail, according to the present embodiment, the modulation power supply circuit 100 compares the input envelope signal and the threshold value of the threshold value table 160 by the comparator 150, and each switch 121 of the switch unit 120. The control unit 140 that generates a switching signal for switching to 123 and the switching signal input to the switch unit 120 are monitored, and the delay for shifting the timing is switched so that the switches 121 to 123 of the switch unit 120 are not simultaneously turned on / off. A delay insertion unit 200 that inserts the signal into the signal. That is, the delay insertion unit 200 monitors the switching signal and inserts a delay according to the condition. In particular, the delay insertion unit 200 has a function of controlling the delay time for each stage.

  With the above configuration, it is possible to reduce overshoot / undershoot that doubles when a plurality of switches are simultaneously turned on / off. By giving a delay, a large overshoot / undershoot does not occur in the switching waveform. Since the large overshoot / undershoot is an error from the expected output voltage, the dynamic range required for the error amplifier 190 is reduced by reducing these. The error amplifier 190, which is a linear amplifier, has a greater efficiency degradation when the dynamic range is increased compared to the non-linear amplifier. Therefore, the reduction of the dynamic range leads to a significant improvement in efficiency.

  As a result, an increase in device size and price can be suppressed, and the maximum output of the error amplifier 190 can be reduced to improve efficiency. The improvement in the efficiency of the error amplifier 190 leads to ensuring the reliability of the entire modulation power supply circuit 100, and a highly efficient modulation power supply can be obtained.

(Embodiment 2)
FIG. 11 is a circuit diagram showing an example of the configuration of the delay insertion unit 300 of the modulation power supply circuit according to Embodiment 2 of the present invention. In the description of the present embodiment, the same components as those in FIG.

  The delay insertion unit 300 is used in place of the delay insertion unit 200 of the modulation power supply circuit 100 of FIG. The basic configuration and operation of the modulation power supply circuit according to the second embodiment of the present invention are the same as those of the first embodiment.

  As illustrated in FIG. 11, the delay insertion unit 300 includes a delay insertion unit 200 and a delay control unit 310.

  The delay control unit 310 individually controls the delay time of the second delay unit 240 (241 to 243). The delay control unit 310 generates a control signal for controlling the delay time of the second delay unit 240 (241 to 243) using a table or a polynomial.

  For example, when two switches try to rise at the same time, the delay control unit 310 performs a delay control in which the rising edge of ringing by one switch overlaps the falling edge of another switch by ringing, that is, cancels each other. Do.

  As described above, the delay insertion unit 300 of the modulation power supply circuit according to the present embodiment includes the delay control unit 310 that controls the delay time of the second delay unit 240, so that each of the paths connected in parallel is the first. The delay time of the second delay unit 240 can be controlled. Thereby, it is possible to further reduce the overshoot / undershoot that doubles when a plurality of switches are simultaneously turned on / off by canceling overshoot / undershoot generated in each path. Therefore, the effect of the first embodiment, that is, the effect of improving the efficiency of the error amplifier 190 and increasing the efficiency can be achieved by suppressing the increase in device size and price.

  The above description is an illustration of a preferred embodiment of the present invention, and the scope of the present invention is not limited to this.

  For example, the logic of each block may be arbitrary, and the delay time of the second delay unit 240 may be inserted only in a certain path.

  In each of the above-described embodiments, n unit delays are inserted into the own path. However, the number m may be derived from a certain mathematical expression. In the change detection unit 210, it is naturally possible to detect only the rising edge or only the falling edge, and it is also possible to insert a delay only at the rising edge or only at the falling edge.

  In each of the above embodiments, the name “modulation power supply circuit” is used. However, this is for convenience of explanation, and may be a modulation power supply, a power amplifier, or the like.

  Furthermore, each circuit unit constituting the modulation power supply circuit, for example, the type and number of switches, the type of threshold table, and the like are not limited to the above-described embodiment. As a matter of course, various compensation circuits may be added to the modulation power supply circuit.

  The modulation power supply circuit according to the present invention suppresses an increase in device size (price) by reducing overshoot / undershoot that doubles when a plurality of switches are simultaneously turned on / off, and improves error amplifier efficiency. It is useful as a modulation power supply circuit that improves the efficiency and enables high efficiency.

DESCRIPTION OF SYMBOLS 100 Modulation power supply circuit 110 Multi-output DC power supply part 120 Switch part 130 Envelope analog signal input part 140 Control part 150 Comparator 160 Threshold table 170 Low pass filter (LPF) part 180 Envelope output part 190 Error amplifier 200, 300 Delay insertion part 210, 211 to 213 Change detection unit 220, 221 to 223 First delay unit 230, 231 to 233 Path switching unit 240, 241 to 243 Second delay unit 310 Delay control unit

Claims (10)

A multi-output DC power supply for outputting a plurality of DC voltages;
A switch unit having a plurality of switches for switching a plurality of DC voltages supplied from the multi-output DC power source unit;
A control unit that compares the input envelope signal with a threshold value and generates a switching signal for switching each switch of the switch unit;
A low-pass filter unit for removing unnecessary components from the output waveform of the switch unit;
A linear error amplifier that adds a voltage error to the output voltage of the low-pass filter unit;
A delay insertion unit that monitors the switching signal input to the switch unit and inserts a delay in the switching signal so as not to simultaneously turn on / off the switches of the switch unit;
A modulation power supply circuit comprising: The delay insertion unit
A change detection unit that detects a change in a switching signal to each switch of the switch unit and outputs a control signal based on a predetermined condition;
A delay unit for performing delay insertion on the switching signal;
A bypass path for bypassing the delay unit;
The modulation power supply circuit according to claim 1, further comprising a path switching unit that switches a path connected to the delay unit and the bypass path in accordance with a control signal sent from the change detection unit. The delay unit is
A first delay unit for inserting a first delay into a switching signal to each switch of the switch unit;
The modulation power supply circuit according to claim 2, further comprising: a second delay unit that is switched by the path switching unit and that inserts a second delay into the switching signal into which the first delay is inserted. The change detector is
The modulation power supply circuit according to claim 2, wherein a change in a switching signal to each switch of the switch unit is detected, and when there is no change, no delay is inserted in the switching signal to the corresponding switch. The change detector is
When the change of the switching signal to each switch of the switch part is detected and there is a change, it is detected whether there is the same change for the switching signal of the upper or lower switch of the corresponding switch, and there is the same change The modulation power supply circuit according to claim 2, wherein a delay signal is inserted into a switching signal to the corresponding switch. The change detector is
When the change of the switching signal to each switch of the switch unit is detected and there is a voltage increase change, it is detected whether or not there is a voltage increase change for the switch signal of the switch whose voltage is low, and the voltage increase change The modulation power supply circuit according to claim 2, wherein when there is a delay, a delay signal is inserted into a switching signal to the corresponding switch. The change detector is
When the change of the switching signal to each switch of the switch unit is detected and there is a voltage drop change, it is detected whether there is a voltage drop change for the switch signal of the switch having a high voltage of the corresponding switch, and the voltage drop change The modulation power supply circuit according to claim 2, wherein when there is a delay, a delay signal is inserted into a switching signal to the corresponding switch.   The modulation power supply circuit according to claim 3, wherein the delay of the first delay unit is a unit delay.   The modulation power supply circuit according to claim 3, wherein a delay time of the second delay unit is smaller than a cycle of a clock of a comparator that compares the envelope signal with a threshold value. The modulation power supply circuit according to claim 3, further comprising a delay control unit that controls a delay time of the second delay unit.

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