JP2011514615A5 - - Google Patents
Download PDFInfo
- Publication number
- JP2011514615A5 JP2011514615A5 JP2010550709A JP2010550709A JP2011514615A5 JP 2011514615 A5 JP2011514615 A5 JP 2011514615A5 JP 2010550709 A JP2010550709 A JP 2010550709A JP 2010550709 A JP2010550709 A JP 2010550709A JP 2011514615 A5 JP2011514615 A5 JP 2011514615A5
- Authority
- JP
- Japan
- Prior art keywords
- cells
- cell
- current
- bit
- reference cell
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US12/048,683 | 2008-03-14 | ||
| US12/048,683 US7742340B2 (en) | 2008-03-14 | 2008-03-14 | Read reference technique with current degradation protection |
| PCT/US2009/031945 WO2009114213A1 (en) | 2008-03-14 | 2009-01-26 | Read reference technique with current degradation protection |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2011514615A JP2011514615A (ja) | 2011-05-06 |
| JP2011514615A5 true JP2011514615A5 (cg-RX-API-DMAC7.html) | 2012-03-15 |
| JP5480168B2 JP5480168B2 (ja) | 2014-04-23 |
Family
ID=41062885
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2010550709A Expired - Fee Related JP5480168B2 (ja) | 2008-03-14 | 2009-01-26 | 電流劣化を保護する読取り基準手法 |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US7742340B2 (cg-RX-API-DMAC7.html) |
| EP (1) | EP2266117A4 (cg-RX-API-DMAC7.html) |
| JP (1) | JP5480168B2 (cg-RX-API-DMAC7.html) |
| WO (1) | WO2009114213A1 (cg-RX-API-DMAC7.html) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104685572B (zh) * | 2012-10-30 | 2017-05-10 | 松下知识产权经营株式会社 | 非易失性半导体存储装置 |
| US9595340B2 (en) * | 2015-01-20 | 2017-03-14 | Taiwan Semiconductor Manufacturing Company Limited | Nonvolatile memory device and method of setting a reference current in a nonvolatile memory device |
| US11082383B2 (en) | 2018-03-13 | 2021-08-03 | ROVl GUIDES, INC. | Systems and methods for displaying a notification at an area on a display screen that is within a line of sight of a subset of audience members to whom the notification pertains |
| US11114176B1 (en) * | 2020-03-06 | 2021-09-07 | Qualcomm Incorporated | Systems and methods to provide write termination for one time programmable memory cells |
Family Cites Families (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0632464B1 (en) * | 1993-06-28 | 1999-09-08 | STMicroelectronics S.r.l. | Method of measuring the current of microcontroller memory cells and relative system |
| US6097632A (en) * | 1997-04-18 | 2000-08-01 | Micron Technology, Inc. | Source regulation circuit for an erase operation of flash memory |
| JP2000268584A (ja) | 1999-03-15 | 2000-09-29 | Nec Corp | 不揮発性半導体記憶装置およびその製造方法 |
| US6396741B1 (en) | 2000-05-04 | 2002-05-28 | Saifun Semiconductors Ltd. | Programming of nonvolatile memory cells |
| JP4212760B2 (ja) * | 2000-06-02 | 2009-01-21 | 富士通マイクロエレクトロニクス株式会社 | 半導体記憶装置 |
| FR2820539B1 (fr) | 2001-02-02 | 2003-05-30 | St Microelectronics Sa | Procede et dispositif de rafraichissement de cellules de reference |
| EP1251523B1 (en) * | 2001-04-19 | 2007-08-15 | STMicroelectronics S.r.l. | Method and circuit for timing dynamic reading of a memory cell with control of the integration time |
| US6813189B2 (en) * | 2002-07-16 | 2004-11-02 | Fujitsu Limited | System for using a dynamic reference in a double-bit cell memory |
| JP2004062922A (ja) * | 2002-07-25 | 2004-02-26 | Renesas Technology Corp | 不揮発性半導体記憶装置 |
| US7180782B2 (en) | 2005-06-10 | 2007-02-20 | Macronix International Co., Ltd. | Read source line compensation in a non-volatile memory |
-
2008
- 2008-03-14 US US12/048,683 patent/US7742340B2/en not_active Expired - Fee Related
-
2009
- 2009-01-26 JP JP2010550709A patent/JP5480168B2/ja not_active Expired - Fee Related
- 2009-01-26 WO PCT/US2009/031945 patent/WO2009114213A1/en not_active Ceased
- 2009-01-26 EP EP09720623A patent/EP2266117A4/en not_active Withdrawn
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP2012113809A5 (ja) | フラッシュメモリ装置のメモリセルを読み出す方法 | |
| JP6171222B2 (ja) | 抵抗性メモリセルをリフォーミングするための装置および方法 | |
| WO2010005483A3 (en) | Memory cell sensing using negative voltage | |
| JP2008521157A5 (cg-RX-API-DMAC7.html) | ||
| WO2009072104A3 (en) | Flash memory device with physical cell value deterioration accommodation and methods useful in conjunction therewith | |
| WO2007062100A3 (en) | Method and system for providing current balanced writing for memory cells and magnetic devices | |
| WO2009158677A3 (en) | Short reset pulse for non-volatile storage 19 | |
| WO2009139567A3 (en) | Memory device and memory programming method | |
| JP2010009674A5 (cg-RX-API-DMAC7.html) | ||
| JP2007272938A5 (cg-RX-API-DMAC7.html) | ||
| WO2013028434A3 (en) | Memory device readout using multiple sense times | |
| JP2012058860A5 (cg-RX-API-DMAC7.html) | ||
| WO2009089612A8 (en) | Nonvolatile semiconductor memory device | |
| US11656673B2 (en) | Managing reduced power memory operations | |
| JP2012142562A5 (ja) | 半導体装置 | |
| WO2011112354A3 (en) | Sensing operations in a memory device | |
| WO2007146010A3 (en) | Programming a non-volatile memory device | |
| WO2009139574A3 (en) | Memory device and method of managing memory data error | |
| EP2787507A3 (en) | Resistive memory cells and their programming, reading and operating methods | |
| ATE459962T1 (de) | Nichtflüchtiger speicher und verfahren mit stromsparenden lese- und programmverifizieroperationen | |
| TW200710661A (en) | Memory controller interface for micro-tiled memory access | |
| WO2007112041A8 (en) | Memory based computation systems and methods of using the same | |
| WO2009038780A3 (en) | Nand-structured series variable-resistance material memories, processes of forming same, and methods of using same | |
| EP2782100A3 (en) | Memory to read and write data at a magnetic tunnel junction element | |
| JP2015500546A5 (cg-RX-API-DMAC7.html) |