JP2011253956A - Method of manufacturing epitaxial wafer - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method of manufacturing an epitaxial wafer having a good forward voltage by reducing defective forward voltage (Vf) generated by Si which is mixed when forming a p-type layer as compared with prior art.SOLUTION: The method of manufacturing an epitaxial wafer includes at least a step for growing a p-type layer epitaxially on a substrate consisting of a compound semiconductor by hydride vapor phase epitaxial method. When temperature of the substrate is raised before starting epitaxial growth of the p-type layer, p-type dopant gas is fed more than that fed during epitaxial growth of the p-type layer.

Description

  The present invention relates to a method for manufacturing an epitaxial wafer by hydride vapor phase epitaxy.

A light emitting device in which a light emitting layer portion and a current diffusion layer are formed on a GaAs single crystal substrate is conventionally known.
For example, a light emitting device is known in which a light emitting layer portion composed of four elements of AlGaInP and a current diffusion layer composed of GaP (hereinafter also referred to as a window layer) are formed on a GaAs single crystal substrate.
This GaP current spreading layer is formed by forming a relatively thin first current spreading layer on the light emitting layer side by a metal organic vapor phase epitaxy method (hereinafter also referred to simply as MOVPE method), and then forming a hydride vapor phase. A relatively thick second current diffusion layer is grown and formed by a growth method (Hydride Vapor Phase Epitaxy method, hereinafter also simply referred to as HVPE method), which is disclosed in Patent Document 1 and the like.
The current spreading layer may be grown to a thickness of about 200 μm as a whole.

  However, in the growth apparatus used for the epitaxial growth by the HVPE method, the first current diffusion layer and the second current are caused by contamination from a reaction part made of quartz such as a crucible containing a molten group III metal, a growth vessel, or a susceptor supporting a wafer. There was a problem that the interface with the current diffusion layer was easily contaminated by Si.

  Since this Si acts as an n-type dopant, the p-type carrier is compensated at the interface between the p-type first current diffusion layer and the second current diffusion layer, and a p-type high resistance layer is formed. There has been a problem that the forward voltage (Vf) at the time of driving increases.

US Patent No. 5,008,718

  The present invention has been made in order to solve the above-described problems, and reduces the forward voltage (Vf) defect generated by Si mixed when forming the p-type layer as compared with the prior art. An object of the present invention is to provide a method for manufacturing an epitaxial wafer having a good voltage.

  In order to solve the above-described problems, the present invention provides an epitaxial wafer manufacturing method including a step of epitaxially growing a p-type layer on a substrate made of a compound semiconductor by a hydride vapor phase growth method. Provided is a method for manufacturing an epitaxial wafer, wherein a p-type dopant gas is allowed to flow more at the time of raising the temperature of the substrate before starting epitaxial growth than at the time of epitaxial growth of the p-type layer.

As described above, in the step of p-type epitaxial growth by the hydride vapor phase growth method, the p-type dopant gas is allowed to flow more than the flow rate during epitaxial growth when the substrate temperature is raised before the epitaxial growth of the p-type layer is started.
As a result, the p-type dopant is supplied to the growth interface so as to offset the contaminated Si (acting as an n-type dopant) at the growth interface between the substrate and the p-type layer, so that a p-type high resistance layer is formed at the growth interface. It can suppress that compared with the past. In addition, the forward voltage of the light-emitting element manufactured from the epitaxial wafer obtained by such a manufacturing method can be suppressed lower than the conventional one, the product yield can be improved, and the manufacturing cost can be reduced. Can do.

Here, it is preferable that the flow rate of the p-type dopant gas at the time of raising the temperature of the substrate is 1.1 to 20 times the flow rate at the time of epitaxial layer growth of the p-type layer.
In this way, by flowing the p-type dopant gas at a flow rate of 1.1 to 20 times the flow rate during epitaxial growth when the temperature is raised, the forward voltage (Vf) at the time of driving the obtained light emitting element is more reliably lowered. Therefore, the production yield can be further improved. A flow rate exceeding 20 times consumes p-type dopant gas more than necessary, which is not preferable from the viewpoint of cost.

Further, as the substrate, a substrate in which at least a light emitting layer and a p-type first current diffusion layer are epitaxially grown by a metal organic vapor phase epitaxy method on a substrate made of a single compound semiconductor is used. As the mold layer, it is preferable to epitaxially grow the p-type second current diffusion layer by the hydride vapor phase growth method.
Thus, the p-type high resistance layer is formed by epitaxially growing the p-type second current diffusion layer as a p-type layer on the substrate by the hydride vapor phase growth method. A thick current diffusion layer can be epitaxially grown at a high speed without being formed. Therefore, it is possible to efficiently improve the light extraction efficiency, and it is possible to more efficiently manufacture an epitaxial wafer that can manufacture a high-luminance light emitting element.

Then, the light-emitting layer, the composition formula _{(Al x Ga 1-x)} y In 1-y P ( However, 0 ≦ x ≦ 1,0 ≦ y ≦ 1) is constituted by represented by compound n It is preferable that the type cladding layer, the active layer, and the p-type cladding layer have a double hetero structure in which the layers are stacked in this order.
As described above, by forming the light emitting layer as described above, an epitaxial wafer having high light emission luminance and low forward voltage (Vf) can be manufactured.

Furthermore, the substrate made of the compound semiconductor alone is preferably a GaAs substrate.
Thus, if the substrate made of a compound semiconductor alone is a GaAs substrate, the light emitting layer can be easily grown because the lattice constant coincides with that of the light emitting layer.

Moreover, it is preferable that the p-type first current diffusion layer and the p-type second current diffusion layer are made of either GaP or GaAsP.
As described above, when the p-type first current diffusion layer and the p-type second current diffusion layer are made of either GaP or GaAsP, the emission luminance can be further increased.

The flow rate of the p-type dopant gas at the time of raising the temperature of the substrate is preferably 1.5 to 20 times the flow rate at the time of epitaxial growth of the p-type layer.
In this way, by flowing the p-type dopant gas at a flow rate of 1.5 to 20 times the flow rate during epitaxial growth when the substrate is heated, the formation of the p-type high resistance layer at the growth interface can be suppressed more reliably.

Furthermore, it is preferable to use DMZn as the p-type dopant gas.
Thus, if the p-type dopant gas is DMZn, the p-type dopant can be easily supplied.

  As described above, the epitaxial wafer manufacturing method of the present invention allows contamination of Si (n-type dopant) at the growth interface by flowing more p-type dopant gas at the time of temperature rise before epitaxial growth of the p-type layer than at the time of epitaxial growth. P-type dopant can be supplied to the growth interface so as to cancel out the above. For this reason, the possibility that a p-type high resistance layer is formed at the growth interface can be reduced as compared with the prior art, and the driving voltage of a semiconductor element manufactured from an epitaxial wafer manufactured by such a method can be reduced. Compared to, it can be kept low.

It is the process flow which showed an example of the manufacturing method of the epitaxial wafer of this invention. It is the figure which showed an example of the outline of the light emitting element manufactured from the epitaxial wafer of this invention. It is the schematic diagram which showed an example of the HVPE furnace used with the manufacturing method of the epitaxial wafer of this invention. FIG. 3 is a diagram showing the relationship between the maximum value, the average value, and the minimum value of Vf of the epitaxial wafer of Example 1-3 and Comparative Example 1.

  Hereinafter, the present invention will be described in detail with reference to the drawings, but the present invention is not limited thereto. FIG. 1 is a process flow showing an example of a method for manufacturing an epitaxial wafer of the present invention, and FIG. 2 is a diagram showing an example of a schematic of a light emitting device manufactured from the epitaxial wafer of the present invention.

  First, as shown in step (a) of FIG. 1, an n-type GaAs buffer layer 12 is grown on the GaAs single crystal substrate 11 by 0.5 μm, for example.

Next, as shown in step (b) of FIG. 1, (Al _x Ga _1-x ) _y In _1-y P (where 0 ≦ x ≦ 1) is formed on the n-type GaAs buffer layer 12 as the light emitting layer 13. , 0 ≦ y ≦ 1), for example, an n-type cladding layer 13a having a thickness of 0.8 to 4 μm, an active layer 13b having a thickness of 0.4 to 2 μm, and a p-type cladding layer 13c having a thickness of 0.8 to 4 μm Are epitaxially grown in this order. In the light emitting layer 13, the surface on the p-type AlGaInP cladding layer side is the first main surface.

The epitaxial growth of each of the above layers can be performed by a known metal organic chemical vapor deposition (MOVPE) method.
The manufacturing conditions for forming the epitaxial layer of each layer can be appropriately selected depending on the thickness of the desired epitaxial layer and the composition ratio.
The following materials can be used as source gases for the source of each component of Al, Ga, In (indium), and P (phosphorus).
-Al source gas; trimethylaluminum (TMAl), triethylaluminum (TEAl), etc.
Ga source gas: trimethylgallium (TMGa), triethylgallium (TEGa), etc.
In source gas: trimethylindium (TMIn), triethylindium (TEIn), etc.
P source gas: trimethyl phosphorus (TMP), triethyl phosphorus (TEP), phosphine (PH ₃ ), etc.

Moreover, the following can be used as dopant gas.
(P-type dopant)
Mg source: biscyclopentadienyl magnesium (Cp ₂ Mg), etc.
Zn source: dimethyl zinc (DMZn), diethyl zinc (DEZn), etc.
(N-type dopant)
Si source: silicon hydride such as monosilane.

  Next, as shown in step (c) of FIG. 1, a p-type first current diffusion layer 14 made of, for example, p-type GaP is heteroepitaxially grown on the p-type AlGaInP cladding layer 13c by metal organic chemical vapor deposition. Then, an MO epitaxial wafer (substrate) is obtained.

Next, the MO epitaxial wafer is put into an HVPE furnace, and the substrate is heated to an epitaxial growth temperature (for example, 640 to 860 ° C.) in order to epitaxially grow the p-type second current diffusion layer by the HVPE method.
In the present invention, more p-type dopant gas is allowed to flow than at the time of epitaxial growth of the p-type second current diffusion layer.

In particular, in the process from the introduction of the substrate into the HVPE furnace to the temperature rise to the growth temperature to the start of the epitaxial growth, a silicon (Si) furnace from a quartz reaction part such as a growth vessel or a susceptor that supports the substrate. The concentration in the substrate is high, and it adheres to the surface (growth interface) of the substrate when the temperature is raised, and acts as an n-type dopant.
However, as in the present invention, at the time of this temperature rise, the p-type dopant is grown so as to offset the Si at the growth interface by flowing more p-type dopant gas than the p-type dopant gas that is flowed during growth. Since it is supplied to the interface, the formation of the p-type high resistance layer at the growth interface can be strongly suppressed as compared with the conventional case. And the drive voltage of the semiconductor element manufactured from the epitaxial wafer manufactured by such a method can be restrained low compared with the conventional one, and the product yield can be improved.

Here, FIG. 3 is a schematic view showing an example of an HVPE furnace used in the hydride vapor phase growth process of the present invention.
The HVPE furnace 30 has a growth vessel 35 composed of a first chamber in which a crucible 32 for storing a Ga melt 33 is disposed and a second chamber in which a susceptor 31 made of, for example, quartz holding a substrate W is stored. The first chamber and the second chamber are made of quartz together with the crucible 32, and each is heated by an individual heater 36.
When the p-type layer is epitaxially grown using such an HVPE furnace 30, the inside of the first chamber and the second chamber is heated to an appropriate growth temperature so that the HVPE reaction proceeds sufficiently, and the growth vessel For example, hydrogen chloride gas, carrier gas, P source gas, and p-type dopant gas are introduced into the gas 35 from the gas inlet 34 to epitaxially grow the p-type GaP layer.

In this case, the ratio of the flow rate of the p-type dopant gas at the time of temperature rise and growth can be 1.1 to 20 times, preferably 1.5 to 20 times, more preferably 1.5 to 3 times. .
Thus, by flowing the p-type dopant gas at a flow rate of 1.1 to 20 times, particularly 1.5 to 20 times the flow rate during epitaxial growth when the temperature is raised, the substrate and the p-type layer are more reliably connected. The formation of the p-type high resistance layer at the growth interface can be suppressed, and the forward voltage (Vf) during driving of the obtained light emitting element can be more reliably suppressed to a low level. Further, it is possible to suppress the p-type dopant gas from flowing more than necessary, to suppress an increase in the amount of gas used more than necessary, and to prevent an increase in manufacturing cost.

The p-type dopant gas may be dimethyl zinc (DMZn), diethyl zinc (DEZn), or the like.
As described above, as the p-type dopant gas, dimethyl zinc (DMZn), diethyl zinc (DEZn), particularly dimethyl zinc (DMZn), which is easy to obtain a high-purity raw material, is used, so that a higher purity and higher quality epitaxial wafer can be obtained. Can be obtained.

Next, as shown in step (d) of FIG. 1, when the substrate reaches a predetermined temperature, the flow rate of the p-type dopant gas is decreased, and the p-type first current diffusion layer 14 of the MO epitaxial wafer is formed on the p-type. A p-type second current diffusion layer 15 made of, for example, thick p-type GaP as a layer is epitaxially grown by a hydride vapor phase growth method.
Specifically, this HVPE method introduces hydrogen chloride onto the metal Ga while heating and maintaining the metal Ga, which is a group III element, at a predetermined temperature in the container, and the reaction of the following formula (1) Then, GaCl is generated and supplied onto the substrate together with H ₂ gas which is a carrier gas.
Ga (liquid) + HCl (gas) → GaCl (gas) + 1 / 2H ₂ (gas) (1)
The growth temperature is set to, for example, 640 ° C. or more and 860 ° C. or less. P, which is a group V element, supplies PH ₃ onto the substrate together with H _2, which is a carrier gas. Furthermore, Zn which is a p-type dopant is supplied in the form of DMZn (dimethyl Zn).
GaCl (gas) + PH ₃ (gas)
→ GaP (solid) + HCl (gas) + H ₂ (gas) (2)

  When the above step (d) is completed, the epitaxial wafer 10 of the present invention is completed.

  In the above example, the case where GaAs is used for the substrate and GaP is used for the p-type first current diffusion layer and the p-type second current diffusion layer has been described. However, the present invention is not limited thereto, and GaAsP is used as the window layer. A substrate suitable for forming a light emitting layer or a current diffusion layer can be used as appropriate.

Thereafter, the first electrode 21 is formed on the p-type second current diffusion layer 15 and the second electrode 22 is formed on the n-type GaAs substrate 11 by vacuum deposition, and a bonding pad is further disposed on the first electrode 21. Then, sintering for electrode fixing is performed at an appropriate temperature.
Thereafter, the chip is formed by dicing, and the second electrode 22 is fixed to a terminal electrode (not shown) that also serves as a support using a conductive paste such as an Ag paste, while being made of Au in a form extending over a bonding pad and another terminal electrode. The light emitting element 20 as shown in FIG. 2 is obtained by bonding these wires and further forming a resin mold.

EXAMPLES Hereinafter, although an Example and a comparative example are shown and this invention is demonstrated more concretely, this invention is not limited to these.
(Example 1-3)
In accordance with the process of FIG. 1 which is the manufacturing method of the epitaxial wafer of the present invention described above, after growing an n-type GaAs buffer layer by 0.5 μm on an n-type GaAs substrate having a thickness of 280 μm, an AlGaInP light emitting layer is formed by 8 μm by MOVPE Then, a first current diffusion layer made of p-type GaP was formed to 1 μm.
A plurality of MO epitaxial wafers manufactured in the above steps are transferred to an HVPE furnace, nitrogen (N ₂ ) gas is introduced into the HVPE furnace for 20 minutes, air is sufficiently replaced and removed, and high purity hydrogen (H ₂ ) was introduced, N ₂ was stopped, and the heating operation was started.

During this temperature raising operation, DMZ which is a p-type dopant doping gas is 8 cc / min (Example 1), 10 cc / min (Example 2), 20 cc / min (Example 3) from 2 minutes before the start of epitaxial growth. ) In the HVPE furnace.
Then, introduction of high-purity hydrogen phosphide gas (PH ₃ ) is started, and after reaching a predetermined temperature, high-purity hydrogen chloride gas is blown into the Ga reservoir in the quartz boat to generate GaCl. Vapor phase growth of a GaP epitaxial layer having the same composition as the outermost surface (p-type GaP) was performed.
Further, simultaneously with the flow of hydrogen chloride gas, the DMZn flow rate was lowered to 6 cc / min for obtaining a predetermined carrier concentration.

Then, for a time corresponding to the target epi thickness (150 μm), HCl, PH ₃ and DMZn gas were flowed to perform epitaxial growth of the p-type GaP layer, thereby manufacturing an epitaxial wafer.

Thereafter, a first electrode and a second electrode are formed on the epitaxial wafer of Example 1-3 by vacuum deposition, and a bonding pad is further disposed on the first electrode, and electrode fixing sintering is performed at an appropriate temperature. After that, a plurality of light emitting elements were obtained by dicing into chips.
Then, a forward current Vf was measured and evaluated by applying a current of 20 mA to each of the manufactured light emitting elements of Example 1-3 with a constant current power source. The result is shown in FIG.

(Comparative Example 1)
An epitaxial wafer and a light emitting device were manufactured in the same manner as in Example 1 except that the flow rate of DMZn from 6 minutes before the start of epitaxial growth was 6 cc / min and the flow rate of DMZn gas was not changed when hydrogen chloride gas was flown. And evaluation similar to Example 1-3 was performed and the result was shown in FIG.

As shown in FIG. 4, in Example 1, (maximum value) 2.31 V (average value) 2.04 V (minimum value) 1.91 V (standard deviation) 0.128 V, and in Example 2 (maximum value) 2. 01V (average value) 1.96V (minimum value) 1.94V (standard deviation) 0.013V, in Example 3 (maximum value) 1.98V (average value) 1.96V (minimum value) 1.96V (standard) Deviation) was 0.006V, while in Comparative Example 1, (maximum value) 2.91V (average value) 2.16V (minimum value) 1.93V (standard deviation) 0.287V.
As described above, according to the epitaxial wafer manufacturing method of the present invention, it was found that an increase in Vf due to Si contamination can be suppressed, and variations in forward voltage can be reduced.

  The present invention is not limited to the above embodiment. The above-described embodiment is an exemplification, and the present invention has any configuration that has substantially the same configuration as the technical idea described in the claims of the present invention and that exhibits the same effects. Are included in the technical scope.

10: Epitaxial wafer,
DESCRIPTION OF SYMBOLS 11 ... GaAs substrate, 12 ... GaAs buffer layer, 13 ... Light emitting layer, 13a ... N-type clad layer, 13b ... Active layer, 13c ... P-type clad layer, 14 ... P-type 1st electric current diffusion layer (p-type GaP layer) 15 ... p-type second current diffusion layer (p-type GaP layer),
20 ... Light-emitting element, 21 ... First electrode, 22 ... Second electrode,
DESCRIPTION OF SYMBOLS 30 ... HVPE furnace, 31 ... Susceptor, 32 ... Crucible, 33 ... Ga melt, 34 ... Gas introduction port, 35 ... Growth container, 36 ... Heater, W ... Substrate.

Claims (8)

An epitaxial wafer manufacturing method comprising a step of epitaxially growing a p-type layer on a substrate made of a compound semiconductor at least by a hydride vapor phase growth method,
A method of manufacturing an epitaxial wafer, wherein a larger amount of p-type dopant gas is allowed to flow at the time of temperature rise of the substrate before starting the epitaxial growth of the p-type layer than at the time of epitaxial growth of the p-type layer.   2. The epitaxial wafer according to claim 1, wherein a flow rate of the p-type dopant gas at the time of raising the temperature of the substrate is 1.1 to 20 times a flow rate at the time of epitaxial layer growth of the p-type layer. Production method. As the substrate, at least a light emitting layer and a p-type first current diffusion layer are epitaxially grown on a substrate made of a compound semiconductor alone by metal organic chemical vapor deposition,
3. The method for manufacturing an epitaxial wafer according to claim 1, wherein a p-type second current diffusion layer is epitaxially grown on the substrate as the p-type layer by the hydride vapor phase growth method. 4. An n-type cladding in which the light-emitting layer is composed of a compound represented by a composition formula (Al _x Ga _1-x ) _y In _1-y P (where 0 ≦ x ≦ 1, 0 ≦ y ≦ 1) 4. The method for producing an epitaxial wafer according to claim 3, wherein the layer, the active layer, and the p-type cladding layer have a double hetero structure in which the layers are laminated in this order.   5. The method for manufacturing an epitaxial wafer according to claim 3, wherein the substrate made of a single compound semiconductor is a GaAs substrate.   The said p-type 1st current spreading layer and the said p-type 2nd current spreading layer shall consist of either GaP or GaAsP, The any one of Claim 3 thru | or 5 characterized by the above-mentioned. Epitaxial wafer manufacturing method.   The flow rate of the p-type dopant gas at the time of raising the temperature of the substrate is 1.5 to 20 times the flow rate at the time of epitaxial growth of the p-type layer. The method for producing an epitaxial wafer according to claim 1.   8. The method for producing an epitaxial wafer according to claim 1, wherein DMZn is used as the p-type dopant gas.

Images