JP2011249475A - Power semiconductor device - Google Patents

Power semiconductor device Download PDF

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JP2011249475A
JP2011249475A JP2010119603A JP2010119603A JP2011249475A JP 2011249475 A JP2011249475 A JP 2011249475A JP 2010119603 A JP2010119603 A JP 2010119603A JP 2010119603 A JP2010119603 A JP 2010119603A JP 2011249475 A JP2011249475 A JP 2011249475A
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power semiconductor
semiconductor device
shunt resistor
resistor
current
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JP5445329B2 (en
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Hiromasa Hayashi
敬昌 林
Toshihiro Fujita
敏博 藤田
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Denso Corp
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Denso Corp
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    • H01L2224/48139—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate with an intermediate bond, e.g. continuous wire daisy chain
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  • Engineering & Computer Science (AREA)
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  • Power Engineering (AREA)
  • Inverter Devices (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide a compact power semiconductor device suitable for controlling a large current as compared with a prior art.SOLUTION: A power semiconductor device 100 comprises a vertical power semiconductor element 30 having main electrodes formed on both surfaces of a semiconductor substrate 31 and controlling a current flowing between the main electrodes, a shunt resistor 40 which detects the current, and bases 51 and 52 made of a metal and on which the power semiconductor element 30 and the shunt resistor 40 are mounted. The shunt resistor 40 is a chip resistor 41 having end face electrodes 42a and 42b formed on both surfaces facing each other. Each of the power semiconductor element 30 and the chip resistor 41 is mounted on the separated different bases while bonding the main electrode and one of the end face electrodes, and the chip resistor 41 feeds a current through the end face electrodes 42a and 42b on both surfaces in the direction perpendicular to the mounting surface of the base 52. The power semiconductor device 100 is vertically arranged.

Description

本発明は、半導体基板の両表面に形成された主電極間に流れる電流を制御する縦型の電力半導体素子と、前記電流を検出するためのシャント抵抗とを有してなる電力半導体装置に関する。   The present invention relates to a power semiconductor device having a vertical power semiconductor element for controlling a current flowing between main electrodes formed on both surfaces of a semiconductor substrate, and a shunt resistor for detecting the current.

電流を検出するためのシャント抵抗として利用可能な電子部品が、例えば、特許第３６７０５９３号公報（特許文献１）に開示されている。   An electronic component that can be used as a shunt resistor for detecting current is disclosed in, for example, Japanese Patent No. 3670593 (Patent Document 1).

図５は、特許文献１に開示されている電流検出用の電子部品６００の構造を示した図である。電子部品６００は、抵抗器（シャント抵抗）５００を専用基板５８０上に搭載してモジュール化したものである。基板５８０には、電極５２１、５２２よりも高い比抵抗を有する絶縁体５８３上に、銅材料などからなる複数の配線用パターン５６１、５６２、５７１、５７２が形成されている。また、抵抗器５００の電極５２１、５２２は、それぞれの対向する位置にある各配線パターン５６１、５６２と溶融はんだ膜５３１、５３２で直接接続されており、さらに抵抗体の５４２と５４３の位置において、電圧測定用のワイヤ５８１、５８２を介して基板５８０の各配線パターン５７１、５７２と接続されている。   FIG. 5 is a view showing the structure of an electronic component 600 for current detection disclosed in Patent Document 1. As shown in FIG. The electronic component 600 is a module in which a resistor (shunt resistor) 500 is mounted on a dedicated substrate 580. On the substrate 580, a plurality of wiring patterns 561, 562, 571, and 572 made of a copper material or the like are formed on an insulator 583 having a higher specific resistance than the electrodes 521 and 522. Further, the electrodes 521 and 522 of the resistor 500 are directly connected to the respective wiring patterns 561 and 562 at the respective opposed positions by the molten solder films 531 and 532, and further at the positions of the resistors 542 and 543, The wiring patterns 571 and 572 of the substrate 580 are connected via voltage measuring wires 581 and 582.

なお図５における抵抗体５１０にワイヤを接続する５４２と５４３の位置は、抵抗体の両端部に電極５２１、５２２が配置された第１面に対向する抵抗体の第二の面でかつ電極の電流の向きに沿う長さの１／２よりも外側の位置であり、この５４２と５４３の位置で電圧測定用のワイヤ５８１、５８２を接続する。   Note that the positions of 542 and 543 connecting the wires to the resistor 510 in FIG. 5 are the second surface of the resistor facing the first surface where the electrodes 521 and 522 are arranged at both ends of the resistor and the electrode The voltage measurement wires 581 and 582 are connected at positions 542 and 543 that are positions outside ½ of the length along the current direction.

特許第３６７０５９３号公報Japanese Patent No. 3670593

図５に示す電流検出用の電子部品６００の構造は、抵抗体５１０の下部に設けられた電極５２１、５２２を介して図の横方向に電流を流し、抵抗体５１０の上部の５４２と５４３の位置にボンディングされているワイヤ５８１、５８２を介して該抵抗体５１０の両端電圧がセンシングされる。従って、図５にある抵抗器（シャント抵抗）５００の構造は、横長の抵抗体５１０を基板５８０と平行になるように配置して、電流を抵抗体５１０の長手方向に流す横型の構造である。このような横型構造では、基板５８０に２箇所のランド配線パターン５６１、５６２を設ける必要があり、これによって実装面積が広くなる。また、このような横型の抵抗器５００をシャント抵抗として用いる場合、小さな電流の検出には適しているが、例えば２０Ａ以上もあるような、大電流の検出には適していない。大電流の検出には小さな抵抗値の抵抗体が必要となるが、図５の横長の抵抗体５１０と逆に、電流を流す方向の長さを短くするか断面積を大きくする必要がある。従って、このような形状の抵抗体で図５の横型構造を取ることは、電極同士の間隔が狭まって実装が困難になったり、基板に対する占有面積や高さが増大したりして現実的でない。   In the structure of the electronic component 600 for current detection shown in FIG. 5, current flows in the horizontal direction of the figure via the electrodes 521 and 522 provided in the lower part of the resistor 510, and 542 and 543 on the upper part of the resistor 510. The voltage across the resistor 510 is sensed via the wires 581 and 582 bonded to the positions. Accordingly, the structure of the resistor (shunt resistor) 500 shown in FIG. 5 is a horizontal structure in which a horizontally long resistor 510 is arranged in parallel with the substrate 580 and current flows in the longitudinal direction of the resistor 510. . In such a horizontal structure, it is necessary to provide two land wiring patterns 561 and 562 on the substrate 580, which increases the mounting area. Further, when such a horizontal resistor 500 is used as a shunt resistor, it is suitable for detecting a small current, but is not suitable for detecting a large current such as 20 A or more. In order to detect a large current, a resistor having a small resistance value is required. However, contrary to the horizontally long resistor 510 in FIG. 5, it is necessary to shorten the length in the direction of current flow or to increase the cross-sectional area. Therefore, it is not practical to adopt the horizontal structure shown in FIG. 5 with a resistor having such a shape, because the distance between the electrodes becomes narrow and mounting becomes difficult, and the occupied area and height with respect to the substrate increase. .

そこで本発明は、半導体基板の両表面に形成された主電極間に流れる電流を制御する縦型の電力半導体素子と、前記電流を検出するためのシャント抵抗とを有してなる電力半導体装置であって、従来に較べてより大きな電流の制御に適する小型の電力半導体装置を提供することを目的としている。   Accordingly, the present invention provides a power semiconductor device having a vertical power semiconductor element for controlling a current flowing between main electrodes formed on both surfaces of a semiconductor substrate, and a shunt resistor for detecting the current. Therefore, an object of the present invention is to provide a small-sized power semiconductor device that is suitable for controlling a larger current than in the past.

請求項１に記載の電力半導体装置は、半導体基板の両表面に主電極が形成されてなり、該主電極間に流れる電流を制御する縦型の電力半導体素子と、前記電流を検出するためのシャント抵抗と、前記電力半導体素子および前記シャント抵抗を搭載するための金属でできた台座とを有してなる電力半導体装置であって、前記シャント抵抗が、対向する両表面に端面電極が形成されてなるチップ抵抗であり、前記電力半導体素子と前記チップ抵抗が、それぞれ前記主電極と前記端面電極の一方を互いに分離された別の台座に接合して搭載され、前記チップ抵抗が、前記両表面の端面電極を介して前記台座の搭載面に対して垂直方向に電流を流す、縦型に配置されてなることを特徴としている。   The power semiconductor device according to claim 1, wherein a main electrode is formed on both surfaces of a semiconductor substrate, a vertical power semiconductor element for controlling a current flowing between the main electrodes, and for detecting the current A power semiconductor device comprising a shunt resistor and a pedestal made of metal for mounting the power semiconductor element and the shunt resistor, wherein the shunt resistor is formed with end electrodes on both surfaces facing each other. The power semiconductor element and the chip resistor are mounted by bonding one of the main electrode and the end face electrode to another pedestal separated from each other, and the chip resistor is mounted on both surfaces. It is characterized by being arranged in a vertical shape in which current flows in a direction perpendicular to the mounting surface of the pedestal via the end face electrode.

上記電力半導体装置は、半導体基板の両表面に形成された主電極間に流れる電流を制御する縦型の電力半導体素子と、前記電流を検出するためのシャント抵抗と、例えばリードフレームから切り出される金属でできた電力半導体素子およびシャント抵抗を搭載するための台座を有してなる電力半導体装置である。   The power semiconductor device includes a vertical power semiconductor element that controls a current flowing between main electrodes formed on both surfaces of a semiconductor substrate, a shunt resistor for detecting the current, and a metal cut from a lead frame, for example. This is a power semiconductor device having a pedestal for mounting the power semiconductor element and the shunt resistor.

上記電力半導体装置は、チップ抵抗の対向する両表面に端面電極を形成し、該端面電極の一方を台座に接合して、台座の搭載面に対して垂直方向に電流を流す、縦型の配置としている。従って、上記電力半導体装置は、２個のランド（台座）が必要な基板の搭載面に対して平行方向（横方向）に電流を流す従来のシャント抵抗と異なり、チップ抵抗を搭載するための台座が１個で済むため、シャント抵抗（チップ抵抗）の占有面積を小さくすることができる。   The power semiconductor device has a vertical arrangement in which end electrodes are formed on both opposing surfaces of a chip resistor, one of the end electrodes is joined to a pedestal, and current flows in a direction perpendicular to the mounting surface of the pedestal. It is said. Therefore, the power semiconductor device is different from a conventional shunt resistor that allows current to flow in a direction parallel to the mounting surface of a substrate that requires two lands (pedestals), and a pedestal for mounting chip resistors. Therefore, the area occupied by the shunt resistor (chip resistor) can be reduced.

また、上記電力半導体装置は、電力半導体素子とチップ抵抗をそれぞれ互いに分離された別の台座に搭載する構成をとっている。このため、電力半導体素子およびシャント抵抗のそれぞれの台座への搭載が容易であると共に、電力半導体素子およびシャント抵抗で発生する熱をそれぞれの台座へ逃がすことができるため、放熱性も高めることができ、大きな電流の検出に対応することができる。   The power semiconductor device has a configuration in which the power semiconductor element and the chip resistor are mounted on separate pedestals that are separated from each other. Therefore, it is easy to mount the power semiconductor element and the shunt resistor on each pedestal, and heat generated by the power semiconductor element and the shunt resistor can be released to each pedestal. Therefore, it can cope with detection of a large current.

上記電力半導体装置は、請求項２に記載のように、前記チップ抵抗が、合金材料からなり、抵抗値が０．３ｍΩ以上、１ｍΩ以下である構成とすることが好ましい。   The power semiconductor device preferably has a configuration in which the chip resistance is made of an alloy material and has a resistance value of 0.3 mΩ or more and 1 mΩ or less.

該抵抗値を持つチップ抵抗は、１００Ａ程度の大電流を流しても発熱量が小さく、例えば比抵抗が１μΩ・ｃｍ程度の合金材料を用いれば、占有面積が電力半導体素子と同程度の略立方体形状とすることができ、占有面積を増大することなく、大きな電流の検出に対応することができる。   The chip resistor having such a resistance value generates a small amount of heat even when a large current of about 100 A is passed. For example, if an alloy material having a specific resistance of about 1 μΩ · cm is used, the chip area is approximately the same as that of a power semiconductor element. It can be shaped, and it can cope with detection of a large current without increasing the occupied area.

請求項３に記載のように、上記電力半導体装置におけるチップ抵抗の合金材料は、抵抗温度係数が小さい、鉄−クロム（Ｆｅ−Ｃｒ）合金または銅−ニッケル（Ｃｕ−Ｎｉ）合金であることが好ましい。   According to a third aspect of the present invention, the alloy material of the chip resistance in the power semiconductor device is an iron-chromium (Fe-Cr) alloy or a copper-nickel (Cu-Ni) alloy having a small resistance temperature coefficient. preferable.

請求項４に記載のように、上記電力半導体装置におけるチップ抵抗の端面電極は、はんだ接合に適するニッケル（Ｎｉ）めっき層またはニッケル−燐（Ｎｉ−Ｐ）めっき層からなることが好ましい。   According to a fourth aspect of the present invention, the end surface electrode of the chip resistor in the power semiconductor device is preferably made of a nickel (Ni) plating layer or a nickel-phosphorus (Ni-P) plating layer suitable for solder bonding.

以上のようにして、上記電力半導体装置は、半導体基板の両表面に形成された主電極間に流れる電流を制御する縦型の電力半導体素子と、前記電流を検出するためのシャント抵抗とを有してなる電力半導体装置であって、従来に較べてより大きな電流の制御に適する小型の電力半導体装置とすることができる。   As described above, the power semiconductor device has the vertical power semiconductor element that controls the current flowing between the main electrodes formed on both surfaces of the semiconductor substrate, and the shunt resistor for detecting the current. Thus, the power semiconductor device can be a small-sized power semiconductor device suitable for controlling a larger current than the conventional one.

従って、上記電力半導体装置は、特に請求項５に記載のように、上記した従来のシャント抵抗では対応できない、前記電流の最大値が、２０Ａ以上である場合に好適である。   Therefore, the power semiconductor device is suitable particularly when the maximum value of the current is 20 A or more, which cannot be handled by the conventional shunt resistor as described in claim 5.

上記電力半導体装置においては、請求項６に記載のように、前記台座に接合されていない前記電力半導体素子のもう一方の主電極と前記シャント抵抗のもう一方の電極とが、ボンディングワイヤによって電気接続されてなる構成とすることが好ましい。これによれば、制御する電流の最大値に応じてボンディングワイヤの太さや接続本数を適宜設定するだけで、広範囲の電流に対応可能である。   In the power semiconductor device, as described in claim 6, the other main electrode of the power semiconductor element not joined to the pedestal and the other electrode of the shunt resistor are electrically connected by a bonding wire. It is preferable that the configuration is made. According to this, it is possible to cope with a wide range of currents by simply setting the thickness of the bonding wire and the number of connections according to the maximum value of the current to be controlled.

従って、特に制御する電流が大きい場合には、請求項７に記載のように、前記ボンディングワイヤが、複数本、並列に接続されてなる構成とすることが好ましい。   Therefore, in particular, when the current to be controlled is large, it is preferable that a plurality of the bonding wires are connected in parallel as described in claim 7.

上記複数本のボンディングワイヤを並列に接続する構成とすることで、ボンディングワイヤに加わる荷重と電力が分散されるため、ボンディングワイヤ１本当たりに加わる荷重と電力を小さくすることが可能となる。これによって、例えばシャント抵抗を台座に接続するはんだ等の接合層にクラックが入るダメージを低減することができる。その他にも、電力半導体素子のセルに加わる荷重と電力も分散されるため、セルへのダメージを低減することができる。   By adopting a configuration in which the plurality of bonding wires are connected in parallel, the load and power applied to the bonding wires are dispersed, so that the load and power applied to each bonding wire can be reduced. Thereby, for example, it is possible to reduce damage caused by cracks in a bonding layer such as solder that connects the shunt resistor to the pedestal. In addition, since the load and power applied to the cell of the power semiconductor element are also dispersed, damage to the cell can be reduced.

上記ボンディングワイヤは、請求項８に記載のように、安価なアルミニウム（Ａｌ）またはアルミニウム（Ａｌ）合金からなることが好ましい。   Preferably, the bonding wire is made of inexpensive aluminum (Al) or aluminum (Al) alloy.

上記電力半導体装置は、例えば請求項９に記載のように、前記シャント抵抗の両端電圧を検出するためのボンディングによるセンシングワイヤが、該シャント抵抗の一方の端面電極が接合された台座および該シャント抵抗のもう一方の端面電極からそれぞれ引き出されて、リード端子に接続されてなる構成とすることができる。これによって、前記電流を検出するためのシャント抵抗の両端電圧を、外部に容易に取り出すことができる。   The power semiconductor device includes, for example, a sensing wire by bonding for detecting a voltage at both ends of the shunt resistor, a base on which one end face electrode of the shunt resistor is bonded, and the shunt resistor. Each of the other end face electrodes can be drawn out and connected to a lead terminal. As a result, the voltage across the shunt resistor for detecting the current can be easily taken out to the outside.

この場合には、請求項１０に記載のように、前記シャント抵抗が接合される台座において、前記シャント抵抗の接合部位と前記センシングワイヤのボンディング部位の間に、仕切溝が形成されてなることが好ましい。   In this case, as described in claim 10, in the pedestal to which the shunt resistor is joined, a partition groove may be formed between the joint portion of the shunt resistor and the bonding portion of the sensing wire. preferable.

これによれば、シャント抵抗の接合部位とセンシングワイヤのボンディング部位とが、上記仕切溝によって分離された状態となる。このため、シャント抵抗の一方の端面電極を台座にはんだで接合する場合において、該はんだのセンシングワイヤのボンディング部位への流れ込みを抑制することができ、該はんだの流れ込みによるボンディング不良を防止することができる。   According to this, the junction part of shunt resistance and the bonding part of a sensing wire will be in the state isolate | separated by the said partition groove | channel. For this reason, when one end face electrode of the shunt resistor is joined to the pedestal with solder, it is possible to suppress the solder from flowing into the bonding portion of the sensing wire, and to prevent bonding failure due to the solder flowing in. it can.

また、上記電力半導体装置は、請求項１１に記載のように、前記シャント抵抗が接合される台座と第１のリード端子とが、一体に形成されてなり、前記台座に接合されていない前記シャント抵抗のもう一方の端面電極から、該シャント抵抗の両端電圧を検出するためのボンディングによるセンシングワイヤが引き出されて、第２のリード端子に接続されてなる構成としてもよい。これによれば、１本のセンシングワイヤのボンディングで済むため、製造工数と製造コストの低減が可能である。   The power semiconductor device according to claim 11, wherein the base to which the shunt resistor is joined and the first lead terminal are integrally formed, and the shunt that is not joined to the base. A sensing wire by bonding for detecting the voltage across the shunt resistor may be drawn from the other end face electrode of the resistor and connected to the second lead terminal. According to this, since it suffices to bond one sensing wire, it is possible to reduce the number of manufacturing steps and the manufacturing cost.

請求項１２に記載のように、前記センシングワイヤも、安価なアルミニウム（Ａｌ）またはアルミニウム（Ａｌ）合金からなることが好ましい。   Preferably, the sensing wire is also made of inexpensive aluminum (Al) or aluminum (Al) alloy.

上記電力半導体装置においては、電力半導体素子およびシャント抵抗の上面にある主電極および端面電極に、例えば前記ボンディングワイヤやセンシングワイヤが接続される。従って、該ボンディングワイヤやセンシングワイヤを保護するため、上記上記電力半導体装置は、ゲル封止パッケージやモールド樹脂封止パッケージとすることが望ましい。   In the power semiconductor device, for example, the bonding wire or the sensing wire is connected to the main electrode and the end surface electrode on the upper surface of the power semiconductor element and the shunt resistor. Therefore, in order to protect the bonding wires and sensing wires, the power semiconductor device is preferably a gel sealing package or a mold resin sealing package.

特に、請求項１３に記載のように、前記台座の前記電力半導体素子および／または前記シャント抵抗が搭載された面と反対側の面を露出するようにして、前記電力半導体装置が、モールド樹脂で樹脂封止されてなる構成とし、露出された前記台座の面を金属などに接触させることで、高い放熱性を確保することができる。   In particular, as described in claim 13, the power semiconductor device is made of mold resin so that the surface of the pedestal opposite to the surface on which the power semiconductor element and / or the shunt resistor is mounted is exposed. By adopting a resin-sealed configuration and bringing the exposed surface of the pedestal into contact with a metal or the like, high heat dissipation can be ensured.

以上のようにして、上記電力半導体装置は、半導体基板の両表面に形成された主電極間に流れる電流を制御する縦型の電力半導体素子と、前記電流を検出するためのシャント抵抗とを有してなる電力半導体装置であって、従来に較べてより大きな電流の制御に適する小型の電力半導体装置とすることができる。   As described above, the power semiconductor device has the vertical power semiconductor element that controls the current flowing between the main electrodes formed on both surfaces of the semiconductor substrate, and the shunt resistor for detecting the current. Thus, the power semiconductor device can be a small-sized power semiconductor device suitable for controlling a larger current than the conventional one.

従って、上記電力半導体装置は、請求項１４に記載のように、小型且つ低いバッテリ電圧で大きな電流の制御が必要となる、車両に搭載されるモータの駆動制御用として好適である。   Therefore, as described in claim 14, the power semiconductor device is suitable for drive control of a motor mounted on a vehicle that requires a small current and a large battery control with a low battery voltage.

このようなモータとして、請求項１５に記載のように、電動パワーステアリングまたはスタータのモータがある。例えば電動パワーステアリングのモータの駆動制御用途では、８０〜１００Ａの大電流を制御する必要があるため、電力半導体素子だけでなくシャント抵抗の発熱量も無視できなくなり、０．５〜１ｍΩ程度の極めて小さな低抵値のものが必要になる。上記電力半導体装置は、このような大電流の制御が必要となる電動パワーステアリングのモータの駆動制御用にも対応可能である。   As such a motor, there is an electric power steering or a starter motor. For example, in the drive control application of an electric power steering motor, since it is necessary to control a large current of 80 to 100 A, not only the power semiconductor element but also the amount of heat generated by the shunt resistor cannot be ignored, and it is extremely 0.5 to 1 mΩ. A small low resistance value is required. The power semiconductor device can also be used for driving control of a motor of an electric power steering that requires such a large current control.

本発明の一例である電力半導体装置１００の斜視図である。1 is a perspective view of a power semiconductor device 100 as an example of the present invention. 製造バラツキでチップ抵抗４１の抵抗値が設計値からずれたときの補正方法を説明する図で、チップ抵抗４１に流す電流（Ａ）とチップ抵抗４１の両端での検出電圧（ｍＶ）の関係を示した図である。It is a figure explaining the correction method when the resistance value of the chip resistor 41 deviates from the design value due to manufacturing variation, and shows the relationship between the current (A) flowing through the chip resistor 41 and the detection voltage (mV) at both ends of the chip resistor 41. FIG. 図１に示した電力半導体装置１００の変形例で、電力半導体装置１１０の斜視図である。FIG. 3 is a perspective view of a power semiconductor device 110 as a modification of the power semiconductor device 100 shown in FIG. 1. 図１に示した電力半導体装置１００の別の変形例で、電力半導体装置１１１の斜視図である。FIG. 10 is a perspective view of a power semiconductor device 111 as another modification of the power semiconductor device 100 shown in FIG. 1. 特許文献１に開示されている電流検出用の電子部品６００の構造を示した図である。It is the figure which showed the structure of the electronic component 600 for the electric current detection currently disclosed by patent document 1. FIG.

以下、本発明を実施するための形態を、図に基づいて説明する。   DESCRIPTION OF EMBODIMENTS Hereinafter, embodiments for carrying out the present invention will be described with reference to the drawings.

図１は、本発明の一例である電力半導体装置１００の斜視図である。   FIG. 1 is a perspective view of a power semiconductor device 100 as an example of the present invention.

図１に示す電力半導体装置１００は、電力半導体素子３０と、該電力半導体素子３０に流れる電流を検出するためのシャント抵抗４０と、金属でできた電力半導体素子３０およびシャント抵抗４０を搭載するための台座５１，５２とを有してなる電力半導体装置である。   A power semiconductor device 100 shown in FIG. 1 includes a power semiconductor element 30, a shunt resistor 40 for detecting a current flowing through the power semiconductor element 30, and a power semiconductor element 30 and a shunt resistor 40 made of metal. This is a power semiconductor device having the pedestals 51 and 52.

図１の電力半導体装置１００において、電力半導体素子３０およびシャント抵抗４０をそれぞれ搭載している台座５１，５２は、リードフレームから切り出されたもので、図１に示す符号５３ａ〜５３ｃは、同じリードフレームから切り出されたリード端子である。電力半導体素子３０およびシャント抵抗４０は、それぞれ、はんだ６１，６２によって台座５１，５２に接合固定されている。   In the power semiconductor device 100 of FIG. 1, the pedestals 51 and 52 on which the power semiconductor element 30 and the shunt resistor 40 are respectively mounted are cut out from the lead frame. Reference numerals 53a to 53c shown in FIG. Lead terminals cut out from the frame. The power semiconductor element 30 and the shunt resistor 40 are bonded and fixed to the pedestals 51 and 52 by solders 61 and 62, respectively.

電力半導体装置１００の構成要素である電力半導体素子３０は、半導体基板３１の両表面に主電極が形成され、該主電極間に流れる電流を制御する縦型の電力半導体素子である。図１の電力半導体素子３０は縦型のパワーＭＯＳトランジスタで、半導体基板３１の裏面側に隠れている下側の主電極は、ドレイン電極であり、上側の保護膜３３の開口部に露出する主電極３２ｂは、ソース電極である。下側の主電極は、半導体基板３１の裏面の全面に形成されており、はんだ６１によって、金属でできた台座５１に電気接続されている。尚、上側の保護膜３３の開口部に露出する電極３２ｃは、パワーＭＯＳトランジスタのゲートに接続する制御電極である。   The power semiconductor element 30 which is a constituent element of the power semiconductor device 100 is a vertical power semiconductor element in which main electrodes are formed on both surfaces of the semiconductor substrate 31 and the current flowing between the main electrodes is controlled. The power semiconductor element 30 in FIG. 1 is a vertical power MOS transistor, and the lower main electrode hidden on the back side of the semiconductor substrate 31 is a drain electrode, and is exposed to the opening of the upper protective film 33. The electrode 32b is a source electrode. The lower main electrode is formed on the entire back surface of the semiconductor substrate 31 and is electrically connected to a pedestal 51 made of metal by solder 61. The electrode 32c exposed at the opening of the upper protective film 33 is a control electrode connected to the gate of the power MOS transistor.

電力半導体装置１００の構成要素であるシャント抵抗４０は、対向する両表面に端面電極４２ａ，４２ｂが形成されたチップ抵抗４１である。チップ抵抗４１の下側の端面電極４２ａは、はんだ６２によって、金属でできた台座５２に電気接続されている。   The shunt resistor 40, which is a component of the power semiconductor device 100, is a chip resistor 41 in which end electrodes 42a and 42b are formed on both opposing surfaces. The lower end face electrode 42 a of the chip resistor 41 is electrically connected to a pedestal 52 made of metal by solder 62.

このように、電力半導体装置１００の電力半導体素子３０とチップ抵抗４１は、それぞれ主電極と端面電極の一方を接合して、互いに分離された別の台座５１，５２に搭載されている。また、電力半導体装置１００のシャント抵抗４０として機能するチップ抵抗４１は、両表面の端面電極４２ａ，４２ｂを介して台座５２の搭載面に対して垂直方向に電流を流す、縦型に配置されている。   As described above, the power semiconductor element 30 and the chip resistor 41 of the power semiconductor device 100 are mounted on separate pedestals 51 and 52 that are joined to each other by joining one of the main electrode and the end face electrode, respectively. Further, the chip resistor 41 functioning as the shunt resistor 40 of the power semiconductor device 100 is arranged in a vertical type that allows current to flow in a direction perpendicular to the mounting surface of the pedestal 52 via the end surface electrodes 42a and 42b on both surfaces. Yes.

以上のように、図１に示す電力半導体装置１００は、半導体基板３１の両表面に形成された主電極間に流れる電流を制御する縦型の電力半導体素子３０と、前記電流を検出するためのシャント抵抗４０と、例えばリードフレームから切り出される金属でできた電力半導体素子３０およびシャント抵抗４０を搭載するための台座５１，５２を有してなる電力半導体装置である。   As described above, the power semiconductor device 100 shown in FIG. 1 includes the vertical power semiconductor element 30 that controls the current flowing between the main electrodes formed on both surfaces of the semiconductor substrate 31, and the current for detecting the current. The power semiconductor device includes a shunt resistor 40, a power semiconductor element 30 made of, for example, metal cut from a lead frame, and pedestals 51 and 52 for mounting the shunt resistor 40.

上記電力半導体装置１００は、チップ抵抗４１の対向する両表面に端面電極４２ａ，４２ｂを形成し、該端面電極４２ａ，４２ｂの一方をリードフレームから切り出される台座５２に接合して、台座５２の搭載面に対して垂直方向に電流を流す、縦型の配置としている。従って、上記電力半導体装置１００においては、図５に示した２箇所のランド（台座）が必要な基板の搭載面に対して平行方向（横方向）に電流を流す従来のシャント抵抗と異なり、チップ抵抗４１を搭載するための台座５２が１個で済むため、シャント抵抗４０（チップ抵抗４１）の占有面積を小さくすることができる。   In the power semiconductor device 100, end electrodes 42 a and 42 b are formed on both opposing surfaces of the chip resistor 41, and one of the end electrodes 42 a and 42 b is joined to a pedestal 52 cut out from a lead frame to mount the pedestal 52. A vertical arrangement is adopted in which current flows in a direction perpendicular to the surface. Therefore, in the power semiconductor device 100, unlike the conventional shunt resistor shown in FIG. 5, which is different from the conventional shunt resistor in which current flows in the parallel direction (lateral direction) to the mounting surface of the substrate where the two lands (pedestals) are required. Since only one pedestal 52 is required for mounting the resistor 41, the area occupied by the shunt resistor 40 (chip resistor 41) can be reduced.

また、上記電力半導体装１００は、電力半導体素子３０とチップ抵抗４１をそれぞれ互いに分離された別の台座５１，５２に搭載する構成をとっている。このため、電力半導体素子３０およびシャント抵抗４０のそれぞれの台座５１，５２への搭載が容易であると共に、電力半導体素子３０およびシャント抵抗４０で発生する熱をそれぞれの台座５１，５２へ逃がすことができるため、放熱性も高めることができ、大きな電流の検出に対応することができる。   The power semiconductor device 100 has a configuration in which the power semiconductor element 30 and the chip resistor 41 are mounted on separate pedestals 51 and 52 that are separated from each other. Therefore, the power semiconductor element 30 and the shunt resistor 40 can be easily mounted on the pedestals 51 and 52, and heat generated by the power semiconductor element 30 and the shunt resistor 40 can be released to the pedestals 51 and 52. Therefore, heat dissipation can be improved, and detection of a large current can be handled.

上記電力半導体装置１００は、チップ抵抗４１が、合金材料からなり、抵抗値が０．３ｍΩ以上、１ｍΩ以下である構成とすることが好ましい。該抵抗値を持つチップ抵抗４１は、１００Ａ程度の大電流を流しても発熱量が小さく、例えば比抵抗が１μΩ・ｃｍ程度の合金材料を用いれば、占有面積が電力半導体素子３０と同程度で、略立方体形状とすることができる。   The power semiconductor device 100 preferably has a configuration in which the chip resistor 41 is made of an alloy material and has a resistance value of 0.3 mΩ to 1 mΩ. The chip resistor 41 having the resistance value generates a small amount of heat even when a large current of about 100 A is passed. For example, if an alloy material having a specific resistance of about 1 μΩ · cm is used, the occupied area is about the same as that of the power semiconductor element 30. , It can be a substantially cubic shape.

以上のようにして、図１に示す電力半導体装置１００は、半導体基板３１の両表面に形成された主電極間に流れる電流を制御する縦型の電力半導体素子３０と、前記電流を検出するためのシャント抵抗４０とを有してなる電力半導体装置であって、従来に較べてより大きな電流の制御に適する小型の電力半導体装置とすることができる。   As described above, the power semiconductor device 100 shown in FIG. 1 detects the current and the vertical power semiconductor element 30 that controls the current flowing between the main electrodes formed on both surfaces of the semiconductor substrate 31. Therefore, the power semiconductor device can be a small-sized power semiconductor device suitable for controlling a larger current than the conventional one.

次に、図１に示す電力半導体装置１００の細部について説明する。   Next, details of the power semiconductor device 100 shown in FIG. 1 will be described.

上記電力半導体装置１００におけるチップ抵抗４１は、一様な合金材料から切り出して製造する。チップ抵抗４１の合金材料は、抵抗温度係数が小さい、鉄−クロム（Ｆｅ−Ｃｒ）合金、銅−ニッケル（Ｃｕ−Ｎｉ）合金および銅−マンガン−ニッケル（Ｃｕ−Ｍｎ−Ｎｉ）合金のいずれかであることが好ましい。一番望ましい合金材料は、Ｆｅ−Ｃｒ合金（Ｆｅ−２０〜３０ｗｔ％Ｃｒ−４〜５ｗｔ％Ａｌ）である。Ｆｅ−Ｃｒ合金では、広いＣｒの組成範囲で、抵抗温度係数（ＴＣＲ）が０ｐｐｍ／℃となる材料が得られる。次に望ましい合金材料は、Ｃｕ−Ｎｉ合金（Ｃｕ−４２〜４９ｗｔ％Ｎｉ）である。Ｃｕ−４９ｗｔ％Ｎｉ合金およびＣｕ−Ｎｉ４３．５ｗｔ％Ｎｉ合金で、ＴＣＲが約１５ｐｐｍ／℃となる材料が得られる。また、Ｃｕ−４２ｗｔ％Ｎｉ合金で、ＴＣＲが０ｐｐｍ／℃となる材料が得られる。その他、５０〜８５ｗｔ％Ｃｕ−１２〜３０ｗｔ％Ｍｎ−２〜１６ｗｔ％Ｎｉ合金で、ＴＣＲが１ｐｐｍ／℃となる材料が得られる。   The chip resistor 41 in the power semiconductor device 100 is manufactured by cutting out from a uniform alloy material. The alloy material of the chip resistor 41 is one of an iron-chromium (Fe-Cr) alloy, a copper-nickel (Cu-Ni) alloy, and a copper-manganese-nickel (Cu-Mn-Ni) alloy having a small resistance temperature coefficient. It is preferable that The most desirable alloy material is an Fe—Cr alloy (Fe-20-30 wt% Cr-4-5 wt% Al). With a Fe—Cr alloy, a material having a temperature coefficient of resistance (TCR) of 0 ppm / ° C. in a wide Cr composition range is obtained. The next desirable alloy material is a Cu-Ni alloy (Cu-42 to 49 wt% Ni). A material having a TCR of about 15 ppm / ° C. is obtained with a Cu-49 wt% Ni alloy and a Cu—Ni 43.5 wt% Ni alloy. Further, a material having a TCR of 0 ppm / ° C. with a Cu-42 wt% Ni alloy can be obtained. In addition, a material having a TCR of 1 ppm / ° C. with a 50 to 85 wt% Cu-12 to 30 wt% Mn-2 to 16 wt% Ni alloy is obtained.

比抵抗が１３０μΩ・ｃｍ程度の上記合金材料を用いれば、２．０ｍｍ×２．０ｍｍ×１．５ｍｍ厚の大きさで、０．５ｍΩのチップ抵抗４１を作ることができる。この抵抗値を持つチップ抵抗４１は、例えば８０〜１００Ａの大電流を流す電動パワーステアリングのモータ駆動制御用の電力半導体装置における電流検出のためのシャント抵抗として最適である。   If the above alloy material having a specific resistance of about 130 μΩ · cm is used, a chip resistance 41 of 0.5 mΩ can be made with a size of 2.0 mm × 2.0 mm × 1.5 mm. The chip resistor 41 having this resistance value is optimal as a shunt resistor for current detection in a power semiconductor device for motor drive control of an electric power steering that flows a large current of 80 to 100 A, for example.

このように、上記電力半導体装置１００のシャント抵抗４０は、図５の横型構造を取るシャント抵抗に較べて、より大きな電流の制御に適している。従って、上記電力半導体装置１００は、図５の従来のシャント抵抗では対応することのできない、前記電流の最大値が、２０Ａ以上である場合に特に好適である。   As described above, the shunt resistor 40 of the power semiconductor device 100 is suitable for controlling a larger current than the shunt resistor having the horizontal structure of FIG. Therefore, the power semiconductor device 100 is particularly suitable when the maximum value of the current, which cannot be handled by the conventional shunt resistor of FIG. 5, is 20 A or more.

尚、上記電力半導体装置１００において、大電流に対応するため小さな抵抗値が必要なチップ抵抗４１は、抵抗値の製造バラツキが起き易い。しかしながら、チップ抵抗４１の製造バラツキについて、例えば電動パワーステアリングの駆動制御用の電力半導体装置では、規模の大きいＣＰＵを採用しているため、該ＣＰＵの演算処理で個々に補正することが可能である。   In the power semiconductor device 100, the chip resistor 41, which requires a small resistance value in order to cope with a large current, is likely to cause a manufacturing variation in the resistance value. However, the manufacturing variation of the chip resistor 41 can be individually corrected by the arithmetic processing of the CPU because, for example, a power semiconductor device for drive control of electric power steering employs a large-scale CPU. .

図２は、製造バラツキでチップ抵抗４１の抵抗値が設計値からずれたときの補正方法を説明する図で、チップ抵抗４１に流す電流（Ａ）とチップ抵抗４１の両端での検出電圧（ｍＶ）の関係を示した図である。   FIG. 2 is a diagram for explaining a correction method when the resistance value of the chip resistor 41 deviates from the design value due to manufacturing variations. The current (A) flowing through the chip resistor 41 and the detection voltage (mV) at both ends of the chip resistor 41 are illustrated. ) Is a diagram showing the relationship.

チップ抵抗４１の抵抗値は、電流依存性がなく、図２に示すように、電流と検出電圧がリニアな関係になることが望ましい。上記鉄−クロム（Ｆｅ−Ｃｒ）合金、銅−ニッケル（Ｃｕ−Ｎｉ）合金および銅−マンガン−ニッケル（Ｃｕ−Ｍｎ−Ｎｉ）合金等の合金材料を使用すれば、図２に示す電流と検出電圧のリニアな関係が得られる。しかしながら、チップ抵抗４１の抵抗値は小さく、製造バラツキが起き易い。従って、例えば設計値０．５ｍΩに対して製造品の抵抗値が０．６ｍΩであったとすると、電流に対する検出電圧の特性は、それぞれ、一点鎖線で示した直線と実線で示した直線となる。そこで、製造したチップ抵抗４１に対して、電流源から所定の電流（例えば、２０Ａ）を流し、電圧計で得られたチップ抵抗４１の検出電圧（１２ｍＶ）から、期待値（１０ｍＶ）と実測値（１２ｍＶ）の乖離度を示す係数１０ｍＶ（期待値）／１２ｍＶ（実測値）＝０．８３３を得る。従って、製造段階で得られた前記係数を製品使用時の検出電圧に乗じることで、製造バラツキのあるチップ抵抗４１の抵抗値を、個々に補正することができる。尚、前記係数は、例えばモータ駆動制御用のマイコンが有するフラッシュメモリやＥＥＰＲＯＭなどの不揮発性メモリに保存しておく。   The resistance value of the chip resistor 41 has no current dependency, and it is desirable that the current and the detection voltage have a linear relationship as shown in FIG. If an alloy material such as the iron-chromium (Fe-Cr) alloy, copper-nickel (Cu-Ni) alloy or copper-manganese-nickel (Cu-Mn-Ni) alloy is used, the current and detection shown in FIG. A linear relationship of voltage is obtained. However, the resistance value of the chip resistor 41 is small and manufacturing variations are likely to occur. Accordingly, for example, if the resistance value of the manufactured product is 0.6 mΩ with respect to the design value of 0.5 mΩ, the characteristics of the detected voltage with respect to the current are respectively a straight line indicated by a one-dot chain line and a straight line indicated by a solid line. Therefore, a predetermined current (for example, 20 A) is supplied from the current source to the manufactured chip resistor 41, and an expected value (10 mV) and an actual measurement value are obtained from the detected voltage (12 mV) of the chip resistor 41 obtained by a voltmeter. A coefficient 10 mV (expected value) / 12 mV (actual value) = 0.833 indicating the degree of divergence of (12 mV) is obtained. Therefore, the resistance value of the chip resistor 41 having manufacturing variations can be individually corrected by multiplying the detection voltage when the product is used by the coefficient obtained in the manufacturing stage. The coefficient is stored in a nonvolatile memory such as a flash memory or an EEPROM included in a motor drive control microcomputer.

以上に示したように、チップ抵抗４１の抵抗値の製造バラツキについては、簡単に補正することができる。しかしながら、抵抗温度係数が大きい合金材料の場合、抵抗値を補正するためには、温度の測定が必要になる。従って、チップ抵抗４１の合金材料としては、上記した抵抗温度係数が小さい、鉄−クロム（Ｆｅ−Ｃｒ）合金、銅−ニッケル（Ｃｕ−Ｎｉ）合金および銅−マンガン−ニッケル（Ｃｕ−Ｍｎ−Ｎｉ）合金といった合金材料が望ましい。   As described above, the manufacturing variation of the resistance value of the chip resistor 41 can be easily corrected. However, in the case of an alloy material having a large resistance temperature coefficient, it is necessary to measure the temperature in order to correct the resistance value. Therefore, as an alloy material of the chip resistor 41, iron-chromium (Fe-Cr) alloy, copper-nickel (Cu-Ni) alloy, and copper-manganese-nickel (Cu-Mn-Ni) having a small resistance temperature coefficient as described above. ) Alloy materials such as alloys are desirable.

上記電力半導体装置１００におけるチップ抵抗４１の電極４２ａ，４２ｂは、はんだ接合に適するニッケル（Ｎｉ）めっき層またはニッケル−燐（Ｎｉ−Ｐ）めっき層からなることが好ましい。また、チップ抵抗４１は、図１に示すように下側の電極４２ａと台座５２をはんだ６２で接合して電気接続することが好ましいが、導電性接着剤で接合して電気接続するようにしてもよい。   The electrodes 42a and 42b of the chip resistor 41 in the power semiconductor device 100 are preferably made of a nickel (Ni) plating layer or a nickel-phosphorus (Ni-P) plating layer suitable for solder bonding. The chip resistor 41 is preferably electrically connected by joining the lower electrode 42a and the pedestal 52 with solder 62 as shown in FIG. Also good.

また、図１の電力半導体装置１００においては、電力半導体素子３０の上面にある主電極３２ｂとシャント抵抗４０の上面にある電極４２ｂとが、２本の太いボンディングワイヤ７１によって電気接続されている。このように、搭載面と反対側にある縦型の電力半導体素子３０のもう一方の主電極３２ｂと縦型配置のシャント抵抗４０のもう一方の電極４２ｂとが、ボンディングワイヤ７１によって電気接続されてなる構成とすれば、制御する電流の最大値に応じてボンディングワイヤ７１の太さや接続本数を適宜設定するだけで、広範囲の電流に対応可能である。   In the power semiconductor device 100 of FIG. 1, the main electrode 32 b on the upper surface of the power semiconductor element 30 and the electrode 42 b on the upper surface of the shunt resistor 40 are electrically connected by two thick bonding wires 71. In this manner, the other main electrode 32b of the vertical power semiconductor element 30 on the side opposite to the mounting surface and the other electrode 42b of the shunt resistor 40 in the vertical arrangement are electrically connected by the bonding wire 71. With this configuration, it is possible to deal with a wide range of currents by simply setting the thickness of the bonding wire 71 and the number of connections according to the maximum value of the current to be controlled.

従って、特に制御する電流が大きい場合には、ボンディングワイヤ７１が、複数本、並列に接続された構成とすることが好ましい。   Therefore, in particular, when the current to be controlled is large, it is preferable that a plurality of bonding wires 71 are connected in parallel.

上記複数本のボンディングワイヤ７１を並列に接続する構成とすることで、ボンディングワイヤ７１に加わる荷重と電力が分散されるため、ボンディングワイヤ７１の１本当たりに加わる荷重と電力を小さくすることが可能となる。これによって、例えばシャント抵抗４０を台座５２に接続するはんだ６２にクラックが入るダメージを低減することができる。その他にも、電力半導体素子３０のセルに加わる荷重と電力も分散されるため、セルへのダメージを低減することができる。   By configuring the plurality of bonding wires 71 to be connected in parallel, the load and power applied to the bonding wires 71 are distributed, so the load and power applied to each bonding wire 71 can be reduced. It becomes. Thereby, for example, damage caused by cracks in the solder 62 connecting the shunt resistor 40 to the pedestal 52 can be reduced. In addition, since the load and power applied to the cell of the power semiconductor element 30 are also dispersed, damage to the cell can be reduced.

上記ボンディングワイヤ７１は、安価なアルミニウム（Ａｌ）またはアルミニウム（Ａｌ）合金からなることが好ましい。しかしながらこれに限らず、例えば、金（Ａｕ）ワイヤで接続するようにしてもよい。この場合には、電力半導体素子３０の上面にある主電極３２ｂとシャント抵抗４０の上面にある端面電極４２ｂに、銀（Ａｇ）めっきまたは金（Ａｕ）めっきを施す。   The bonding wire 71 is preferably made of inexpensive aluminum (Al) or aluminum (Al) alloy. However, the present invention is not limited to this. For example, the connection may be made with a gold (Au) wire. In this case, silver (Ag) plating or gold (Au) plating is applied to the main electrode 32 b on the upper surface of the power semiconductor element 30 and the end surface electrode 42 b on the upper surface of the shunt resistor 40.

また、図１の電力半導体装置１００においては、シャント抵抗４０の両端電圧を検出するためのボンディングによる２本の細いセンシングワイヤ７２ａ，７２ｂが、シャント抵抗４０の下面の端面電極４２ａが接合された台座５２およびシャント抵抗４０のもう一方の端面電極４２ｂからそれぞれ引き出されて、リード端子５３ｂ、５３ｃに接続されている。このような構成により、電力半導体素子３０に流れる電流を検出するためのシャント抵抗４０の両端電圧を、外部に容易に取り出すことができる。   Further, in the power semiconductor device 100 of FIG. 1, two thin sensing wires 72a and 72b by bonding for detecting the voltage across the shunt resistor 40 are joined to a base on which the end surface electrode 42a on the lower surface of the shunt resistor 40 is joined. 52 and the other end face electrode 42b of the shunt resistor 40 are connected to lead terminals 53b and 53c, respectively. With such a configuration, the voltage across the shunt resistor 40 for detecting the current flowing through the power semiconductor element 30 can be easily extracted to the outside.

尚、センシングワイヤ７２ａ，７２ｂについても、安価なアルミニウム（Ａｌ）またはアルミニウム（Ａｌ）合金からなることが好ましい。   The sensing wires 72a and 72b are also preferably made of inexpensive aluminum (Al) or aluminum (Al) alloy.

図３は、図１に示した電力半導体装置１００の変形例で、電力半導体装置１１０の斜視図である。尚、図３に示す電力半導体装置１１０において、図１に示した電力半導体装置１００と同様の部分については、同じ符号を付した。   FIG. 3 is a perspective view of a power semiconductor device 110 as a modification of the power semiconductor device 100 shown in FIG. In the power semiconductor device 110 shown in FIG. 3, the same parts as those of the power semiconductor device 100 shown in FIG.

図３に示す電力半導体装置１１０では、シャント抵抗４０であるチップ抵抗４１が接合される台座５４において、チップ抵抗４１の接合部位とセンシングワイヤ７２ａのボンディング部位の間に、仕切溝５４ａが形成されている。   In the power semiconductor device 110 shown in FIG. 3, a partition groove 54 a is formed between the joint portion of the chip resistor 41 and the bonding portion of the sensing wire 72 a in the base 54 to which the chip resistor 41 that is the shunt resistor 40 is joined. Yes.

これによれば、チップ抵抗４１の接合部位とセンシングワイヤ７２ａのボンディング部位とが、上記仕切溝５４ａによって分離された状態となる。このため、チップ抵抗４１の一方の端面電極４２ａを台座５４にはんだ６２で接合する場合において、該はんだ６２のセンシングワイヤ７２ａのボンディング部位への流れ込みを抑制することができ、該はんだ６２の流れ込みによるボンディング不良を防止することができる。   According to this, the bonding portion of the chip resistor 41 and the bonding portion of the sensing wire 72a are separated by the partition groove 54a. Therefore, when one end face electrode 42 a of the chip resistor 41 is joined to the base 54 with the solder 62, the solder 62 can be prevented from flowing into the bonding portion of the sensing wire 72 a. Bonding failure can be prevented.

図４は、図１に示した電力半導体装置１００の別の変形例で、電力半導体装置１１１の斜視図である。   FIG. 4 is a perspective view of a power semiconductor device 111 as another modification of the power semiconductor device 100 shown in FIG.

図４の電力半導体装置１１１は、シャント抵抗４０であるチップ抵抗４１が接合される台座５５と第１のリード端子５５ａとが、一体に形成されており、台座５５に接合されていないチップ抵抗４１のもう一方の端面電極４２ｂから、該チップ抵抗４１の両端電圧を検出するためのボンディングによるセンシングワイヤ７２ｂが引き出されて、第２のリード端子５３ｂに接続される構成としている。これによれば、１本のセンシングワイヤ７２ｂのボンディングで済むため、図１と図３の電力半導体装置１００，１１０に較べて、製造工数と製造コストの低減が可能である。   In the power semiconductor device 111 of FIG. 4, the pedestal 55 to which the chip resistor 41 that is the shunt resistor 40 is joined and the first lead terminal 55 a are integrally formed, and the chip resistor 41 that is not joined to the pedestal 55. A sensing wire 72b by bonding for detecting the voltage between both ends of the chip resistor 41 is drawn out from the other end face electrode 42b, and connected to the second lead terminal 53b. According to this, since only one sensing wire 72b is bonded, it is possible to reduce the number of manufacturing steps and the manufacturing cost as compared with the power semiconductor devices 100 and 110 of FIGS.

上記電力半導体装置１００，１１０，１１１は、シャント抵抗４０の上面に、ボンディングワイヤ７１やセンシングワイヤ７２ｂが接続される。従って、該ボンディングワイヤ７１やセンシングワイヤ７２ｂを保護するため、ゲル封止パッケージやモールド樹脂封止パッケージとすることが望ましい。   In the power semiconductor devices 100, 110, and 111, a bonding wire 71 and a sensing wire 72 b are connected to the upper surface of the shunt resistor 40. Therefore, in order to protect the bonding wire 71 and the sensing wire 72b, it is desirable to use a gel sealing package or a mold resin sealing package.

特に、台座５１，５４，５５の電力半導体素子３０および／またはシャント抵抗４０が搭載された面と反対側の面を露出するようにして、上記電力半導体装置１００，１１０，１１１が、モールド樹脂で樹脂封止されてなる構成とし、露出された台座５１，５４，５５の面を金属などに接触させることで、高い放熱性を確保することができる。   In particular, the power semiconductor devices 100, 110, and 111 are made of mold resin so that the surface of the pedestals 51, 54, and 55 opposite to the surface on which the power semiconductor element 30 and / or the shunt resistor 40 is mounted is exposed. By adopting a resin-sealed configuration and bringing the exposed surfaces of the pedestals 51, 54, and 55 into contact with a metal or the like, high heat dissipation can be ensured.

以上のようにして、例示した上記電力半導体装置１００，１１０，１１１は、いずれも、半導体基板３１の両表面に形成された主電極間に流れる電流を制御する縦型の電力半導体素子３０と、前記電流を検出するためのシャント抵抗４０とを有してなる電力半導体装置であって、従来に較べてより大きな電流の制御に適する小型の電力半導体装置とすることができる。   As described above, the power semiconductor devices 100, 110, and 111 exemplified above all have the vertical power semiconductor element 30 that controls the current flowing between the main electrodes formed on both surfaces of the semiconductor substrate 31. The power semiconductor device includes a shunt resistor 40 for detecting the current, and can be a small-sized power semiconductor device suitable for controlling a larger current than in the past.

従って、上記電力半導体装置は、小型且つ低いバッテリ電圧で大きな電流の制御が必要となる、車両に搭載されるモータの駆動制御用として好適である。このようなモータとして、電動パワーステアリングまたはスタータのモータがある。例えば電動パワーステアリングのモータの駆動制御用途では、前述したように８０〜１００Ａの大電流を制御する必要があるため、電力半導体素子３０だけでなくシャント抵抗４０の発熱量も無視できなくなり、０．５〜１ｍΩ程度の極めて小さな低抵値のものが必要になる。上記電力半導体装置は、このような大電流の制御が必要となる電動パワーステアリングのモータの駆動制御用にも対応可能である。   Therefore, the power semiconductor device is suitable for driving control of a motor mounted on a vehicle, which requires a large current control with a small battery voltage. Such motors include electric power steering or starter motors. For example, in the drive control application of an electric power steering motor, since it is necessary to control a large current of 80 to 100 A as described above, not only the power semiconductor element 30 but also the amount of heat generated by the shunt resistor 40 cannot be ignored. An extremely small low resistance value of about 5 to 1 mΩ is required. The power semiconductor device can also be used for driving control of a motor of an electric power steering that requires such a large current control.

１００，１１０，１１１ 電力半導体装置
３０ 電力半導体素子
３１ 半導体基板
３２ｂ 主電極
４０ シャント抵抗
４１ チップ抵抗
４２ａ，４２ｂ 端面電極
５１，５２，５４，５５ 台座
６１，６２ はんだ
７１ ボンディングワイヤ
７２ａ，７２ｂ センシングワイヤ 100, 110, 111 Power semiconductor device 30 Power semiconductor element 31 Semiconductor substrate 32b Main electrode 40 Shunt resistor 41 Chip resistor 42a, 42b End face electrode 51, 52, 54, 55 Base 61, 62 Solder 71 Bonding wire 72a, 72b Sensing wire

Claims (15)

半導体基板の両表面に主電極が形成されてなり、該主電極間に流れる電流を制御する縦型の電力半導体素子と、前記電流を検出するためのシャント抵抗と、前記電力半導体素子および前記シャント抵抗を搭載するための金属でできた台座とを有してなる電力半導体装置であって、
前記シャント抵抗が、対向する両表面に端面電極が形成されてなるチップ抵抗であり、
前記電力半導体素子と前記チップ抵抗が、それぞれ前記主電極と前記端面電極の一方を互いに分離された別の台座に接合して搭載され、
前記チップ抵抗が、前記両表面の端面電極を介して前記台座の搭載面に対して垂直方向に電流を流す、縦型に配置されてなることを特徴とする電力半導体装置。 A main electrode is formed on both surfaces of a semiconductor substrate, a vertical power semiconductor element for controlling a current flowing between the main electrodes, a shunt resistor for detecting the current, the power semiconductor element and the shunt A power semiconductor device having a pedestal made of metal for mounting a resistor,
The shunt resistor is a chip resistor in which end electrodes are formed on both opposing surfaces,
The power semiconductor element and the chip resistor are mounted by bonding one of the main electrode and the end face electrode to another pedestal separated from each other,
The power semiconductor device according to claim 1, wherein the chip resistors are arranged in a vertical type in which a current flows in a direction perpendicular to the mounting surface of the pedestal through the end surface electrodes on both surfaces. 前記チップ抵抗が、合金材料からなり、抵抗値が０．３ｍΩ以上、１ｍΩ以下であることを特徴とする請求項１に記載の電力半導体装置。   The power semiconductor device according to claim 1, wherein the chip resistance is made of an alloy material and has a resistance value of 0.3 mΩ or more and 1 mΩ or less. 前記合金材料が、鉄−クロム（Ｆｅ−Ｃｒ）合金、銅−ニッケル（Ｃｕ−Ｎｉ）合金および銅−マンガン−ニッケル（Ｃｕ−Ｍｎ−Ｎｉ）合金のいずれかであることを特徴とする請求項２に記載の電力半導体装置。   The alloy material is any one of an iron-chromium (Fe-Cr) alloy, a copper-nickel (Cu-Ni) alloy, and a copper-manganese-nickel (Cu-Mn-Ni) alloy. 2. The power semiconductor device according to 2. 前記端面電極が、ニッケル（Ｎｉ）めっき層またはニッケル−燐（Ｎｉ−Ｐ）めっき層からなることを特徴とする請求項１乃至３のいずれか一項に記載の電力半導体装置。   4. The power semiconductor device according to claim 1, wherein the end face electrode is made of a nickel (Ni) plating layer or a nickel-phosphorus (Ni—P) plating layer. 5. 前記電流の最大値が、２０Ａ以上であることを特徴とする請求項１乃至４のいずれか一項に記載の電力半導体装置。   5. The power semiconductor device according to claim 1, wherein a maximum value of the current is 20 A or more. 前記台座に接合されていない前記電力半導体素子のもう一方の主電極と前記シャント抵抗のもう一方の端面電極とが、ボンディングワイヤによって電気接続されてなることを特徴とする請求項１乃至５のいずれか一項に記載の電力半導体装置。   6. The other main electrode of the power semiconductor element that is not joined to the pedestal and the other end face electrode of the shunt resistor are electrically connected by a bonding wire. The power semiconductor device according to claim 1. 前記ボンディングワイヤが、複数本、並列に接続されてなることを特徴とする請求項６に記載の電力半導体装置。   The power semiconductor device according to claim 6, wherein a plurality of the bonding wires are connected in parallel. 前記ボンディングワイヤが、アルミニウム（Ａｌ）またはアルミニウム（Ａｌ）合金からなることを特徴とする請求項６または７に記載の電力半導体装置。   The power semiconductor device according to claim 6, wherein the bonding wire is made of aluminum (Al) or an aluminum (Al) alloy. 前記シャント抵抗の両端電圧を検出するためのボンディングによるセンシングワイヤが、該シャント抵抗の一方の端面電極が接合された台座および該シャント抵抗のもう一方の端面電極からそれぞれ引き出されて、リード端子に接続されてなることを特徴とする請求項１乃至８のいずれか一項に記載の電力半導体装置。   A sensing wire by bonding for detecting the voltage at both ends of the shunt resistor is pulled out from the base to which one end face electrode of the shunt resistor is joined and the other end face electrode of the shunt resistor, and connected to the lead terminal. The power semiconductor device according to claim 1, wherein the power semiconductor device is a power semiconductor device. 前記シャント抵抗が接合される台座において、
前記シャント抵抗の接合部位と前記センシングワイヤのボンディング部位の間に、仕切溝が形成されてなることを特徴とする請求項９に記載の電力半導体装置。 In the pedestal to which the shunt resistor is joined,
The power semiconductor device according to claim 9, wherein a partition groove is formed between a junction portion of the shunt resistor and a bonding portion of the sensing wire. 前記シャント抵抗が接合される台座と第１のリード端子とが、一体に形成されてなり、
前記台座に接合されていない前記シャント抵抗のもう一方の端面電極から、該シャント抵抗の両端電圧を検出するためのボンディングによるセンシングワイヤが引き出されて、第２のリード端子に接続されてなることを特徴とする請求項１乃至８のいずれか一項に記載の電力半導体装置。 The pedestal to which the shunt resistor is joined and the first lead terminal are integrally formed,
A sensing wire by bonding for detecting a voltage at both ends of the shunt resistor is drawn from the other end face electrode of the shunt resistor that is not joined to the pedestal, and connected to the second lead terminal. The power semiconductor device according to claim 1, wherein the power semiconductor device is a power semiconductor device. 前記センシングワイヤが、アルミニウム（Ａｌ）またはアルミニウム（Ａｌ）合金からなることを特徴とする請求項９乃至１１のいずれか一項に記載の電力半導体装置。   The power semiconductor device according to any one of claims 9 to 11, wherein the sensing wire is made of aluminum (Al) or an aluminum (Al) alloy. 前記台座の前記電力半導体素子および／または前記シャント抵抗が搭載された面と反対側の面を露出するようにして、前記電力半導体装置が、モールド樹脂で樹脂封止されてなることを特徴とする請求項１乃至１２のいずれか一項に記載の電力半導体装置。   The power semiconductor device is resin-sealed with a mold resin so that a surface of the pedestal opposite to the surface on which the power semiconductor element and / or the shunt resistor is mounted is exposed. The power semiconductor device according to any one of claims 1 to 12. 前記電力半導体装置が、車両に搭載されるモータの駆動制御用であることを特徴とする請求項１乃至１３のいずれか一項に記載の電力半導体装置。   The power semiconductor device according to any one of claims 1 to 13, wherein the power semiconductor device is for drive control of a motor mounted on a vehicle. 前記モータが、電動パワーステアリングまたはスタータのモータであることを特徴とする請求項１４に記載の電力半導体装置。   15. The power semiconductor device according to claim 14, wherein the motor is an electric power steering or a starter motor.
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