JP2011211229A - Wiring board - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a wiring board of high reliability wherein peeling of an electrode pad from an insulating layer is suppressed.SOLUTION: The wiring board includes an electrode pad 101, conductive patterns 103, 105 and 107 which are connected to the electrode pad and contain a via plug, insulating layers 102, 104, 106 and 108 in which the electrode pad and the via plug are embedded and which have an opening part 108A exposing a part of a principal surface of the electrode pad. The end part of the principal surface of the electrode pad is covered with the insulating layer, and the insulating layer is arranged on the outermost surface of a mounting component mounting surface side.

Description

  The present invention relates to a wiring board having an electrode pad and a conductive pattern connected to the electrode pad.

  For example, wiring boards (electronic components) for mounting mounting components such as semiconductor chips have been proposed in various shapes and structures. In recent years, with the thinning and miniaturization of semiconductor chips, the demand for thinning and miniaturization of wiring boards on which semiconductor chips are mounted has become significant.

  For example, a so-called build-up method is known as a method for forming the wiring board by reducing the thickness. The build-up method is a method of manufacturing a multilayer wiring substrate by forming an interlayer insulating layer of wiring by laminating a build-up layer (build-up resin) made of, for example, an epoxy resin material on a core substrate. .

  For example, the core substrate is made of a prepreg material or the like, supports a soft buildup layer before being hardened in the manufacturing process of the wiring board, and suppresses warpage accompanying hardening of the buildup layer. However, in the above build-up method, if the wiring board is further thinned, the thickness of the core board serving as the base of the wiring board becomes a problem.

  Therefore, in order to further reduce the thickness of the wiring board in the build-up method, there is a method of removing the support plate after forming the wiring board on the support plate that supports the wiring board (build-up layer) by the build-up method. It has been proposed (see, for example, Patent Document 1).

  FIG. 1 is a diagram showing a part of the structure of a wiring board formed using a support plate. Referring to FIG. 1, an electrode pad 1 is formed facing a support plate (not shown) to be removed by etching, for example, and an insulating layer 2 made of, for example, a resin material is provided so as to cover the periphery of the electrode pad 1. Is formed. The electrode pad 1 is connected to a conductive pattern 3 made of, for example, a via plug. For example, the electrode pad 1 includes an Au layer 1A and a Ni layer 1B.

  In the above structure, for example, the surface of the insulating layer 2 and the surface of the electrode pad 1 are formed on substantially the same plane. For this reason, there is a problem that peeling called delamination occurs on the boundary surface between the side surface of the electrode pad 1 and the insulating layer 2 (shown by A portion in the figure), and the reliability of the electronic component is lowered. .

  As a countermeasure against the above delamination, for example, a structure has been proposed in which the shape of the electrode pad is changed to form a wall portion extending to the opposite side of the exposed surface of the electrode pad (see, for example, Patent Document 2).

JP 2005-5742 A JP-A-2005-244108 JP 2004-64082 A JP 2003-229512 A

  However, as described in Patent Document 2, if the shape of the electrode pad is complicated, the number of steps for forming the electrode pad increases, and the manufacturing cost of the wiring board increases. There is a problem and it is not a realistic method.

  In addition, a structure in which the electrode pad is recessed with respect to the interlayer insulating layer has been proposed (see, for example, Patent Document 3 and Patent Document 4), but against the peeling of the interface between the electrode pad and the interlayer insulating layer. Therefore, it cannot be expected to produce a sufficient effect and is not an effective method for reducing the reliability of the wiring board.

  For this reason, in this invention, it is making it a general subject to provide the novel and useful wiring board which solved said problem.

  A specific problem of the present invention is to provide a highly reliable wiring board in which peeling of an electrode pad and an insulating layer is suppressed.

  The present invention solves the above-described problem by exposing an electrode pad, a conductive pattern including a via plug connected to the electrode pad, the electrode pad and the via plug being embedded, and a part of a main surface of the electrode pad being exposed. An insulating layer having an opening to be covered, and an end portion of the main surface of the electrode pad is covered with the insulating layer, and the insulating layer is disposed on the outermost surface on the mounting component mounting surface side. It solves with the wiring board characterized by being.

  ADVANTAGE OF THE INVENTION According to this invention, it becomes possible to provide the reliable wiring board by which peeling of the electrode pad and the insulating layer was suppressed.

It is a figure which shows the structure of the conventional electronic component typically. It is a figure which shows typically the structure of the electronic component by this invention. It is a figure (the 1) which shows an example of the manufacturing method of the electronic component by this invention. It is FIG. (2) which shows an example of the manufacturing method of the electronic component by this invention. It is FIG. (3) which shows an example of the manufacturing method of the electronic component by this invention. It is FIG. (4) which shows an example of the manufacturing method of the electronic component by this invention. It is FIG. (1) which shows another example of the manufacturing method of the electronic component by this invention. It is FIG. (2) which shows another example of the manufacturing method of the electronic component by this invention. It is FIG. (3) which shows another example of the manufacturing method of the electronic component by this invention. It is FIG. (4) which shows another example of the manufacturing method of the electronic component by this invention. FIG. 6 is a diagram (No. 1) illustrating a method for manufacturing an electronic component according to the first embodiment. FIG. 6 is a diagram (No. 2) illustrating the method for manufacturing the electronic component according to the first embodiment. FIG. 3 is a diagram (No. 3) illustrating the method for manufacturing the electronic component according to the first embodiment. FIG. 6 is a diagram (No. 4) illustrating the method for manufacturing the electronic component according to the first embodiment. FIG. 10 is a diagram (No. 5) illustrating the method for manufacturing the electronic component according to the first embodiment. FIG. 6 is a view (No. 6) illustrating the method for manufacturing the electronic component according to the first embodiment. FIG. 7 is a view (No. 7) showing a method for manufacturing an electronic component according to Example 1. FIG. 8 is a view (No. 8) illustrating the method for manufacturing the electronic component according to the first embodiment. FIG. 9 is a diagram (No. 9) illustrating a method for manufacturing an electronic component according to Example 1. FIG. 10 is a view (No. 10) illustrating the method for manufacturing the electronic component according to the first embodiment. FIG. 6 is a diagram (No. 1) illustrating a method for manufacturing an electronic component according to a second embodiment. FIG. 10 is a second diagram illustrating a method of manufacturing an electronic component according to the second embodiment. FIG. 10 is a third diagram illustrating the method of manufacturing the electronic component according to the second embodiment. FIG. 6 is a diagram (No. 4) illustrating the method for manufacturing the electronic component according to the second embodiment.

  FIG. 2 is a diagram showing a part of the structure of a wiring board formed using a support plate according to the present invention. Referring to FIG. 2, for example, an electrode pad 11 is formed so as to face a support plate (not shown) to be removed by etching, and an insulating layer (interlayer) made of, for example, a resin material so as to cover the periphery of the electrode pad 11. Insulating layer) 12 is formed. In addition, a conductive pattern 13 made of, for example, a via plug or the like is connected to the electrode pad 11. For example, the electrode pad 11 includes an Au layer 11A and a Ni layer 11B. Further, a Pd layer may be provided between the Au layer 11A and the Ni layer 11B.

  In the above structure, the electrode pad 11 is embedded in the insulating layer 12, and the insulating layer 12 is an opening in which a part of the main surface of the electrode pad 11 (the outer surface of the Au layer 11A) is exposed. 12A, and an end portion (peripheral portion) of the main surface of the electrode pad 11 is covered with an insulating layer 12.

  For this reason, it is suppressed that the insulating layer 12 peels from the electrode pad 11, and the reliability of the structure of an electronic component is favorable. Conventionally, peeling called delamination may occur between the side wall of the electrode pad and the insulating layer. However, in the above structure, the interlayer insulating film in which the electrode pad is embedded also extends above the electrode pad. The structure covers the end of the main surface (exposed surface) of the electrode pad, and it is possible to effectively suppress the occurrence of delamination.

  Further, for example, conventionally, there has been a case in which a solder resist layer is formed on the interlayer insulating layer to cover the periphery of the electrode pad. In the present invention, the electrode pad is embedded (interlayer). The difference is that an insulating layer is formed and the end portion of the exposed surface of the electrode pad is covered with the insulating layer. That is, in the structure according to the present invention, the insulating layer that embeds the electrode pad and the insulating layer that covers the end of the exposed surface of the electrode pad are integrally formed, and the effect of suppressing delamination is increased. Is a feature.

  For example, the opening 12A has a tapered shape that increases from the side in contact with the electrode pad 11 in a direction away from the opening. That is, the opening 12A is formed such that the opening diameter A1 on the upper surface side of the insulating layer 12 is larger than the opening diameter A2 on the side in contact with the electrode pad.

  For example, after the electrode pad 11 is formed on the support plate, the support plate is etched so that the support plate has a shape having a protruding portion in contact with the electrode pad 11. It can be configured by forming the insulating layer 12. Below, the outline of the method of manufacturing a wiring board (electronic component) by etching a support plate is demonstrated.

  3A to 3D are diagrams showing an outline of a method for manufacturing an electronic component by etching a support plate. However, the parts described above are denoted by the same reference numerals, and description thereof may be omitted (the same applies to the following drawings and text).

  First, in the step shown in FIG. 3A, an electrode pad 21 made of, for example, a laminated structure of an Au layer 21A and a Ni layer 21B (Au layer 21A is on the support plate 20 side) is placed on a support plate 20 made of Cu, for example. It is formed by electrolytic plating using 20 as a power feeding path.

  Next, in the step shown in FIG. 3B, the support plate 20 is selectively etched from the surface side on which the electrode pad 21 is formed, of the electrode pad 21 and the support plate 20, for example, by wet etching using an alkaline chemical solution. To do. As a result, the support plate 20 has a shape having a protrusion 20B that contacts the electrode pad 21 and a flat support plate body 20A. Moreover, the contact area where the support plate 20 and the electrode pad 21 contact is reduced by the etching described above. Further, the protrusion 20B is formed in a tapered shape such that the cross-sectional area increases from the side in contact with the electrode pad 21 to the side connected to the support plate body 20A.

  Next, in the step shown in FIG. 3C, an insulating layer (interlayer insulating layer) 22 made of, for example, a resin material that covers the electrode pads 21 is formed on the support plate 20. Further, a conductive pattern 23 such as a via plug connected to the electrode pad 21 is formed. Thereafter, if necessary, an insulating layer may be laminated and a conductive pattern may be formed to form a multilayer wiring structure (the formation of these multilayer wiring structures will be described later).

  Next, in the step shown in FIG. 3D, the support plate 20 can be removed by wet etching with a chemical solution to manufacture a wiring board (electronic component) having a tapered opening 22A.

  Further, by forming a height adjustment pad made of substantially the same material as the support plate between the support plate and the electrode pad, the depth of the opening formed in the insulating layer can be increased. In this case, the height adjustment pad is removed together with the support plate. Below, the outline of the manufacturing method of the electronic component using a height adjustment pad is demonstrated.

  First, in the step shown in FIG. 4A, for example, an electrolysis using a height adjustment pad 31 </ b> C made of substantially the same material (Cu) as the support plate 30 on the support plate 30 made of Cu and the support plate 20 as a power feeding path. It is formed by a plating method. Further, the electrode pad 31 having a laminated structure of the Au layer 31A and the Ni layer 31B (the Au layer 31A is on the height adjustment pad 31C side) is fed to the support plate 30 and the height adjustment pad 31C on the height adjustment pad 31C. It is formed by the electrolytic plating method used as a path.

  Next, in the step shown in FIG. 4B, the support plate 30 and the height adjustment pad 31C are etched by, for example, wet etching using an alkaline chemical solution. As a result, the support plate 30 has a shape having a protrusion 30B that contacts the electrode pad 31 and a flat support plate body 30A. In this case, the protrusion 30B has a structure including the height adjustment pad 31C. Further, the contact area between the height adjustment pad 31C and the electrode pad 31 is reduced by the etching described above. Further, the protrusion 30B is formed in a tapered shape such that the cross-sectional area increases from the side in contact with the electrode pad 31 to the side connected to the support plate main body 30A.

  Next, in the step shown in FIG. 4C, an insulating layer (interlayer insulating layer) 32 made of, for example, a resin material that covers the electrode pad 31 is formed on the support plate 30. Further, a conductive pattern 33 such as a via plug connected to the electrode pad 31 is formed.

  Next, in the step shown in FIG. 4D, the support plate 30 and the height adjustment pad 31C are removed by wet etching with a chemical solution, and a wiring board (electronic component) having a tapered opening 32A can be manufactured. .

  According to the method described above, the depth of the opening 32A formed in the insulating layer 32 can be increased. Further, the etching time in the process shown in FIG. 4B can be shortened compared to the process shown in FIG. 3B.

  Next, a more specific example of the method shown in FIGS. 3A to 3D is shown in Example 1, a more specific example of the method shown in FIGS. 4A to 4D is shown in Example 2, and will be described with reference to the drawings. To do.

  FIG. 5A to FIG. 5J are diagrams illustrating a method of manufacturing a wiring board (electronic component) according to Example 1 of the present invention, following the procedure.

  First, in the step shown in FIG. 5A, a mask pattern 100R having an opening 100A is formed on a support plate 100 made of a metal material such as Cu by a photolithography method using a resist.

  Next, in the process shown in FIG. 5B, for example, a laminated structure (Au layer 101A and Ni layer 101B) is formed on the surface of the support plate 100 exposed from the opening 100A by an electrolytic plating method using the support plate 100 as a power feeding path. An electrode pad 101 made of the layer 101A (on the support plate 100 side) is formed.

  In addition, the electrode pad 101 is composed of, for example, a stacked structure of an Au layer and a Ni layer, but is not limited to this, for example, an Au layer, a Ni layer, and a Cu layer (the Au layer is on the support plate 100 side), or It can be configured in various structures such as a stacked structure of an Au layer and a Cu layer (the Au layer is on the support plate 100 side). Alternatively, a three-layer structure in which a Pd layer is provided between the Au layer and the Ni layer may be used.

  Next, in the step shown in FIG. 5C, the mask pattern 100R on the support plate 100 is removed.

  Next, in the step shown in FIG. 5D, the support plate 100 is selectively etched out of the electrode pad 101 and the support plate 100, for example, by wet etching using an alkaline chemical solution. As a result, the support plate 100 has a shape having a protruding portion 100B in contact with the electrode pad 101 and a flat support plate body 100A. In addition, the contact area where the support plate 100 and the electrode pad 101 come into contact with each other is reduced by the etching. Further, the protrusion 100B is formed in a tapered shape such that the cross-sectional area increases from the side in contact with the electrode pad 101 to the side connected to the support plate main body 100A.

  For example, in the above structure, the metal constituting the electrode pad 101 may be selected so that the selectivity in wet etching is increased. Further, the chemical solution may be selected so that the selectivity in wet etching is increased. Further, a metal layer (metal mask) such as an Sn layer made of a metal material different from the electrode pad 101 may be provided on the electrode pad 101, for example.

  Next, in the step shown in FIG. 5E, an insulating layer (build-up layer) 102 that covers, for example, an epoxy resin material, which covers the electrode pad 101, is formed on the support plate 100. Furthermore, a via hole 102A reaching the electrode pad 101 is formed in the insulating layer 102 by, for example, a laser. In this case, the peripheral edge portion of the electrode pad 101 is not exposed but is covered with the insulating layer 102.

  Next, in the step shown in FIG. 5F, a seed layer (not shown) is first formed on the surface of the insulating layer 102 by an electroless plating method of Cu, and then a resist pattern (not shown) is formed on the seed layer. Form. Further, a conductive pattern 103 including a via plug in which the via hole 102A is embedded and a pattern wiring connected to the via plug is formed by Cu electroplating using the seed layer as a power feeding path. After the conductive pattern 103 is formed, the resist pattern is peeled off, and the seed layer exposed by the peeling of the resist pattern is removed by etching.

  Next, in the step shown in FIG. 5G, the steps described above with reference to FIGS. 5E to 5F are repeated to sequentially stack the insulating layers 104 and 106 corresponding to the insulating layer 102 on the insulating layer 102, thereby forming the conductive pattern 103. Conductive patterns 105 and 107 corresponding to are formed.

  Further, an insulating layer 108 made of a solder resist having an opening 108A from which a part of the conductive pattern 107 is exposed is formed on the insulating layer 106.

  Next, in the step shown in FIG. 5H, the support plate 101 made of Cu is removed, for example, by wet etching using a chemical solution. In this way, the multilayer wiring board (electronic component) 150 can be formed.

  Further, a mounting part such as a semiconductor chip may be mounted on the electronic component 150 by forming a connection portion as shown below.

  For example, as shown in FIG. 5I, a connecting portion (solder bump) 109 made of solder is formed on the electrode pad 101 by, for example, printing or solder ball transfer and solder reflow.

  Further, in the step shown in FIG. 5J, a mounting component 110 made of, for example, a semiconductor chip may be mounted so as to be connected to the connecting portion 109.

  Further, the mounting component 110 may be mounted so as to be connected to the conductive pattern 107 exposed from the opening 108A of the insulating layer 108.

  FIGS. 6A to 6D are diagrams illustrating a method of manufacturing a multilayer wiring board (electronic component) according to the second embodiment of the present invention, following the procedure.

  6A, a mask pattern 200R having an opening 200A is formed on a support plate 200 made of a metal material such as Cu by a photolithography method using a resist.

  Next, in the step shown in FIG. 6B, first, the height adjustment pad 201C made of substantially the same material (Cu) as the support plate 200 is placed on the surface of the support plate 200 exposed from the opening 200A. It is formed by an electrolytic plating method that uses a power supply path. Further, the electrode pad 201 having a stacked structure of the Au layer 201A and the Ni layer 201B (the Au layer 201A is on the height adjustment pad 201C side) is fed to the support plate 200 and the height adjustment pad 201C on the height adjustment pad 201C. It is formed by the electrolytic plating method used as a path.

  Next, in the step shown in FIG. 6C, the mask pattern 200R on the support plate 200 is removed.

  Next, in the step shown in FIG. 6D, the support plate 200 and the height adjustment pad 201C are selected from the electrode pad 201, the height adjustment pad 201C, and the support plate 200, for example, by wet etching using an alkaline chemical solution. Etch. As a result, the support plate 200 has a shape having a protrusion 200B that contacts the electrode pad 201 and a flat support plate body 200A. In this case, the protrusion 200B substantially has a structure including the height adjustment pad 201C. Further, the contact area between the protrusion 200B and the electrode pad 201 is reduced by the etching. Further, the protrusion 200B is formed in a tapered shape such that the cross-sectional area increases from the side in contact with the electrode pad 201 to the side connected to the support plate body 200A.

  After that, by performing the same processes as those in FIG. 5E and subsequent steps in the first embodiment, the insulating layers 102, 104, 106, and 108, the conductive patterns 103, 105, and 107 shown in the first embodiment, and further, as necessary. Accordingly, by forming the connecting portion 109 and mounting the mounting component, it is possible to manufacture a multilayer wiring board (electronic component).

  Although the present invention has been described with reference to the preferred embodiments, the present invention is not limited to the specific embodiments described above, and various modifications and changes can be made within the scope described in the claims.

  ADVANTAGE OF THE INVENTION According to this invention, it becomes possible to provide the reliable wiring board by which peeling of the electrode pad and the insulating layer was suppressed.

20, 30, 100, 200 Support plate 11, 21, 31, 101, 201 Electrode pad 12, 22, 32, 102, 104, 106, 108 Insulating layer 103, 105, 107 Conductive pattern

Claims (4)

An electrode pad;
A conductive pattern including a via plug connected to the electrode pad;
The electrode pad and the via plug are embedded, and an insulating layer having an opening from which a part of the main surface of the electrode pad is exposed, and
An end portion of the main surface of the electrode pad is covered with the insulating layer,
The wiring board, wherein the insulating layer is disposed on the outermost surface on the mounting component mounting surface side.   2. The wiring board according to claim 1, wherein the opening of the insulating layer has a tapered shape.   3. The wiring board according to claim 1, wherein the wiring board has a multilayer wiring structure in which an insulating layer and a conductive pattern are further laminated on a surface opposite to the surface having the opening of the insulating layer. 4. The wiring board according to claim 3, wherein the insulating layer constituting the multilayer wiring structure and the insulating layer disposed on the outermost surface on the mounting component mounting surface side are made of the same insulating material.