JP4256454B2 - Wiring board manufacturing method and wiring board - Google Patents

Description

  The present invention relates to a method for manufacturing a wiring board and a wiring board, and more particularly to a method for manufacturing a wiring board having electrode pads and alignment marks and the wiring board.

  For example, wiring boards (electronic components) for mounting mounting components such as semiconductor chips have been proposed in various shapes and structures. In recent years, with the thinning and miniaturization of semiconductor chips, the demand for thinning and miniaturization of wiring boards on which semiconductor chips are mounted has become significant.

  For example, a so-called build-up method is known as a method for forming the wiring board by reducing the thickness. The build-up method is a method for manufacturing a wiring board by forming an interlayer insulating layer of wiring by laminating a build-up layer (build-up resin) made of, for example, an epoxy resin material on a core substrate.

  For example, the core substrate is made of a prepreg material or the like, supports a soft buildup layer before being hardened in the manufacturing process of the wiring board, and suppresses warpage accompanying hardening of the buildup layer. However, in the above build-up method, if the wiring board is further thinned, the thickness of the core board serving as the base of the wiring board becomes a problem.

  Therefore, in order to further reduce the thickness of the wiring board in the build-up method, there is a method of removing the support plate after forming the wiring board on the support plate that supports the wiring board (build-up layer) by the build-up method. It has been proposed (see, for example, Patent Documents 1 and 2).

However, for example, the adhesion between the support plate made of a metal material and the buildup layer made of a resin material is not strong, and some measures for improving the adhesion are necessary. As an example, a method for improving the adhesion with a resin by roughening the surface of a metal has been studied.
JP-A-2005-005742 JP 2006-186321 A

  However, when the support plate is roughened, the roughened surface state is transferred to the surface of the wiring board as it is. For example, if an alignment mark used for alignment (positioning) is formed on the surface in contact with the support board on the wiring board side, the surface of the alignment mark is roughened. Therefore, it is difficult to recognize the alignment mark in positioning the wiring board, and there is a concern that the reliability of the processing accuracy is lowered.

  Therefore, in the present invention, it is a general object to provide a novel and useful method of manufacturing a wiring board that solves the above problems.

  From the first aspect of the present invention, the above-described problem is a first step of roughening the surface of the support plate, and the support plate that forms a mask pattern on the surface of the support plate and is exposed from the mask pattern Covering the plurality of conductive patterns, a second step of smoothing the surface, a third step including a step of forming a plurality of conductive patterns on the support plate so as to contact the support plate, A fourth step of forming a resin layer in contact with the support plate, a fifth step of forming another conductive pattern connected to at least a part of the plurality of conductive patterns, and the support plate. And a sixth step of removing, wherein at least a part of the plurality of conductive patterns is formed on the smoothed support plate surface to be a smooth surface. Can be solved by the manufacturing method Kill.

Further, the above-mentioned problem is a roughening formed on a support member , which is a wiring board provided with a resin layer and a conductive pattern whose one side is exposed from the resin layer, from the second viewpoint of the present invention. By forming the resin layer and the conductive pattern on a surface, the one surface side of the resin layer and a part of the exposed surface of the conductive pattern are roughened, and the support member is smoothed. by forming the other conductive pattern on the non-roughened surface, the other exposed surface of the conductive pattern can be solved by a wiring board formed by the Hiara of surface.

  ADVANTAGE OF THE INVENTION According to this invention, it becomes possible to provide the manufacturing method of the wiring board which can be reduced in thickness and the precision of alignment becomes favorable.

  First, the outline of the manufacturing method of the conventional wiring board (electronic component) is shown in FIG. Referring to FIG. 1, conventionally, after an alignment mark (conductive pattern) 13 and a resin layer 12 are formed on a support plate 11 made of a metal material such as Cu, the support plate 11 is removed by etching or the like. Thus, a wiring board was formed. For this reason, it becomes possible to reduce the thickness of the manufactured wiring board while suppressing warping of the resin layer in the process of manufacturing the wiring board by the support plate. In this figure, structures such as electrode pads and wiring structures are not shown.

  However, in the above manufacturing method, for example, in order to improve the adhesion between the support plate 11 made of a metal material and the resin layer 12, the surface of the support plate 11 is roughened to increase the surface roughness. was there. In this case, the surface roughness on the support plate 11 is transferred to the wiring board side such as the resin layer 12 and the alignment mark 13.

  For example, when the surface of the alignment mark 13 is roughened and the surface roughness becomes large, there arises a problem that it is difficult to recognize the alignment mark 13. For example, when a connection portion such as solder is formed on an electrode pad (not shown in the figure) after removing the support plate 11, if the alignment mark is difficult to recognize, there is a problem in the processing accuracy of the wiring board. Will occur.

  Therefore, in the present invention, as will be described below, the surface roughness of the region of the support plate where the alignment mark is in contact with the region where the resin layer is in contact is different. For this reason, it is characterized in that the adhesion of the resin layer and the support plate is ensured and the surface roughness of the alignment mark is reduced to facilitate the recognition of the alignment mark.

  FIG. 2 is a diagram showing an outline of a method of manufacturing a wiring board (electronic component) according to the present invention. However, the parts described above are denoted by the same reference numerals, and description thereof is omitted. Referring to FIG. 2, in the case shown in FIG. 2, the first region (non-roughened surface) 11A and the second surface having different surface roughness are provided on the surface of the support plate 11 made of Cu, for example, on the surface in contact with the wiring board. A region (roughened surface) 11B is formed.

  For example, the first region 11A has a surface roughness (Ra) that is about the surface finish of a normal general metal plate (Cu plate), and has a smaller surface roughness than the second region 11B. Ra which shows this is 100 nm or less. On the other hand, the second region 11B is formed by roughening, has a surface roughness larger than that of the first region 100A, and Ra indicating the surface roughness is about 200 nm to 600 nm.

  For this reason, the surface state of the smooth first region 11A is transferred to the alignment mark (conductive pattern) 13 as it is, and the surface roughness of the alignment mark 13 is reduced. Therefore, the alignment mark after the support plate 11 is removed can be easily recognized, and the alignment accuracy is improved.

  Further, the adhesion between the second region 11B, which is a so-called roughened surface having a large surface roughness, and the resin layer 12 in contact with the second region 11B is improved, and the resin layer 12 is peeled off in the manufacturing process of the wiring board. Can be suppressed.

  Although not shown in FIG. 2, an electrode pad (conductive pattern) is formed on the same plane as the alignment mark, and a conductive pattern such as a via plug or a pattern wiring connected to the electrode pad. Is formed, the support plate 11 is removed by etching. Further, the alignment mark and the electrode pad may be used together, or alignment may be performed using the electrode pad.

  In this way, it is possible to manufacture a wiring board (electronic component) that can be easily reduced in thickness and has good alignment accuracy.

  When a plurality of regions having different surface roughnesses are formed on the support plate 11, for example, 1) After forming a conductive pattern such as an alignment mark or an electrode pad on the surface of the support plate, the conductive pattern is used as a mask. The surface of the support plate is roughened (first method), and the entire surface of the support plate is roughened, then a mask pattern is formed to cover the surface, and the surface of the support plate is exposed to the roughening process. There is a method for smoothing the surface (second method).

  Next, more specific examples of the method of manufacturing a wiring board by the first method and the second method will be described in order in the following first and second embodiments.

  FIG. 3A to FIG. 3I are diagrams for explaining a method of manufacturing a wiring board (electronic component) according to the first embodiment of the present invention, following the procedure. However, in the following drawings, the same reference numerals are given to the portions described above, and the description may be omitted (the same applies to the following examples and drawings).

  First, in the step shown in FIG. 3A, a mask pattern 102 having openings 102A and 102B is formed on a support plate 101 made of Cu foil formed by, for example, electrolytic plating, by photolithography using a resist. Note that the surface of the support plate 101A is a surface state of a general metal plate, and Ra is a non-roughened surface (first region) 101A having a thickness of 100 nm or less. Said support plate is not limited to metal foil (Cu foil), For example, you may comprise from a normal metal plate.

  Next, in the step shown in FIG. 3B, the alignment mark (conductive pattern) 103 and the electrode pad (conductive pattern) 104 are in contact with the surface (first region 101A) of the support plate 101 exposed from the openings 102A and 102B. Respectively. That is, the alignment mark 103 and the electrode pad 104 are formed in the first region (non-roughened surface) 101A having a small surface roughness on the support plate 101.

  For example, the alignment mark 103 and the electrode pad 104 are formed on the same plane, and are formed by the same process and method. For example, the alignment mark 103 and the electrode pad 104 are formed by an electrolytic plating method using the support plate 101 made of a conductive material as a feeding path (electrode). In addition, the conductive pattern such as the alignment mark 103 and the electrode pad 104 is composed of, for example, a laminated structure of an Au layer and a Ni layer (the Au layer is on the support plate 101 side), but is not limited thereto. It can be configured in various structures such as a Ni layer and a Cu layer (Au layer is on the support plate 101 side) or a laminated structure of an Au layer and a Cu layer (Au layer is on the support plate 101 side).

  Next, in the step shown in FIG. 3C, the mask pattern 102 on the support plate 101 is removed. Here, after removing the mask pattern 102, for example, a wet process using a chemical solution containing an organic acid such as formic acid is performed to roughen the surface of the support plate 101, so that the alignment mark 103 and the electrode in the first region 101A. A region not covered by the pad 104 (conductive pattern) is defined as a roughened surface (second region) 101B. That is, the surface (second region) 101B of the support plate 101 is roughened by a wet process using a conductive pattern composed of the alignment mark 103 and the electrode pad 104 as a mask. In this case, the surface roughness Ra of the second region 101B is preferably 200 nm to 600 nm (for example, 400 nm).

  Next, in the step shown in FIG. 3D, an epoxy resin material, for example, is used as a main component so as to cover the alignment mark 103 and the electrode pad 104 and to come into contact with the roughened surface (second region) 101B of the support plate 101. A resin layer (build-up layer) 105 is formed. Further, via holes 105A reaching the electrode pads 104 are formed in the resin layer 105 by, for example, a laser.

  Next, in the step shown in FIG. 3E, first, a seed layer (not shown) is formed on the surface of the resin layer 105 by an electroless plating method of Cu, and then a resist pattern (not shown) is formed on the seed layer. Form. Further, a conductive pattern (another conductive pattern) 106 including a via plug in which a via hole is embedded and a pattern wiring connected to the via plug is formed by Cu electroplating using the seed layer as a power feeding path. After forming the conductive pattern 106, the resist pattern is peeled off, and the seed layer exposed by the peeling of the resist pattern is removed by etching.

  Next, in the step shown in FIG. 3F, the steps described above with reference to FIGS. 3D to 3E are repeated to sequentially laminate resin layers 107 and 109 corresponding to the resin layer 105 on the resin layer 105, thereby forming the conductive pattern 106. Conductive patterns 108 and 110 corresponding to are formed.

  Further, an insulating layer 111 made of a solder resist having an opening 111A from which a part of the conductive pattern 110 is exposed is formed on the resin layer 109.

  Next, in the step shown in FIG. 3G, the support plate 101 made of Cu is removed, for example, by wet etching using a chemical solution. In this way, the wiring board (electronic component) 100 can be formed.

  In the above-described wiring substrate 100, the alignment mark (conductive pattern) 103 is formed so as to be in contact with the first region 101A that is the non-roughened surface of the support plate 101. Therefore, the surface of the alignment mark 103 is smooth. For example, there is an effect that the accuracy of alignment is improved when a connection portion such as solder is formed on the electrode pad 104. Further, since the resin layer 105 is formed so as to be in contact with the second region 101B, which is the roughened surface of the support plate 101, the adhesion between the support plate 101 and the resin layer 105 is improved, and in the manufacturing process of the wiring board. The peeling of the resin layer is suppressed, and a highly reliable wiring board can be manufactured. In addition, the alignment mark and the electrode pad may be formed separately, but at least a part of the plurality of formed electrode pads is used as the alignment mark (that is, the electrode pad and the alignment mark are used together). Also good.

  Further, a connecting part may be formed on the wiring board 100 as described below, and a mounting component such as a semiconductor chip may be mounted.

  For example, as shown in FIG. 3H, alignment is performed using the alignment mark 103, and a connecting portion 112 made of solder is formed on the electrode pad 104 by, for example, printing or solder ball transfer and solder reflow. To do.

  Further, in the step shown in FIG. 3I, a mounting component 113 made of, for example, a semiconductor chip is mounted so as to be connected to the connection portion 112, and a space between the mounting component 113 and the resin layer 105 is embedded with a resin material 114 called an underfill. May be.

  Further, the mounting component 113 may be mounted so as to be connected to the conductive pattern 110 exposed from the opening 111 </ b> A of the insulating layer 111.

  4A to 4E are diagrams for explaining the procedure of the method for manufacturing a wiring board (electronic component) according to the second embodiment of the present invention.

  First, in the process shown in FIG. 4A, the surface of the support plate 201 made of a metal material such as Cu is wet-treated with a chemical solution containing an organic acid such as formic acid, for example, to obtain a roughened surface (second region) 201B. Form. In this case, the surface roughness Ra of the second region 201B is preferably 200 nm to 600 nm (for example, 400 nm).

  Next, in a step shown in FIG. 4B, a mask pattern 202 having openings 202A and 202B is formed on the second region 201B of the support plate 201.

  Next, in the step shown in FIG. 4C, the second region 201B exposed from the openings 202A and 202B of the mask pattern 202 is smoothed by, for example, a wet treatment with a chemical solution containing sodium persulfate, and a non-roughened surface ( The first area 201A). For example, the surface roughness Ra of the first region 201A is preferably 100 nm or less.

  Next, in the step shown in FIG. 4D, an alignment mark 203 and an electrode pad 204 are formed so as to be in contact with the surface (first region 201A) of the support plate 201 exposed from the openings 202A and 202B. That is, the alignment mark 203 and the electrode pad 204 are formed on the first region (non-roughened surface) 201A having a small surface roughness on the support plate 201. For example, the alignment mark 203 and the electrode pad 204 can be formed in the same manner as the alignment mark 103 and the electrode pad 104 described in the first embodiment.

  Next, in the step shown in FIG. 4E, the mask pattern 202 on the support plate 201 is removed.

  Thereafter, by performing the same processes as those in FIG. 3D and subsequent steps of the first embodiment, the resin layers 105, 107, 109, the insulating layer 111, the conductive patterns 106, 108, 110 shown in the first embodiment, A wiring board (electronic component) can be manufactured by forming the connecting portion 112 and mounting the mounting component as necessary.

  Also in this embodiment, the same effect as in the case of Embodiment 1 is obtained, the surface of the alignment mark 203 is smooth, the alignment accuracy is good, and the resin layer formed in contact with the support plate 201 is peeled off. There is an effect of suppressing.

  In the first and second embodiments, both the alignment mark and the electrode pad are formed corresponding to the non-roughened surface, but the present invention is not limited to this. For example, at least the alignment mark of the alignment mark and the electrode pad only needs to be formed corresponding to the non-roughened surface, and the electrode pad may be formed corresponding to the roughened surface as described below.

  5A to 5K are diagrams showing a method of manufacturing a wiring board (electronic component) according to Embodiment 3 of the present invention.

  First, in the step shown in FIG. 5A, the surface of the support plate 301 made of a metal material such as Cu is wet-treated with a chemical solution containing an organic acid such as formic acid, for example, to obtain a roughened surface (second region) 301B. Form. In this case, the surface roughness Ra of the second region 301B is preferably 200 nm to 600 nm (for example, 400 nm).

  Next, in the step shown in FIG. 5B, a mask pattern 302 having an opening 302 </ b> A is formed on the second region 301 </ b> B of the support plate 301.

  Next, in the step shown in FIG. 5C, the second region 301B exposed from the opening 302A of the mask pattern 302 is smoothed by, for example, a wet treatment with a chemical solution containing sodium persulfate, and the non-roughened surface (first surface) Region 301A). For example, the surface roughness Ra of the first region 301A is preferably 100 nm or less.

  Next, in the step shown in FIG. 5D, the mask pattern 302 is removed.

  Next, in a step shown in FIG. 5E, a mask pattern 320 having openings 320A and 320B is formed on the support plate 301. In this case, the first region (non-roughened surface) 301A is exposed from the opening 320A, and the second region 301B (roughened surface) is exposed from the opening 320B. That is, the opening 320A is formed corresponding to the opening 302A formed in the step of FIG. 5C.

  Next, in the step shown in FIG. 5F, an alignment mark 303 and an electrode pad 304 are formed so as to be in contact with the surface of the support plate 301 exposed from the openings 320A and 320B. That is, the alignment mark 303 is formed in the first region (non-roughened surface) 301A having a small surface roughness, and the electrode pad 304 is formed in the second region 301B having a large surface roughness. The For example, the alignment mark 303 and the electrode pad 304 can be formed in the same manner as the alignment mark 103 and the electrode pad 104 described in the first embodiment.

  Next, in the step shown in FIG. 5G, the mask pattern 320 on the support plate 301 is removed.

  Thereafter, by performing the same processes as those in FIG. 3D and subsequent steps of the first embodiment, the resin layers 105, 107, 109, the insulating layer 111, the conductive patterns 106, 108, 110 shown in the first embodiment, A wiring board (electronic component) can be manufactured by forming the connecting portion 112 and mounting the mounting component as necessary.

  Also in the present embodiment, the same effect as in the case of the first embodiment is obtained, the surface of the alignment mark 303 is smooth, the alignment accuracy is good, and the resin layer formed in contact with the support plate 301 is peeled off. There is an effect of suppressing.

  Further, as shown in the present embodiment, the electrode pad does not necessarily have the same surface roughness as the alignment mark, and may have the same surface roughness as the resin layer.

  Although the present invention has been described with reference to the preferred embodiments, the present invention is not limited to the specific embodiments described above, and various modifications and changes can be made within the scope described in the claims.

  ADVANTAGE OF THE INVENTION According to this invention, it becomes possible to provide the manufacturing method of the wiring board which can be reduced in thickness and the precision of alignment becomes favorable.

It is the schematic of the manufacturing method of the conventional electronic component. It is the schematic of the manufacturing method of the electronic component by this invention. FIG. 6 is a diagram (No. 1) illustrating a method for manufacturing an electronic component according to the first embodiment. FIG. 6 is a second diagram illustrating a method for manufacturing an electronic component according to the first embodiment. FIG. 6 is a diagram (No. 3) illustrating the method for manufacturing the electronic component according to the first embodiment. FIG. 6 is a diagram (No. 4) illustrating the method for manufacturing the electronic component according to the first embodiment. FIG. 10 is a diagram (No. 5) illustrating the method for manufacturing the electronic component according to the first embodiment. FIG. 6 is a view (No. 6) illustrating the method for manufacturing the electronic component according to the first embodiment. FIG. 7 is a view (No. 7) showing a method for manufacturing an electronic component according to Example 1. FIG. 8 is a view (No. 8) illustrating the method for manufacturing the electronic component according to the first embodiment. FIG. 9 is a diagram (No. 9) illustrating a method for manufacturing an electronic component according to Example 1. FIG. 6 is a diagram (No. 1) illustrating a method for manufacturing an electronic component according to a second embodiment. FIG. 6 is a second diagram illustrating the method for manufacturing an electronic component according to the second embodiment. FIG. 10 is a third diagram illustrating the method of manufacturing the electronic component according to the second embodiment. FIG. 6 is a diagram (No. 4) illustrating the method for manufacturing the electronic component according to the second embodiment. FIG. 10 is a diagram (No. 5) illustrating the method for manufacturing the electronic component according to the second embodiment. FIG. 10 is a diagram (No. 1) illustrating a method for manufacturing an electronic component according to a third embodiment. FIG. 6 is a second diagram illustrating a method for producing an electronic component according to a third embodiment. FIG. 11 is a diagram (No. 3) illustrating the method for manufacturing the electronic component according to the third embodiment. FIG. 10 is a diagram (No. 4) illustrating the method for manufacturing the electronic component according to the third embodiment. FIG. 6 is a diagram (No. 5) illustrating a method for manufacturing an electronic component according to a third embodiment. FIG. 6 is a diagram (No. 6) illustrating a method for manufacturing an electronic component according to Example 3. FIG. 7 is a view (No. 7) showing a method for manufacturing an electronic component according to Embodiment 3.

Explanation of symbols

100 Electronic parts 101, 201, 301 Support plate 101A, 201A, 301A First region (non-roughened surface)
101B, 201B, 301B Second region (roughened surface)
102, 202, 302, 320 Mask pattern 103, 203, 303 Alignment mark 104, 204, 304 Electrode pad 105, 107, 109 Resin layer 106, 108, 110 Conductive pattern 111 Insulating layer 112 Connection 113 Mounting component 114 Underfill

Claims (8)

A first step of roughening the surface of the support plate;
A second step of forming a mask pattern on the surface of the support plate and smoothing the surface of the support plate exposed from the mask pattern;
A third step including a step of forming a plurality of conductive patterns on the support plate so as to be in contact with the support plate;
A fourth step of covering the plurality of conductive patterns and forming a resin layer in contact with the support plate;
A fifth step of forming another conductive pattern connected to at least a part of the plurality of conductive patterns;
A sixth step of removing the support plate,
At least a part of the plurality of conductive patterns has a smooth surface by being formed on the smoothed support plate surface.   The method of manufacturing a wiring board according to claim 1, wherein the conductive pattern includes an alignment mark and an electrode pad. The third step includes
Removing the mask pattern;
Forming a resist having an opening at a predetermined formation position of the conductive pattern, including the smoothed surface of the support plate;
Forming a plurality of conductive patterns on the support plate so as to be in contact with the support plate via the resist;
The method for manufacturing a wiring board according to claim 1, further comprising a step of removing the resist after forming the conductive pattern.   4. The method for manufacturing a wiring board according to claim 2, wherein the conductive pattern formed on the smoothed surface of the support plate is the alignment mark.   5. The method of manufacturing a wiring board according to claim 1, wherein the plurality of conductive patterns are formed by electrolytic plating using the support plate as a power feeding path. 6. A wiring board comprising a resin layer and a conductive pattern whose one side is exposed from the resin layer,
By forming the resin layer and the conductive pattern on the roughened surface formed on the support member, one surface side of the resin layer and a part of the exposed surface of the conductive pattern are roughened surfaces,
Wherein by forming another conductive pattern on the smoothed non-roughened surface on which is formed in the support member, the wiring board obtained by the other exposed surface Hiara of surfaces of the conductive pattern.   The wiring board according to claim 6, wherein the conductive pattern includes an alignment mark and an electrode pad. The exposed surface of the conductive pattern is a roughened surface by roughening surfaces of the support member is transferred to the electrode Pas head,
The wiring board according to claim 7, wherein the alignment mark is an exposed surface of the conductive pattern that has been made non-roughened by transferring the non-roughened surface of the support member.

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