JP2011204740A - Solid-state image pickup device and manufacturing method of the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To improve a condensing rate, and to prevent the formation of an etching damage layer.SOLUTION: A solid-state image pickup device includes a semiconductor substrate 1 having a pixel 40 and a peripheral circuit 50, a photodiode (PD) 3 and a floating diffusion (FD) part 20 which are formed above the pixel, a plurality of source/drain regions 18 formed above the peripheral circuit, a gate insulating film 4 formed on the pixel and the peripheral circuit, a transfer gate electrode 5 formed between the PD and the FD part, a peripheral gate electrode 6 formed between the source/drain regions, an antireflection film 13 formed to cover the upper part of the PD, a first sidewall 15 formed at a side of the transfer gate electrode and a second sidewall 16 formed at a side of the peripheral gate electrode. The antireflection film, and the first and second sidewalls are laminated films including oxide films and nitride films.

Description

  The present invention relates to a solid-state imaging device and a manufacturing method thereof, and more particularly to a solid-state imaging device including a sidewall spacer and a manufacturing method thereof.

  Conventionally, solid-state imaging devices called charge coupled device (CCD) image sensors or complementary metal oxide semiconductor (CMOS) image sensors are produced by etching to form sidewall spacers. Includes an etching damage layer. For this reason, in the photodiode (PD) region and the floating diffusion (FD) region of the solid-state imaging device, a leakage current is generated through defects in the etching damage layer, and the leakage current is generated when an image is output. A white spot is generated in the generation portion of the pixel, and the pixel characteristics are deteriorated.

  In order to solve this problem, a solid-state imaging device with a reduced etching damage layer and a method for manufacturing the solid-state imaging device are proposed in, for example, Patent Document 1.

  Such a conventional solid-state imaging device will be described with reference to FIG.

As shown in FIG. 14, an element isolation region 102 that isolates an active region is formed on the semiconductor substrate 101. Further, an FD region 103 and a diffusion layer region 105 each formed of an N ⁻ diffusion layer 104 a and an N ⁺ diffusion layer 104 b are formed on the semiconductor substrate 101. On the semiconductor substrate 101, an oxide film 110 is formed as an etching protective film for preventing damage to the main surface of the semiconductor substrate 101 due to etching. A gate electrode 109 is formed between the FD region 103 and the diffusion layer region 105 on the oxide film 110, and a side wall spacer 111 a that is a stacked film of the oxide film 110 and the nitride film is formed on the side surface of the gate electrode 109. Is formed. Here, an oxide film 110 is also formed between the sidewall spacer 111 a and the semiconductor substrate 101. An oxide film 110 is also formed on the gate electrode 109.

  Next, a method for manufacturing the conventional solid-state imaging device will be described with reference to FIGS.

First, as shown in FIG. 15, an element isolation region 102 for isolating an active region is selectively formed on the semiconductor substrate 101. Thereafter, an oxide film 110 is formed on the entire main surface of the semiconductor substrate 101 by a chemical vapor deposition (CVD) method. The oxide film 110 is formed thin so as to have a thickness of about 50 nm. Next, the gate electrode 109 is formed between the element isolation regions 102 on the oxide film 110. Subsequently, using the gate electrode 109 as a mask, ion implantation is performed through the oxide film 110 to form the N ⁻ diffusion layer 104a. After that, the oxide film 110 is formed again so as to cover the upper surface and side surfaces of the gate electrode 109. Subsequently, a nitride film 111 having a thickness of 150 nm to 200 nm is stacked on the entire main surface of the semiconductor substrate 101 as a film made of a material different from the oxide film 110.

Next, as shown in FIG. 16, the nitride film 111 is etched to form sidewall spacers 111a. This etching is performed under conditions such that the oxide film 110 remains. Next, using the gate electrode 109 and the sidewall spacer 111a as a mask, an N ⁺ diffusion layer 104b is formed by performing ion implantation in a region to be the FD region 103 and the diffusion layer region 105 later through the oxide film 110.

JP 2002-190586 A

  In the future, it is expected that the miniaturization of the pixels and the speeding up of the operation will further progress with the increasing needs for downsizing and increasing the number of pixels of the solid-state imaging device. Along with miniaturization of pixels and higher speed of operation, a transistor that is further miniaturized with the improvement of the light condensing rate is required. Therefore, an antireflection film is optimally formed and a thinner sidewall spacer is provided. A transistor is required. For this reason, in order to make the sidewall spacer thinner, the etching time of the nitride film formed on the oxide film must be lengthened in spite of the fact that the oxide film as a base of the sidewall spacer is formed thin. I must. As a result, the semiconductor substrate under the oxide film is subjected to etching damage, and an increase in leakage current caused by the etching damage layer may increase white spots when an image is displayed.

  In view of the above-described conventional problems, an object of the present invention is to obtain a solid-state imaging device that can improve a light collection rate and is excellent in reducing an etching damage layer.

  In order to achieve the above object, according to the present invention, a solid-state imaging device is configured such that a laminated film of an oxide film and a nitride film is formed on a photodiode portion.

  Specifically, a solid-state imaging device according to the present invention is formed on a semiconductor substrate having a pixel portion and a peripheral circuit portion, a photodiode portion and a floating diffusion portion formed on the upper portion of the pixel portion, and an upper portion of the peripheral circuit portion. A plurality of source / drain regions, a gate insulating film formed on the pixel portion and the peripheral circuit portion, a transfer gate electrode formed between the photodiode portion and the floating diffusion portion on the gate insulating film, A peripheral gate electrode formed between the source / drain regions on the gate insulating film, an antireflection film formed so as to cover the photodiode portion, and a floating diffusion portion in the transfer gate electrode are formed. First sidewall spacers formed on the side surfaces of the peripheral gate electrode and side surfaces of the peripheral gate electrode And a second sidewall spacer formed antireflection film, the first sidewall spacer and the second sidewall spacers is a laminated film including an oxide film and a nitride film.

  According to the solid-state imaging device according to the present invention, since the laminated film of the oxide film is provided on the semiconductor substrate together with the antireflection film that is a laminated film including the oxide film and the nitride film, the light collection rate can be improved and the etching damage layer Can be prevented.

  In the solid-state imaging device according to the present invention, the antireflection film is a laminated film including a first oxide film, a second oxide film, and a nitride film, and the first sidewall spacer has an L-shaped cross section. The second oxide film is a laminated film including a first oxide film, a second oxide film having a L-shaped cross section, and a nitride film. The second sidewall spacer has a first oxide film having a I-shaped cross section and a cross section. A laminated film including an L-shaped second oxide film and a nitride film is preferable.

  In the solid-state imaging device according to the present invention, in the antireflection film, the film thickness of the first oxide film is 10 nm or more and 30 nm or less, and the film thickness of the second oxide film is 5 nm or more and 20 nm or less, The thickness of the nitride film is preferably 20 nm or more and 60 nm or less.

  In the solid-state imaging device according to the present invention, a silicide layer may be formed on the source / drain region.

  The solid-state imaging device manufacturing method according to the present invention includes a step (a) of forming a photodiode portion by injecting impurities into a pixel portion of a semiconductor substrate having a pixel portion and a peripheral circuit portion, and the pixel portion and the peripheral circuit portion. Forming a gate insulating film on the gate insulating film formed on the pixel portion, forming a transfer gate electrode on the gate insulating film formed on the pixel portion, and on the gate insulating film formed on the peripheral circuit portion; A step (c) of forming a peripheral gate electrode; a step (d) of forming a first oxide film so as to cover the gate insulating film, the transfer gate electrode and the peripheral gate electrode; and a first on the side surface of the peripheral gate electrode. A step (e) of removing the first oxide film formed on the peripheral circuit portion so that the oxide film remains, and the first oxide film and the transfer gate on the pixel portion and the peripheral circuit portion. Second so as to cover the electrode and the peripheral gate electrode A step (f) of sequentially forming an oxide film and a nitride film, and a first oxide film, a second oxide film, and a nitride film are formed on the pixel portion so as to remain on the side surface of the transfer gate electrode. The first oxide film, the second oxide film, and the nitride film are removed, and the second oxide film is formed on the peripheral circuit portion so that the second oxide film and the nitride film remain on the side surface of the peripheral gate electrode. Removing the oxide film and nitride film (g), and forming a floating diffusion portion by implanting impurities into the side of the nitride film remaining on the side surface of the transfer gate electrode in the upper portion of the pixel portion, A step (h) of forming a source / drain region by implanting impurities into the side of the nitride film remaining on the side surface of the peripheral gate electrode in the upper part of the peripheral circuit portion.

  According to the method for manufacturing a solid-state imaging device according to the present invention, the first oxide film is formed so as to cover the gate insulating film, the transfer gate electrode, and the peripheral gate electrode, and the first oxide film, the transfer gate electrode, and the peripheral gate electrode are formed. Since the second oxide film and the nitride film are sequentially formed so as to cover the surface, the light collection rate can be improved and the formation of the etching damage layer can be prevented.

  The method for manufacturing a solid-state imaging device according to the present invention may further include a step (h1) of forming a silicide layer on the source / drain regions after the step (h).

  In the method for manufacturing a solid-state imaging device according to the present invention, the first oxide film formed in the step (d) has a thickness of 10 nm to 30 nm, and the second oxidation formed in the step (f). The film thickness is preferably 5 nm to 20 nm, and the nitride film thickness is preferably 30 nm to 100 nm.

  The manufacturing method of the solid-state imaging device according to the present invention may further include a step (f1) of reducing the thickness of the nitride film on the photodiode portion after the step (f).

  In the solid-state imaging device manufacturing method according to the present invention, in the step (f1), the thickness of the nitride film is preferably 20 nm or more and 60 nm or less.

  According to the solid-state imaging device according to the present invention, the light collection rate can be improved and the etching damage to the semiconductor substrate can be prevented. Therefore, the leakage current can be reduced, so that the pixel characteristics can be improved.

It is sectional drawing which shows the solid-state imaging device which concerns on one Embodiment of this invention. It is sectional drawing which shows 1 process of the manufacturing method of the solid-state imaging device which concerns on one Embodiment of this invention. It is sectional drawing which shows 1 process of the manufacturing method of the solid-state imaging device which concerns on one Embodiment of this invention. It is a top view which shows the pattern layout of 1 process of the manufacturing method of the solid-state imaging device which concerns on one Embodiment of this invention. It is sectional drawing which shows 1 process of the manufacturing method of the solid-state imaging device which concerns on one Embodiment of this invention. It is a top view which shows the pattern layout of 1 process of the manufacturing method of the solid-state imaging device which concerns on one Embodiment of this invention. It is sectional drawing which shows 1 process of the manufacturing method of the solid-state imaging device which concerns on one Embodiment of this invention. It is sectional drawing which shows 1 process of the manufacturing method of the solid-state imaging device which concerns on one Embodiment of this invention. It is a top view which shows the pattern layout of 1 process of the manufacturing method of the solid-state imaging device which concerns on one Embodiment of this invention. It is sectional drawing which shows 1 process of the manufacturing method of the solid-state imaging device which concerns on one Embodiment of this invention. It is sectional drawing which shows 1 process of the manufacturing method of the solid-state imaging device which concerns on one Embodiment of this invention. It is sectional drawing which shows 1 process of the manufacturing method of the solid-state imaging device which concerns on one Embodiment of this invention. It is sectional drawing which shows 1 process of the manufacturing method of the solid-state imaging device which concerns on one Embodiment of this invention. It is sectional drawing which shows the conventional solid-state imaging device. It is sectional drawing which shows 1 process of the manufacturing method of the conventional solid-state imaging device. It is sectional drawing which shows 1 process of the manufacturing method of the conventional solid-state imaging device.

  A solid-state imaging device according to an embodiment of the present invention will be described with reference to FIG.

  As shown in FIG. 1, the element isolation oxide film 2 is formed on the boundary between the pixel unit 40 and the peripheral circuit unit 50 on the semiconductor substrate 1 made of, for example, silicon having the pixel unit 40 and the peripheral circuit unit 50. ing. A photodiode (PD) portion 3 and a floating diffusion (FD) portion 20 are formed on the upper portion of the pixel portion 40, and a plurality of source / drain regions 18 are formed on the upper portion of the peripheral circuit portion 50. A salicide layer 23 is formed on the source / drain region 18. A gate insulating film 4 made of silicon oxide is formed on the pixel portion 40 except for the region where the FD portion 20 is formed, and between the adjacent source / drain regions 18 on the peripheral circuit portion 50. A gate insulating film 4 is formed. In the pixel portion 40, a transfer gate 5 as a transfer gate electrode is formed between the PD portion 3 and the FD portion 20 on the gate insulating film 4, and the peripheral gate is formed on the gate insulating film 4 in the peripheral circuit portion 50. A transistor gate 6 as an electrode is formed. A first oxide film (silicon oxide film) 7, a second oxide film (silicon oxide film) 10, and a first nitride film (on the side and top surfaces of the gate insulating film 4 and the transfer gate 5 on the PD portion 3. (Silicon nitride film) 11 is sequentially formed. On the side surface of the transfer gate 5 where the FD portion 20 is formed, a first oxide film 7 having an L-shaped cross section, a second oxide film 10 having an L-shaped cross section, and a first nitride film 11 are formed. A pixel portion (first) sidewall spacer 15 which is a laminated film is formed. Further, on the side surface of the transistor gate 6, a peripheral circuit portion which is a laminated film of a first oxide film 7 having an I-shaped section, a second oxide film 10 having an L-shaped section, and a first nitride film 11. A (second) sidewall spacer 16 is formed. On the PD portion 3, an oxide film and a nitride film are formed by a first nitride film 11 and a three-layer oxide film of a gate insulating film 4, a first oxide film 7 and a second oxide film 10. An antireflection film 13 having a laminated structure is provided. Here, in the antireflection film 13, the thickness of the first oxide film 7 is, for example, not less than 10 nm and not more than 30 nm, and the thickness of the second oxide film 10 is, for example, not less than 5 nm and not more than 20 nm. The thickness of the nitride film 11 is, for example, not less than 20 nm and not more than 60 nm. In the pixel portion 40, a third oxide film 21 is formed so as to cover the antireflection film 13, the transfer gate 5, and the pixel portion sidewall spacer 15. In the pixel portion 40, a second nitride film 24 is formed so as to cover a region on the third oxide film 21 except for the antireflection film 13, and in the peripheral circuit portion 50, the transistor gate 6, the peripheral circuit portion A second nitride film 24 is formed so as to cover the sidewall spacer 16 and the salicide layer 23. An interlayer insulating film 26 is formed so as to cover the second nitride film 24 and the antireflection film 13. A wiring layer is formed on the interlayer insulating film 26, but the illustration of the structure of the wiring layer is omitted.

  According to the solid-state imaging device according to the embodiment of the present invention, the stacked film of the oxide film is formed on the semiconductor substrate 1 together with the antireflection film 13 that is the stacked film of the oxide film and the nitride film. The rate can be improved, the formation of an etching damage layer can be prevented, and the leakage current can be reduced, so that the pixel characteristics can be improved.

  Next, a method for manufacturing a solid-state imaging device according to an embodiment of the present invention will be described with reference to FIGS.

  First, as shown in FIG. 2, the element isolation oxide film 2 is formed on the boundary between the pixel unit 40 and the peripheral circuit unit 50 on the semiconductor substrate 1 having the pixel unit 40 and the peripheral circuit unit 50. Further, the PD portion 3 is formed by implanting impurities into the upper portion of the pixel portion 40 by ion implantation. Subsequently, a gate insulating film 4 having a film thickness of, for example, 5 nm or more and 20 nm or less is formed on the semiconductor substrate 1, and a transfer gate 5 is selectively formed on the gate insulating film 4 in the pixel portion 40. A transistor gate 6 is selectively formed on the gate insulating film 4 in the circuit unit 50.

  Next, as shown in FIG. 3, the first film having a thickness of about 10 nm to about 30 nm so as to cover the gate insulating film 4, the transfer gate 5, and the transistor gate 6 by, for example, chemical vapor deposition (CVD). An oxide film 7 is formed. Subsequently, a first resist film 8 having a pattern covering the pixel portion 40 is formed on the first oxide film 7 by lithography. At this time, as shown in FIG. 4, the member formed in the pixel portion 40 is covered with the first resist film. Here, in FIG. 4, members formed in the peripheral circuit unit 50 are omitted. Subsequently, a first oxide film sidewall spacer 9 having a thin I-shaped cross section is formed on the side surface of the transistor gate 6 in the peripheral circuit portion 50 by dry etching using the first resist film 8 as a mask. The film thickness of the first oxide film 7 in the pixel portion 40 is maintained at the initial film thickness when the first oxide film 7 is formed because the surface is not etched.

  Next, as shown in FIG. 5, after removing the first resist film 8, a second film having a thickness of about 5 nm to about 20 nm so as to cover the pixel unit 40 and the peripheral circuit unit 50 by, for example, a CVD method. The first oxide film 10 having a thickness of, for example, about 30 nm to about 100 nm is formed on the second oxide film 10. Thereafter, a second resist film 12 having a pattern opening the upper part of the PD portion 3 is formed by lithography. Subsequently, etching is performed by dry etching using the second resist film 12 as a mask so that the exposed first nitride film 11 has a thickness of about 20 nm to about 60 nm. Thereby, the oxide film and the nitride film are formed on the PD portion 3 by the first nitride film 11 and the three-layer oxide film of the gate insulating film 4, the first oxide film 7 and the second oxide film 10. The antireflection film 13 having a laminated structure is formed.

  Next, as shown in FIG. 6, after removing the second resist film 12, a lithography process is performed so that the PD unit 3 is not exposed on the antireflection film 13 and the transfer gate 5 in the pixel unit 40. 3 resist film 14 is formed. Here, in FIG. 6, the antireflection film 13 is omitted. Further, members formed in the peripheral circuit unit 50 are also omitted.

  Next, as shown in FIG. 7, an L-shaped cross section is formed on the side surface on the side where the FD portion is to be formed later in the transfer gate 5 of the pixel portion 40 by a dry etching method using the third resist film 14 as a mask. A pixel portion (first) sidewall spacer 15, which is a laminated film of the first oxide film 7, the second oxide film 10 having a L-shaped cross section, and the first nitride film 11 is formed. Further, in the peripheral circuit portion 50, a peripheral portion that is a laminated film of a first oxide film sidewall spacer 9, a second oxide film 10 having an L-shaped cross section, and a first nitride film 11 on the side surface of the transistor gate 6. A circuit portion (second) sidewall spacer 16 is formed.

  Here, before the pixel portion sidewall spacer 15 is formed, the film thickness of the first oxide film 7 is not less than 10 nm and not more than 30 nm, which is equivalent to the initial film thickness formed. For this reason, even if the second oxide film 10 is also removed when the first nitride film 11 is removed by the etching method, the first oxide film 7 can have a film thickness of about 10 nm, for example. The oxide film 7 functions as an etching protective film. Even if the first oxide film 7 is also removed by the etching method, the gate insulating film 4 remains under the structure.

  As a result, the oxide film functions as an etching protective film under the pixel portion side wall spacer 15 on the side surface of the transfer gate 5, so that etching damage to the semiconductor substrate 1 when the side wall spacer 15 is formed can be prevented. .

  Next, as shown in FIG. 8, after removing the third resist film 14, a fourth resist film 17 having a pattern covering the pixel portion 40 is formed by lithography. Subsequently, using the fourth resist film 17 as a mask, impurities are implanted by ion implantation into the upper portion of the semiconductor substrate 1 where the surface of the peripheral circuit portion 50 is exposed, thereby forming the source / drain regions 18.

  Next, as shown in FIG. 9, after removing the fourth resist film 17, a fifth resist film 19 having a pattern in which the vicinity of the transfer gate 5 is opened is formed by a lithography process. In FIG. 9, members formed in the peripheral circuit unit 50 are omitted.

  Next, as shown in FIG. 10, with the fifth resist film 19 as a mask, the pixel portion side wall spacer 15 is formed in the opening of the fifth resist film 19 by, for example, wet etching using a hydrofluoric acid solution. The first oxide film 7 and the gate insulating film 4 functioning as an etching protective film when forming are removed. Thereafter, an impurity is implanted into the exposed upper portion of the semiconductor substrate 1 by ion implantation to form the FD portion 20.

  At this time, the capacitance of the FD portion 20 can be stabilized by removing the first oxide film 7 and the gate insulating film 4 before performing the ion implantation. This is because if the ion implantation is performed with the first oxide film 7 and the gate insulating film 4 left, the depth of the ion implantation layer varies due to variations in the film thickness.

  Next, as shown in FIG. 11, after removing the fifth resist film 19, a third oxide film of about 10 nm to 70 nm so as to cover the pixel unit 40 and the peripheral circuit unit 50 by, for example, a CVD method. 21 is formed. Subsequently, a sixth resist film 22 having a pattern covering the pixel portion 40 is formed by lithography. Thereafter, the source / drain region 18 is exposed by a dry etching method using the sixth resist film 22 as a mask, and a salicide layer 23 is formed on the exposed source / drain region 18.

  Next, as shown in FIG. 12, after removing the sixth resist film 22, a second nitride film of about 10 nm or more and 50 nm or less so as to cover the pixel unit 40 and the peripheral circuit unit 50 by, for example, the CVD method. 24 is formed. Subsequently, a seventh resist film 25 having a pattern opening on the antireflection film 13 is formed by lithography. Thereafter, the exposed second nitride film 24 is removed by a dry etching method using the seventh resist film 25 as a mask. At this time, the third oxide film 21 may also be removed. Since the second nitride film 24 on the antireflective film 13 is removed, the antireflective film 13 can maintain a two-layer structure of an oxide film and a nitride film, thereby preventing a reduction in light collection rate.

  Next, as shown in FIG. 13, after removing the seventh resist film 25, interlayer insulation for forming a wiring layer on the antireflection film 13 so as to cover the pixel portion 40 and the peripheral circuit portion 50. A film 26 is formed. Thereafter, although not shown, a wiring layer is formed on the interlayer insulating film 26 to complete the solid-state imaging device.

  According to the method for manufacturing a solid-state imaging device according to an embodiment of the present invention, the light collection rate can be improved by forming the antireflection film. Further, the etching damage to the FD portion can be prevented by covering the pixel portion with a resist film during the etching for forming the thinned first oxide film sidewall spacer. Further, in the etching for forming the pixel portion side wall spacer, the oxide film can function as an etching protective film, so that the influence of the etching can be prevented from reaching the semiconductor substrate. Thereby, since a damage layer can be reduced compared with the conventional solid-state imaging device, a leakage current can be reduced. For this reason, since the white point at the time of the image output of a solid-state imaging device can be reduced, a pixel characteristic becomes favorable.

  Although the CMOS image sensor is taken as an example of the method for manufacturing the solid-state imaging device of the present invention, the present invention can be similarly applied to solid-state imaging devices having other configurations having a sidewall structure.

  The solid-state imaging device and the manufacturing method thereof according to the present invention can improve the light condensing rate and prevent etching damage to the semiconductor substrate. Therefore, the leakage current can be reduced and the pixel characteristics can be improved. This is useful for a solid-state imaging device including a wall spacer, a manufacturing method thereof, and the like.

DESCRIPTION OF SYMBOLS 1 Semiconductor substrate 2 Element isolation oxide film 3 Photodiode (PD) part 4 Gate insulating film 5 Transfer gate (transfer gate electrode)
6 Transistor gate (peripheral gate electrode)
7 first oxide film 8 first resist film 9 first oxide film sidewall spacer 10 second oxide film 11 first nitride film 12 second resist film 13 antireflection film 14 third resist film 15 Pixel part (first) side wall spacer 16 Peripheral circuit part (second) side wall spacer 17 Fourth resist film 18 Source / drain region 19 Fifth resist film 20 Floating diffusion (FD) part 21 Third Oxide film 22 Sixth resist film 23 Salicide layer 24 Second nitride film 25 Seventh resist film 26 Interlayer insulating film 40 Pixel section 50 Peripheral circuit section

Claims (9)

A semiconductor substrate having a pixel portion and a peripheral circuit portion;
A photodiode portion and a floating diffusion portion formed on the pixel portion;
A plurality of source / drain regions formed on the peripheral circuit portion;
A gate insulating film formed on the pixel portion and the peripheral circuit portion;
A transfer gate electrode formed between the photodiode portion and the floating diffusion portion on the gate insulating film;
A peripheral gate electrode formed between the source / drain regions on the gate insulating film;
An antireflective film formed to cover the photodiode portion;
A first sidewall spacer formed on a side surface of the transfer gate electrode on the side where the floating diffusion portion is formed;
A second sidewall spacer formed on a side surface of the peripheral gate electrode,
The solid-state imaging device, wherein the antireflection film, the first sidewall spacer, and the second sidewall spacer are a laminated film including an oxide film and a nitride film. The antireflection film is a laminated film including a first oxide film, a second oxide film, and a nitride film,
The first sidewall spacer is a laminated film including the first oxide film having an L-shaped section, the second oxide film having an L-shaped section, and the nitride film,
The second sidewall spacer is a laminated film including the first oxide film having an I-shaped cross section, the second oxide film having an L-shaped cross section, and the nitride film. The solid-state imaging device according to claim 1.   In the antireflection film, the first oxide film has a thickness of 10 nm to 30 nm, the second oxide film has a thickness of 5 nm to 20 nm, and the nitride film has a thickness of 20 nm. The solid-state imaging device according to claim 2, wherein the solid-state imaging device has a thickness of 60 nm or more.   The solid-state imaging device according to claim 1, wherein a silicide layer is formed on the source / drain region. A step (a) of forming a photodiode portion by injecting impurities into a pixel portion of a semiconductor substrate having a pixel portion and a peripheral circuit portion;
A step (b) of forming a gate insulating film on the pixel portion and the peripheral circuit portion;
(C) forming a transfer gate electrode on the gate insulating film formed on the pixel portion and forming a peripheral gate electrode on the gate insulating film formed on the peripheral circuit portion; When,
A step (d) of forming a first oxide film so as to cover the gate insulating film, the transfer gate electrode and the peripheral gate electrode;
Removing the first oxide film formed on the peripheral circuit portion so that the first oxide film remains on the side surface of the peripheral gate electrode;
(F) sequentially forming a second oxide film and a nitride film on the pixel portion and the peripheral circuit portion so as to cover the first oxide film, the transfer gate electrode, and the peripheral gate electrode;
The first oxide film and the second oxide film formed on the pixel portion so that the first oxide film, the second oxide film, and the nitride film remain on the side surface of the transfer gate electrode. And the second oxide film and the nitride film formed on the peripheral circuit portion so that the second oxide film and the nitride film remain on the side surface of the peripheral gate electrode. Removing (g);
A floating diffusion portion is formed by injecting impurities into the side of the nitride film remaining on the side surface of the transfer gate electrode in the upper portion of the pixel portion, and the peripheral gate electrode in the upper portion of the peripheral circuit portion is formed. And a step (h) of forming a source / drain region by implanting impurities into the side of the nitride film remaining on the side surface.   6. The method of manufacturing a solid-state imaging device according to claim 5, further comprising a step (h1) of forming a silicide layer on the source / drain region after the step (h). The film thickness of the first oxide film formed in the step (d) is 10 nm or more and 30 nm or less,
The film thickness of the second oxide film formed in the step (f) is 5 nm or more and 20 nm or less, and the film thickness of the nitride film is 30 nm or more and 100 nm or less. A method for manufacturing a solid-state imaging device according to 5 or 6.   8. The method according to claim 5, further comprising a step (f1) of reducing the thickness of the nitride film on the photodiode portion after the step (f). The manufacturing method of the solid-state imaging device of description.   9. The method of manufacturing a solid-state imaging device according to claim 8, wherein in the step (f1), the thickness of the nitride film is set to 20 nm or more and 60 nm or less.

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