JP2011187871A - Semiconductor device and method of manufacturing the same, light emitting device, and electronic apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device which, even if source and drain electrodes and an impurity layer are out of alignment with a channel protection layer, suppresses a variation in on-current characteristic, to provide a manufacturing method thereof, and also to provide a light emitting device having a good image quality that improves an yield of a product, and an electronic apparatus with the light emitting device mounted thereon. <P>SOLUTION: The semiconductor device includes: the channel protection layer 15 provided on a semiconductor layer 14 of a thin-film transistor TFT; and a carbon insulation film 16 provided between the source and drain electrodes 18 and an impurity semiconductor layer 17. The semiconductor layer 14 is formed of microcrystalline silicon crystallized by, for example, laser annealing process of amorphous silicon. The carbon insulation film 16 is a photothermal conversion layer applied in the laser annealing process, and is a left-over part of the photothermal conversion layer. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to a semiconductor device, a manufacturing method thereof, a light emitting device, and an electronic device, and more particularly, a semiconductor device provided with an inverted staggered structure (bottom gate type) thin film transistor over an insulating substrate, a manufacturing method thereof, The present invention relates to a light-emitting device to which a semiconductor device is applied and an electronic device in which the light-emitting device is mounted.

  2. Description of the Related Art In recent years, thin displays such as liquid crystal display devices, organic electroluminescence displays, and plasma displays are widely used as displays and monitors for electronic devices such as mobile phones and digital cameras, as well as televisions and personal computers. In a display panel and a driver for such a thin display, a panel structure including a thin film transistor element using a silicon thin film as a channel layer on an insulating substrate such as glass is generally used.

  As is well known, thin film transistor elements can be broadly classified into two types, an amorphous silicon thin film transistor and a crystalline silicon thin film transistor, based on the solid structure of the silicon thin film.

Amorphous silicon thin film transistors are characterized in that an amorphous silicon thin film can be uniformly formed in a large area at a low cost, and there is little variation in performance between adjacent elements. However, since an amorphous silicon thin film transistor has a low electron mobility (approximately 0.5 to ¹ cm ² V ⁻¹ s ⁻¹ ), for example, such a thin film transistor element is applied to a display device, so When a circuit such as a driver is formed at the same time, there is a problem that sufficient performance as a driver circuit cannot be realized. In addition, the amorphous silicon thin film transistor also has a disadvantage that the threshold voltage (Vth) shifts (that is, stress resistance is low) when driven for a long period of time.

  On the other hand, a crystalline silicon thin film transistor has a high electron mobility and a small shift of the threshold voltage Vth with time. Therefore, as described above, even when a driver circuit is formed simultaneously with a pixel of a display device, the driver It has a feature that it can realize sufficient performance as a circuit. In particular, in recent years, a thin film transistor (a microcrystalline silicon thin film transistor or a microcrystalline silicon thin film transistor) having a microcrystalline silicon thin film mixed with amorphous, microcrystalline, and crystalline silicon as a semiconductor layer has attracted attention.

  A microcrystalline silicon thin film transistor has a slightly lower electron mobility than a polycrystalline silicon thin film transistor, but is higher than an amorphous silicon thin film transistor and has a large threshold voltage variation. It has an excellent feature that it is as small as a high-quality silicon thin film transistor, and further, variation in performance between adjacent elements is as small as that of an amorphous silicon thin film transistor. Such microcrystalline silicon generally has a crystal grain size in the order of several tens of nm to several μm, and the crystallized silicon thin film contains approximately 30% of amorphous silicon. It is defined as a state.

  As a method for forming a silicon thin film used for such a microcrystalline silicon thin film transistor, for example, as described in Patent Document 1, a photothermal conversion layer is formed on an amorphous silicon thin film and then irradiated with laser light. Thus, a method has been proposed in which the photothermal conversion layer is heated, and the amorphous silicon underneath is annealed with the heat to form microcrystalline silicon.

JP 2007-5508 A

  The thin film transistor to which the above-described microcrystalline silicon thin film forming method is applied has the following problems. Various thin film transistor structures are known as thin film transistors applied to display panels and driver drivers. In general, thin film transistors having an inverted stagger structure disclosed in Patent Document 1 and the like described above are often used. In such a thin film transistor, when a channel stopper type device structure having a channel protective layer that covers and protects a semiconductor layer serving as a channel layer is applied when patterning the source and drain electrodes, the source and drain with respect to the channel protective layer are applied. There may be a misalignment between the electrode and the impurity layer (dope layer). When such misalignment varies between thin film transistors arranged in the substrate surface, there is a problem that variation in on-current characteristics increases. For this reason, when such a thin film transistor is applied as a display panel of the above-described thin display, a switching element or a driving element of a driving driver, there is a problem in that the product yield is reduced and the display image quality is deteriorated. In addition, the problem of the manufacturing method which concerns on a prior art is demonstrated in detail in embodiment mentioned later.

  Therefore, in view of the above-described problems, the present invention turns on the thin film transistors arranged in the substrate plane even when the alignment of the source, drain electrodes and impurity layers (doped layers) with respect to the channel protective layer occurs. It is an object of the present invention to provide a semiconductor device and a manufacturing method thereof that can suppress variations in current characteristics. It is another object of the present invention to provide a light emitting device that can improve the yield of products and has good image quality, and an electronic device in which the light emitting device is mounted.

  The semiconductor device according to claim 1 protects at least a gate electrode, a semiconductor layer facing the gate electrode through a gate insulating film, and a channel region formed in the semiconductor layer on the substrate. The film quality of the semiconductor layer provided between the channel protective layer, the source and drain electrodes facing each other with the channel protective layer interposed therebetween, the source electrode and the drain electrode, and the channel protective layer is changed. And a light-to-heat conversion layer.

According to a second aspect of the present invention, in the semiconductor device according to the first aspect, the photothermal conversion layer is an insulating film made of diamond-like carbon.
According to a third aspect of the present invention, in the semiconductor device according to the first or second aspect, the semiconductor layer is formed of microcrystalline silicon.
According to a fourth aspect of the present invention, in the semiconductor device according to any one of the first to third aspects, the semiconductor device is a thin film transistor having an inverted staggered structure.

  According to a fifth aspect of the present invention, there is provided a method for manufacturing a semiconductor device, comprising: sequentially forming an insulating film serving as a channel protective film and a photothermal conversion layer on a semiconductor layer having a first film quality formed on a substrate; A step of irradiating the light-to-heat conversion layer with laser light to change the first film quality of the semiconductor layer to a second film quality, and the light-to-heat conversion layer and the insulating film in the same planar shape A step of sequentially patterning to form the channel protective film and the photothermal conversion layer stacked on the channel protective film, and a step of forming an impurity semiconductor layer so as to cover the channel protective film and the photothermal conversion layer Patterning the impurity semiconductor layer, forming the impurity semiconductor layer so as to face each other with the channel protective film interposed therebetween and to extend on both ends of the channel protective film, and the channel Etching the photothermal conversion layer exposed between the impurity semiconductor layers on the protective film to leave a part of the photothermal conversion layer between the impurity semiconductor layer and the channel protective film; and the impurity semiconductor layer Forming a source electrode and a drain electrode by patterning a metal layer formed so as to cover the impurity semiconductor layer so as to extend over the impurity semiconductor layer.

According to a sixth aspect of the present invention, in the method of manufacturing a semiconductor device according to the fifth aspect, the semiconductor layer made of the first film quality is made of amorphous silicon, and the semiconductor layer made of the second film quality is It is characterized by comprising microcrystalline silicon.
A seventh aspect of the present invention is the method of manufacturing a semiconductor device according to the fifth or sixth aspect, wherein the photothermal conversion layer is an insulating film made of diamond-like carbon.
According to an eighth aspect of the present invention, in the method of manufacturing a semiconductor device according to any one of the fifth to seventh aspects, the step of patterning the impurity semiconductor layer includes the step of patterning the impurity semiconductor layer and then the second film quality. A step of continuously patterning the semiconductor layer.
According to a ninth aspect of the present invention, in the method of manufacturing a semiconductor device according to the eighth aspect, the photothermal heat exposed between the impurity semiconductor layers includes a step of subjecting the side wall portion of the patterned semiconductor layer to end face oxidation by oxygen plasma treatment. The step of etching the conversion layer is included in the step of performing the end face oxidation, and the photothermal conversion layer exposed between the impurity semiconductor layers is also etched when the side wall portion of the semiconductor layer is end face oxidized by the oxygen plasma treatment. It is characterized by being.

  A light-emitting device according to claim 10 is a light-emitting panel in which a plurality of pixels each having a light-emitting element and a light-emission driving circuit for driving the light-emitting element are arranged on a substrate, and the light-emitting panel is arranged in the light-emitting panel. A selection drive circuit for outputting a selection signal for setting the selected pixel to a selected state, and a signal drive circuit for supplying a grayscale signal to the pixel set to the selected state. The light emitting driving circuit, or the switching element or driving element constituting the selection driving circuit and the signal driving circuit is a semiconductor facing the gate electrode on the substrate through at least a gate electrode and a gate insulating film A channel protective layer that protects a channel region formed in the semiconductor layer, a source electrode and a drain electrode that face each other with the channel protective layer interposed therebetween, and the source electrode And fine the drain electrode, it is provided between the channel protective layer, and having a photothermal conversion layer for changing the film quality of the semiconductor layer.

According to an eleventh aspect of the present invention, in the light emitting device according to the tenth aspect, the photothermal conversion layer is an insulating film made of diamond-like carbon.
A twelfth aspect of the present invention is the light emitting device according to the tenth or eleventh aspect, wherein the semiconductor layer is made of microcrystalline silicon.
An electronic apparatus according to a thirteenth aspect of the invention is characterized in that the light emitting device according to any one of the tenth to twelfth aspects is mounted.

  According to the present invention, even when the source, drain electrode, and impurity layer (dope layer) are misaligned with respect to the channel protective layer, variations in on-current characteristics of thin film transistors arranged in the substrate plane are suppressed. be able to. Further, according to the present invention, the yield of products can be improved and a display with good image quality can be realized.

It is a schematic sectional drawing which shows one Embodiment of the semiconductor device which concerns on this invention. It is a process flow which shows the manufacturing method of the semiconductor device which concerns on one Embodiment. It is a schematic process sectional drawing (the 1) which shows the manufacturing method of the semiconductor device which concerns on one Embodiment. It is a schematic process sectional drawing (the 2) which shows the manufacturing method of the semiconductor device which concerns on one Embodiment. It is a schematic sectional drawing which shows an example of the semiconductor device used as a comparative example. It is a process flow which shows an example of the manufacturing method of the semiconductor device used as a comparative example. It is schematic process sectional drawing (the 1) which shows the manufacturing method of the semiconductor device used as a comparative example. It is schematic process sectional drawing (the 2) which shows the manufacturing method of the semiconductor device used as a comparative example. It is a schematic block diagram which shows the 1st structural example of the display apparatus with which the semiconductor device which concerns on this invention is applied. It is a schematic block diagram which shows the 2nd structural example of the display apparatus with which the semiconductor device which concerns on this invention is applied. It is a perspective view which shows the structural example of the digital camera to which the light-emitting device which concerns on this invention is applied. It is a perspective view which shows the structural example of the thin-type television to which the light-emitting device based on this invention is applied. 1 is a perspective view illustrating a configuration example of a mobile personal computer to which a light emitting device according to the present invention is applied. It is a figure which shows the structural example of the mobile telephone to which the light-emitting device which concerns on this invention is applied.

Hereinafter, a semiconductor device, a manufacturing method thereof, a light emitting device, and an electronic device according to the present invention will be described in detail with reference to embodiments.
<Semiconductor device>
FIG. 1 is a schematic cross-sectional view showing an embodiment of a semiconductor device according to the present invention. Here, FIG. 1 shows a configuration in which only one thin film transistor is provided over a substrate for the sake of simplicity.

  As shown in FIG. 1, a semiconductor device according to an embodiment of the present invention has an inverted stagger structure having a channel stopper type element structure on one surface (upper surface in the drawing) side of an insulating substrate 11 such as glass or plastic. The thin film transistor TFT is provided.

  Specifically, as shown in FIG. 1, the thin film transistor TFT according to this embodiment includes a gate electrode 13, a gate insulating film 12, a semiconductor layer 14, a channel protective layer 15, a carbon insulating film (diamond-like carbon). (DLC) thin film; photothermal conversion layer) 16, impurity semiconductor layer (highly doped semiconductor layer) 17, source and drain electrodes (hereinafter collectively referred to as “source and drain electrodes”) 18, protective insulating film (over Coating insulating film) 19.

  The gate electrode 13 is provided on one surface side of the insulating substrate 11 and is covered with the gate insulating film 12. The semiconductor layer 14 is provided in a region corresponding to the gate electrode 13 through the gate insulating film 12. In the present embodiment, the semiconductor layer 14 is formed of microcrystalline silicon. The channel protective layer 15 is provided on the semiconductor layer 14 where the channel region is formed. The source and drain electrodes 18 are opposed to each other with the channel protective layer 15 interposed therebetween, and are respectively provided so as to extend from both ends of the channel protective layer 15 onto the semiconductor layer 14. An impurity semiconductor layer 17 is provided between the channel protective layer 15 and the semiconductor layer 14 and the source and drain electrodes 18. Further, a carbon insulating film 16 is provided between the channel protective layer 15 and the impurity semiconductor layer 17 on both ends of the channel protective layer 15.

  Although FIG. 1 shows a configuration in which the thin film transistor TFT provided on the substrate 11 is covered and protected by the protective insulating film 19, in the actual product, for example, the gate electrode 13, the source, and the drain electrode 18 are protected. It is connected to other elements and wirings through terminal holes (not shown) provided in the insulating film 19. Further, in place of the protective insulating film 19 shown in FIG. 1, an interlayer insulating film, a planarizing film, or the like is formed on the thin film transistor TFT, and the display element, an upper wiring layer, or the like is formed through an opening provided in the insulating film. It may have a connected configuration.

  In the semiconductor device having the above-described configuration, particularly in the present embodiment, carbon is interposed between the channel protective layer 15 provided on the semiconductor layer 14 of the thin film transistor TFT and the source / drain electrode 18 and the impurity semiconductor layer 17. An insulating film 16 is provided. Here, the semiconductor layer 14 is formed of, for example, microcrystalline silicon crystallized by performing laser annealing on amorphous silicon. The carbon insulating film 16 is a photothermal conversion layer applied in this laser annealing treatment, and is characterized by leaving a part of the photothermal conversion layer.

<Method for Manufacturing Semiconductor Device>
Next, a method for manufacturing the semiconductor device as described above will be described with reference to the drawings.
FIG. 2 is a process flow showing a method for manufacturing a semiconductor device according to an embodiment of the present invention. 3 and 4 are schematic process cross-sectional views illustrating a method for manufacturing a semiconductor device according to an embodiment.

  First, in the gate electrode formation step S101 shown in FIG. 2, as shown in FIG. 3A, a PVD method (Physical Vapor Deposition: physical) such as a vapor deposition method or a sputtering method is performed on an insulating substrate 11 such as glass. A gate metal layer is formed using a vapor deposition method. Thereafter, a resist having a desired planar pattern is formed by using a photolithography method, and the gate metal layer is patterned by using a wet etching method or a dry etching method to form the gate electrode 13 of the thin film transistor TFT. Here, as the gate metal layer to be the gate electrode 13, for example, aluminum (Al), titanium (Ti), chromium (Cr), nickel (Ni), copper (Cu), niobium (Nb), molybdenum (Mo), A metal simple substance such as silver (Ag), tantalum (Ta), tungsten (W) or the like, a metal material made of an alloy thereof, or a compound material containing any of these can be used. The gate electrode 13 is formed to a thickness of about 100 nm (1000 mm), for example.

  Next, in the gate insulating film forming step S102, the amorphous silicon (a-Si) semiconductor layer forming step S103, and the channel protective insulating film forming step S104, the gate electrode 13 is formed as shown in FIG. A gate insulating film 12, an amorphous silicon semiconductor layer 14x, and an insulating layer are formed on the substrate 11 using, for example, plasma enhanced chemical vapor deposition (PECVD). 15x is continuously formed. As a result, the gate electrode 13 on the substrate 11 is covered with the gate insulating film 12. Here, as the gate insulating film 12, for example, a silicon nitride film or a silicon oxide film is used, and the gate insulating film 12 is formed to a thickness of, for example, about 400 nm (4000 mm). The amorphous silicon semiconductor layer 14x is formed to a thickness of about 50 nm (500 mm), for example, and the insulating layer 15x is a silicon nitride film or a silicon oxide film, for example, about 120 nm (1200 mm). Formed.

  Next, in the carbon insulating film forming step S105, as shown in FIG. 3C, a photothermal conversion layer is formed on the substrate 11 on which the gate insulating film 12, the amorphous silicon semiconductor layer 14x, and the insulating layer 15x are sequentially formed. A carbon insulating film (diamond-like carbon (DLC) thin film) 16x is formed. Here, the carbon insulating film 16x is formed by using, for example, a CVD method. Thereby, the amorphous silicon semiconductor layer 14x on the substrate 11 is covered with the insulating layer 15x and the carbon insulating film 16x. Here, the carbon insulating film 16x is formed to a film thickness of, for example, about 50 to 400 nm (500 to 4000 mm).

  Next, in the laser annealing step S106, as shown in FIG. 3D, the carbon insulating film 16x is heated to 1000 ° C. or more by irradiating the entire region of the substrate 11 with the laser light LSR, thereby forming the carbon insulating film 16x. The lower amorphous silicon semiconductor layer 14x is subjected to thermal annealing (laser annealing). Thereby, the amorphous silicon semiconductor layer 14x is crystallized to form a semiconductor layer made of microcrystalline silicon.

Here, as a laser light source used for laser annealing, for example, a semiconductor laser device having a wavelength of 940 nm can be used. In such a laser apparatus, a laser beam LSR having an optical output of about 20 W is continuously oscillated and shaped into a desired beam shape through a uniform illumination optical system such as a microlens array. Further, the beam is condensed to a light intensity of about 22.5 kW / cm ² and irradiated while moving the substrate 11 at a constant speed of about 25 cm / s, for example. In this way, by scanning the laser beam BM having a predetermined irradiation range, the entire region of the substrate 11 is irradiated with the laser beam LSR to perform thermal annealing.

  Next, in the carbon insulating film / channel protective insulating film patterning step S107, as shown in FIG. 3E, the carbon insulating film 16x and the insulating layer 15x are patterned using a photolithography method to obtain a desired planar shape. A carbon insulating film 16 and a channel protective layer (etching stopper layer) 15 are formed. Specifically, a photoresist (not shown) is patterned so as to remain only in a region that becomes a channel layer of the thin film transistor TFT (semiconductor layer 14) and that corresponds to the region where the gate electrode 13 is formed. First, using a photoresist, the carbon insulating film 16x is dry-etched with, for example, oxygen plasma. Subsequently, by using the same photoresist, the insulating layer 15x exposed by etching the carbon insulating film 16x is dry-etched. Thereby, the channel protective layer 15 and the carbon insulating film 16 are patterned and formed in the same planar shape on the amorphous silicon semiconductor layer 14x.

Next, in the impurity semiconductor layer deposition step S108, the impurity semiconductor layer 17 is deposited over the entire region of the substrate 11 by using, for example, a plasma CVD method on the substrate 11 on which the channel protective layer 15 and the carbon insulating film 16 are formed. . Here, the impurity semiconductor layer 17 is a silicon layer (p ⁺ -Si layer or n ⁺ -Si layer) mixed with a p-type or n-type impurity. The impurity semiconductor layer 17 is formed to a thickness of about 25 nm (250 mm), for example.

  Next, in the impurity semiconductor layer / microcrystalline silicon semiconductor layer patterning step S109, a resist having a desired planar pattern is formed using a photolithography method, and the impurity semiconductor layer 17 and the amorphous silicon semiconductor are formed using a dry etching method. Layer 14x is continuously etched. Thereby, as shown in FIG. 4A, the impurity semiconductor layer 17 is patterned and formed in a desired planar shape, and at the same time, the impurity semiconductor layer 17 and the carbon insulating film 16 (or the channel protective layer 15) are aligned. The semiconductor layer 14 is patterned and formed in a planar shape.

  Next, in the oxygen plasma treatment step S110, the substrate 11 is subjected to oxygen plasma treatment to oxidize the semiconductor layer 14 formed under the channel protective layer 15 and the impurity semiconductor layer 17 and exposing the side wall portions. Accordingly, it is possible to prevent the semiconductor layer 14 from reacting with the metal that becomes the source and drain electrodes 18 to be silicided in the source and drain electrode forming step S111 described later, thereby affecting the transistor characteristics. At this time, as shown in FIG. 4A, the carbon insulating film 16 exposed between the impurity semiconductor layers 17 is simultaneously dry-etched using the impurity semiconductor layer 17 as a mask by oxygen plasma treatment. As shown in FIG. 4B, the channel protective layer 15 is exposed. That is, the carbon insulating film 16 is patterned and formed in a planar shape that matches the impurity semiconductor layer 17. As a result, the impurity semiconductor layer 17 extends through the carbon insulating film 16 on both ends of the channel protective layer 15.

  Next, in the source / drain metal film forming step S111, a source / drain metal layer is formed over the entire area of the substrate 11 on the substrate 11 on which the impurity semiconductor layer 17 is formed by using, for example, the PVD method. Thereafter, a resist having a desired plane pattern is formed by using a photolithography method, and the source and drain metal layers are patterned by using a wet etching method or a dry etching method as shown in FIG. Source and drain electrodes 18 of the thin film transistor TFT are formed. Here, the source and drain electrodes 18 are formed by patterning so as to have a planar shape substantially the same as that of the impurity semiconductor layer 17 described above in the formation region of the thin film transistor TFT. The source and drain electrodes 18 may be made of a metal simple substance such as chromium (Cr), aluminum (Al), titanium (Ti), niobium (Nb), or a metal material made of these alloys. The source / drain electrodes 18 are formed to a thickness of about 100 nm (1000 mm), for example. Accordingly, the impurity semiconductor layer 17 is formed on both ends of the channel protective layer 15 via the carbon insulating film 16 and the impurity semiconductor layer 17 and on the semiconductor layer 14 where the channel protective layer 15 is not formed. Thus, the source and drain electrodes 18 are formed to extend.

  Next, in the overcoat insulating film forming step S112, as shown in FIG. 4D, a protective insulating film (overcoat insulating film) is formed on the substrate 11 on which the thin film transistor TFT is formed by using, for example, a plasma CVD method. ) 19 is formed. Thereby, the thin film transistor TFT on the substrate 11 is covered with the protective insulating film 19. Here, as the protective insulating film 19, for example, a silicon nitride film or a silicon oxide film is used, and is formed to a thickness of about 200 nm (2000 mm), for example.

  Although not shown in FIG. 1, in the thin film transistor TFT, for example, the gate electrode 13 and the source / drain electrode 18 are formed on an arbitrary wiring layer, electrode layer, or the like through a contact hole formed in the protective insulating film 19. Connected individually.

(Verification of effects)
Next, the operation and effect of the semiconductor device having the thin film transistor according to the present embodiment and the manufacturing method thereof will be described in detail with reference to a comparative example.

  FIG. 5 is a schematic cross-sectional view showing an example of a semiconductor device (thin film transistor) that is a comparison target (hereinafter referred to as “comparative example”) of the above-described embodiment. Here, about the structure equivalent to embodiment mentioned above, the same code | symbol is attached | subjected and description is simplified. FIG. 6 is a process flow showing an example of a method for manufacturing a semiconductor device as a comparative example. 7 and 8 are schematic process cross-sectional views showing a method for manufacturing a semiconductor device as a comparative example. Here, the description of the manufacturing process equivalent to the above-described embodiment is simplified.

  As shown in FIG. 5, in the semiconductor device according to the comparative example, the impurity semiconductor layer 17 extends directly on both ends of the channel protective layer 15 in the thin film transistor TFT (see FIG. 1) shown in the above-described embodiment. It has a configuration. That is, the source and drain electrodes 18 of the thin film transistor TFT are formed on both end portions of the channel protective layer 15 so as to extend through only the impurity semiconductor layer 17.

  As shown in the process flow of FIG. 6, the method of manufacturing a semiconductor device (thin film transistor) according to the comparative example irradiates a photothermal conversion layer formed on an amorphous silicon semiconductor layer with a laser beam, thereby producing a microcrystalline silicon semiconductor. After forming the layer, the photothermal conversion layer is removed. Thereafter, a channel protective layer, an impurity semiconductor layer, a source electrode, and a drain electrode are sequentially formed to form a thin film transistor TFT.

  The manufacturing method in the comparative example will be described in detail. First, in the gate electrode formation step S501 shown in FIG. 6, the gate electrode 13 having a desired planar shape is formed on the substrate 11 as shown in FIG. Next, in the gate insulating film forming step S502 and the amorphous silicon semiconductor layer forming step S503, as shown in FIG. 7B, the gate insulating film 12 and the amorphous silicon semiconductor layer are formed on the substrate 11 on which the gate electrode 13 is formed. 14x is continuously formed.

  Next, in the photothermal conversion layer forming step S504, as shown in FIG. 7C, the photothermal conversion layer 16y is formed on the substrate 11 on which the gate insulating film 12 and the amorphous silicon semiconductor layer 14x are formed. Here, in the case where a carbon insulating film is applied as the photothermal conversion layer 16y as in the above-described embodiment, the photothermal conversion layer 16y is directly formed on the amorphous silicon semiconductor layer 14x using a sputtering method. On the other hand, when a metal thin film is applied as the photothermal conversion layer 16y, a buffer layer (not shown) made of an insulating film is formed between the amorphous silicon semiconductor layer 14x and the photothermal conversion layer 16y. Here, the buffer layer is for preventing metal atoms forming the photothermal conversion layer 16y from diffusing into the amorphous silicon semiconductor layer 14x during laser annealing, which will be described later, and generating metal silicide.

  Next, in the laser annealing step S505, as shown in FIG. 7D, the entire region of the substrate 11 is irradiated with laser light LSR, whereby the amorphous silicon semiconductor layer 14x under the photothermal conversion layer 16y is thermally annealed (laser annealing). Then, a semiconductor layer made of microcrystalline silicon is formed. Thereafter, in the photothermal conversion layer removing step S506, the photothermal conversion layer 16y on the substrate 11 is removed by dry etching or wet etching. Next, in the channel protective layer forming step S507, as shown in FIG. 7E, the region serving as the channel layer of the thin film transistor TFT (the semiconductor layer 14 made of microcrystalline silicon), which is the region where the gate electrode 13 is formed. A channel protective layer 15 is formed in the corresponding region.

  Next, in step S508 for forming an impurity semiconductor layer, an impurity semiconductor layer is formed on the substrate 11 on which the channel protective layer 15 is formed. After that, in the impurity semiconductor layer / microcrystalline silicon semiconductor layer patterning step S509, as shown in FIG. 8A, the impurity semiconductor layer 17 is patterned and formed in a desired planar shape. The semiconductor layer 14 is patterned and formed in a planar shape that matches the protective layer 15. Next, in the oxygen plasma treatment step S510, the substrate 11 is subjected to oxygen plasma treatment to oxidize the semiconductor layer 14 formed under the channel protective layer 15 and the impurity semiconductor layer 17 and exposing the side wall portions.

  Next, in the source and drain metal film forming step S511, as shown in FIG. 8B, the source and drain electrodes are extended on both ends of the channel protective layer 15 via the impurity semiconductor layer 17. 18 is formed by patterning. Next, in the overcoat insulating film forming step S512, as shown in FIG. 8C, a protective insulating film 19 is formed on the substrate 11 on which the thin film transistor TFT is formed.

  In such a semiconductor device (thin film transistor TFT) according to the comparative example, the source and drain electrodes 18 extend on both ends of the channel protective layer 15 and on the semiconductor layer 14 only through the impurity semiconductor layer 17. It is provided to do. For this reason, in the above-described series of manufacturing steps, when the misalignment of the source, drain electrode 18 and impurity semiconductor layer 17 with respect to the channel protective layer 15 varies with other thin film transistors TFT formed in the substrate 11. There is a problem that the variation in on-current characteristics becomes large.

  This problem will be described in more detail. In the manufacturing method of the inverted staggered thin film transistor TFT having the channel stopper type device structure, the channel protective layer 15 is formed by patterning on the semiconductor layer 14x made of microcrystalline silicon. Later, the impurity semiconductor layer 17 and the source and drain electrodes 18 are formed by patterning using a photolithography method. At this time, it is known that the formation positions of the impurity semiconductor layer 17 and the source / drain electrodes 18 with respect to the planar shape of the channel protective layer 15 are not exactly as designed and inevitably shift (alignment shift). Yes. For this reason, the impurity semiconductor layer 17 and the source / drain electrodes 18 extend on both ends of the channel protective layer 15 even if such misalignment is anticipated in advance and the misalignment is maximized. In this way, as shown in part A in FIG. 8B, the two are designed to overlap (overlapping) in a plane with a certain size.

  By the way, in the thin film transistor, the overlap between the channel protective layer 15 and the impurity semiconductor layer 17 and the source / drain electrode 18 causes the impurity semiconductor layer 17 and the source / drain electrode 18 to act as a back gate. That is, in the thin film transistor TFT as shown in the comparative example, the source and drain electrodes 18 each have a configuration arranged on the semiconductor layer 14 via the channel protective layer 15 which is an insulating film. The source and drain electrodes 18 each act as a gate electrode for the semiconductor layer 14. Here, in the region where the source electrode overlaps, the source electrode acts as a back gate for applying a negative voltage to the semiconductor layer 14 (channel region), so that the on-current decreases (becomes difficult to flow). On the other hand, in the region where the drain electrode overlaps, the drain electrode acts as a back gate for applying a positive voltage to the semiconductor layer 14 (channel region), so that the on-current increases (is easy to flow). Thus, the on-current characteristics of the thin film transistor TFT depend on the overlap dimensions of the source and drain electrodes 18. Therefore, when the above-described misalignment occurs and the overlap dimension varies, the on-current characteristics of the thin film transistor TFT are greatly affected. In particular, when the alignment deviation varies between the thin film transistors TFT formed on the substrate 11, there is a problem that the variation of each on-current characteristic is further increased. When such a thin film transistor is applied as a display panel of a thin display, a switching element or a driving element of a driving driver, there is a problem that the yield of the product is lowered and the display image quality is deteriorated.

  In contrast, in the above-described embodiment, the source / drain electrode 18 and the impurity semiconductor layer 17 are provided on both ends of the channel protective layer 15 via the carbon insulating film 16 used as the photothermal conversion layer. Yes. That is, the distance between the semiconductor layer 14 and the source / drain electrode 18 is formed to be thicker by the film thickness of the carbon insulating film 16 than the thin film transistor shown in the comparative example at both ends of the channel protective layer 15. . With such a configuration, the capacitance component formed between each of the source / drain electrodes 18 and the semiconductor layer 14 is reduced. In other words, the voltage applied to the semiconductor layer 14 (channel region) from each of the source and drain electrodes 18 is lowered. Thereby, the back gate effect resulting from the overlap of the source and drain electrodes 18 is reduced.

  Therefore, according to the present embodiment, in the series of manufacturing processes described above, the misalignment of the source, drain electrode 18 and impurity semiconductor layer 17 with respect to the channel protective layer 15 is different from that of other thin film transistors TFT formed in the substrate 11. Even when there is a variation between them, the variation in on-current characteristics can be suppressed. Moreover, in this embodiment, the semiconductor device (thin film transistor) which has said effect can be manufactured, without increasing the number of processes compared with the manufacturing method which concerns on a comparative example. Therefore, even when the thin film transistor (semiconductor device) according to this embodiment is applied as a switching element or a driving element of a display panel or a driving driver, the yield of the product can be improved and a display with good image quality can be achieved. An apparatus can be realized.

  By the way, in the present embodiment, a carbon insulating film (diamond-like carbon (DLC) is used as a photothermal conversion layer used when the amorphous silicon semiconductor layer 14x is thermally annealed (laser annealed) to form the semiconductor layer 14 made of microcrystalline silicon. The case where the thin film) is applied has been described. Here, the dielectric constant of the carbon insulating film formed using the CVD method is generally 8-12. As described above, in the present embodiment, the carbon insulating film 16 used as the photothermal conversion layer is left and interposed between the source / drain electrode 18 and the impurity semiconductor layer 17 and the channel protective layer 15. Thus, the capacitance component formed between each of the source and drain electrodes 18 and the semiconductor layer 14 is reduced, and the back gate effect due to the overlap of the source and drain electrodes 18 is reduced.

  Therefore, in this embodiment, a film having a lower dielectric constant can be applied as the carbon insulating film 16 interposed between the source / drain electrode 18 and the impurity semiconductor layer 17 and the channel protective layer 15. . Specifically, for example, when a carbon insulating film is formed using a CVD method, a film quality having a dielectric constant of about 2 can be obtained by mixing about 7 atomic% of fluorine. Therefore, by interposing such a low dielectric constant carbon insulating film between the source / drain electrode 18 and the impurity semiconductor layer 17 and the channel protective layer 15, each of the source / drain electrode 18 and the semiconductor layer 14. The capacitance component formed therebetween can be further reduced, and the back gate effect resulting from the overlap of the source and drain electrodes 18 can be further reduced.

  In the above-described embodiment, the case where the carbon insulating film is applied as the insulating film that reduces the capacitance component formed between each of the source and drain electrodes 18 and the semiconductor layer 14 has been described. It is not limited to. That is, the present invention has a high absorption rate of infrared light (infrared rays) irradiated in the laser annealing step (infrared absorption characteristics), can withstand high temperatures of 1000 ° C. or higher (heat resistance), and carbon. Insulating film / channel protective insulating film Any other material can be used if it is easy to etch in the patterning process (easy to etch), and the etching residue at this time does not become a contamination source that greatly changes the electrical characteristics of the semiconductor (non-contaminating) An insulating film made of any of the above materials may be applied. In addition, if the insulating film has a low dielectric constant as described above, the effects of the present invention can be further enhanced.

<Application example to light emitting device>
Next, a light emitting device (display device) and a pixel to which the semiconductor device according to the above-described embodiment can be applied will be described. Here, the application example shown below has a configuration in which a plurality of pixels each having an organic electroluminescence element (organic EL element) are two-dimensionally arranged, and each pixel emits light with a luminance gradation corresponding to image data. A case where the semiconductor device of the present invention is applied to a display device including an organic EL display panel that displays image information will be described. In addition, this invention is not limited to this application example, You may apply to the display apparatus provided with the display panel of another display method.

  FIG. 9 is a schematic configuration diagram illustrating a first configuration example of a display device to which the semiconductor device according to the present invention is applied, and FIG. 10 illustrates a second configuration of the display device to which the semiconductor device according to the present invention is applied. It is a schematic block diagram which shows a structural example. FIG. 9A and FIG. 10A are schematic configuration diagrams of the display device according to each configuration example, and FIG. 9B and FIG. 10B are applied to the display device according to each configuration example. 2 is an equivalent circuit diagram of a pixel. In the second configuration example, the same components as those in the first configuration example are denoted by the same reference numerals and description thereof is simplified.

(First configuration example)
As shown in FIG. 9A, the display device 100 according to the first configuration example includes at least a display panel 110 in which a plurality of pixels PIX are two-dimensionally arranged, and each pixel PIX in a selected state. A selection driver (selection drive circuit) 120 and a data driver (signal drive circuit) 130 for supplying gradation signals corresponding to image data to each pixel PIX are provided. Here, the selection driver 120 and the data driver 130 for driving the display panel 110 have a circuit configuration to which a thin film transistor is applied, and the element structure (or the manufacturing method) as shown in the above-described embodiment as the thin film transistor. An element structure manufactured using the above can be applied.

  For example, as shown in FIG. 9B, the pixels PIX arranged in the display panel according to this configuration example include a light emission drive circuit DC and an organic EL element OEL, and a current corresponding to image data is generated by the light emission drive circuit DC. A light emission driving current having a value is generated and supplied to the organic EL element OEL, thereby causing the organic EL element OEL to emit light at a predetermined luminance gradation corresponding to the image data.

  For example, as shown in FIG. 9B, the light emission drive circuit DC includes transistors Tr11 and Tr12 and a capacitor Cs. The transistor Tr11 has a gate terminal connected to the selection line Ls, a drain terminal connected to the data line Ld, and a source terminal connected to the contact N11. The transistor Tr12 has a gate terminal connected to the contact N11, a drain terminal connected to the high-potential power supply voltage Vsa, and a source terminal connected to the contact N12. The capacitor Cs is connected to the gate terminal (contact N11) and the source terminal (contact N12) of the transistor Tr12.

  Here, an n-channel thin film transistor is applied to each of the transistors Tr11 and Tr12, and an element structure (or an element structure manufactured using a manufacturing method) as described in the above embodiment can be applied. . Note that if the transistors Tr11 and Tr12 are p-channel transistors, the source terminal and the drain terminal are opposite to each other. The capacitor Cs is a parasitic capacitance formed between the gate and the source of the transistor Tr12, an auxiliary capacitance additionally provided between the gate and the source, or a capacitance component composed of these parasitic capacitance and auxiliary capacitance. It is.

  The organic EL element OEL has an anode terminal (anode electrode) connected to the contact N12 of the light emission drive circuit DC, and a cathode terminal (cathode electrode) connected to a low potential reference voltage Vsc (for example, the ground voltage Vgnd). Yes.

  The selection line Ls connected to the pixel PIX is connected to the selection driver 120 described above, and the selection voltage Vsel of the selection level or the non-selection level is applied at a predetermined timing. The data line Ld is connected to the data driver 130 described above, and a gradation signal (gradation voltage) Vdata corresponding to the image data is applied to the pixel PIX set to the selected state by the selection voltage Vsel. Is done.

  In the display driving operation of the display device including the pixel PIX having such a circuit configuration, first, a selection voltage Vsel of a selection level (high level) is applied from the selection driver 120 to the selection line Ls in the selection period. As a result, the transistor Tr11 is turned on to set the pixel PIX to the selected state. In synchronization with this timing, the gradation voltage Vdata having a voltage value corresponding to the image data is applied from the data driver 130 to the data line Ld, so that the potential corresponding to the gradation voltage Vdata is obtained via the transistor Tr11. The voltage is applied to the contact N11 (gate terminal of the transistor Tr12).

  As a result, the transistor Tr12 is turned on in a conductive state corresponding to the gradation voltage Vdata, a light emission driving current having a predetermined current value flows between the drain and the source, and the organic EL element OEL has the gradation voltage Vdata (that is, the image). Light emission at a luminance gradation corresponding to the data. At this time, charges are stored (charged) in the capacitor Cs connected between the gate and source of the transistor Tr12 based on the gradation voltage Vdata applied to the contact N11.

  Next, in the non-selection period, by applying the selection voltage Vsel of the non-selection level (low level) from the selection driver 120 to the selection line Ls, the transistor Tr11 is turned off and the pixel PIX is set to the non-selection state. To do. As a result, the charge accumulated in the capacitor Cs (that is, the potential difference between the gate and the source) is held, and a voltage corresponding to the gradation voltage Vdata is applied to the gate terminal of the transistor Tr12. Therefore, a light emission drive current having a current value equivalent to that in the light emission operation state flows between the drain and source of the transistor Tr12, and the organic EL element OEL continues to emit light. Then, the desired image information is displayed by sequentially executing such a display driving operation for every pixel PIX two-dimensionally arranged on the display panel 110, for example, for each row.

(Second configuration example)
As shown in FIG. 10A, the display device 100 according to the second configuration example includes at least a display panel 110, a selection driver 120, a data driver 130, and a power supply driver 140. That is, the display device 100 according to this configuration example has a configuration including the power supply driver 140 in addition to the configuration shown in the first configuration example. Here, similarly to the first configuration example described above, the selection driver 120, the data driver 130, and the power supply driver 140 for driving the display panel 110 have a circuit configuration to which a thin film transistor is applied. An element structure (or an element structure manufactured using a manufacturing method) as shown in the embodiment can be applied.

  The light emission drive circuit DC provided in the pixels PIX arranged in the display panel according to this configuration example includes transistors Tr21 to Tr23 and a capacitor Cs as shown in FIG. 10B, for example. The transistor Tr21 has a gate terminal connected to the selection line Ls, a drain terminal connected to the power supply line La, and a source terminal connected to the contact N21. The transistor Tr22 has a gate terminal connected to the selection line Ls, a source terminal connected to the data line Ld, and a drain terminal connected to the contact N22. The transistor Tr23 has a gate terminal connected to the contact N21, a drain terminal connected to the power supply line La, and a source terminal connected to the contact N22. The capacitor Cs is connected to the gate terminal (contact N21) and the source terminal (contact N22) of the transistor Tr23.

  Here, also in this structural example, the n-channel type thin film transistor is applied to each of the transistors Tr21 to Tr23, and the element structure as shown in the above-described embodiment (or the element structure manufactured using the manufacturing method). Can be applied. The capacitor Cs is a parasitic capacitance formed between the gate and the source of the transistor Tr23, an auxiliary capacitance additionally provided between the gate and the source, or a capacitance component composed of these parasitic capacitance and auxiliary capacitance. It is.

  The organic EL element OEL has an anode terminal (anode electrode) connected to the contact N22 of the light emission drive circuit DC, and a cathode terminal (cathode electrode) connected to a low potential reference voltage Vsc (for example, ground voltage Vgnd). Yes. The power supply line La connected to the pixel PIX is connected to the power supply driver 140 described above, and the power supply voltage Vsa of the light emission level or the non-light emission level is applied at a predetermined timing.

  In the display drive operation of the display device including the pixel PIX having such a circuit configuration, first, the selection driver 120 applies the selection voltage Vsel of the selection level (high level) to the selection line Ls in the selection period. At the same time, when the power supply driver 140 applies the power supply voltage Vsa of the non-light emission level (voltage level equal to or lower than the reference voltage Vsc; for example, negative voltage) to the power supply line La, the transistors Tr21 and Tr22 are turned on to select the pixel PIX Set to state. In synchronization with this timing, the gradation voltage Vdata having a negative voltage value corresponding to the image data is applied from the data driver 130 to the data line Ld, so that the gradation voltage Vdata is determined via the transistor Tr22. The potential is applied to the contact N22 (the source terminal of the transistor Tr23).

  As a result, the transistor Tr23 is turned on, and the write current corresponding to the potential difference generated between the gate and the source of the transistor Tr23 is transferred from the power supply line La to the data line Ld via the transistor Tr23, the contact N22, and the transistor Tr22. Flowing. At this time, a charge corresponding to the potential difference generated between the contacts N21 and N22 is accumulated in the capacitor Cs.

  Here, the power supply line La is set so that the power supply voltage Vsa equal to or lower than the reference voltage Vsc is applied and the write current is drawn from the pixel PIX in the direction of the data line Ld. As a result, the potential applied to the anode (contact N22) of the organic EL element OEL is lower than the cathode potential (reference voltage Vsc). Therefore, no current flows through the organic EL element OEL, and the organic EL element OEL Does not emit light (non-emission operation). Such a writing operation is sequentially executed for each row for all the pixels PIX two-dimensionally arranged on the display panel 110.

  Next, in the non-selection period, by applying the selection voltage Vsel of the non-selection level (low level) from the selection driver 120 to the selection line Ls, the transistors Tr21 and Tr22 are turned off and the pixel PIX is not selected. Set to. As a result, the charge accumulated in the selection period is held in the capacitor Cs, so that the transistor Tr23 is kept on. Then, by applying a power supply voltage Vsa of a light emission level (a voltage level higher than the reference voltage Vsc) from the power supply driver 140 to the organic EL element OEL from the power supply line La via the transistor Tr23 and the contact N22. A predetermined light emission drive current flows.

  At this time, the charge (voltage component) accumulated in the capacitor Cs corresponds to a potential difference in the case where a write current corresponding to the gradation voltage Vdata is caused to flow in the transistor Tr23. Therefore, the light emission drive current flowing in the organic EL element OEL is The current value is substantially equal to the write current. As a result, the organic EL element OEL of each pixel PIX emits light with a luminance gradation corresponding to the image data (gradation voltage Vdata) written during the writing operation, and desired image information is displayed on the display panel 110. .

  As described above, the semiconductor device (thin film transistor) shown in the above-described embodiment is applied as a driving driver that constitutes a display device, or a switching element or a driving element of a plurality of pixels (light emission driving circuits) arranged in a display panel. It is something that can be done. Accordingly, a display device including a thin film transistor in which variation in on-current characteristics is suppressed can be realized on a substrate without increasing the number of manufacturing steps, and thus the yield of products can be improved and good Display quality can be achieved.

  In the above-described first and second configuration examples (FIGS. 9 and 10), the light emitting element of each pixel PIX is obtained by applying the gradation voltage Vdata having a voltage value corresponding to the image data to each pixel PIX. A light emission drive circuit having a circuit configuration corresponding to a voltage designation type gradation control method in which a light emission drive current corresponding to image data is supplied to (organic EL element OEL) to perform light emission operation (display operation) at a desired luminance gradation The case where the DC is provided has been described. The display device to which the semiconductor device according to the present invention is applicable is not limited to this. For example, by supplying a gradation current having a current value corresponding to the image data to each pixel PIX, Even if it has a light emission drive circuit having a circuit configuration corresponding to a current designation type gradation control method in which a light emission drive current corresponding to image data is supplied to a light emitting element to perform light emission operation at a desired luminance gradation Good. Note that the light emission drive circuit DC shown in the second configuration example has a circuit configuration corresponding to both the voltage designation type and current designation type gradation control methods.

<Application examples to electronic devices>
Next, an electronic apparatus to which the light emitting device (display device) including the semiconductor device (thin film transistor) according to the above-described embodiment is applied will be described with reference to the drawings.

  The display device 100 including the display panel 110 and the driving drivers (the selection driver 120, the data driver 130, and the power supply driver 140) as described above includes various types such as a digital camera, a thin television, a mobile personal computer, and a mobile phone. It can be favorably applied as a display device for electronic equipment.

  FIG. 11 is a perspective view illustrating a configuration example of a digital camera to which the light emitting device according to the present invention is applied, and FIG. 12 is a perspective view illustrating a configuration example of a thin television to which the light emitting device according to the present invention is applied. FIG. 13 is a perspective view showing a configuration example of a mobile personal computer to which the light emitting device according to the present invention is applied, and FIG. 14 is a diagram showing a configuration example of a mobile phone to which the light emitting device according to the present invention is applied. It is.

  In FIG. 11, the digital camera 210 is roughly divided into a main body portion 211, a lens portion 212, an operation portion 213, and a display portion 214 to which the display device 100 including the semiconductor device described in the above embodiment is applied. And a shutter button 215. According to this, variation in the on-current characteristics of the thin film transistors in the display unit 214 can be suppressed, the product yield can be improved, and good display image quality can be realized.

  In FIG. 12, a thin television 220 is roughly divided into a main body 221, a display unit 222 to which the display device 100 including the semiconductor device described in the above embodiment is applied, and an operation controller (remote controller) 223. And. According to this, variation in the on-current characteristics of the thin film transistors in the display unit 222 can be suppressed, the product yield can be improved, and good display image quality can be realized.

  In FIG. 13, the personal computer 230 roughly includes a main body 231, a keyboard 232, and a display unit 233 to which the display device 100 including the semiconductor device described in the above embodiment is applied. Even in this case, variation in the on-current characteristics of the thin film transistors in the display portion 233 can be suppressed, the yield of products can be improved, and good display image quality can be realized.

  14, the mobile phone 240 is roughly divided into a display unit to which the operation unit 241, the earpiece 242, the mouthpiece 243, and the display device 100 including the semiconductor device described in the above embodiment are applied. 244. Even in this case, variation in the on-current characteristics of the thin film transistors in the display portion 244 can be suppressed, the yield of products can be improved, and good display image quality can be realized.

  In each of the electronic devices described above, the case where the light-emitting device including the semiconductor device according to the present invention is applied as a display device (display device) has been described; however, the present invention is not limited to this. A light-emitting device including a semiconductor device according to the present invention includes, for example, a light-emitting element array in which a plurality of pixels having light-emitting elements are arranged in one direction, and light emitted from the light-emitting element array according to image data on a photosensitive drum. It may be applied to an exposure apparatus that performs exposure by irradiating.

DESCRIPTION OF SYMBOLS 11 Substrate 12 Insulating film 13 Gate electrode 14 Semiconductor layer 15 Channel protective layer 16 Carbon insulating film 17 Impurity semiconductor layer 18 Source / drain electrode 100 Display device 110 Display panel 120 Select driver 130 Data driver 140 Power driver TFT Thin film transistor PIX Pixel DC Light emission drive Circuit OEL Organic EL element Tr11, Tr12, Tr21 to Tr23 Transistor

Claims (13)

On the substrate, at least a gate electrode, a semiconductor layer facing the gate electrode with a gate insulating film interposed therebetween, a channel protective layer protecting a channel region formed in the semiconductor layer, and the channel protective layer interposed therebetween Opposing source and drain electrodes;
A photothermal conversion layer for changing the film quality of the semiconductor layer, provided between the source electrode and the drain electrode, and the channel protective layer;
A semiconductor device comprising:   2. The semiconductor device according to claim 1, wherein the photothermal conversion layer is an insulating film made of diamond-like carbon.   3. The semiconductor device according to claim 1, wherein the semiconductor layer is made of microcrystalline silicon.   The semiconductor device according to claim 1, wherein the semiconductor device is a thin film transistor having an inverted staggered structure. A step of sequentially laminating an insulating film serving as a channel protection film and a photothermal conversion layer on the semiconductor layer made of the first film quality formed on the substrate;
Irradiating the photothermal conversion layer with laser light to change the first film quality of the semiconductor layer to a second film quality;
Sequentially patterning the photothermal conversion layer and the insulating film into the same planar shape to form the channel protective film and the photothermal conversion layer laminated on the channel protective film;
Forming an impurity semiconductor layer so as to cover the channel protective film and the photothermal conversion layer;
Patterning the impurity semiconductor layer, forming the impurity semiconductor layer so as to face each other with the channel protective film interposed therebetween and to extend on both ends of the channel protective film;
Etching the photothermal conversion layer exposed between the impurity semiconductor layers on the channel protective film, leaving a part of the photothermal conversion layer between the impurity semiconductor layer and the channel protective film;
Patterning a metal layer formed so as to cover the impurity semiconductor layer so as to extend on the impurity semiconductor layer, and forming a source electrode and a drain electrode;
A method for manufacturing a semiconductor device, comprising:   6. The semiconductor device manufacturing method according to claim 5, wherein the semiconductor layer made of the first film quality is made of amorphous silicon, and the semiconductor layer made of the second film quality is made of microcrystalline silicon. Method.   7. The method of manufacturing a semiconductor device according to claim 5, wherein the photothermal conversion layer is an insulating film made of diamond-like carbon.   8. The step of patterning the impurity semiconductor layer includes a step of continuously patterning the semiconductor layer made of the second film quality after patterning the impurity semiconductor layer. A method for manufacturing the semiconductor device according to claim 1. Including a step of subjecting the sidewall portion of the patterned semiconductor layer to end face oxidation by oxygen plasma treatment,
The step of etching the light-to-heat conversion layer exposed between the impurity semiconductor layers is included in the step of performing the end face oxidation, and the end surface oxidation of the side wall portion of the semiconductor layer by the oxygen plasma treatment is performed. 9. The method of manufacturing a semiconductor device according to claim 8, wherein the photothermal conversion layer exposed to the surface is also etched. A light-emitting panel in which a plurality of pixels each having a light-emitting element and a light-emission driving circuit for driving the light-emitting element are arranged on a substrate;
A selection drive circuit for outputting a selection signal for setting the pixels arranged in the light emitting panel to a selected state;
A signal driving circuit for supplying a gradation signal to the pixel set in the selected state;
With
The light emission driving circuit of the pixel, or the switching element or the driving element constituting the selection driving circuit and the signal driving circuit is formed on the gate electrode via the gate electrode and the gate insulating film on the substrate. An opposing semiconductor layer, a channel protective layer protecting a channel region formed in the semiconductor layer, a source electrode and a drain electrode opposing each other with the channel protective layer interposed therebetween,
A photothermal conversion layer for changing the film quality of the semiconductor layer, provided between the source electrode and the drain electrode, and the channel protective layer;
A light emitting device comprising:   The light emitting device according to claim 10, wherein the photothermal conversion layer is an insulating film made of diamond-like carbon.   The light emitting device according to claim 10, wherein the semiconductor layer is made of microcrystalline silicon.   An electronic apparatus comprising the light-emitting device according to claim 10 mounted thereon.

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