JP2011176752A - Amplifier - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To obtain an amplifier in which a wideband characteristic can be improved and a problem of interference from an adjacent cell can be suppressed simultaneously. <P>SOLUTION: In the amplifier which includes a multi-cell transistor (10) in which three or more cells of unit cell transistors (11) are arranged at an equal interval and an output matching circuit (20) in which a plurality of harmonic wave processing circuits (21) provided corresponding to each unit cell transistor so that a short-circuit state is formed at a frequency that is equal to a multiple of a frequency of a fundamental wave by an open stub (22) separated by a slit (23) are included and a line is configured so that each harmonic wave processing circuit has a tournament configuration, each harmonic wave processing circuit (21) is disposed at a distance equal to an electric length of less than 1/2 wavelength from at least one of a gate terminal and a drain terminal of each unit cell transistor constituting the multi-cell transistor and one open stub (22) is disposed parallel to a main line at one side. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to an amplifier characterized by the configuration of a harmonic reflection circuit provided in the vicinity of a transistor.

  As a conventional technique for improving the efficiency of an amplifier and suppressing spurious noise, there is a technique of performing a harmonic process in which a harmonic generated in a transistor is reflected by a harmonic reflection circuit and returned.

  Conventional example 1 includes the following amplifier (see, for example, Patent Document 1). FIG. 8 is a configuration diagram of a conventional amplifier according to Conventional Example 1. In FIG. Such an amplifier in Conventional Example 1 includes a multi-cell transistor 110 and an output matching circuit 120. The multicell transistor 110 includes a plurality of unit cell transistors 111, and the unit cell transistors 111 are arranged at equal intervals in the multicell transistor 110.

  On the other hand, the output matching circuit 120 is a circuit for converting the output impedance of each unit cell transistor 111 into a desired impedance. Specifically, the output matching circuit 120 includes a plurality of harmonic processing circuits 121 corresponding to each unit cell transistor 111, a line 125, and an output terminal 126, and each harmonic processing circuit 121 is connected to the line 125. Thus, the matching circuits are connected to each other so as to form a tournament structure.

  The plurality of harmonic processing circuits 121 and the plurality of unit cell transistors 111 have a one-to-one correspondence and are connected by wires 130. Further, the width of the harmonic processing circuit 121 is designed to be smaller than the interval between the unit cell transistors 111. Further, each harmonic processing circuit 121 includes an open stub 122 that is electrically short-circuited in the harmonic and a slit 123 that is cut into a U-shape.

  Next, the operation of the amplifier according to Conventional Example 1 having such a configuration will be described. The signal amplified by each unit cell transistor 111 is guided to the output matching circuit 120 via the wire 130. In the output matching circuit 120, the output impedance of the fundamental wave of each unit cell transistor 111 is converted into a desired impedance and is guided to the output terminal 126.

  On the other hand, harmonics generated in each unit cell transistor 111 are also guided to the output matching circuit 120 via the wire 130. However, the harmonic is reflected by the harmonic processing circuit 121 including the open stub 122 divided by the U-shaped slit 123 and returned to each unit cell transistor 111. By setting the length of the open stub 122 to a quarter wavelength of electrical length in the harmonic to be reflected, a short-circuit point can be formed and the harmonic can be reflected. That is, the harmonic processing circuit 121 can form a short circuit state at a frequency that is an integral multiple of the fundamental wave on at least one of the input side and the output side.

  In this way, the harmonic spurious appearing at the output terminal 126 can be suppressed by returning the harmonic to the transistor. At this time, by reflecting the harmonics at an appropriate reflection angle, the waveform of the high-frequency signal at the drain terminal of the transistor can be shaped, and the drain efficiency of the transistor can be improved.

  Further, as the conventional example 2, the following amplifier can be cited (for example, see Patent Document 2). FIG. 9 is a configuration diagram of a conventional amplifier according to the second conventional example. The basic configuration of the amplifier in Conventional Example 2 is the same as that of the amplifier of Conventional Example 1 shown in FIG. However, the amplifier in Conventional Example 2 has an L-shaped slit 123a in place of the U-shaped slit 123 which the amplifier in Conventional Example 1 has.

  As a result, in the conventional example 1, the open stub 122 in the harmonic processing circuit 121 is arranged at the center of the main line, whereas in the conventional example 2, the open stub 122 in the harmonic processing circuit 121 is The difference is that they are arranged on both sides of the main track. The basic operation of the amplifier of Conventional Example 2 having such a configuration is the same as that of Conventional Example 1.

  In the following description, the open stub in the conventional example 1 shown in FIG. 8 is referred to as “center stub”, and the open stub in the conventional example 2 shown in FIG. And

JP 2006-197021 JP 2009-1559591 A

However, the prior art has the following problems.
Although details will be described later with reference to the drawings, in the harmonic processing circuit 121 using the center-arranged stub and the both-side stubs, matching is performed in the vicinity of the short-circuit point at 2fo that is twice the frequency fo of the fundamental wave. .

  However, when the center-arranged stub is used, the short-circuit frequency is only near the center frequency, and the frequency deviating from the vicinity of the center frequency has almost the same characteristics as the line without the center-arranged stub. As described above, when the centrally arranged stub is used, it can be seen that the frequency band that can be subjected to the harmonic processing is a narrow band.

  This is because the open stub is surrounded by the main line, the open stub is strongly coupled to the main line, and the frequency band operating as the open stub is narrow. Moreover, since it is strongly coupled to the main line, a short-circuit state cannot be sufficiently formed at 2fo.

  On the other hand, the harmonic processing circuit using the two-sided stub can form a short-circuit state over a wider band than the case of using the center-arranged stub and can form a good short-circuit point at 2fo. Thus, it can be said that the harmonic processing circuit composed of the stubs on both sides is a circuit suitable for a broadband amplifier by itself.

  From the above, paying attention to the wideband characteristics, there is a problem that the harmonic processing circuit using the centrally arranged stub of Conventional Example 1 cannot be applied to an amplifier that requires harmonic processing over a wide band.

  In order to increase the output of the amplifier, as shown in FIGS. 8 and 9, the multi-cell transistor 110 in which two or more unit cell transistors 111 are arranged in parallel is used. In the multi-cell transistor 110, the unit cell transistors 111 are arranged at a narrow interval to reduce the cost. Further, the patterns of the output matching circuits 120 at the connection portion with the unit cell transistor 111 are arranged close to each other. Specifically, the harmonic processing circuit 121 is disposed at a distance of less than ½ wavelength in electrical length from at least one of the gate or drain terminals of the transistor.

  As a result, the patterns interfere with each other. Also in Conventional Example 1 and Conventional Example 2, the pattern of the output matching circuit 120 on the transistor output side is densely arranged and is considered to interfere with each other.

  In the conventional amplifier having the configuration shown in FIGS. 8 and 9, when the reflection characteristic of the transistor viewed from the output terminal is calculated, the following was found (see FIGS. 2 and 3 described later). More specifically, as a result of calculation of reflection characteristics in the harmonic processing circuit 121 located on the outermost side, the centrally arranged stub shows the same characteristics as when the harmonic processing circuit 121 is used alone. On the other hand, in both-side stubs, adjacent open stubs interfere with each other and resonate. As a result, it was found that a short-circuit state could not be sufficiently formed in the vicinity of 2fo.

  From the above, focusing on the interference problem, the harmonic processing circuit 121 using the centrally arranged stub is not affected by interference, but the harmonic processing circuit 121 using both-side stubs suppresses interference with adjacent cells. Absent. Therefore, the harmonic processing circuit 121 of the conventional example 1 and the conventional example 2 has a problem that both the improvement of the broadband characteristic and the suppression of the interference problem cannot be achieved.

  The present invention has been made in order to solve the above-described problems, and an object of the present invention is to obtain an amplifier capable of improving both wideband characteristics and suppressing interference problems from adjacent cells.

  The amplifier according to the present invention includes a multi-cell transistor in which unit cell transistors of three or more cells are arranged at equal intervals and an open stub separated by a slit so as to form a short circuit state at a frequency that is an integral multiple of the fundamental wave. An amplifier having a plurality of harmonic processing circuits provided corresponding to the unit cell transistors, and an output matching circuit configured in a line configuration so that each harmonic processing circuit has a tournament configuration. The processing circuit is disposed at a distance of less than ½ wavelength in electrical length from at least one of the gate or drain terminals of each unit cell transistor constituting the multi-cell transistor, and the open stub is parallel to the main line and 1 on one side. It is arranged in a book.

  According to the amplifier of the present invention, an open stub arranged on one side only in parallel with the main line is used for the harmonic processing circuit, thereby improving broadband characteristics and suppressing interference problems from adjacent cells. The harmonic spurious generated in the amplifier can be suppressed over a wide band, and the drain efficiency of the amplifier can be improved.

It is a block diagram of the amplifier in Embodiment 1 of this invention. It is the reflection characteristic which looked at the output terminal end from the transistor in the harmonic processing circuit single-piece | unit used for the amplifier of Embodiment 1 of this invention. In the matching circuit having a tournament configuration in which a plurality of harmonic processing circuits using “one-side stubs” according to Embodiment 1 of the present invention are connected in parallel, the output terminal ends from the transistors in the harmonic processing circuit 21 located on the outermost side. Reflected reflection characteristics. FIG. 3 is a configuration diagram different from FIG. 1 of the amplifier according to the first embodiment of the present invention. FIG. 3 is a configuration diagram different from FIG. 1 of the amplifier according to the first embodiment of the present invention. 2 is a configuration diagram different from FIG. 1 of an amplifier according to the first embodiment of the present invention. It is the comparison result of the characteristic by the difference in arrangement | positioning of the "one side stub" in Embodiment 1 of this invention. It is a block diagram of the conventional amplifier by the prior art example 1. FIG. 10 is a configuration diagram of a conventional amplifier according to Conventional Example 2. FIG.

  Hereinafter, preferred embodiments of an amplifier of the present invention will be described with reference to the drawings.

Embodiment 1 FIG.
FIG. 1 is a configuration diagram of an amplifier according to Embodiment 1 of the present invention. The amplifier in FIG. 1 according to the first embodiment includes a multicell transistor 10 and an output matching circuit 20. The multicell transistor 10 includes a plurality of unit cell transistors 11, and the unit cell transistors 11 are arranged at equal intervals in the multicell transistor 10.

  On the other hand, the output matching circuit 20 is a circuit for converting the output impedance of each unit cell transistor 11 into a desired impedance. Specifically, the output matching circuit 20 includes a plurality of harmonic processing circuits 21 corresponding to each unit cell transistor 11, a line 25, and an output terminal 26, and each harmonic processing circuit 21 is connected to the line 25. Thus, the matching circuits are connected to each other so as to form a tournament structure.

  The plurality of harmonic processing circuits 21 and the plurality of unit cell transistors 11 have a one-to-one correspondence and are connected by wires 30. Further, the width of the harmonic processing circuit 21 is designed to be smaller than the interval between the unit cell transistors 11. Furthermore, each harmonic processing circuit 21 includes an open stub 22 that is electrically short-circuited in the harmonic and a slit 23 that is cut into an L shape.

  In order to increase the output of the amplifier and save space, the harmonic processing circuit 21 is disposed at a distance of less than ½ wavelength in electrical length from at least one of the gate or drain terminals of the transistor. Become.

  As described above, in the amplifier according to the first embodiment shown in FIG. 1, the open stub 22 is arranged on one side in parallel with the main line in order to improve both wideband characteristics and suppress interference problems from adjacent cells. The first feature is that only one is arranged. In the following description, the open stub 22 having the first feature is referred to as “one-side stub” and is distinguished from the conventional “centrally arranged stub” and “both-side stub”.

  Further, the open stub 22 in FIG. 1 is arranged so that the open stubs arranged on the line where the outputs of the transistors are first synthesized are opposed to each other in the tournament matching circuit. This is the second feature.

  Next, the operation of the amplifier including the open stub 22 configured as the “one-side stub” as the first feature will be described. The signal amplified by each unit cell transistor 11 is guided to the output matching circuit 20 via the wire 30. In the output matching circuit 20, the output impedance of the fundamental wave of each unit cell transistor 11 is converted to a desired impedance and is guided to the output terminal 26.

  On the other hand, harmonics generated in each unit cell transistor 11 are guided to the output matching circuit 20 via the wire 30. However, this favorable wave is reflected by the harmonic processing circuit 21 including the open stub 22 divided by the L-shaped slit 23 and returned to each unit cell transistor 11. By setting the length of the open stub 22 to ¼ wavelength in electrical length in the harmonic to be reflected, a short-circuit point can be formed and the harmonic can be reflected. That is, the harmonic processing circuit 21 can form a short-circuit state at a frequency that is an integral multiple of the fundamental wave on at least one of the input side and the output side.

  Next, based on the calculation results, it is possible to achieve both improvement of the broadband characteristics of the harmonic processing circuit and suppression of interference problems from adjacent cells by using the “single-side stub” that is the first feature. explain. FIG. 2 shows reflection characteristics when the output terminal end is seen from the transistor in the single harmonic processing circuit used in the amplifier according to the first embodiment of the present invention.

  In FIG. 2 showing the improvement of the broadband characteristics, in order to clarify the effect of the “one-side stub”, the “centrally arranged stub” of the conventional example 1 and the “double-sided stub” of the conventional example 2 described in the background art. For comparison, the reflection characteristics of the harmonic processing circuit using each of the transistors as viewed from the output terminal end, and the reflection characteristics of the line having the same line width as the main line including the "centrally arranged stub" are shown as comparisons. Yes.

  As shown in FIG. 2, the harmonic processing circuit 21 using the “one-side stub” can perform harmonic processing over a wider band than the “centrally arranged stub” of the first conventional example.

  FIG. 3 shows a transistor in a harmonic processing circuit 21 located on the outermost side in a tournament matching circuit in which a plurality of harmonic processing circuits 21 using “one-side stubs” according to Embodiment 1 of the present invention are connected in parallel. The reflection characteristics when the output terminal end is viewed from the side. In FIG. 3 showing suppression of the interference problem, in order to clarify the effect of “one-sided stubs”, each of “centrally arranged stubs” in Conventional Example 1 and “both-side stubs” in Conventional Example 2 is used. The reflection characteristics of the output terminal end viewed from the transistor in the single harmonic processing circuit located on the outermost side are shown as a comparison.

  As shown in FIG. 3, even when the open stubs 22 are arranged adjacent to each other, the harmonic processing circuit 21 using the “one-side stub” is better than the case of using the “both-side stubs” of the conventional example 2. Characteristics are obtained. As described above, the superiority of the harmonic processing circuit 21 using a plurality of “single-side stubs” according to the first embodiment as the open stub 22 can be confirmed, and the improvement of the broadband characteristics of the harmonic processing circuit and the interference problem from adjacent cells can be confirmed. It can be seen that coexistence of suppression can be achieved.

  Next, improvement in the efficiency of the amplifier will be described. The amplifier is required to reduce power consumption. In order for the amplifier to achieve high-efficiency operation, it is desirable that the load of the unit cell transistor 11 is the same in both the fundamental wave and the harmonic. Therefore, in the case where “one-side stub” is used, a comparison result of reflection characteristics when the output terminal end is viewed from the transistor of the harmonic processing circuit having a different stub arrangement will be described below.

  4 to 6 are configuration diagrams different from those in FIG. 1 of the amplifier according to Embodiment 1 of the present invention. Specifically, the arrangement of “one-side stubs” is shown in FIG. The arrangement is different. Each of the amplifiers shown in FIG. 1 and FIGS. 4 to 6 is different in the arrangement of the open stub 22 which is the second feature.

  The “single-side stub” of the harmonic processing circuit 21 shown in FIG. 1 is such that the open stubs arranged on the line where the outputs of the transistors are first synthesized are coupled to each other in the tournament matching circuit. It is what is arranged. Therefore, in the following description, it is referred to as “opposingly arranged one-side stub”, and in FIG.

  Further, the “one-side stub” of the harmonic processing circuit 21 shown in FIG. 4 is a tournament matching circuit in which all open stubs 22 are arranged toward the center of the transistor. Therefore, in the following description, it is referred to as “all inwardly arranged one-side stub”, and in FIG. 4, it is described as an open stub 22b.

  Further, the “one-side stub” of the harmonic processing circuit 21 shown in FIG. 5 is such that the open stubs arranged on the line where the outputs of the transistors are first synthesized are not coupled to each other in the tournament matching circuit. Are arranged outside. Therefore, in the following description, it is referred to as “outwardly arranged one-sided stub”, and in FIG. 5 it is described as an open stub 22c.

  Furthermore, the “single-side stub” of the harmonic processing circuit 21 shown in FIG. 6 is a tournament matching circuit in which all open stubs 22 are arranged toward the outside opposite to the center direction of the transistor. is there. Therefore, in the following description, it is referred to as “all outwardly arranged one-side stub”, and in FIG. 6, it is described as an open stub 22d.

  FIG. 7 is a comparison result of characteristics due to the difference in arrangement of “one-side stubs” in the first embodiment of the present invention. More specifically, the results of calculating the amplitude difference and phase difference between the outermost harmonic processing circuit and the innermost harmonic processing circuit for the fundamental wave and the second harmonic are summarized. .

  From the calculation results of FIG. 7, the amplitude difference and the phase difference in the “opposite-arranged one-side stub” in FIG. 1 and the “all-outward-arranged one-side stub” in FIG. And the characteristic result smaller than the “outwardly arranged one-sided stub” of FIG. 5 is obtained, and it can be confirmed that the interference with the matching circuit of the adjacent cell can be further reduced.

  As described above, according to the first embodiment, by using the one-side stub for the harmonic processing circuit, it is possible to achieve both improvement of the broadband characteristics of the harmonic processing circuit and suppression of interference problems from adjacent cells. . Furthermore, by suppressing the arrangement of each one-side stub in the tournament configuration matching circuit to the oppositely arranged stub or the all-outwardly arranged one-side stub, it is possible to improve the suppression of variation in load impedance between the unit cells. As a result, harmonic spurious generated in the amplifier over a wide band can be suppressed, and the drain efficiency of the amplifier can be improved.

  Note that a microstrip line can be used when configuring the line so that each harmonic processing circuit has a tournament structure. Moreover, although the case where eight harmonic processing circuits were used was illustrated in embodiment mentioned above, this invention is not limited to this. Even when three or more harmonic processing circuits provided corresponding to multi-cell transistors in which unit cell transistors of three or more cells are arranged at equal intervals are configured to have a tournament configuration, the effect of nursery rhymes is obtained. be able to.

  In the above-described embodiment, the case where the output from the unit cell transistor 11 is received by the harmonic processing circuit 21 in the output matching circuit 20 has been described. However, the amplifier of the present invention is not limited to such a configuration, and can be applied to a configuration in which input / output is reversed so that the harmonic processing circuit 21 in the output matching circuit 20 is input to the unit cell transistor 11. And has the same effect.

  10 multi-cell transistors, 11 unit cell transistors, 20 output matching circuits, 21 harmonic processing circuits, 22, 22a to 22d open stubs, 23 slits, 25 lines, 26 output terminals, 30 wires.

Claims (5)

A multi-cell transistor in which unit cell transistors of three or more cells are arranged at equal intervals;
With open stubs separated by slits, it has multiple harmonic processing circuits provided corresponding to each unit cell transistor so as to form a short-circuit state at a frequency that is an integral multiple of the fundamental wave, and each harmonic processing circuit An amplifier including an output matching circuit configured to form a tournament,
Each harmonic processing circuit is disposed at a distance of less than ½ wavelength in electrical length from at least one of the gate or drain terminals of each unit cell transistor constituting the multi-cell transistor, and the open stub is connected to the main line. An amplifier characterized by being arranged in parallel on one side on one side. The amplifier of claim 1, wherein
The output matching circuit having the tournament configuration is arranged on the open stub arranged on the line where the output of the unit cell transistor is first synthesized by two, or on the line finally divided into two at the input of the unit cell transistor. The above-mentioned open stubs are arranged so as to face each other so as to be coupled to each other. The amplifier of claim 1, wherein
The output matching circuit having the tournament configuration is arranged on the open stub arranged on the line where the output of the unit cell transistor is first synthesized by two, or on the line finally divided into two at the input of the cell unit transistor. The above-mentioned open stubs are all arranged so as to face outward. The amplifier of claim 1, wherein
The output matching circuit having the tournament configuration is arranged on the open stub arranged on the line where the output of the unit cell transistor is first synthesized by two, or on the line finally divided into two at the input of the unit cell transistor. The amplifier is characterized in that the open stubs arranged outside are arranged so as not to be coupled to each other. The amplifier of claim 1, wherein
The output matching circuit having the tournament configuration is arranged on the open stub arranged on the line where the output of the unit cell transistor is first synthesized by two, or on the line finally divided into two at the input of the unit cell transistor. All of the open stubs arranged are arranged so as to face inward.

Images