JP2002252529A - High frequency power amplifier - Google Patents

Abstract

PROBLEM TO BE SOLVED: To increase easily capacitance of a capacitor in an internal matching circuit of a high frequency power amplifier. SOLUTION: A first high dielectric substrate 20 is arranged on an input side of a pair of FET elements 12. A pair of protruding parts 17a composed of conductor which protrude from the facing side edges of a pair of input internal matched transmission lines 17 interposing a gap 17b are disposed in a region between the transmission lines 17 on the first substrate 20. Similarly, a pair of protruding parts 18a composed of conductor which protrude from facing side edges of a pair of output internal matched transmission lines 18 interposing a gap 18b are disposed in a region between the transmission lines 18 on a second high permitivity substrate 21 arranged on the output side. A capacitor having precise large capacitance is formed by the gaps 17a, 18b of the protruding parts 17a, 18a.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a high-output high-frequency power amplifier, and more particularly to a push-pull high-frequency power amplifier.

[0002]

2. Description of the Related Art A transmission high-frequency power amplifier used in a wireless communication device such as a cellular phone has a smaller size.
High output and high efficiency operation is required. As means for increasing the output of the power amplifier, for example, a push-pull type power amplifier circuit that operates a power amplifier element composed of a pair of field effect transistors (FETs) in opposite phases and combines and outputs the output signals from each FET It has been known.

(First conventional example)
A high frequency power amplifier according to a first conventional example disclosed in Japanese Patent No. 1849 will be described with reference to the drawings.

FIG. 4 shows a circuit configuration of a push-pull type high frequency power amplifier according to a first conventional example described in the above publication.

[0005] As shown in FIG.
A power distribution circuit 102 for generating and outputting a first distribution signal and a second distribution signal distributed so as to have the same amplitude and a phase difference of 180 ° from an input signal input to an input terminal 101. And a pair of FET elements that share a source with each other, each gate receives the first divided signal or the second divided signal, amplifies the respective power, and outputs a first amplified signal and a second amplified signal. An amplifier body 103 composed of an amplifier 103a; a power combining circuit 105 that receives the first amplified signal and the second amplified signal, combines the received first amplified signal and the second amplified signal, and outputs the combined signal to the output terminal 104; And

The power distribution circuit 102 and the amplifier main body 103
Between the input and the input, a pair of input side capacitors 106 that cut off a DC signal are provided on the input side to match the impedance of the input side device connected to the input terminal 101 with the input impedance of the amplifier body 103. Matching circuit 107
Is provided.

[0007] A pair of output side capacitors 108 for blocking a DC signal is provided between the amplifier main body 103 and the power combining circuit 105 on the output side.
And an output matching circuit 109 for matching the output impedance of the output terminal 104 with the impedance of the output side device connected to the output terminal 104.

The input matching circuit 107 includes a pair of microstrip lines 107a connecting each input side capacitor 106 and the amplifier main body 103 in series, and an input matching capacitor 107b connecting the pair of microstrip lines 107a. It is configured. Similarly, the output matching circuit 109 includes a pair of microstrip lines 109a that connect the amplifier body 103 and each output-side capacitor 108 in series, and an output matching capacitor 109b that connects the pair of microstrip lines 109a. It is configured.

Each FET element 103 of the amplifier main body 103
A gate bias terminal 110 to which a gate bias signal is applied is connected to each gate via a line 111, and each gate bias terminal 110 is connected to a capacitor 11
2 are grounded.

Similarly, a drain bias terminal 113 to which a drain bias signal is applied is connected to a drain of each FET element 103a of the amplifier body 103, respectively.
14 and each drain bias terminal 113
Are grounded via capacitors 115, respectively.

(Second Conventional Example) Next, a push-pull type high frequency power amplifier according to a second conventional example will be described with reference to the drawings.

FIG. 5 shows the amplifier main body 103 formed on the package 201 before it is sealed. The difference from the first conventional example is that the amplifier body 103
In that a first third harmonic control circuit 211 and a second third harmonic control circuit 212 are provided.

As shown in FIG. 5, a package 201 has a pair of FET elements 103a and a pair of input terminals 202 to which the first and second distribution signals from the power distribution circuit 107 shown in FIG. , A pair of output terminals 203 for outputting the first and second amplified signals. Between each input terminal 202 and each FET element 103a, a pair of input terminal electrodes 205 and a pair of input internal matching transmission lines 206, which are electrically connected via bonding wires 204, respectively, are provided. Similarly, each FET
Between the element 103a and each output terminal 203, a pair of output internal matching transmission lines 207 and a pair of output terminal electrodes 208, which are electrically connected via bonding wires 204, respectively, are provided.

A first high dielectric substrate 209 is provided below each input internal matching transmission line 206, and a second high dielectric substrate 210 is also provided below each output internal matching transmission line 207.
Is provided.

Each input internal matching transmission line 206 on the first high dielectric substrate 209 is connected to a first third harmonic control circuit 211. First third harmonic control circuit 2
11, one end of each input internal matching transmission line 206
And a pair of microstrip lines 211a connected to
And a chip capacitor 211b sandwiched and connected between the other ends of the pair of microstrip lines 211a. Here, the microstrip line 211
The line length of a is set to 1/12 of the fundamental wavelength λ of the input signal.

Similarly, each output internal matching transmission line 207 on the second high dielectric substrate 210 is connected to the second third harmonic control circuit 212. The second third harmonic control circuit 212 includes a pair of microstrip lines 2 each having one end connected to each output internal matching transmission line 207.
12a, and a chip capacitor 212b sandwiched and connected to the other end of the pair of microstrip lines 212a. Also here, the line length of the microstrip line 212a is set to one-twelfth of the fundamental wavelength λ of the input signal.

Hereinafter, features of the high frequency power amplifier circuit according to the second conventional example configured as described above will be described.

Generally, in order to obtain a high output by the FET elements, it is necessary to increase the gate width of each FET element. Accompanying this, the impedance of the input and output of each FET element decreases, so that the impedance ratio with respect to an external matching circuit increases, and as a result, the conversion loss of the impedance of the matching circuit increases.

Therefore, in the high-frequency amplifier according to the conventional example, the first high-dielectric substrate 209 and the second high-dielectric substrate 210 made of a high-dielectric material are placed close to the input / output terminals 202 and 203 of each FET element 103a. By providing
The conversion is performed so that the impedance is as high as possible near the FET element 103a. As a result, the conversion loss of the impedance caused by providing an external matching circuit is suppressed. Such a circuit is package 201
It is called an internal matching circuit because it is provided inside.

As is well known, each FET element 1
The first and second distribution signals input to 03a are amplified and output. When the amplitude of the input signal is large, not only the fundamental wave but also harmonics are generated from each FET element 103a. Also, the first and second distribution signals are mutually 1
Since there is a phase difference of 80 °, when comparing the signals between the input terminals 202 and between the output terminals 203 of the FET elements 103a, the fundamental wave and the odd harmonics have a 180 ° phase difference, and the even harmonics. Has a phase difference of 0 °.

Here, in the second conventional example, the input terminal 2 is controlled by the first third harmonic control circuit 211 provided on the input side.
Since the load impedance with respect to the odd harmonics in 02 is kept in a high impedance state close to open, each FET element 103a operates in class F, and the power added efficiency (drain efficiency) is improved.

Similarly, the second third harmonic control circuit 212 provided on the output side maintains the load impedance of the output terminal 203 with respect to the odd harmonics in a high impedance state close to open, so that each FET element 103
a becomes the class F operation, and the power addition efficiency is improved.

When the gate width of each FET element 103a is increased in order to obtain a large output from the high-frequency power amplifier, the input / output impedance of each FET element 103a decreases. The substrates 209 and 210 are required to function as large-capacity capacitors. The capacitance value of the capacitor of each of the high dielectric substrates 209 and 210 is determined by the dielectric constant and the thickness of the substrate itself. Since the dielectric constant is substantially determined by the material, fine adjustment of the capacitance value is performed by adjusting the thickness. Will be.

[0024]

However, the high-frequency power amplifiers according to the first and second prior arts require the first and second high-dielectric substrates 209 and 210 to be used to obtain large-capacity capacitors. Have to be reduced in thickness, and are likely to be damaged during mounting in the manufacturing process. Further, in the back surface polishing step performed to adjust the thickness of each of the high dielectric substrates 209 and 210, the substrate 20
In general, the thickness of the capacitors 9 and 210 varies by about 10%, so that there is a problem that the capacitance of the capacitor also varies.

Further, the first and second high dielectric substrates 20
A third harmonic control circuit 211 on top of
The chip capacitors 211b and 212b are used as capacitors required for the third harmonic control circuits 211 and 212 in order to increase the operation efficiency by forming the 212, but the capacitance values of the chip capacitors themselves vary. There is a problem. In addition, chip capacitors 211b,
A step of mounting 212b on each of high dielectric substrates 209 and 210 is required.

A first object of the present invention is to solve the above-mentioned conventional problems and to easily increase the capacitance of a capacitor in an internal matching circuit of a high-frequency power amplifier.
It is a second object of the present invention to prevent variations in the capacitance value of the capacitor in the third harmonic control circuit and eliminate the need for a mounting step.

[0027]

In order to achieve the first object, according to the present invention, a pair of transmission lines corresponding to each input signal or each output signal of a pair of power amplifying elements performing a push-pull operation are provided. A capacitance component is generated by a pair of projecting portions facing each other at an interval.

According to another aspect of the present invention, a capacitor connected to a transmission line having one-twelfth of the fundamental wavelength is formed by a gap between the projecting portions of the transmission line. .

Specifically, the high-frequency power amplifier according to the present invention externally receives a first distributed signal and a second distributed signal distributed so as to have the same amplitude and opposite phase characteristics. And a pair of transmission lines connected in correspondence with the pair of power amplifying elements, and a pair of transmission lines connected to the pair of power amplifying elements. The line has a pair of overhangs provided on the side portions facing each other, and the pair of overhangs constitutes a capacitor by facing each other at an interval.

According to the high-frequency power amplifier of the present invention, a pair of transmission lines connected to a pair of power amplifying elements are
The capacitor has a pair of overhanging portions provided on the side portions facing each other, and the pair of overhanging portions oppose each other at an interval. Therefore, a high-precision and large-capacity capacitor can be realized by adjusting the interval between the overhanging portions.

Further, since the capacitor is constituted by the pair of overhang portions, the capacitance value and the position on the substrate can be adjusted, so that the impedance matching with the pair of power amplification elements can be performed with higher accuracy. .

The high-frequency power amplifier according to the present invention preferably further comprises a capacitance adjusting film made of a high dielectric substance provided so as to straddle a pair of side portions. In this case, a large-capacity capacitor can be realized with high accuracy by adjusting the dielectric constant, the film thickness, or the formation position of the capacitance adjustment film.

In the high-frequency power amplifier according to the present invention, it is preferable that each of the pair of overhangs has a line length of about one twelfth of the fundamental wavelength of the input signal.

With this configuration, the capacitor formed by the pair of overhangs constitutes a third harmonic control circuit. Therefore, by adjusting the size of the gap or width between the overhangs, an optimum capacitance value can be obtained. The obtained capacitor can be obtained easily and with high precision. As a result, there is no variation in the capacitance value of the capacitor, and the chip capacitor becomes unnecessary, so that the step of mounting the chip capacitor can be omitted.

In the high-frequency power amplifier according to the present invention, it is preferable that the pair of transmission lines is formed on a substrate made of a high dielectric substance. With this configuration, the line length of the transmission line can be reduced, so that the size of the amplifier can be reduced.

[0036]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described with reference to the drawings.

FIG. 1 shows a plan configuration of an amplifier main body of a high-frequency power amplifier according to an embodiment of the present invention. Figure 1
The amplifier body 10 shown in FIG.

As shown in FIG. 1, the package 11 includes:
An FET element 12 as a pair of power amplification elements, a pair of input terminals 13 to which first and second distribution signals from a power distribution circuit described later are input, and first and second amplification signals are output. A pair of output terminals 14 are provided.

Between each input terminal 13 and each FET element 12, a pair of input terminal electrodes 16 and a pair of input internal matching transmission lines 17, which are electrically connected via a plurality of bonding wires 15, respectively. Is provided.

Similarly, each FET element 12 and each output terminal 1
4, a plurality of bonding wires 15 are provided.
A pair of output internal matching transmission lines 18 and a pair of output terminal electrodes 19 electrically connected to each other are provided.

The input internal matching transmission line 17 and the output internal matching transmission line 18 are formed on a first high dielectric substrate 20 and a second high dielectric substrate 21 provided on the package 11, respectively. . As a result, the first high dielectric substrate 20 and the second high dielectric substrate 21
Function as a large-capacity capacitor with respect to the ground provided on the surface (back surface) opposite to each of the transmission lines 17 and 18.

Here, as a feature of this embodiment, a pair of input internal matching transmission lines is provided in the region on the input terminal electrode 16 side between the input internal matching transmission lines 17 on the first high dielectric substrate 20. A pair of projecting portions 17a made of a conductor are provided so as to project from respective opposing side portions of 17 so as to form gaps 17b.

A first third harmonic control circuit 22 is provided in a region on the FET element 12 side between the input internal matching transmission lines 17 on the first high dielectric substrate 20.
The first tertiary harmonic control circuit 22 has one end connected to each input internal matching transmission line 17 and a pair of overhang portions having a line length of one-twelfth of the fundamental wavelength λ of the input signal. It is composed of a strip line 22a and a capacitor 22b in which the other ends of the pair of microstrip lines 22a are spaced from each other and opposed to each other.

Similarly to the input side, the second high dielectric substrate 21
A pair of output internal matching transmission lines 18 is provided in the upper region on the output terminal electrode 19 side between the output internal matching transmission lines 18.
(Gap) 18b from each of the sides facing each other
Are formed, and a pair of overhang portions 18a made of a conductor are provided so as to overhang each other.

A second tertiary harmonic control circuit 23 is provided in a region on the FET element 12 side between the output internal matching transmission lines 18 on the second high dielectric substrate 21.
The second tertiary harmonic control circuit 23 has one end connected to each output internal matching transmission line 18 and a pair of overhangs having a line length equal to one-twelfth of the fundamental wavelength λ of the input signal. It is composed of a strip line 23a and a capacitor 23b in which the other ends of the pair of microstrip lines 23a are spaced from each other and opposed to each other.

As described above, the first third harmonic control circuit 2
Since the second and second tertiary harmonic control circuits 23 are formed on the first high dielectric substrate 20 and the second high dielectric substrate 21 made of a high dielectric material, respectively, Since the wavelength is substantially shortened, the line length of the microstrip line 22a can be reduced. As a result, the first third harmonic control circuit 22 and the second third harmonic control circuit 23
Can be reduced in size.

Further, since the first third harmonic control circuit 22 and the second third harmonic control circuit 23 are located in the vicinity of each FET element 12, it is possible to control the third harmonic more reliably. Can be.

FIG. 2 shows a circuit configuration of a high-frequency power amplifier according to one embodiment of the present invention. In FIG. 2, FIG.
The same reference numerals are given to the same components as those shown in FIG.

As shown in FIG. 2, the input signal input to the input terminal 31 has the same amplitude and 180 °
The power distribution circuit 32 that generates and outputs the first distribution signal and the second distribution signal distributed so as to have a phase difference of
They are connected via a pair of input-side capacitors 33 that block DC signals. At the subsequent stage of the amplifier body 10, the first
A power combining circuit 35 that receives the amplified signal and the second amplified signal, combines the received first amplified signal and the second amplified signal, and outputs the combined signal to an output terminal 34 is a pair of output terminals that cuts off a DC signal. It is connected via a capacitor 36.

A gate bias terminal 37 to which a gate bias signal is applied is connected to a gate of each FET element 12 of the amplifier body 10 via a line 38, and each gate bias terminal 37 is connected via a capacitor 39. Grounded.

Similarly, a drain bias terminal 40 to which a drain bias signal is applied is connected to a drain of each FET element 12 of the amplifier main body 10 via a line 41, and each drain bias terminal 40 is connected to a capacitor 42. Each is grounded through.

Hereinafter, the operation of the high-frequency power amplifier configured as described above will be described.

The pair of input terminals 13 of the package 11 are supplied with first and second distribution signals generated by the power distribution circuit 32 and having the same amplitude and opposite phase characteristics, respectively. The input distribution signals are respectively input to the pair of FET chips 12 via the pair of input terminal electrodes 16 and the input internal matching transmission line 17 on the first high dielectric substrate 20.

Here, in the pair of input internal matching transmission lines 17, since the phase of the first distribution signal and the phase of the second distribution signal are mutually inverted, one input internal matching transmission line 17 is connected to the other. Gap 1 to the input internal matching transmission line 17
7b. That is, the first
A pair of overhanging portions 1 provided on the high dielectric substrate 20 of FIG.
With the capacitors 7a being spaced from each other and facing each other, a capacitance value larger than that obtained with respect to the ground on the back surface can be obtained.

In addition, the gap 17 between the overhang portions 17a
By adjusting the size of the gap 17b by expanding or narrowing the width b, or by finely adjusting the impedance by adjusting the size of the overhang portion 17a, the optimum impedance with respect to the input impedance of each FET element 12 is obtained. Value can be obtained.

If there is a variation in the input / output impedance characteristics caused by individual differences in the FET element 12, the overhang portion 17a is trimmed with a laser beam or the like while observing the impedance characteristics or high-frequency characteristics in real time. The size of the gap 17b may be adjusted.

As described above, according to the present embodiment, since a large-capacity capacitor required for the internal matching circuit is formed by the interval between the input internal matching transmission lines 17, it is necessary to adjust the capacity of the input internal matching transmission line 17. The backside polishing step can be omitted.

In the first third harmonic control circuit 22 formed on the first high dielectric substrate 20, the capacitance value of the capacitor 22b having the ends of the pair of microstrip lines 22a as opposite electrodes is The impedance characteristic of the input-side circuit with respect to each FET element 12 with respect to the third harmonic frequency is adjusted so as to be substantially open. As a result, since each FET element 12 can perform the class F operation, it operates with high efficiency. Further, by adjusting the size of the gap between the ends of the pair of microstrip lines 22a and the line width, the capacitor 22b formed of the ends is formed.
Can be adjusted with high precision and the degree of freedom for adjustment is higher than when a chip capacitor or the like is used. In addition, the step of mounting the chip capacitor can be omitted.

The first and second amplified signals amplified and output by the pair of FET chip elements 12 have the same amplitude and opposite phase characteristics. The voltage is applied to the pair of output terminals 14 via the output internal matching transmission line 18 and the pair of output terminal electrodes 19.

The second high dielectric substrate 21 is provided on the first side of the input side.
Similarly to the high dielectric substrate 20 of the first embodiment, it functions as a large-capacity capacitor with respect to the ground on the back surface thereof, and the first amplification matching transmission line 18 on the second high dielectric substrate 21 Since the phase of the signal and the phase of the second amplified signal are opposite to each other, one output internal matching transmission line 18 is separated from the other output internal matching transmission line 18 by a gap 1.
8b. That is, the second
Pair of overhang portions 1 provided on the high dielectric substrate 21 of FIG.
With the capacitors 8a being spaced from each other and facing each other, a capacitance value larger than that obtained with respect to the ground on the back surface can be obtained.

In addition, the gap 18 between the overhang portions 18a
By adjusting the size of the gap 18b by expanding or narrowing the width b, or by finely adjusting the impedance by adjusting the size of the overhang portion 18a, the optimum impedance with respect to the output impedance of each FET element 12 is obtained. Value can be obtained.

In the second tertiary harmonic control circuit 23 formed on the second high dielectric substrate 21 as well, like the first tertiary harmonic control circuit 22 on the input side, a pair of The capacitance value of the capacitor 23b having the ends of the microstrip line 23a as opposing electrodes is adjusted so that the impedance characteristic with respect to the third harmonic frequency of the circuit on the output side viewed from the FET element 12 is substantially open. As a result, since each FET element 12 can perform the class F operation, it operates with high efficiency.

Next, the first amplified signal and the second amplified signal having the same amplitude and opposite phases output from the pair of output terminals 14 are combined and output by the power combining circuit 35.

The overhanging portions 17a and 17a are provided on the input internal matching transmission line 17 and the output internal matching transmission line 18, respectively.
Although 8a is provided, any one of them may be provided, and the overhang portions 17a and 18a may not necessarily be provided.

Although the FET element 12 is used as the power amplifying element, a bipolar transistor may be used instead of the FET.

(Modification of Embodiment) Hereinafter, a modification of the embodiment of the present invention will be described with reference to the drawings.

FIG. 3 shows a plan configuration of an amplifier main body of a high-frequency power amplifier according to a modification. In FIG.
Components that are the same as the components shown in FIG. 1 are given the same reference numerals, and descriptions thereof will be omitted.

As shown in FIG. 3, the amplifier body 10 according to the present modification has a structure in which strontium titanate (STO) is provided so as to straddle the opposing side portions of the overhang portion 17a of the pair of input internal matching transmission lines 17. A first capacitance adjusting film 25 made of a high dielectric material such as Similarly, the second capacitance adjusting film 26 made of a high dielectric material such as STO is formed so as to straddle the opposing side portions of the overhang portion 18a of the pair of output internal matching transmission lines 18. According to the present modification, the first high dielectric substrate 2
When a larger capacity capacitor is required on the zero or second high dielectric substrate 21, the thickness or formation of the first capacitance adjusting film 25 or the second capacitance adjusting film 26 made of a high dielectric is required. By adjusting the position, a capacitor with higher precision and larger capacity can be realized.

The input internal matching transmission line 17 and the output internal matching transmission line 18 are provided with the first capacitance adjusting film 25 and the second capacitance adjusting film 26, respectively.

[0070]

According to the high-frequency power amplifier according to the present invention, in the internal matching circuit of the power amplifier performing the push-pull operation, a capacitor having a larger capacity including the capacitor constituting the third harmonic control circuit can be easily obtained. In addition, the optimum impedance characteristic for the power amplifying element can be obtained with high accuracy.

[Brief description of the drawings]

FIG. 1 is a plan view showing an amplifier main body of a high-frequency power amplifier according to an embodiment of the present invention.

FIG. 2 is a circuit diagram showing a high-frequency power amplifier according to one embodiment of the present invention.

FIG. 3 is a plan view showing an amplifier main body of a high-frequency power amplifier according to a modification of the embodiment of the present invention.

FIG. 4 is a circuit diagram showing a push-pull high-frequency power amplifier according to a first conventional example.

FIG. 5 is a plan view showing an amplifier main body of a push-pull high-frequency power amplifier according to a second conventional example.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 10 Amplifier main body part 11 Package 12 FET element (power amplifying element) 13 Input terminal 14 Output terminal 15 Bonding wire 16 Input terminal electrode 17 Input internal matching transmission line (transmission line / impedance conversion part) 17a Overhang part (capacitor / impedance conversion part) 17b gap 18 output internal matching transmission line (transmission line / impedance converter) 18a overhang (capacitor / impedance converter) 18b gap 19 output terminal electrode 20 first high dielectric substrate (impedance converter) 21 second High dielectric substrate (impedance conversion unit) 22 First third harmonic control circuit 22a Microstrip line (overhanging portion) 22b Capacitor 23 Second third harmonic control circuit 23a Microstrip line (overhanging portion) 23b Capacitor 2 First capacitance adjusting film 26 Second capacitance adjusting film 31 Input terminal 32 Power distribution circuit 33 Input side capacitor 34 Output terminal 35 Power combining circuit 36 Output side capacitor 37 Gate bias terminal 38 Line 39 Capacitor 40 Drain bias terminal 41 Line 42 Capacitor

 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Motonari Katsunori 1006 Kadoma Kadoma, Osaka Prefecture Matsushita Electric Industrial Co., Ltd. (72) Inventor Masahiro Maeda 1006 Kadoma Kadoma, Kadoma City Osaka Pref. F-term (reference) 5J067 AA04 AA16 AA22 AA41 CA00 CA92 CA93 FA00 FA16 HA00 HA09 HA29 KA66 KA68 KS01 KS11 LS12 MA21 QA04 QA05 QS11 SA14 TA01 5J091 AA04 AA16 AA22 AA41 CA00 CA92 CA93 FA00 QA14 HA00

Claims (4)

[Claims] 1. A first distribution signal and a second distribution signal which are received from outside and receive a first distribution signal and a second distribution signal distributed so as to have the same amplitude and opposite phase characteristics. It comprises a pair of power amplification elements for power-amplifying and outputting signals, respectively, and a pair of transmission lines connected corresponding to the pair of power amplification elements, wherein the pair of transmission lines are opposed to each other. A pair of overhanging portions provided at each of the plurality of antennas, wherein the pair of overhanging portions oppose each other at an interval to form a capacitor. 2. The high-frequency power amplifier according to claim 1, further comprising a high-dielectric-capacity adjusting film provided so as to straddle the pair of overhangs. 3. The high-frequency power amplifier according to claim 1, wherein each of the pair of overhangs has a line length of about one-twelfth of a fundamental wavelength of the input signal. 4. The transmission line according to claim 1, wherein said pair of transmission lines are formed on a substrate made of a high dielectric substance.
4. The high-frequency power amplifier according to any one of 3.