JP2011171467A - Solid-state image pickup element and driving method of the same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a solid-state image pickup element that can prevent the risk of charge injection from a substrate via a diffusion layer under the carrier pocket. <P>SOLUTION: The solid-state image pickup element has a light-receiving diode, having a P<SP>-</SP>-well region 3 formed in an N<SP>-</SP>-type layer with an N<SP>-</SP>-type layer 2 left in the surface layer of the semiconductor substrate and is equipped with a light-receiving region for generating a light-producing charge through light irradiation; a carrier pocket 6, where the light-producing charge is accumulated; a P<SP>+</SP>-type high-concentration diffusion layer 5 for discharging the light-producing charge accumulated in the carrier pocket; gate insulating films 1a and 1b formed on the carrier pocket and also on both the carrier pocket 6 and the P<SP>+</SP>-type high-concentration diffusion layer 5; a gate electrode 4 formed on the gate insulating films; and source and drain sections formed in the N<SP>-</SP>-type layer 2. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to a solid-state imaging device and a driving method thereof.

  A conventional solid-state imaging device includes a plurality of pixels arranged in a matrix, and each pixel includes one photodiode and one transistor. In addition, a storage portion called a carrier pocket that easily collects holes is provided below the gate electrode of the transistor. The photodiode generates holes according to the amount of incident light. The generated holes are accumulated in the accumulation unit. The threshold voltage of the transistor changes according to the number of holes stored in the storage unit. Then, by reading a source voltage that changes with a change in threshold voltage, a source voltage corresponding to the amount of incident light, that is, pixel data is obtained. By using a plurality of pixel data, one piece of image data is generated (see, for example, Patent Document 1).

FIG. 7 is a cross-sectional view showing a conventional solid-state imaging device.
(Construction)
In the unit pixel, a light-receiving diode that is a light detection unit and a modulation transistor are provided adjacent to each other, and the light-receiving diode is disposed beside the modulation transistor. The light receiving diode and the modulation transistor are formed in a P ⁻ well region 13 formed in the N ⁻ type layer 12 of the P type silicon substrate 11. In the transistor portion, a modulation gate electrode 14 is formed on the surface of the silicon substrate 11 via a gate insulating film 11a. The N ⁻ type layer 12 is also formed thin on the surface of the silicon substrate 11. A P-type layer (carrier pocket) 16 is formed on the substrate surface below the modulation gate electrode 14 via an N ⁻ -type layer 12 serving as a channel. An N ⁻ type layer 12 is formed immediately below the carrier pocket 16, and the P type silicon substrate 11 and the carrier pocket 16 are isolated.

  The modulation gate electrode 14 has a ring shape, a source region is formed so as to be surrounded by the inner edge of the modulation gate electrode 14, and a drain region is formed so as to surround the outer edge of the modulation gate electrode 14. . Further, wirings are electrically connected to the modulation gate electrode 14, the source region, and the drain region, respectively.

(Operation)
The charge generated by the light incident on the light receiving diode is transferred to the carrier pocket 16 below the modulation transistor. Since the threshold value of the modulation transistor changes depending on the transferred charge amount, the amount of light incident on the light receiving diode is detected based on the change amount. After the detection, a bias is applied so that a high voltage is applied to the channel portion of the modulation transistor, and the charges accumulated in the carrier pocket 16 are discharged to the lower P-type silicon substrate 11 to complete a series of operations.

JP 2002-134729 A (paragraphs 0023 to 0060)

The conventional solid-state imaging device has the following problems (1) to (5).
(1) Risk of charge injection from the substrate via the N ⁻ type layer 12 below the carrier pocket In the conventional solid-state imaging device, the photoelectrically converted charge is stored in the carrier pocket 16 below the modulation transistor. Since the carrier pocket 16 needs to be isolated from the P-type silicon substrate 11 by the N ⁻ -type layer 12, the potential barrier needs to be high. If this barrier is set low, noise charge will be injected from the substrate, making it difficult to distinguish whether it is signal (S) charge or noise charge due to injection from the substrate. is there.
In addition, since the N ⁻ type layer 12 also serves as a path for discharging charges at the time of charge resetting, it becomes difficult to discharge charges if it is set to a very high potential barrier. By applying a higher voltage, it becomes possible to discharge charges, but naturally, it is necessary to provide a high-breakdown-voltage drive circuit and increase power consumption.
Although measures can be taken by reducing the amount of charge that can be stored in the carrier pocket 16, this method should not be used because it degrades the basic performance of the solid-state imaging device.

(2) Abnormal output at the time of reading due to current parasitic path of modulation transistor In the conventional solid-state imaging device, reading is performed in the H (high) state of the modulation transistor. At this time, there are two paths through which a current flows from the drain to the source: a channel section on the surface and a path (that is, a parasitic path) via the N ⁻ type layer 12 immediately below the carrier pocket 16. In the dark or relatively dark light, the potential of the N ⁻ -type layer 12 does not increase, so the current through the parasitic path does not increase so much. However, when strong light is incident, the potential of the parasitic path increases. The output due to the parasitic path (that is, the parasitic output) is increased, and in particular, the N signal (noise signal) is replaced with the parasitic output of the non-selected line, and the SN differential output is decreased. In the worst case, if the selection line has dark light and the non-selection line has bright light, there is a risk that the output of the selection line will be lost.
As a countermeasure, there is a method of reducing the saturation output and setting the N output value (Vn) to a high voltage so that the parasitic output cannot be seen. However, this method has the adverse effect of reducing the saturation output. Basic performance is degraded. In addition, there is a method of reducing the parasitic output by a method of setting the N ⁻ type layer 12 under the source extending in the vertical direction, which is a part of the parasitic path, shallow. However, when the N ⁻ -type layer 12 is shallow, the N-type impurity concentration under the source contact is lowered, so that a large amount of dark current is generated at the interface between the metal and Si. There is a bad effect that it leads to deterioration.

(3) Transfer potential barrier due to rising of N-type impurity region (N ⁻ -type layer 12) when forming light-receiving diode (photoelectric conversion element) The light-receiving diode is formed by performing high-energy ion implantation. The ion implantation is performed by opening only the light receiving diode using a resist mask. At this time, ions are implanted through the resist taper at the resist boundary (end portion of the resist mask). Therefore, when viewed on a plane, the structure is such that N-type impurities rise from a deep region to a shallow region in the silicon substrate 11 at the boundary of the light receiving diode. On the contrary, the light receiving diode is formed by using this, but this rising also acts to cut off the path for transferring the charge from the light receiving diode to the carrier pocket 16 in the modulation region. For this reason, the conditions for ion implantation are limited. In particular, when the injection is performed with high energy, the tendency to cut becomes higher, so that there is a limit for forming the light receiving diode deeply. As a result, since the weak red sensitivity is lowered, there is an adverse effect that the basic characteristics are deteriorated.

(4) Formation of transfer potential dip due to rising of the P-type impurity region when forming the P-type reset enhancement region on the P-type silicon substrate 11 below the modulation transistor. This can also be considered as in (3). . A P-type reset enhancement region having a high concentration is formed by injecting P-type impurities into a P-type silicon substrate 11 located below the N ⁻ -type layer 12 below the carrier pocket 16 (assuming that reset enhancement is performed). If the region is not formed, there may be a problem that the reset charge cannot be effectively discharged). This P-type reset enhancement region is formed by high energy ion implantation. Since the ion-implanted P-type impurity rises at the boundary (opening region boundary) of the light receiving diode, the P-type impurity in the transfer path from the light receiving diode to the carrier pocket 16 becomes high in concentration. For this reason, a potential dip is formed, causing not only a transfer failure but also a carrier accumulated in the dip when it is unnecessary, which may become a noise component. Further, in the worst case, the potential of the N ⁻ -type layer 12 between the transfer path and the reset enhancement region is lowered, and there is a possibility that the photoelectrically converted charge is transferred to the substrate without being transferred. In order to avoid such adverse effects, restrictions are imposed on the ion implantation conditions for forming the reset enhancement region, and attention must be paid to the ion implantation direction and ion implantation energy.

(5) Generation of Knee characteristics In the conventional solid-state imaging device, when light that exceeds the saturation charge amount of the carrier pocket 16 that is a charge storage portion is incident, the generated charge goes from the light receiving diode to the carrier pocket 16, 16 is discharged to the charge discharge path of the substrate. However, when particularly intense light is incident, more charges flow into the carrier pocket 16 than at the speed at which it is discharged into the charge discharge path of the substrate, and more charges than the saturation charge amount that should have been originally stored can be stored in the carrier pocket. 16 will be accumulated. As a result, there is a problem that the Knee characteristic appears.

The above problems are caused by the presence of the N ⁻ -type layer 12 under the carrier pocket 16 and the need to separately form the diffusion layer of the light receiving diode and the modulation transistor in a planar manner. It has become a stumbling block for conversion.

  An aspect of the present invention is to provide a solid-state imaging device and a driving method thereof that solve any of the above problems.

One aspect of the present invention is a solid-state imaging device including a light receiving diode and an optical signal detection transistor.
A first conductivity type diffusion layer formed on a semiconductor substrate;
The semiconductor substrate has a second conductivity type diffusion layer formed in the first conductivity type diffusion layer in a state where the first conductivity type diffusion layer is left on the surface layer of the semiconductor substrate, and generates photogenerated charges by light irradiation. A light receiving diode having a light receiving area to
A carrier pocket formed in the second conductivity type diffusion layer and storing the photogenerated charge;
A second conductivity type charge discharge diffusion layer formed in the first conductivity type diffusion layer, disposed next to the carrier pocket, and for discharging the photogenerated charge accumulated in the carrier pocket;
A gate insulating film formed on the semiconductor substrate and formed on the carrier pocket and between the carrier pocket and the charge discharging diffusion layer;
A gate electrode formed on the gate insulating film;
A source part and a drain part formed in the first conductivity type diffusion layer;
Comprising
The optical signal detection transistor includes the gate electrode, the gate insulating film, the source part, and the drain part, and outputs a threshold voltage modulated by the photogenerated charge accumulated in the carrier pocket as an optical signal. It is a solid-state image sensor characterized by controlling.

According to the solid-state imaging device, any of the problems of the prior art can be solved by eliminating the first conductive type diffusion layer (for example, N ⁻ type layer) under the carrier pocket as in the prior art.

In the solid-state imaging device according to one embodiment of the present invention,
The thickness of the gate insulating film is such that a portion formed between the carrier pocket and the charge discharging diffusion layer is formed thinner than a portion formed above the carrier pocket. preferable.
In the solid-state imaging device according to one embodiment of the present invention,
It is preferable that the light receiving diode is also formed below the carrier pocket.

In the solid-state imaging device according to one embodiment of the present invention,
The planar shape of each of the carrier pocket and the gate electrode is preferably a ring shape.

In the solid-state imaging device according to one embodiment of the present invention,
The first conductivity type may be an N type, and the second conductivity type may be a P type.

One aspect of the present invention is a method for driving any of the solid-state imaging devices described above,
Generating light-generated charges in the light-receiving diode by light irradiation to the light-receiving region, and performing an accumulation operation of storing the light-generated charges in the carrier pocket;
A first gate voltage is applied to the gate electrode and a drain voltage is applied to the drain portion in a state where the threshold voltage of the optical signal detection transistor is changed by the photogenerated charge accumulated in the carrier pocket. , Perform a signal modulation operation to detect a signal from the source unit,
By applying a voltage lower than the first gate voltage to the gate electrode and applying the drain voltage to the drain portion, a charge discharging path is formed between the carrier pocket and the charge discharging diffusion layer. Performing a reset operation for discharging the photogenerated charge remaining in the carrier pocket;
Applying the first gate voltage to the gate electrode and applying the drain voltage to the drain part in a state where no photo-generated charges are accumulated in the carrier pocket, the signal from the source part is noised. A solid-state imaging device driving method characterized by performing a noise modulation operation detected as a signal.

The top view which shows the solid-state image sensor by embodiment. Sectional drawing of the structure of the AA 'part shown in FIG. The figure which shows the potential diagram at the time of the modulation | alteration in the part in alignment with the XX 'line of the structure sectional drawing of FIG. The figure which shows the potential diagram at the time of reset in the part which follows the XX 'line | wire of the structure sectional drawing of FIG. The figure which shows the equivalent circuit of the solid-state image sensor shown in FIG.1 and FIG.2. The figure which shows the drive sequence of the solid-state image sensor shown in FIG.1 and FIG.2. Sectional drawing which shows the conventional solid-state image sensor.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. However, the present invention is not limited to the following description, and it will be easily understood by those skilled in the art that modes and details can be variously changed without departing from the spirit and scope of the present invention. Therefore, the present invention should not be construed as being limited to the description of the embodiments below.

  FIG. 1 is a plan view showing a substrate modulation type solid-state imaging device according to an embodiment of the present invention. 2 is a cross-sectional view taken along line AA ′ shown in FIG.

(Construction)
As shown in FIG. 1, a light receiving diode 103 and a modulation transistor (optical signal detection transistor) 102 are provided in a unit pixel of the solid-state imaging device. The unit pixels have equal pitches in the vertical and horizontal directions and are inclined with respect to the column or row direction.

As shown in FIG. 2, the solid-state imaging device has, for example, a P-type silicon substrate 1 as a semiconductor substrate, and an N ⁻ -type layer 2 is formed as a first conductivity type diffusion layer on the P-type silicon substrate 1. ing. In the N ⁻ type layer 2, for example, a P ⁻ well region 3 is formed as a second conductivity type diffusion layer, and a light receiving diode 103 is formed in the P ⁻ well region 3. The light receiving diode 103 includes a light receiving region that generates a photo-generated charge by light irradiation. Further, the N ⁻ type layer 2 is left on the P ⁻ well region 3 (that is, the surface layer of the silicon substrate 1).

A carrier pocket (P-type layer) 6 in which photogenerated charges are accumulated is formed in the P ⁻ well region 3, and the planar shape of the carrier pocket 6 is a ring shape. In addition, a light-receiving diode that is a charge generation region is also formed immediately below the carrier pocket 6.

In the N ⁻ type layer 2, a P ⁺ type high concentration diffusion layer 5 is formed as a second conductivity type charge discharging diffusion layer for discharging the photogenerated charges accumulated in the carrier pocket 6. The P ⁺ -type high concentration diffusion layer 5 is arranged next to the carrier pocket 6, is located on the substrate surface, and is located outside the P ⁻ well region 3.

Gate insulating films 1a and 1b are formed on the surface of the P-type silicon substrate 1, and the gate insulating films 1a and 1b are located on the carrier pocket 6 and the carrier pocket 6 and the P ⁺ -type high-concentration diffusion layer. 5 are located between each other. The thickness of the gate insulating films 1a and 1b is such that the portion 1b formed between the carrier pocket 6 and the P ⁺ -type high concentration diffusion layer 5 is thinner than the portion 1a formed on the carrier pocket 6. Is formed. Thus, it is preferable that the thickness of the gate insulating film is such that the portion 1b is formed thinner than the portion 1a. However, this configuration is not an essential requirement, and the gate insulating film portion 1b and the portion 1a are the same. It may be formed with a thickness.

A modulation gate electrode (light signal detection gate electrode) 4 is formed on the gate insulating films 1a and 1b, and the planar shape of the modulation gate electrode 4 is a ring shape. The modulation gate electrode 4 also functions as a reset gate electrode. By causing the modulation gate electrode 4 to function as a reset gate electrode, the charge is discharged from the carrier pocket 6 to the P ⁺ -type high-concentration diffusion layer 5 in the channel region below the thin portion 1b of the gate insulating film. A path is formed. This charge discharge path is formed in the horizontal direction on the same plane as the modulation transistor.

A source part is formed in the N ⁻ type layer 2 surrounded by the inner edge of the modulation gate electrode 4, and a drain part is formed in the N ⁻ type layer 2 surrounding the outer edge of the modulation gate electrode 4. Further, wiring is electrically connected to each of the modulation gate electrode 4, the source part, and the drain part.

The modulation transistor 102 includes a modulation gate electrode 4, a gate insulating film 1 a, an N ⁻ -type layer 2 serving as a channel, a source part and a drain part, and a threshold voltage modulated by photogenerated charges accumulated in the carrier pocket 6. Is output as an optical signal.

  FIG. 3 is a diagram showing a potential diagram at the time of modulation in a portion along the line XX ′ in the structure sectional view of FIG. FIG. 4 is a diagram showing a potential diagram at the time of resetting in a portion along the line XX ′ in the structure sectional view of FIG.

(Operation)
Electric charges (for example, holes) are generated in the substrate by light incident on the light receiving diode, and the electric charges are transferred to the carrier pocket 6 below the modulation transistor. As shown in FIG. 3, since the modulation transistor has a substrate bias when electric charges are accumulated in the carrier pocket 6, the threshold value changes depending on the amount of electric charges. This amount of change is detected as the amount of light incident on the light receiving diode. After the detection, the modulation gate electrode 4 is made to function as a reset gate electrode, whereby charge is discharged from the carrier pocket 6 to the P ⁺ -type high concentration diffusion layer 5 as shown in FIG. To do.

FIG. 5 is a diagram illustrating an equivalent circuit of the solid-state imaging device illustrated in FIGS. 1 and 2. FIG. 6 is a diagram illustrating a driving sequence of the solid-state imaging device illustrated in FIGS. 1 and 2.
FIG. 5 shows an equivalent circuit of one solid-state image sensor. By arranging a plurality of such solid-state image sensors in a matrix (for example, by arranging 500 rows × 500 columns), a solid state An imaging device is configured.

As shown in FIG. 5, the N ⁻ -type layer 2 of the light receiving diode 103 is electrically connected to the common drain line D, and the common drain line D is electrically connected to the drain portion of the modulation transistor 102. The source part of the modulation transistor 102 is electrically connected to the source line S. Each of the gate electrode 4 of the modulation transistor 102 and the gate electrode 4 of the resetting transistor 104 is electrically connected to the gate line G. The reset transistor 104 means a transistor when the gate electrode of the modulation transistor 102 shown in FIGS. 1 and 2 functions as the reset gate electrode as described above.
The P ⁻ well region 3 of the light receiving diode 103 is electrically connected to the carrier pocket 6. The P ⁻ well region 3 of the light receiving diode 103 is electrically connected to either the source portion or the drain portion of the reset transistor 104. Either the source part or the drain part of the reset transistor 104 is electrically connected to the ground line GND.

  Next, a method for driving the solid-state imaging device will be described with reference to FIGS. However, the specific applied voltage described here is merely an example, and the present invention is not construed as being limited to the specific applied voltage.

First, the operation of accumulating photogenerated charges will be described.
A second gate voltage (for example, 2.6 V) is applied to the modulation gate electrode of the modulation transistor 102 of each of the selected and non-selected pixels via the selection gate line G and the non-selection gate line, and via the common drain line D. Thus, a drain voltage (for example, 1.0 V) is applied to the drain portion of the modulation transistor 102. Then, photogenerated charges are generated by the light incident through the opening region of the light receiving diode 103. Holes are collected from the photogenerated charges generated in the light receiving diode 103, and the holes are accumulated in the carrier pocket.

Next, a signal modulation operation (S readout) for detecting the amount of photogenerated charges will be described.
The threshold voltage of the modulation transistor 102 changes due to the photo-generated charges accumulated in the carrier pocket. In this state, a first gate voltage (for example, 3.3 V) higher than the second gate voltage is applied to the modulation gate electrode of the selected pixel via the selection gate line G, and the modulation transistor 102 is applied to the drain portion of the modulation transistor 102. A drain voltage (for example, 3.3 V) is applied through the common drain line D. A voltage lower than the second gate voltage (for example, 1.5 V) is applied to the non-selected pixel via the non-selected gate line to the modulation gate electrode. Then, the pixel is selected by lowering the potential of the unselected source portion that changes in conjunction with the gate voltage to be lower than the potential of the source portion of the selected pixel, and the signal Vs from the selected pixel is detected.

Next, the reset operation will be described.
In the reset operation, carriers remaining in the carrier pocket and the P ⁻ well region 3 are discharged. Specifically, a voltage lower than the first gate voltage (for example, 0 V) is applied to the modulation gate electrode of the modulation transistor 102 of the selected pixel (the gate electrode of the reset transistor 104 shown in FIG. 5) to modulate the non-selected pixels. A second gate voltage (for example, 2.6 V) is applied to the gate electrode (for example, the gate electrode of the reset transistor 104 shown in FIG. 5), and the drain voltage (for example, the drain voltage of the modulation transistor 102 via the common drain line D) 3.3V) is applied. Therefore, a sudden potential change occurs in the P ⁻ well region 3 (see FIGS. 3 and 4), and a strong electric field is applied so as to discharge photogenerated charges to the P ⁺ type high concentration diffusion layer 5. ^A charge discharge path is formed between the ⁺ -type high-concentration diffusion layer 5 and the remaining photogenerated charges are reliably discharged. At this time, the potential of the source portion of the modulation transistor 102 is floating.

Next, the noise modulation operation (N reading) will be described.
The noise modulation is a signal modulation operation (S readout) in a state where photogenerated charges are not accumulated after reset. Performs equivalent to the signal modulation operation, such as bias conditions.

  By performing this noise modulation operation, it is possible to obtain a variation in threshold value of each pixel as the noise signal Vn. By subtracting the noise modulation signal Vn obtained here from the signal modulation signal Vs obtained in the above sequence, a net photogenerated charge signal can be extracted as a video signal. According to this video signal detection means, it is possible to cancel the distribution of threshold values and variations of each pixel and to extract a pixel signal having a higher SN ratio.

  After the noise modulation operation is completed, the accumulation operation is performed again, and an image signal is output by repeating this cycle.

As described above, according to the embodiment of the invention, N under the carrier pocket 16 shown in FIG. 7 ^- can eliminate type layer, also can form a photodiode below the modulation transistor, P ⁺ -type The light-receiving diode can be arranged in the entire area other than the separation region between the high-concentration diffusion layer 5 and the solid-state imaging element, and a lateral charge discharge path that can discharge charges at a low voltage can be formed. Thereby, the subject in a prior art can be eliminated as follows.

(1) Concerning the fear of charge injection from the substrate By eliminating the N ^- type layer, which becomes a barrier for storing charges at the bottom of the carrier pocket and also serves as a reset path at reset, the reverse injection of charges from the substrate is prevented. You don't have to worry and you can set your career pocket potential deeper than it currently is. As a result, since the amount of charge handled can be increased, an imaging element having a wide dynamic range and strong characteristics against noise can be realized.

(2) Abnormal output at the time of reading by the current parasitic path of the modulation transistor Since the parasitic path is eliminated, there is no abnormal output at the time of reading. In addition, since the structure design of the N-type impurity diffusion layer extending in the vertical direction under the source can be made without being aware of the parasitic path, an imaging element with less dark current and better characteristics can be realized.

(3) Transfer potential barrier due to rising of N-type impurity region during formation of light receiving diode (photoelectric conversion element) Since there is no step in which a transfer potential barrier can be formed during the manufacturing process, there is no transfer failure, and the formation of the light receiving diode is eliminated. Since the degree of freedom of impurity implantation is increased, a light-receiving diode suitable for characteristics can be manufactured. For example, in order to increase the red sensitivity, it is desirable to make the light receiving diode deep, but since it is possible to set the energy for forming the light receiving diode high, it is easy to improve the characteristics.

(4) Formation of transfer potential dip due to rising of the P-type impurity region when forming the P-type reset enhancement region on the P-type silicon substrate below the modulation transistor Since the reset enhancement region itself is not necessary, P-type impurities do not rise, transfer potential dip is eliminated, transfer defects and noise components can be reduced, and characteristics can be improved.

  In the present embodiment, a front-illuminated solid-state imaging device in which light is irradiated from the front surface side of the P-type silicon substrate has been described. The present invention can also be applied to an image sensor.

DESCRIPTION OF SYMBOLS 1 ... P-type silicon substrate, 1a, 1b ... Gate insulating film, 2 ... N ^- type layer, 3 ... P ^- well region, 4 ... Modulation gate electrode, 5 ... P ⁺ type high concentration diffusion layer, 6 ... Carrier pocket (P-type layer), 102 ... modulation transistor (optical signal detection transistor), 103 ... light receiving diode

Claims (6)

In a solid-state imaging device including a light receiving diode and an optical signal detection transistor,
A first conductivity type diffusion layer formed on a semiconductor substrate;
The semiconductor substrate has a second conductivity type diffusion layer formed in the first conductivity type diffusion layer in a state where the first conductivity type diffusion layer is left on the surface layer of the semiconductor substrate, and generates photogenerated charges by light irradiation. A light receiving diode having a light receiving area to
A carrier pocket formed in the second conductivity type diffusion layer and storing the photogenerated charge;
A second conductivity type charge discharge diffusion layer formed in the first conductivity type diffusion layer, disposed next to the carrier pocket, and for discharging the photogenerated charge accumulated in the carrier pocket;
A gate insulating film formed on the semiconductor substrate and formed on the carrier pocket and between the carrier pocket and the charge discharging diffusion layer;
A gate electrode formed on the gate insulating film;
A source part and a drain part formed in the first conductivity type diffusion layer;
Comprising
The optical signal detection transistor includes the gate electrode, the gate insulating film, the source part, and the drain part, and outputs a threshold voltage modulated by the photogenerated charge accumulated in the carrier pocket as an optical signal. A solid-state image sensor that controls the operation. In claim 1,
The thickness of the gate insulating film is such that a portion formed between the carrier pocket and the charge discharging diffusion layer is formed thinner than a portion formed on the carrier pocket. A solid-state imaging device. In claim 1 or 2,
The solid-state imaging device, wherein the light-receiving diode is also formed below the carrier pocket. In any one of Claims 1 thru | or 3,
A solid-state imaging device, wherein each of the carrier pocket and the gate electrode has a ring shape in plan view. In any one of Claims 1 thru | or 4,
The solid-state imaging device, wherein the first conductivity type is an N-type and the second conductivity type is a P-type. A method for driving the solid-state imaging device according to any one of claims 1 to 5,
Generating light-generated charges in the light-receiving diode by light irradiation to the light-receiving region, and performing an accumulation operation of storing the light-generated charges in the carrier pocket;
A first gate voltage is applied to the gate electrode and a drain voltage is applied to the drain portion in a state where the threshold voltage of the optical signal detection transistor is changed by the photogenerated charge accumulated in the carrier pocket. , Perform a signal modulation operation to detect a signal from the source unit,
By applying a voltage lower than the first gate voltage to the gate electrode and applying the drain voltage to the drain portion, a charge discharging path is formed between the carrier pocket and the charge discharging diffusion layer. Performing a reset operation for discharging the photogenerated charge remaining in the carrier pocket;
Applying the first gate voltage to the gate electrode and applying the drain voltage to the drain part in a state where no photo-generated charges are accumulated in the carrier pocket, the signal from the source part is noised. A method for driving a solid-state imaging device, wherein a noise modulation operation detected as a signal is performed.

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