JP5338144B2 - Solid-state imaging device and manufacturing method thereof - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To prevent knee characteristics from emerging due to the reduced velocity of emitted charges. <P>SOLUTION: In a solid-state imaging element in which a plurality of unit pixels comprising a light-receiving diode 103 and a light signal detection transistor 102 are arrayed, the solid-state imaging device comprises: a light-receiving diode 103 which is formed on a semiconductor substrate and includes a light receiving area in which light-generated charges are generated by exposure to light; a transistor 102 which is formed on the semiconductor substrate, outputs as a light signal a threshold voltage modulated by the accumulation of the light-generated charge, and is mounted laterally adjacent to the light-receiving diode; a carrier pocket which is formed in the light signal detection transistor and serves as the accumulation area of the light-generated charges; and a subcontact 7 which is formed on the surface of the semiconductor substrate and mounted laterally adjacent to the light signal detection transistor, the subcontact having a function of outputting the light-generated charges from the semiconductor substrate. <P>COPYRIGHT: (C)2010,JPO&amp;INPIT

Description

  The present invention relates to a solid-state imaging device that suppresses the appearance of a Knee characteristic due to a slow discharge charge rate.

  A conventional solid-state imaging device includes a plurality of pixels arranged in a matrix, and each pixel includes one photodiode and one transistor. In addition, a storage portion called a carrier pocket that easily collects holes is provided below the gate electrode of the transistor. The photodiode generates holes according to the amount of incident light. The generated holes are accumulated in the accumulation unit. The threshold voltage of the transistor changes according to the number of holes stored in the storage unit. Then, by reading a source voltage that changes with a change in threshold voltage, a source voltage corresponding to the amount of incident light, that is, pixel data is obtained. By using a plurality of pixel data, one piece of image data is generated (see, for example, Patent Document 1).

  FIG. 3 is a plan view showing an element layout in a unit pixel of a conventional solid-state imaging element. FIG. 4 is a structural cross-sectional view taken along line AA ′ shown in FIG. FIG. 5 is a diagram showing a potential distribution in a state where there is an accumulation period during operation in the solid-state imaging device in the section BB ′ shown in FIG. When the signal charge is a hole, the potential is reversed. In the following description, it is assumed that the charge is a hole.

  As shown in FIGS. 3 and 4, the light receiving diode 101 and the transistor 100 are provided adjacent to each other in the unit pixel. The light receiving diode 101 and the transistor 100 are formed in a P well region 13 formed in the N type layer 12 of the silicon substrate 11. In the transistor 100 portion, a gate electrode 14 is formed on the surface of the silicon substrate 11 via a gate insulating film (not shown).

  As shown in FIG. 3, the gate electrode 14 has a ring shape, a source region is formed so as to be surrounded by the inner edge of the gate electrode 14, and a drain region is formed so as to surround the outer edge of the gate electrode 14. Has been. In addition, wirings 19, 15, and 18 that are electrically connected to the silicon substrate 11 are formed in the gate electrode 14, the source region, and the drain region, respectively.

  In addition, the solid-state imaging device photoelectrically exchanges the light received in the light receiving region, transfers the generated charge to the modulation unit (transistor), and then outputs a signal from the modulation device that is substrate-biased with the substrate potential changed by the charge Thereafter, a high voltage is applied to the gate electrode and the channel surface to discharge the charges to the substrate.

JP 2002-134729 A (paragraphs 0023 to 0060)

  In the case of the operation according to the conventional structure, first, as shown in FIG. 6A, when the charge exceeds the saturation accumulation amount, the knee characteristic is generated by the balance between the amount of charge flowing in and the amount of charge that can be discharged. Next, as shown in FIG. 6B, when there is a large amount of charge to be discharged, charge accumulation starts in the region corresponding to the charge discharge path, and the potential of the substrate rises. Thereafter, as shown in FIG. 6C, when the substrate potential is increased, the charge discharging ability is further reduced, the amount of accumulated charges is increased, and a strong Knee characteristic is generated.

  That is, when light that exceeds the saturation charge amount of the charge storage portion (carrier pocket) of the substrate enters, the generated charge goes from the light receiving portion to the carrier pocket and is discharged from the carrier pocket to the charge discharge path of the substrate. However, when particularly intense light is incident, more charge flows into the carrier pocket than the rate at which it is discharged into the charge discharge path of the substrate, and more charge than the saturation charge that should have been stored can be stored in the carrier pocket. Will accumulate in the part. As a result, the Knee characteristic appears. In particular, when the light receiving part (photodiode) adjacent to the side of the modulation part (transistor) is formed deep in the substrate, the potential of the charge discharge path is likely to rise. As a result, there is a problem that the charge discharging ability is further lowered and strong Knee characteristics are produced.

  In order to improve the red sensitivity, the light receiving part (photodiode) is to be formed deeply, the thermal process takes a long time after the photodiode is formed, or the modulation part (transistor) is to be reduced for miniaturization. Then, the distance between the photodiodes becomes short in the deep part of the substrate. As a result, as shown in FIG. 7, the portion of the region C is narrowed, and the charge discharging capability, which was the above problem, is further deteriorated. As shown in FIG. 8, in terms of the potential distribution, the potential becomes high at the location corresponding to the region C, and it becomes difficult to discharge the charges.

  The present invention has been made in consideration of the above-described circumstances, and an object of the present invention is to provide a solid-state imaging device capable of suppressing the appearance of the Knee characteristic due to the slow discharge charge speed and keeping the substrate potential constant. It is to provide.

In order to solve the above problems, a solid-state imaging device according to the present invention includes a solid-state imaging device in which a plurality of unit pixels each including a light-receiving diode and an optical signal detection transistor are arranged.
A light-receiving diode having a light-receiving region formed on a semiconductor substrate and generating photo-generated charges by light irradiation;
A threshold voltage that is formed on the semiconductor substrate and that is modulated as a result of the accumulation of the photogenerated charges is output as an optical signal; and an optical signal detection transistor that is disposed adjacent to the light receiving diode;
A carrier pocket formed in the optical signal detection transistor and serving as a storage region for the photogenerated charges;
A sub-contact formed on the surface of the semiconductor substrate and disposed adjacent to the transistor for optical signal detection; and
Comprising
The sub-contact has a function of discharging the photogenerated charges from the semiconductor substrate.

  According to the solid-state imaging device, by installing the sub-contact on the side of the optical signal detection transistor, the charge exceeding the saturation charge amount can be released from the semiconductor substrate to the sub-contact. Therefore, it becomes easy to keep the substrate potential constant regardless of the number of discharged charges, and as a result, it is possible to suppress the appearance of the Knee characteristic due to the slow discharge charge rate.

  Further, in the solid-state imaging device according to the present invention, the photogenerated charge generated in the light receiving region is transferred to the carrier pocket, and the photogenerated charge overflowing from the carrier pocket or reset and discharged from the carrier pocket. Further, it is preferable that the photogenerated charge is discharged out of the semiconductor substrate through the sub-contact.

Hereinafter, an embodiment of the present invention will be described with reference to FIGS. 1 and 2.
FIG. 1 is a plan view showing an element layout in a unit pixel of an image sensor in an image cell structure of a substrate modulation type solid-state imaging element according to an embodiment of the present invention. FIG. 2A is a cross-sectional view taken along the line AA ′ shown in FIG. FIG. 2B is a cross-sectional view showing details of the transistor and its peripheral portion in FIG.

  As shown in FIGS. 1 and 2A, a light receiving diode 103 and an optical signal detection transistor 102 are provided adjacent to each other in a unit pixel. The unit pixels have equal pitches in the vertical and horizontal directions and are inclined with respect to the column or row direction. Sub-contacts 7 are provided between the unit pixel rows.

  Details of the light receiving diode 103 and the transistor 102 shown in FIG. 2A are as shown in FIG. 2B. The light receiving diode 103 and the transistor 102 are different from each other in the first well region 3a and the second well region. It is formed in 3b. These well regions are connected to each other via a low concentration P-type region 3c. The first well region 3a of the light receiving diode 103 constitutes a part of a region where charges are generated by light irradiation. The second well region 3b of the transistor 102 portion constitutes a gate region in which the channel threshold voltage can be changed by the potential applied to this region.

  As shown in FIG. 2B, in the light receiving diode 103 portion, an N-type layer 2 is formed on a P-type silicon substrate 1, and a first well region 3a is formed in the N-type layer 2. Yes. Further, an N-type impurity region connected to the drain region 31 is formed on the surface layer of the first well region 3a. In the transistor 102 portion, the P-type silicon substrate 1 includes a high-concentration P-type layer (not shown), and the P-type layer is thicker than the light-receiving diode 103 portion. An N-type layer 2 is formed on the P-type layer, and a second well region 3 b is formed in the N-type layer 2. A gate electrode 4 is formed on the surface of the silicon substrate 1 above the second well region 3b via a gate insulating film.

  Further, as shown in FIG. 1, the gate electrode 4 described above has a ring shape. A source region 32 is formed on the surface layer of the second well region 3 b so as to be surrounded by the inner edge of the ring-shaped gate electrode 4. A ring-shaped drain region 31 is formed so as to surround the outer edge of the ring-shaped gate electrode 4. Further, on the light receiving diode 103 side, the drain region 31 is extended to form an impurity region of the light receiving diode 103. In other words, the drain region 31 is integrally formed so that most of the region covers the surface layer of the first and second well regions 3a and 3b.

  A region between the source region 32 and the drain region 31 becomes a channel region. An N-type channel doped layer 33 is formed by introducing an N-type impurity having an appropriate concentration into the channel region. In the second well region 3 b under the N-type channel doped layer 33, a ring-shaped carrier pocket (photogenerated charge storage region) 6 is formed so as to surround the source region 32. In the carrier pocket 6, since the P-type impurity concentration is higher than that of the first and second well regions 3 a and 3 b in the peripheral portion of the carrier pocket 6, the carrier pocket 6 against the photogenerated holes. The internal potential is lowered. As a result, photogenerated holes can be collected in the carrier pocket 6.

  A sub-contact 7 is formed between the unit pixel rows by a diffusion layer of a high-concentration P-type impurity. The sub-contact 7 is electrically connected to the wiring 8a, and the wiring 8a is connected to GND (ground potential). It has a function of discharging excess photogenerated charges from the sub-contact 7 through the wiring 8a. In addition, wirings 8, 5, and 9 that are electrically connected to the drain region 31, the source region 32, and the gate electrode 4 are formed, respectively. The sub-contact 7 is formed while forming the source region 32 and the drain region 31.

  The low-concentration P-type region 3c interposed between the first and second well regions 3a and 3b is formed in a region corresponding to a boundary portion between the drain region 31 and the channel dope layer 33 on the light receiving diode 103 side. A path formed by the first well region 3a, the low-concentration P-type region 3c, and the second well region 3b from the light receiving region to the carrier pocket 6 is a charge transfer route.

  As described above, according to the embodiment of the present invention, by installing the sub-contact 7 on the side of the transistor 102, the charge exceeding the saturation charge amount such as the charge overflowing from the carrier pocket or reset and discharged from the carry pocket. As shown by the arrows in FIG. 2A, the charges can be released from the silicon substrate 1 to the sub-contact 7 and discharged from the sub-contact 7 through the wiring 8a. Therefore, it becomes easy to keep the substrate potential constant regardless of the number of discharged charges. As a result, the appearance of the Knee characteristic due to the slow discharge charge rate can be suppressed.

  In the present embodiment, since charges are discharged from the sub-contact 7, it is not necessary to maintain the charge discharge path below the substrate. Therefore, it is possible to suppress the knee characteristic even if the light receiving diode is expanded in the lateral direction, and the degree of freedom in structural design of the light receiving diode is increased.

  Further, when the modulation unit (transistor) is miniaturized, the structure in which charges are discharged from the sub-contact 7 improves the degree of freedom in structural design of the transistor.

  Note that the present invention is not limited to the above-described embodiment, and various modifications can be made without departing from the spirit of the present invention.

The top view which shows the element layout in the unit pixel of the solid-state image sensor concerning embodiment of this invention. FIG. 2A is a structural cross-sectional view taken along line AA ′ shown in FIG. 1, and FIG. 2B is a cross-sectional view showing details of a transistor and its peripheral part in FIG. The top view which shows the element layout in the unit pixel of the conventional solid-state image sensor. Sectional drawing of the structure of the AA 'part shown in FIG. The figure which shows potential distribution in the BB 'sectional view of the structure sectional drawing of FIG. (A), (b), and (c) are potential distributions along the line BB ′ of the structural cross-sectional view of FIG. 4 in a state where there is an accumulation period during operation of the conventional solid-state imaging device. The figure which shows chronologically. The structure sectional view of the AA 'section shown in Drawing 3 concerning the conventional subject. The figure which shows potential distribution in the BB 'sectional view of the structure sectional drawing of FIG.

Explanation of symbols

  1, 11, 21... Silicon substrate, 2, 12, 22... N-type layer, 31... Drain region, 32... Source region, 33. 1 well region, 3b, second well region, 3c, P-type region, 6 ... carrier pocket, 34 ... gate insulating film, 4 ... gate electrode, 5, 9, 8 , 8a, 10, 15, 18, 25, 28 ... wiring, 7 ... sub-contact, 3, 13, 23 ... P-well region, 100, 102 ... transistor (modulation unit), 101, 103. Light receiving diode

Claims (2)

In a solid-state imaging device in which a plurality of unit pixels including a light receiving diode and a transistor for detecting an optical signal are arranged,
A light-receiving diode having a light-receiving region formed on a semiconductor substrate and generating photo-generated charges by light irradiation;
A threshold voltage that is formed on the semiconductor substrate and that is modulated as a result of the accumulation of the photogenerated charges is output as an optical signal; and an optical signal detection transistor that is disposed adjacent to the light receiving diode;
A carrier pocket formed in the optical signal detection transistor and serving as a storage region for the photogenerated charges;
A sub-contact formed on the surface of the semiconductor substrate, which is the same surface as a gate electrode constituting the optical signal detection transistor , and in direct contact with a drain region constituting the optical signal detection transistor;
Comprising
The sub-contact has a function of discharging the photogenerated charges from the semiconductor substrate.   2. The photogenerated charge generated in the light receiving region is transferred to the carrier pocket, and the photogenerated charge overflowed from the carrier pocket or the photogenerated charge discharged from the carrier pocket after being reset is discharged. A solid-state imaging device, wherein the solid-state imaging device is discharged out of the semiconductor substrate through the sub-contact.

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