JP2011171367A - Semiconductor light receiving element and semiconductor light receiving device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor light receiving element capable of improving especially an S/N ratio of a detection signal of feeble light (or photon), and a semiconductor light receiving device using the semiconductor light receiving element. <P>SOLUTION: In a semiconductor light receiving element, a photodiode layer 13 converting an optical signal to an electric signal includes: a light absorbing layer 133; a multiplication layer 131; and an electric field relaxation layer 132 interposed therebetween. In the multiplication layer 131, a first multiplication layer 131a and a second multiplication layer 131b adjacent to the first multiplication layer 131a are laminated in this order from an electric field relaxation layer 132 side. In the semiconductor light receiving element, the following relations are satisfied: Eg1<SB>min</SB>≥Eg2<SB>max</SB>and Eg1<SB>min</SB>>Eg2<SB>min</SB>, wherein Eg1<SB>min</SB>represents a minimum value of a bandgap of a material contained in the first multiplication layer 131a, Eg2<SB>max</SB>represents a maximum value of a bandgap of a material contained in the second multiplication layer 131b, and Eg2<SB>min</SB>represents a minimum value of the bandgap of the material contained in the second multiplication layer 131b. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to a semiconductor light receiving element and a semiconductor light receiving device.

  For detection of an optical signal in optical communication or the like, for example, a semiconductor light receiving element such as a photodiode is used. When light detection is performed by a photodetector (semiconductor light receiving device) using a semiconductor light receiving element, by using an avalanche photodiode (Avalanche Photodiodes = APD), detection of weak light, detection of photons with particularly low light intensity, etc. It is known that measurement and signal detection can be performed.

FIG. 7A and FIG. 7B show an exemplary configuration of an APD. FIG. 7A is a cross-sectional view of the APD. FIG. 7B is a diagram illustrating a layer structure of a region D portion in FIG. In both the drawings, the same parts are denoted by the same reference numerals. The semiconductor light receiving element 60 includes an n ⁺ type buffer layer 12, an avalanche photodiode (APD) layer 63, a p ⁺ type buffer layer 14, and a p ⁺ type contact layer 15 on an n type semiconductor substrate 11. Are stacked in the above order. The portion that performs the APD operation has a mesa structure, and is separated from the epi layer in other regions on the substrate. The mesa structure is formed halfway in the thickness direction of the n-type semiconductor substrate 11. An antireflection film 19 is formed on the surface of the n-type semiconductor substrate 11 opposite to the surface on the APD layer 63 side. A passivation film is formed on the surface of the APD layer 63, the p ⁺ -type buffer layer 14, and the p ⁺ -type contact layer 15 on the surface opposite to the surface on the antireflection film 19 side of the n-type semiconductor substrate 11. 18 is provided. A portion where the passivation film 18 is not provided is formed on the p ⁺ -type contact layer 15. A p-type electrode 16 is formed in this portion. The p-type electrode 16 is electrically connected to the p ⁺ -type contact layer 15. A portion where the passivation film 18 is not provided is formed on the n-type semiconductor substrate 11. In this portion, an n-type electrode 17 is formed. In the APD layer 63, a multiplication layer 631, an electric field relaxation layer 632, and a light absorption layer 633 are laminated in this order from the n ⁺ -type buffer layer 12 side. In the APD of this example, the multiplication layer 631 is a single composition layer.

  On the other hand, when a signal such as a weak light (or photon) signal is detected by an APD, since there are more dark current (dark count) components than a superconducting light-receiving element, the S / N ratio between the detection signal and the dark count. It is necessary to reduce the error at the time of communication. Therefore, there are methods for improving the S / N ratio by reducing the dark current value by improving the crystallinity of the semiconductor crystal constituting the APD or lowering the operating temperature of the light receiving element. There was a limit to improving the S / N ratio. Therefore, in improving the S / N ratio, optimization of the element structure has been attempted, and APDs that can be expected to have a higher S / N ratio have been developed (see, for example, Patent Documents 1 to 3 and Non-Patent Document 1). .

JP 2000-12890 A JP 2009-164456 A Japanese Patent No. 2937404

S. Wang, et al. , ‘Low-Noise Impact-Ionization-Engineered Avalanche Photodiodes Grown on InP Substrates’, IEEE PHOTOTONICS TECHNOLOGY LETTERS, VOL. 14, NO. 12, DECEMBER 2002

  However, in the semiconductor light receiving element described in the above document, the improvement of the S / N ratio has not always been sufficient. In addition, the structure of the element is complicated, and it may be difficult to reduce the cost.

  An object of the present invention is to provide a semiconductor light receiving element that can improve the S / N ratio of a detection signal of particularly weak light (or photons), and a highly sensitive semiconductor light receiving device using the same.

In order to achieve the above object, the semiconductor light receiving element of the present invention comprises:
A photodiode layer for converting an optical signal into an electrical signal;
The photodiode layer includes a light absorption layer, an electric field relaxation layer, and a multiplication layer,
The electrolytic relaxation layer is sandwiched between the light absorption layer and the multiplication layer,
The multiplication layer comprises a first multiplication layer and a second multiplication layer;
The first multiplication layer and the second multiplication layer are laminated in the order from the electric field relaxation layer side,
The second multiplication layer is adjacent to the first multiplication layer;
The minimum value of the band gap of the material contained in the first multiplication layer is Eg1 _min , the maximum value of the band gap of the material contained in the second multiplication layer is Eg2 _max , and the second multiplication layer is in the second multiplication layer. when the minimum value of the band gap of the material included was _{Eg2 min,} characterized by satisfying the relation of _{Eg1 min} ≧ _{Eg2 max} and _{Eg1 min> Eg2} min.

  The semiconductor light receiving device of the present invention includes the semiconductor light receiving element of the present invention.

  ADVANTAGE OF THE INVENTION According to this invention, the semiconductor light receiving element with which high S / N ratio is obtained can be provided. Therefore, the semiconductor light receiving device of the present invention including the semiconductor light receiving element of the present invention has high sensitivity.

FIG. 1A is a cross-sectional view showing an example of the configuration of a semiconductor light receiving element according to the first embodiment of the present invention. FIG.1 (b) is a figure which shows the layer structure of the area | region A part in sectional drawing which shows the structure of an example in Embodiment 1 of the semiconductor light receiving element of this invention. It is sectional drawing which shows 1 process of the manufacturing method in the said example. It is sectional drawing which shows the other process of the said manufacturing method. It is sectional drawing which shows the other process of the said manufacturing method. It is sectional drawing which shows the other process of the said manufacturing method. It is a figure which shows the electric field strength distribution at the time of operation | movement of the semiconductor light receiving element of this invention. FIG. 4A is a cross-sectional view showing an example of the configuration of the semiconductor light receiving element according to the second embodiment of the present invention. FIG. 4B is a diagram showing the layer structure of the region B in the cross-sectional view of the present embodiment. FIG. 4C is a diagram showing the layer structure of the second multiplication layer in the present embodiment. FIG. 5A is a cross-sectional view showing a configuration of an example of the semiconductor light receiving element according to the third embodiment of the present invention. FIG. 5B is a diagram illustrating a layer structure of a region C portion in the cross-sectional view of the present embodiment. It is a figure which shows the characteristic evaluation result of the semiconductor light receiving element of Example 1 and Comparative Example 1. FIG. 7A is a cross-sectional view showing a configuration of an example of an avalanche photodiode. FIG. 7B is a diagram showing a layer structure of a region D portion in the cross-sectional view.

  Hereinafter, the semiconductor light receiving element of the present invention will be described in detail. However, the present invention is not limited to the following embodiments.

(Embodiment 1)
FIG. 1A and FIG. 1B show a configuration of an example of the semiconductor light receiving element of this embodiment. FIG. 1A is a cross-sectional view of the semiconductor light receiving element of this embodiment. FIG. 1B is a diagram showing the layer structure of the region A in the cross-sectional view (FIG. 1A) of the present embodiment. In both the drawings, the same parts are denoted by the same reference numerals. The semiconductor light receiving element 10 includes an n ⁺ type buffer layer 12, an avalanche photodiode (APD) layer 13, a p ⁺ type buffer layer 14, and a p ⁺ type contact layer 15 on an n type semiconductor substrate 11. These are avalanche photodiodes (APDs) stacked in this order. The APD layer 13 is the “photodiode layer”. The semiconductor layer structure of the main part of the APD is shown in Table 1 below.

The portion that performs the APD operation has a mesa structure, and is separated from the epi layer in other regions on the substrate. The mesa structure is formed halfway in the thickness direction of the n-type semiconductor substrate 11. The mesa structure is formed in a circular shape or an elliptical shape as viewed from the light receiving direction (the vertical direction of the paper), but the present invention is not limited to this example. The circle and ellipse include, for example, an extremely circle or a polygon close to an ellipse. When the mesa structure is circular, the diameter is preferably 100 μm or less. When the mesa structure is elliptical, the major axis is preferably 100 μm or less, and the minor axis is preferably 20 μm or more. An antireflection film 19 is formed on the surface of the n-type semiconductor substrate 11 opposite to the surface on the APD layer 13 side. A passivation film is formed on the surface of the APD layer 13, the p ⁺ -type buffer layer 14, and the p ⁺ -type contact layer 15 on the surface opposite to the surface on the antireflection film 19 side of the n-type semiconductor substrate 11. 18 is provided. A portion where the passivation film 18 is not provided is formed on the p ⁺ -type contact layer 15. A p-type electrode 16 is formed in this portion. The p-type electrode 16 is electrically connected to the p ⁺ -type contact layer 15. A portion where the passivation film 18 is not provided is formed on the n-type semiconductor substrate 11. In this portion, an n-type electrode 17 is formed. APD can be detected by amplification even for very weak light such as a single photon.

In the present embodiment, the n ⁺ type buffer layer 12 includes a first n ⁺ type buffer layer 12 a and a second n ⁺ type buffer from the n type semiconductor substrate 11 toward the p ⁺ type buffer layer 14. The layers 12b are stacked in this order. As shown in Table 2 below, the APD layer 13 includes a multiplication layer 131, an electric field relaxation layer 132, and a light absorption layer 133 from the n-type semiconductor substrate 11 toward the p ⁺ -type buffer layer. Are stacked in the above order. That is, the electric field relaxation layer 132 is sandwiched between the light absorption layer 133 and the multiplication layer 131.

The multiplication layer 131 has a two-layer structure of a first multiplication layer 131a and a second multiplication layer 131b adjacent thereto. The multiplication layer material includes an electron multiplication type material and a hole multiplication type material. In the present embodiment, the multiplication layer 131 uses an electron multiplication type material. . In the multiplication layer 131, a second multiplication layer 131b and a first multiplication layer 131a are laminated in this order from the n-type semiconductor substrate 11 toward the p ⁺ -type buffer layer. The first multiplication layer 131a is a layer having a constant band gap. In the present embodiment, the second multiplication layer 131b has a superlattice structure. Table 3 shows an example of the configuration of the material, layer thickness, etc. of each layer of the semiconductor light receiving element 10 of this embodiment. Min and Max in the table represent the minimum value and the maximum value of each preferable range. Similarly, Typ represents a representative value.

When In _x Al _y Ga _(1-xy) As (0 <x <1, 0 <y <1, 0 <x + y ≦ 1) is used as the electron multiplying material, the Al composition ratio y is It is preferable that it is 0.25 or more and 0.48 or less. Further, the In _x Al _y Ga _(1-xy) As has a strain composition that is suppressed to a lattice matching condition or a lattice failure in an n-type semiconductor substrate 11 such as InP described later. Is preferred.

In the present invention, “composition” refers to the quantitative relationship of the number of atoms of elements constituting a semiconductor layer or the like. “Composition ratio” refers to a relative ratio between the number of atoms of a specific element constituting the semiconductor layer and the like and the number of atoms of another element. For example, in a semiconductor layer represented by a composition of In _x Al _y Ga _(1-xy) As, the numerical value of y is referred to as “Al composition ratio”.

The doping concentration (impurity concentration) of the multiplication layer 131 is preferably as low as possible, for example, 1 × 10 ¹⁶ cm ⁻³ or less, and more preferably 5 × 10 ¹⁵ cm ⁻³ or less. By adopting such a doping concentration, the electric field strength of the multiplication layer 131 can be made constant (uniform electric field) along the layer direction during the operation of the semiconductor light receiving element 10.

  The first multiplication layer 131a and the second multiplication layer 131b are layers that cause avalanche multiplication by applying a high electric field and generate a large amount of carriers. The first multiplication layer 131a is a layer having a constant band gap Eg1. In the present invention, from the viewpoint of performing multiplication with a low dark current, the first multiplication layer is preferably a layer in which the Eg1 is constant. From the viewpoint of reducing the multiplication dark current, the thickness of the first multiplication layer is preferably 0.2 μm or more. For the same reason, it is preferable that the thickness of the first multiplication layer is not less than half the thickness of the entire multiplication layer. The thickness of the first multiplication layer is preferably 2.0 μm or less in order to avoid a decrease in crystallinity because the allowable range of lattice deviation is reduced as the thickness is increased. The thickness is more preferably 1.5 μm or less, and still more preferably 0.5 μm or more and 1.0 μm or less. The material of the first multiplication layer 131a is preferably InAlGaAs, and most preferably InAlAs having a Ga composition ratio of 0. As another example of the material of the first multiplication layer 131a, InGaAsP is preferable, and among them, InP having a Ga composition ratio and an As composition ratio of 0 is most preferable.

The second multiplication layer 131 b is a layer close to the n ⁺ type buffer layer 12 side among the multiplication layers 131 sandwiched between the electric field relaxation layer 132 and the n ⁺ type buffer layer 12. The second multiplication layer 131b preferably has a higher ionization rate than the first multiplication layer 131a close to the electric field relaxation layer 132 side. The ionization rate can be changed by adjusting the band gap. In the case where the second multiplication layer 131b is configured with a constant band gap, assuming that the band gap of the second multiplication layer 131b is Eg2, the structure satisfies Eg1> Eg2. Most preferably, the material is a material that lattice matches with InP.

  The second multiplication layer 131b may have a superlattice structure. When the second multiplication layer 131b has a superlattice structure, Eg1> Eg2 (av) may be satisfied when the average band gap of the superlattice is Eg2 (av). Here, the average band gap is derived by averaging the energy gaps Eg of the barrier layer and the well layer in consideration of the ratio of the layer thicknesses, not the energy gap between the quantum wells and the minibands generated from the superlattice structure. It is the value. Further, when the band gap of the barrier layer is Eg2b and the band gap of the well layer is Eg2w, the structure is configured to satisfy the relationships of Eg1 ≧ Eg2b and Eg2b> Eg2w.

The material of the superlattice structure is In _x1 Al _y1 Ga _(1-x1-y1) As / In _x2 Al _y2 Ga _(1-x2-y2) As or In _(1-a1) Ga _a1 As _b1 P _{(1- b1)} / In _(1-a2) Ga _a2 As _b2 P _(1-b2) is preferably used. Here, 0 <x1 <1, 0 <y1 <1, 0 <x1 + y1 ≦ 1, 0 <x2 <1, 0 <y2 <1, 0 <x2 + y2 ≦ 1, 0 ≦ a1 ≦ 1, 0 ≦ b1 ≦ 1 0 ≦ a2 ≦ 1 and 0 ≦ b2 ≦ 1. The material of the superlattice structure is more preferably InAlAs / In _x3 Al _y3 Ga _(1-x3-y3) As (0 <x3 <1, 0 <y3 <1, 0 <x3 + y3 ≦ 1). For example, the first multiplication layer is formed of In _x1 Al _y1 Ga _(1-x1-y1) As (0 <x1 <1, 0 <y1 <1, 0 <x1 + y1 ≦ 1), The double multiplication layer is In _x1 Al _y1 Ga _(1-x1-y1) As / In _x2 Al _y2 Ga _(1-x2-y2) As (0 <x2 <1, 0 <y2 <1, 0 <x2 + y2 ≦ has a superlattice structure represented by _{1), in x1 Al y1 Ga} (1-x1-y1) band gap _Eg of _{as (in x1 Al y1 Ga (} 1-x1-y1) as) _{is, an in} x2 Al _{y2 Ga (1-x2-y2} ) band gap _Eg of _{As (in x2 Al y2 Ga (} 1-x2-y2) As) that larger is more preferable. As another example, the first multiplication layer is formed of In _(1-a1) Ga _a1 As _b1 P _(1-b1) (0 ≦ a1 ≦ 1, 0 ≦ b1 ≦ 1), and the second multiplication layer is formed. Double layer is In _(1-a1) Ga _a1 As _b1 P _(1-b1) / In _(1-a2) Ga _a2 As _b2 P _(1-b2) (0 ≦ a2 ≦ 1, 0 ≦ b2 ≦ 1) has a superlattice structure represented _{in, in (1-a1) Ga} a1 as b1 band gap _Eg of _{P (1-b1) (in} (1-a1) Ga a1 as b1 P (1-b1)) is _{, in (1-a2) Ga} a2 As b2 P band gap _Eg of _{(1-b2) (in (} 1-a2) Ga a2 As b2 P (1-b2)) that larger is more preferable.

Each maximum and minimum values of the band gap in said second multiplication layer 131b _is, when it is Eg2 _{max, Eg2 min,} the _{Eg2 max} is either equal to the band gap Eg1 of the first multiplication layer 131a, Less than (Eg1 ≧ Eg2 _max ). In the present invention, when the band gap corresponding to the light having the wavelength λ is Eλ, the band gap Eλ satisfies Eλ ≧ Eλ ₁ (λ ₁ = 1.2 μm) in the entire second multiplication layer. It is preferable. That is, it is preferable that the minimum value Eg2 _min of the band gap of the material included in the second multiplication layer satisfies the relationship of Eg2 _min ≧ Eλ ₁ (λ ₁ = 1.2 μm). The dark carriers generated from the second multiplication layer have a shape close to that of hole injection, and the multiplication factor is not so large.

The layer thickness of the second multiplication layer 131b is preferably less than half the total layer thickness of the first multiplication layer 131a and the second multiplication layer 131b. That is, it is preferable that the second multiplication layer 131b is thinner than the first multiplication layer 131a (dmEg1> dmEg2). In order to exhibit the ionization effect in the second multiplication layer 131b, it is preferably formed in a thickness of 20 nm or more, and more preferably in the range of 20 nm or more and 200 nm or less. In the superlattice structure of the second multiplication layer 131b, the ratio of the barrier layer thickness db to the well layer thickness dw, rdw = dw / db, may be constant in the second multiplication layer 131b. However, rdw may be increased in order to artificially lower Eg as it approaches the n ⁺ -type buffer layer 12 side.

  The electric field relaxation layer 132 is a layer provided for relaxing a difference between a high electric field applied to the multiplication layer 131 and a relatively low electric field applied to the light absorption layer 133. The electric field relaxation layer 132 is in direct contact with the first multiplication layer 131a and the light absorption layer 133. By providing the electric field relaxation layer 132, a high electric field can be stably applied to the multiplication layer 131. In the present embodiment, the electric field relaxation layer 132 contains a p-type impurity, and the same constituent material as that of the light absorption layer 133 and the first multiplication layer 131a may be used.

  The light absorption layer 133 is a layer that plays a role of converting incident light into electricity, and has a band gap capable of absorbing light to be received. The constituent material of the light absorption layer 133 is appropriately selected according to the wavelength of incident light.

  The material for forming the n-type semiconductor substrate 11 is not particularly limited, and examples thereof include InP.

The n ⁺ type buffer layer 12 is not particularly limited, and a conventionally known one can be used. Examples of the material for forming the n ⁺ -type buffer layer 12 include InP, InAlGaAs, InAlAs, InGaAsP, and the like. As in the present embodiment, the case n ⁺ -type buffer layer 12 is a two-layer structure of a first n ⁺ -type buffer layer 12a and the second n ⁺ -type buffer layer 12b, the first n ⁺ The type buffer layer 12a is preferably InP, and the second n ⁺ type buffer layer 12b is preferably InAlGaAs or InAlAs. With this configuration, for example, lamination is started from an InP layer on an InP substrate, which is easy in production. Further, the band gap Eg of the second buffer layer is preferably equal to or higher than that of the Eg when the second multiplication layer has a constant bandgap, and the band of the barrier layer in the case of the superlattice structure. It is preferably equal to or greater than the gap (Eg). When the first n ⁺ type buffer layer 12a is InP and the second n ⁺ type buffer layer 12b is InAlGaAs or InAlAs, the band gap of the layer in contact with the second multiplication layer is high, so that the multiplication characteristic is good. This is also preferable.

The APD layer 13 converts an optical signal into an electric signal. In the APD layer 13, when the light absorption layer 133 is p ⁻ type and the electric field relaxation layer 132 is p ⁺ type, the light absorption layer 133 receives an optical signal and generates an optical carrier. The multiplication layer 131 multiplies carriers generated in the light absorption layer 133. The electric field relaxation layer 132 gives a large electric field strength difference between the multiplication layer 131 and the light absorption layer 133.

The p ⁺ -type buffer layer 14 is formed on the surface of the light absorption layer 133 opposite to the surface on the electric field relaxation layer 132 side. The p ⁺ -type buffer layer 14 preferably has a sufficient impurity concentration and thickness, and is not depleted even when an operating voltage is applied. Examples of the material for forming the p ⁺ -type buffer layer 14 include InP, InGaAsP, InAlAs, InAlGaAs, and the like.

The p ⁺ type contact layer 15 is not particularly limited, and a conventionally known one can be used. Examples of the material for forming the p ⁺ -type contact layer 15 include InAlAs, InAlGaAs, InGaAs, InGaAsP, and the like.

The passivation film 18 has an insulating property. Examples of the material for forming the passivation film 18 include Si (silicon) -based materials such as SiN _x , SiON, and SiO ₂ ; and resin-based materials such as polyimide and BCB (benzocyclobutene). The thickness of the passivation film 18 is, for example, in the range of 0.1 to 0.4 μm for the Si-based material, and is in the range of, for example, 0.2 to 2 μm for the resin-based material. A method for forming the passivation film will be described later.

  The p-type electrode 16 and the n-type electrode 17 are not particularly limited, and conventionally known ones can be used. Examples of the material for forming both electrodes include metals such as Ti, Pt, and Au. The said metal may be used individually by 1 type, and may use 2 or more types together. A method for forming both electrodes will be described later.

The antireflection film 19 is not particularly limited, and a conventionally known one can be used. Examples of the material for forming the antireflection film 19 include SiN _x . For example, an antireflection film having a refractive index of about 1.9 and a thickness d can be formed using the above-described material. The thickness d can be set by the following formula (I), for example, where the signal wavelength λs and the refractive index of the antireflection film are n.
d = λs / 4n (I)

The semiconductor light receiving element of this embodiment operates as follows, for example.
First, a temperature environment for sufficiently reducing the dark current of the semiconductor light receiving element is prepared. The dark current is reduced as the ambient temperature is lower. However, for the purpose of mounting on a communication device for practical use, the dark current needs to be large enough to be mounted on the substrate of the receiving package. Cool and set to about -60 ° C.
Next, a bias T is applied to the element, and a DC bias having a voltage close to breakdown is applied. When a DC bias is applied, an electric field as shown in FIG. 3 is applied. Further, a pulse bias is applied from the AC terminal of the bias T so that the breakdown voltage is exceeded during the pulse bias. As a result, a gain of about 10 6 to 7 is periodically obtained to obtain a photon detection level gain.

As shown in FIG. 1A, when signal light (photon) 100 is incident on the semiconductor light receiving element 10 from the n-type semiconductor substrate 11 side, the APD layer 13 receives the signal light 100, Amplifies and generates a photocurrent. As the signal light 100, an optical pulse signal is incident in synchronization with a pulse bias having a constant period. The intensity of incident light is set to about 0.1 phpp to 1.0 phpp. Here, phppp is a unit representing the average number of photons contained in one pulse signal. The APD layer 13 photoelectrically converts the photon signal in the light absorption layer 133 to generate photocarriers (a pair of electrons and holes due to photons), and one carrier is used as the p ⁺ type buffer layer 14 and the other is used as the other carrier. Carriers are injected into the multiplication layer 131 through the electric field relaxation layer 132. The carriers injected into the multiplication layer 131 cause avalanche multiplication, and the signal is amplified to output amplified signals to both the p-type electrode 16 and the n-type electrode 17. When operated with a pulse bias at the time of photon detection, the gain is expected to be about 10 6 or more and can be amplified to a level that can be detected even with a single carrier.

In the present invention, in the multiplication layer 131, the optical carrier travels from the electric field relaxation layer 132 across the multiplication layer 131 to the n ⁺ -type buffer layer 12 by the action of the second multiplication layer 131 b. As a result, the ionization rate of the entire layer is increased, and the ionization ability of the entire layer is higher than that of the layer not including the second multiplication layer 131b.

前記式（ＩＩ）において、Ｅｇはバンドギャップ、Ｎ_Ｂは、不純物濃度である。前記式（ＩＩ）によると、ブレークダウンに達する電界はバンドギャップと相関がある。Ｅｇが小さくなるとブレークダウン電圧も下がることから、Ｅｇが下がるとイオン化に必要な電界強度も下がる関係にある。従って、増倍層中に複数のバンドギャップの材料を積層すると、バンドギャップの小さい材料でイオン化率が高まり、増倍しやすくなる。一方、増倍層内で発生するダークキャリアは、バンドギャップＥｇが小さいほうが発生しやすいという関係から、超格子層や後述するＥｇ傾斜層において、他の部分より高い確率で発生する。しかし、増倍層材料は、増倍層へのキャリア注入位置により、増倍特性が異なるという特徴を持っている。 The relationship between the ionization rate and the band gap is not formulated, but can be inferred from the relationship between the breakdown voltage and the band gap.
Breakdown voltage V _B are known relationship of the following formula (II).

In the formula (II), Eg is the bandgap, _{N B} is the impurity concentration. According to the formula (II), the electric field reaching the breakdown has a correlation with the band gap. Since the breakdown voltage decreases as Eg decreases, the electric field intensity required for ionization also decreases as Eg decreases. Therefore, when a plurality of band gap materials are stacked in the multiplication layer, the ionization rate increases with a material having a small band gap, and the multiplication becomes easy. On the other hand, dark carriers generated in the multiplication layer are generated with a higher probability than other portions in the superlattice layer and the Eg gradient layer described later, because the band carriers Eg are more likely to be generated. However, the multiplication layer material has a feature that the multiplication characteristic varies depending on the position of carrier injection into the multiplication layer.

  In the electron multiplication type multiplication layer, it is assumed that the multiplication layer is located in the depletion layer portion between the diode PN junctions, and carriers injected from the P-type layer side (carrier traveling direction when reverse bias is applied) From the N-type layer side, carriers that are injected from the N-type layer side (holes are considered from the direction of carrier travel when a reverse bias is applied) are relatively in the multiplication layer. It is known to be lower. In the case of a hole multiplication type multiplication layer, the opposite phenomenon is observed. If it occurs at an intermediate position inside the multiplication layer, the intermediate multiplication factor is indicated.

  In the semiconductor light receiving device of the present invention, dark carriers in the multiplication layer are generated more on the N-type layer side in the multiplication layer, so that many of the dark carriers are increased in the multiplication layer having a constant band gap. The multiplication factor is smaller than the double. A signal having such a wave height distribution is input to a subsequent amplifier and amplified linearly. The output signal of the amplifier is input to the discriminator, the threshold value is determined, and 1 and 0 are output. By appropriately adjusting the threshold value, signal detection with a good S / N ratio can be realized. Therefore, the semiconductor light receiving device including the semiconductor light receiving element of the present embodiment can be highly sensitive.

The semiconductor light receiving element of this embodiment can be manufactured as follows.
The first step is epitaxial crystal growth.
Each layer is laminated on the semiconductor substrate in the order shown in Table 1 on the n-type semiconductor substrate 11 by a crystal growth apparatus.

  Next, a method for manufacturing the semiconductor light receiving element of this embodiment will be described with reference to FIG. In FIG. 2, the same parts as those in FIG. The manufacturing method of the semiconductor light receiving device of this embodiment includes an epitaxial crystal layer stacking step and a process step. The process steps include a mesa structure forming step, a passivation film forming step, an electrode forming step, a polishing step, and an antireflection film forming step. FIG. 2A shows an epitaxial crystal layer stacking step. FIG. 2B shows a mesa structure forming step and a passivation film forming step. FIG. 2C shows an electrode forming process. FIG. 2D shows a polishing process and an antireflection layer forming process.

First, as shown in FIG. 2A, an epitaxial crystal layer to be an n ⁺ -type buffer layer 12, an APD layer 13, a p ⁺ -type buffer layer 14, and a p ⁺ -type contact layer 15 is stacked on the n-type semiconductor substrate 11 ( Epitaxial crystal layer lamination step). Each layer of the epitaxial crystal layer is as described above. Each of the layers is stacked by molecular beam epitaxy (MBE), gas source MBE, metal organic chemical vapor deposition (MOVPE), or the like.

Next, as shown in FIG. 2B, a mesa structure is etched from the p ⁺ -type contact layer 15 to the middle of the n-type semiconductor substrate 11 to form a mesa structure (mesa structure forming step). The etching is preferably performed by wet etching using a non-selective etching solution such as bromine / methanol, bromine / water, or bromine / hydrogen bromide / water after forming an etching mask by patterning. As the etching mask, a resist having resistance to an etching solution, SiO ₂ or the like can be used. Next, a passivation film 18 is formed on the entire surface of the formed mesa structure and the n-type semiconductor substrate 11 (passivation film forming step).

Next, as shown in FIG. 2C, a part of the passivation film 18 on the p ⁺ -type contact layer 15 and a part of the passivation film 18 on the n-type semiconductor substrate 11 are removed. In order to remove part of the passivation film 18, an etching mask is formed by patterning, and then the passivation film 18 is removed only in a desired region. If the passivation film 18 is Si0 ₂ or SiN _x or the like, and its removal, or the like can be used BHF (buffered hydrofluoric acid). An electrode is formed by forming the aforementioned metal in the removed portion. Thus, the p-type electrode 16 brought into contact with the p ⁺ -type contact layer 15 and the n-type electrode 17 brought into contact with the n-type semiconductor substrate 11 are formed (electrode forming step).

  Next, as shown in FIG. 2D, the surface of the n-type semiconductor substrate 11 opposite to the surface on which the APD layer 13 is formed is polished to a thickness appropriate for the handling. Further, this surface is mirror-polished to make a mirror surface (polishing step). Next, an antireflection film 19 is formed on the mirror-polished surface of the n-type semiconductor substrate 11 (antireflection film forming step). For the formation, for example, plasma chemical vapor deposition (p-CVD) or the like can be used. In this way, the semiconductor light receiving element of this embodiment can be manufactured. However, the manufacturing method of the semiconductor light receiving element of the present embodiment is not limited to this example.

(Embodiment 2)
FIG. 4 shows a configuration of an example of the semiconductor light receiving element of the present embodiment. FIG. 4A is a cross-sectional view of the semiconductor light receiving element of this embodiment. FIG. 4B is a diagram showing the layer structure of the region B in the cross-sectional view (FIG. 4A) of the present embodiment. FIG. 4C is a diagram illustrating a layer structure of the second multiplication layer 431b of the present embodiment. In the drawings, the same parts as those in FIG. This semiconductor light receiving element 40 includes an n ⁺ type buffer layer 12, an avalanche photodiode (APD) layer 43, a p ⁺ type buffer layer 14, and a p ⁺ type contact layer 15 on an n type semiconductor substrate 11. These are avalanche photodiodes (APDs) stacked in this order. In the APD layer 43, a multiplication layer 431, an electric field relaxation layer 432, and a light absorption layer 433 are stacked in this order from the n-type semiconductor substrate 11 toward the p ⁺ -type buffer layer 14. . The multiplication layer 431 has a two-layer structure of a first multiplication layer 431a and a second multiplication layer 431b. The multiplication layer material includes an electron multiplication type material and a hole multiplication type material. In the present embodiment, the multiplication layer 431 indicates a material using an electron multiplication type material. . In the multiplication layer 431, a second multiplication layer 431b and a first multiplication layer 431a are stacked in this order from the n-type semiconductor substrate 11 toward the p ⁺ -type buffer layer. The first multiplication layer 431a is a layer having a constant band gap.

In the present embodiment, the second multiplication layer 431b has a band gap or an average band gap inclined in the layer (decreasing continuously or stepwise from the first multiplication layer side toward the opposite side). It is the same as Embodiment 1 except that it has an inclined structure. In the present embodiment, the band gap is inclined in the second multiplication layer 431b so that the band gap becomes smaller in the direction away from the first multiplication layer 431a. An inclined structure can be formed by configuring the material of the second multiplication layer 431b with InAlGaAs, InGaAsP, or the like. The inclined structure may be continuously inclined or may be inclined stepwise. In the case of inclining stepwise (decreasing from the first multiplication layer side toward the opposite side), for example, as shown in FIG. 4C, the second multiplication layer 431b includes 431b-1, 431b- 2, 431b-3 can use materials having different band gaps so that the band gaps increase in the above order. When the band gap changes stepwise, the number of steps (number of steps) may be one. Each maximum and minimum values of the band gap in said second multiplication layer 431b _is, when it is Eg2 _{max, Eg2 min,} the _{Eg2 max} is either equal to the band gap Eg1 of the first multiplication layer 431a, Less than (Eg1 ≧ Eg2 _max ). When the band gap corresponding to the light of wavelength λ is Eλ, the band gap Eλ satisfies Eλ ≧ Eλ ₁ (λ ₁ = 1.2 μm) in order to reduce the tunnel dark current in the entire second multiplication layer. It is preferable to satisfy. That is, it is preferable that the minimum value Eg2 _min of the band gap of the material included in the second multiplication layer satisfies the relationship of Eg2 _min ≧ Eλ ₁ (λ ₁ = 1.2 μm).

In the present invention, for example, the band gap of the first multiplication layer has a minimum value Eg1 _min on the surface on the second multiplication layer side, and the band gap of the second multiplication layer is on the second multiplication layer side. The maximum value Eg2 _max is taken, Eg1 _min and Eg2 _max satisfy the relationship Eg1 _min = Eg2 _max , and the band gap of the second multiplication layer is directed from the first multiplication layer side to the opposite side. It is preferable to decrease continuously.

  By having the above configuration, it is possible to obtain a semiconductor light receiving element capable of improving the S / N ratio as in the first embodiment. A semiconductor light receiving device including the semiconductor light receiving element of the present embodiment can be highly sensitive.

(Embodiment 3)
FIG. 5 shows a configuration of an example of the semiconductor light receiving element of the present embodiment. FIG. 5A is a cross-sectional view of the semiconductor light receiving element of this embodiment. FIG. 5B is a diagram showing the layer structure of the region C in the cross-sectional view (FIG. 5A) of the present embodiment. In the drawings, the same parts as those in FIG. Table 4 below shows the layer structure of the semiconductor light receiving element of this embodiment. The semiconductor light receiving element 50 includes an n ⁺ type buffer layer 12, an avalanche photodiode (APD) layer 53, a p ⁺ type buffer layer 14, and a p ⁺ type contact layer 15 on an n type semiconductor substrate 11. These are avalanche photodiodes (APDs) stacked in this order. In the APD layer 53, a light absorption layer 533, an electric field relaxation layer 532, and a multiplication layer 531 are stacked in the order from the n-type semiconductor substrate 11 toward the p ⁺ -type buffer layer 14. . The multiplication layer 531 has a two-layer structure of a first multiplication layer 531a and a second multiplication layer 531b. The multiplication layer material includes an electron multiplication type material and a hole multiplication type material. In this embodiment, the multiplication layer 531 is a material using a hole multiplication type material. . InP or the like can be used as the hole multiplication type material. In the case of a hole multiplication type multiplication layer, the multiplication layer 531 is sandwiched between an n ⁺ type electric field relaxation layer and a p ⁺ type buffer layer 14 adjacent to the APD layer 53. In the multiplication layer 531, a first multiplication layer 531 a and a second multiplication layer 531 b are laminated in this order from the n-type semiconductor substrate 11 toward the p ⁺ -type buffer layer 14. The first multiplication layer 531a is a layer having a constant band gap.

  In the present embodiment, the APD layer 53 is laminated so that the light absorption layer 533 is on the n-type semiconductor substrate 11 side. The second multiplication layer 531b has a superlattice structure. Table 5 shows an example of the configuration of the material, layer thickness, etc. of each layer of the semiconductor light receiving element 50 of the present embodiment. Min and Max in the table represent the minimum value and the maximum value of each preferable range. Similarly, Typ represents a representative value.

In the present embodiment, the multiplication layer 531 is preferably produced by setting the doping concentration (impurity concentration) to be low, specifically, 1 × 10 ¹⁶ cm ⁻³ or less, as in the above-described embodiment. What is necessary is just to be 5 * 10 < ¹⁵ > cm <^-3> or less. By adopting such a doping concentration, the electric field strength of the multiplication layer 531 can be made constant (uniform electric field) along the layer direction during the operation of the semiconductor light receiving element 10.

  Table 5 shows the case where the second multiplication layer 531b has a superlattice structure, but the second multiplication layer 531b may have the above-described inclined structure.

  By having the above configuration, it is possible to obtain a semiconductor light receiving element capable of improving the S / N ratio as in the first embodiment. A semiconductor light receiving device including the semiconductor light receiving element of the present embodiment can be highly sensitive.

  Next, examples of the present invention will be described. The present invention is not limited or restricted by the following examples.

[Example 1]
A semiconductor light receiving element 10 shown in FIG. 1A was manufactured by the method for manufacturing a semiconductor light receiving element described in the first embodiment. First, an epitaxial crystal layer to be an n ⁺ type buffer layer 12, an APD layer 13, a p ⁺ type buffer layer 14, and a p ⁺ type contact layer 15 was stacked on the n type semiconductor substrate 11 using an MBE crystal growth apparatus. (Epitaxial crystal layer stacking step). Table 6 below shows the composition of each layer, the layer thickness, etc. in the epitaxial crystal layer. The material in the table represents the main component. For example, there may be a composition shift due to diffusion of components at the interface between the layers. Typ in the table represents a representative value. In the second multiplication layer 131b in the epitaxial crystal layer, a barrier layer / well layer combination layer structure having one period shown in Table 7 below was manufactured for 10 periods.

A mask (negative resist or SiO ₂ ) was formed on the surface of the epitaxial crystal layer on the p ⁺ -type contact layer 15 side by patterning. In this state, the n-type semiconductor substrate 11 was etched halfway using a non-selective etchant (such as bromine / water or bromine / methanol). In this way, a mesa structure was formed (mesa structure forming step). The etching depth was about 3.6 μm at the deepest place.

After removing the mask, a passivation film 18 (material: SiN _x ) was formed on the entire surface of the formed mesa structure and the n-type semiconductor substrate 11 (passivation film forming step).

In order to make contact with the electrode, first, a mask (negative resist or SiO ₂ ) was formed on the entire surface of the passivation film 18. Next, the portion of the mask located on the p ⁺ type contact layer 15 was removed. Further, a part of the mask located on the n-type semiconductor substrate 11 was removed. In this state, the passivation film 18 corresponding to the portion where the mask was removed was removed by buffered hydrofluoric acid or the like. In this way, a window for connecting the electrodes was formed. Next, after removing the mask, a metal was formed on the entire surface in the order of Ti / Au or Ti / Pt / Au to form an electrode. Among the formed electrodes, a mask was formed on portions corresponding to the p-type electrode and the n-type electrode. In this state, using a milling apparatus or the like, argon gas (argon ion beam) was irradiated to remove the metal other than those corresponding to the p-type electrode and the n-type electrode. Thus, the p-type electrode 16 brought into contact with the p ⁺ -type contact layer 15 and the n-type electrode 17 brought into contact with the n-type semiconductor substrate 11 were formed (electrode forming step).

  Next, the surface of the n-type semiconductor substrate 11 opposite to the surface on which the APD layer 13 is formed is polished to reduce the thickness of the n-type semiconductor substrate 11 to about 150 μm. Mirror polishing was performed to make a mirror surface (polishing step).

An antireflection film 19 (SiN _x film, film thickness: about 2000 mm (200 nm)) is formed on the mirror-finished surface of the n-type semiconductor substrate 11 using p-CVD or a sputtering apparatus (an antireflection film forming step). ). Thus, the semiconductor light receiving element 10 used in this example was produced.

  The semiconductor light receiving element 10 was modularized (eg, a pigtail module).

[Comparative Example 1]
For comparison, a semiconductor light receiving element (corresponding to FIG. 7) in which the multiplication layer is configured with a single band gap in the semiconductor light receiving element 10 of Example 1 was manufactured. Table 8 below shows the composition of the material and layer thickness of each layer in the epitaxial crystal layer. The material in the table represents the main component. For example, there may be a composition shift due to diffusion of components at the interface between the layers. Typ in the table represents a representative value. The obtained semiconductor light-receiving element was modularized (pigtail module or the like) in the same manner as in Example 1.

[Characteristic evaluation]
The modules produced in Example 1 and Comparative Example 1 were cooled using a Peltier element to a constant temperature of about −60 ° C. In this state, a DC bias having a voltage close to the breakdown voltage of the semiconductor light receiving element is applied using the bias T. Further, a pulse bias was applied from the AC terminal of the bias T so that the breakdown voltage was exceeded during the pulse bias.

  In this state, an optical pulse signal set to a light intensity of 0.1 php was irradiated in synchronization with the pulse bias. The output signal at this time was input to the discriminator. The result is shown in FIG. In FIG. 6, the horizontal axis represents the dark current value (Id (@ 0.9Vb, RT)) at a bias voltage of 90% of the breakdown voltage (Vb) at room temperature (RT) of each element, and the vertical axis represents , Dark count (quantum efficiency 10%, T = −60 ° C.) is plotted. The measurement results of the element of Example 1 are indicated by ● and the measurement results of the element of Comparative Example 1 are indicated by ▲. It can be seen that the device of Example 1 has higher dark current characteristics than the device of Comparative Example 1. As predicted from this result, if the element of Example 1 is an element having the same performance as the prior art, the dark count value considered to be mainly caused by dark current tends to be higher than that of the element of Comparative Example 1. Conceivable. However, the dark count value of the element of Example 1 can be obtained by reducing the value of the identification level appropriately by three times or more than that of the element of Comparative Example 1. This corresponds to the fact that the S / N ratio for photon detection can be improved by 3 times or more under the condition where the quantum efficiency is 10%. Note that the S / N ratio depends on the quantum efficiency, and generally the S / N ratio tends to decrease as the quantum efficiency increases. Therefore, in order to improve the S / N ratio by 3 times or more as described above, the quantum efficiency has to be greatly reduced. However, according to the present invention, it is possible to achieve both high quantum efficiency and a high S / N ratio, for example, as in the present embodiment.

[Example 2]
The semiconductor light receiving element 50 shown in FIG. 5 was produced as follows. First, an epitaxial crystal layer to be an n ⁺ -type buffer layer 12, an APD layer 53, a p ⁺ -type buffer layer 14, and a p ⁺ -type contact layer 15 was stacked on the n-type semiconductor substrate 11 using an MBE crystal growth apparatus. (Epitaxial crystal layer stacking step). Table 9 below shows the composition of the material, layer thickness, etc. of each layer in the epitaxial crystal layer. Typ in the table represents a representative value. In the second multiplication layer 531b in the epitaxial crystal layer, a barrier layer / well layer combination layer structure having one period shown in Table 10 below was manufactured for 10 periods. Except for these, the semiconductor light receiving element 50 of this example was fabricated in the same manner as in Example 1.

  The semiconductor light receiving element 50 was modularized (pigtail module or the like). Similarly to the first embodiment, the module using the semiconductor light receiving element of the second embodiment can achieve both high quantum efficiency and a high S / N ratio.

  A part or all of the above-described embodiment can be described as in the following supplementary notes, but is not limited thereto.

(Additional remark 1) It has a photodiode layer which converts an optical signal into an electric signal,
The photodiode layer includes a light absorption layer, an electric field relaxation layer, and a multiplication layer,
The electrolytic relaxation layer is sandwiched between the light absorption layer and the multiplication layer,
The multiplication layer comprises a first multiplication layer and a second multiplication layer;
The first multiplication layer and the second multiplication layer are laminated in the order from the electric field relaxation layer side,
The second multiplication layer is adjacent to the first multiplication layer;
The minimum value of the band gap of the material contained in the first multiplication layer is Eg1 _min , the maximum value of the band gap of the material contained in the second multiplication layer is Eg2 _max , and the second multiplication layer is in the second multiplication layer. A semiconductor light-receiving element that satisfies a relationship of Eg1 _min ≧ Eg2 _max and Eg1 _min > Eg2 _min , where the minimum value of the band gap of the contained material is Eg2 _min .

(Supplementary note 2) The semiconductor light receiving element according to supplementary note 1, wherein a band gap of the first multiplication layer is constant.

(Additional remark 3) The semiconductor light receiving element of Additional remark 1 or 2 whose thickness of said 1st multiplication layer is 0.2 micrometer or more.

(Additional remark 4) The thickness of the said 1st multiplication layer is more than half of the thickness of the whole said multiplication layer, The semiconductor light receiving element in any one of Additional remark 1 to 3 characterized by the above-mentioned.

(Additional remark 5) Said 2nd multiplication layer has a superlattice structure, The semiconductor light receiving element in any one of Additional remark 1 to 4 characterized by the above-mentioned.

(Supplementary Note 6) The first multiplication layer is formed of In _x1 Al _y1 Ga _(1-x1-y1) As (0 <x1 <1, 0 <y1 <1, 0 <x1 + y1 ≦ 1),
The second multiplication layer includes In _x1 Al _y1 Ga _(1-x1-y1) As / In _x2 Al _y2 Ga _(1-x2-y2) As (0 <x2 <1, 0 <y2 <1, 0 < having a superlattice structure represented by x2 + y2 ≦ 1),
In _x1 Al _y1 Ga _(1-x1-y1) As band gap Eg (In _x1 Al _y1 Ga _(1-x1-y1) As) is In _x2 Al _y2 Ga _(1-x2-y2) As band gap The semiconductor light-receiving element according to appendix 5, which is larger than Eg (In _x2 Al _y2 Ga _(1-x2-y2) As).

(Supplementary Note 7) The first multiplication layer is formed of In _(1-a1) Ga _a1 As _b1 P _(1-b1) (0 ≦ a1 ≦ 1, 0 ≦ b1 ≦ 1),
The second multiplication layer is made of In _(1-a1) Ga _a1 As _b1 P _(1-b1) / In _(1-a2) Ga _a2 As _b2 P _(1-b2) (0 ≦ a2 ≦ 1, 0 ≦ a superlattice structure represented by b2 ≦ 1),
_{In (1-a1) Ga a1} As b1 P (1-b1) band gap _Eg of _{(In (1-a1) Ga} a1 As b1 P (1-b1)) _{is, In (1-a2) Ga} a2 As b2 being greater than P _(1-b2) the band gap _Eg of _{(in (1-a2) Ga} a2 as b2 P (1-b2)), Appendix 5 semiconductor photodetector according.

(Supplementary note 8) Any one of Supplementary notes 1 to 7, wherein a band gap of the second multiplication layer decreases continuously or stepwise from the first multiplication layer side toward the opposite side. The semiconductor light receiving element described in 1.

(Appendix 9) The band gap of the first multiplication layer takes a minimum value Eg1 _min on the surface of the second multiplication layer,
The band gap of the second multiplication layer takes a maximum value Eg2 _max on the surface on the first multiplication layer side,
Eg1 _min and Eg2 _max satisfy the relationship Eg1 _min = Eg2 _max ,
9. The semiconductor light receiving element according to appendix 8, wherein a band gap of the second multiplication layer continuously decreases from the first multiplication layer side toward the opposite side.

(Supplementary Note 10) The second multiplication layer is composed of a plurality of layers having different band gaps, and the band gaps are reduced stepwise as the distance from the first multiplication layer increases. The semiconductor light receiving element according to appendix 8.

(Additional remark 11) When the band gap corresponding to the light of wavelength λ is Eλ, the minimum value of the band gap Eg2 _min of the material contained in the second multiplication layer is Eg2 _min ≧ Eλ ₁ (λ ₁ = 1 .2 μm), the semiconductor light receiving element according to any one of appendices 1 to 10.

(Supplementary note 12) A semiconductor light-receiving device comprising the semiconductor light-receiving element according to any one of Supplementary notes 1 to 11.

10, 40, 50, 60 Semiconductor light receiving element 11 n-type semiconductor substrates 12, 12a, 12b n ⁺ -type buffer layers 13, 43, 53, 63 Avalanche photodiode layers 131, 431, 531, 631 Multiplication layers 131a, 431a 531a First multiplication layer 131b, 431b, 531b Second multiplication layer 132, 432, 532, 632 Electric field relaxation layer 133, 433, 533, 633 Light absorption layer 14p ⁺ type buffer layer 15p ⁺ type contact layer 16 p-type electrode 17 n-type electrode 18 passivation film 19 antireflection film 100 signal light (photon)

Claims (10)

A photodiode layer for converting an optical signal into an electrical signal;
The photodiode layer includes a light absorption layer, an electric field relaxation layer, and a multiplication layer,
The electrolytic relaxation layer is sandwiched between the light absorption layer and the multiplication layer,
The multiplication layer comprises a first multiplication layer and a second multiplication layer;
The first multiplication layer and the second multiplication layer are laminated in the order from the electric field relaxation layer side,
The second multiplication layer is adjacent to the first multiplication layer;
The minimum value of the band gap of the material contained in the first multiplication layer is Eg1 _min , the maximum value of the band gap of the material contained in the second multiplication layer is Eg2 _max , and the second multiplication layer is in the second multiplication layer. A semiconductor light-receiving element that satisfies a relationship of Eg1 _min ≧ Eg2 _max and Eg1 _min > Eg2 _min , where the minimum value of the band gap of the contained material is Eg2 _min . 2. The semiconductor light receiving element according to claim 1, wherein a band gap of the first multiplication layer is constant. The semiconductor light receiving element according to claim 1, wherein the first multiplication layer has a thickness of 0.2 μm or more. 4. The semiconductor light receiving element according to claim 1, wherein a thickness of the first multiplication layer is not less than half of a thickness of the entire multiplication layer. 5. 5. The semiconductor light receiving element according to claim 1, wherein the second multiplication layer has a superlattice structure. 6. The first multiplication layer is formed of In _x1 Al _y1 Ga _(1-x1-y1) As (0 <x1 <1, 0 <y1 <1, 0 <x1 + y1 ≦ 1),
The second multiplication layer includes In _x1 Al _y1 Ga _(1-x1-y1) As / In _x2 Al _y2 Ga _(1-x2-y2) As (0 <x2 <1, 0 <y2 <1, 0 < having a superlattice structure represented by x2 + y2 ≦ 1),
In _x1 Al _y1 Ga _(1-x1-y1) As band gap Eg (In _x1 Al _y1 Ga _(1-x1-y1) As) is In _x2 Al _y2 Ga _(1-x2-y2) As band gap The semiconductor light receiving element according to claim 5, wherein the semiconductor light receiving element is larger than Eg (In _x2 Al _y2 Ga _(1-x2-y2) As). The first multiplication layer is formed of In _(1-a1) Ga _a1 As _b1 P _(1-b1) (0 ≦ a1 ≦ 1, 0 ≦ b1 ≦ 1);
The second multiplication layer is made of In _(1-a1) Ga _a1 As _b1 P _(1-b1) / In _(1-a2) Ga _a2 As _b2 P _(1-b2) (0 ≦ a2 ≦ 1, 0 ≦ a superlattice structure represented by b2 ≦ 1),
_{In (1-a1) Ga a1} As b1 P (1-b1) band gap _Eg of _{(In (1-a1) Ga} a1 As b1 P (1-b1)) _{is, In (1-a2) Ga} a2 As b2 P _(1-b2) the band gap _Eg of _{(in (1-a2) Ga} a2 as b2 P (1-b2)) being greater than, the semiconductor light receiving device according to claim 5, wherein. The band gap of the second multiplication layer decreases continuously or stepwise from the first multiplication layer side toward the opposite side, according to any one of claims 1 to 7, The semiconductor light receiving element as described. The band gap of the first multiplication layer takes a minimum value Eg1 _min on the surface on the second multiplication layer side,
The band gap of the second multiplication layer takes a maximum value Eg2 _max on the surface on the first multiplication layer side,
Eg1 _min and Eg2 _max satisfy the relationship Eg1 _min = Eg2 _max ,
9. The semiconductor light receiving element according to claim 8, wherein a band gap of the second multiplication layer continuously decreases from the first multiplication layer side toward the opposite side. A semiconductor light-receiving device comprising the semiconductor light-receiving element according to claim 1.

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