JP2011166684A - Reference frequency signal source - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a reference frequency signal source capable of adapting to different reference signals without drastically changing hardware. <P>SOLUTION: The reference frequency signal source includes: a frequency conversion circuit 10 that generates a clock signal and a local oscillation signal based on a reference signal and a control signal C that responds to the frequency f<SB>i</SB>of the reference signal; a DDS (Direct Digital Synthesizer) 2 that generates a frequency signal corresponding to frequency control data in synchronization with the clock signal; a filter 3 that suppresses unwanted wave components contained in the frequency signal from the DDS 2; a mixer 8 that frequency-mixes the local oscillation signal and the output signal of a voltage-controlled oscillator; a filter 9 that suppresses unwanted wave components contained in a mixed signal from the mixer 8; a phase comparator 5 that detects a phase difference between the frequency signal via the filter 3 and the mixed signal via the filter 9; a loop filter 6 that filters a phase-difference signal from the phase comparator 5; and the voltage-controlled oscillator 7 that generates the output signal in response to the phase difference signal via the loop filter 6. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to a reference frequency signal source used in a radio communication apparatus or the like, and more particularly to an improved technique capable of dealing with a plurality of different reference signal frequencies.

Conventionally, a frequency synthesizer is known as a reference frequency signal source used in a wireless communication device or the like (see, for example, Non-Patent Document 1).
FIG. 10 is a block diagram showing the configuration of the frequency synthesizer described in Non-Patent Document 1.

10, the frequency synthesizer (reference frequency signal source), a reference signal source 101 of frequency _{f i,} the digital synthesizer (DDS) 102 directly generates a frequency signal of the frequency _{f d,} a filter (FLT) 103, a frequency a frequency divider 104 which generates a divided signal f _d / T, a phase comparator (PD) 105, a loop filter (LF) 106, a voltage controlled oscillator 107 for generating an output signal of the frequency _{f o,} the mixer 108 and a filter (FLT) 109.

Next, the operation of the frequency synthesizer shown in FIG. 10 will be described.
A reference frequency signal source composed of a frequency synthesizer outputs an output signal (frequency f _o ) that is phase-synchronized with the output signal (frequency f _i ) of the reference signal source 101 from the voltage controlled oscillator 107 to the outside.

First, the output signal of the reference signal source 101 is used as a clock of the DDS 102, and the DDS 102 outputs a sine wave-like continuous signal (frequency f _d ). The frequency f _d can be changed according to the frequency control data from the outside.

Subsequently, the filter 103 suppresses unnecessary wave components included in the output signal of the DDS 102, and the frequency divider 104 performs frequency division of the output signal of the DDS 102 filtered by the filter 103, thereby dividing the divided signal (f _d / T) is input to the phase comparator (PD) 105.

The mixer 108 performs frequency mixing of the output signal of the voltage controlled oscillator 107 and the output signal of the reference signal source 101, and the filter 109 suppresses an unnecessary wave component included in the frequency mixed wave from the mixer 108, and the difference frequency. (Frequency | f _o −f _i |) is input to the phase comparator 105 as a desired wave.

The phase comparator 105 performs phase comparison between the frequency-divided signal (frequency f _d / T) and the difference frequency (frequency | f _o −f _i |), and the loop filter 106 performs phase comparison from the phase comparator 105. The signal is filtered to generate a control voltage for the voltage controlled oscillator 107.
Voltage controlled oscillator 107, by changing the frequency f _o in accordance with the control voltage, to establish the phase synchronization of the output signal of the reference signal source 101.

In the reference frequency signal source shown in FIG. 10, when phase synchronization is established, the frequency-divided signal (frequency f _d / T) and the difference frequency (frequency | f _o −f _i |) are equal to each other. The frequency needs to be within the range of the operating frequency of the phase comparator 105. In general, the phase comparator 105 does not operate near DC.

F. J. et al. M.M. Carrillo et al., “Hybrid synthesizers in space: Galileo's CMCU” Proc. of 2nd Int. Conf. on RAST 2005, pp. 361-368, 2005.

Conventional reference frequency signal source, for the frequency synthesizer of FIG. 10, when the output frequency f _o of the frequency f _i and the voltage controlled oscillator 107 of the reference signal source 101 are substantially equal, from the mixer 108 of difference frequency Since the frequency | f _o −f _i | is near DC, the phase comparator 105 does not operate, and there is a problem that phase synchronization cannot be established.

Also, when changing to a different reference signal source, the frequency f _i is changed, the frequency f _{d /} T and difference frequency of the frequency divided signal _| f o _-f i | be altered to suit, the changed When the frequency deviates outside the pass band of the filters 103 and 109, the frequency-divided signal or the difference frequency is suppressed by the filters 103 and 109, so that the phase comparator 105 does not operate and phase synchronization cannot be established. There was a problem.
In addition, if a plurality of filters having different pass bands are prepared in order to avoid the suppression by the filters 103 and 109, there is a problem that the configuration of the signal source becomes complicated and the overall size increases.

Further, with the change of the frequency _{f i,} but also changed the frequency _{f d} of DDS102, to the frequency _{f d} to a constant value, it needs to be significantly changed in accordance with a control signal DDS102 the frequency _{f i} As a result, there is a problem that the DDS control circuit becomes complicated and increases the cost.

  The present invention has been made to solve the above-described problems, and an object of the present invention is to obtain a reference frequency signal source that can correspond to different reference signal frequencies without requiring significant hardware changes. And

  A reference frequency signal source according to the present invention includes a reference signal source that generates a reference signal, a frequency conversion circuit that generates a clock signal and a local oscillation signal based on the reference signal and a control signal corresponding to the frequency of the reference signal, A direct digital synthesizer that generates a frequency signal according to frequency control data in synchronization with the clock signal, a first filter that suppresses unnecessary wave components included in the frequency signal from the direct digital synthesizer, a local oscillation signal, and a voltage A first mixer that frequency-mixes the output signal of the controlled oscillator, a second filter that suppresses unwanted wave components included in the mixed signal from the first mixer, a frequency signal that passes through the first filter, A phase comparator for detecting a phase difference from the mixed signal through the filter of 2; a loop filter for filtering the phase difference signal from the phase comparator; and a loop It is obtained by a voltage controlled oscillator for generating an output signal in accordance with the phase difference signal via the filter.

  According to the present invention, it is possible to cope with different reference signal frequencies without requiring a large hardware change.

It is a block diagram which shows the 1st structural example of the reference frequency signal source which concerns on Embodiment 1 of this invention. It is a block diagram which shows the 2nd structural example of the reference frequency signal source which concerns on Embodiment 1 of this invention. It is a block diagram which shows the 3rd structural example of the reference frequency signal source which concerns on Embodiment 1 of this invention. It is a block diagram which shows the 4th structural example of the reference frequency signal source which concerns on Embodiment 1 of this invention. It is a block diagram which shows the 1st structural example of the frequency conversion circuit of the reference frequency signal source which concerns on Embodiment 2 of this invention. It is explanatory drawing which shows the frequency component contained in the mixed signal (mixed wave) from the mixer in FIG. It is a block diagram which shows the 2nd structural example of the frequency conversion circuit of the reference frequency signal source which concerns on Embodiment 2 of this invention. It is a block diagram which shows the 3rd structural example of the frequency conversion circuit of the reference frequency signal source which concerns on Embodiment 2 of this invention. It is a block diagram which shows the 4th structural example of the frequency conversion circuit of the reference frequency signal source which concerns on Embodiment 2 of this invention. It is a block diagram which shows the structure of the conventional reference frequency signal source.

Embodiment 1 FIG.
1 is a block diagram showing a reference frequency signal source according to Embodiment 1 of the present invention.
In Figure 1, the reference frequency signal source, a reference signal source 1 for generating a reference signal of frequency f _i, and 2 direct digital synthesizer (DDS) to generate a frequency signal of a frequency f _d in accordance with the frequency control data, the filter and (FLT) 3, a frequency divider 4 to generate a divided signal of frequency _f d / T, the phase comparator and (PD) 5, a loop filter (LF) 6, and generates an output signal of the frequency _{f o} A voltage control oscillator 7, a mixer 8, a filter (FLT) 9, and a frequency conversion circuit 10 inserted between the reference signal source 1, the DDS 2 and the mixer 8 are provided.

  As the reference signal source 1, a crystal oscillator that generates a fixed frequency may be used, or a frequency synthesizer that variably sets the frequency may be used.

Next, the operation according to the first embodiment of the present invention shown in FIG. 1 will be described.
First, the frequency conversion circuit 10 generates a clock signal (frequency m · f _x ) and a local oscillation signal (frequency n) based on the reference signal from the reference signal source 1 and the control signal C corresponding to the frequency f _{i of the} reference signal. F _x ) (m and n are natural numbers).

Here, the frequency n · f _x is the output frequency f _o differs from the value of the reference frequency signal source, and regardless of the frequency f _i, shall be approximately constant value.
The output signal from the frequency conversion circuit 10 is synchronized with the reference signal from the reference signal source 1.

DDS2 as a clock signal of a frequency m · _{f x,} outputs the sinusoidal continuous signal (frequency _{f d).} The frequency f _d can be changed according to the frequency control data from the outside.

The filter 3 suppresses unnecessary wave components included in the frequency signal (f _d ) from the DDS 2, and the frequency divider 4 performs frequency division of the frequency signal from the DDS 2 filtered through the filter 3, A circumferential signal (f _d / T) is generated.

The mixer 8 performs frequency mixing of the output signal (frequency f _o ) of the voltage controlled oscillator 7 and the output signal (frequency n · f _x ) of the frequency conversion circuit 10.
Filter 9 suppresses an unnecessary wave components contained in the mixed wave from the mixer 8, the difference frequency (frequency _{| f o -n · f x |} ) and outputs as a desired wave.

The phase comparator 5, a divided signal (the frequency _f d / T), the difference frequency (frequency _{| f o -n · f x |} ) and phase comparison between performing.
The loop filter 6 filters the phase comparison signal from the phase comparator 5 and generates a control voltage for the voltage controlled oscillator 7.

Voltage controlled oscillator 7, according to the control voltage from the loop filter 6 to change the output frequency f _o, to establish the phase synchronization of the output signal of the frequency conversion circuit 10.
That is, the output signal (frequency f _o ) of the reference frequency signal source output from the voltage controlled oscillator 7 is synchronized with the reference signal (frequency f _i ) from the reference signal source 1.

In a reference frequency signal source of FIG. 1, the frequency n · f _x frequency m · f _x and the local oscillation signal of the clock signal, regardless of the frequency f _i of the reference signal, so nearly constant value, mixed wave from the mixer 8 The frequency of the component does not change greatly.
Thus, the desired wave component passing through the filter 9 frequency _{(| f o -n · f x} |) also does not change, the operation of the phase comparator 5 is always guaranteed.

Moreover, since the passband relative to the frequency f _i is not necessary to prepare a plurality of different filters, it is not the size of the reference signal source 1 increases.
Further, since the clock frequency of DDS2 does not change greatly, the DDS control circuit can be simplified.

In the above description, of the mixed wave from the mixer 8, the difference frequency of the frequency | f _o −n · f _x | is the desired wave, but the sum frequency of the frequency | f _o + n · f _x | is included. Thus, the same effect can be obtained even when other mixed wave components are used as desired waves.

Although a specific value of the frequency division number T of the frequency divider 4 is not mentioned, generally, the value of the frequency division number T is “an integer of 2 or more”.
If the frequency division number T is “1”, the frequency divider 4 in FIG. 1 is bypassed (shunted), resulting in the circuit configuration shown in FIG.

In the circuit configuration of FIG. 2, the frequency f _d and the frequency _| f o _-n · f x | By establishing such that equal phase synchronization, the same effect as the configuration shown in FIG.
In FIG. 2, the filter 3 and the phase comparator 5 are directly connected, and the frequency divider 4 in FIG. 1 is bypassed.

As shown in FIGS. 3 and 4, a frequency divider 11 having a frequency division number R may be inserted between the filter 9 and the phase comparator 5 in FIGS. 1 and 2.
In the circuit configuration shown in FIG. 3, the frequency f _{d /} T and the frequency | f o _-n · f x | by establishing the phase synchronization so that the / _R is equal, the same effect as the configuration shown in FIG. 1 Play.
Similarly, in the circuit configuration shown in FIG. 4, the frequency f _d and the frequency | f o _-n · f x | By establishing / _R and so it is equal phase synchronization, configuration similar to that shown in FIG. 1 There is an effect.

As described above, the reference frequency signal source according to the first embodiment (FIGS. 1 to 4) of the present invention includes the reference signal source 1 that generates the reference signal (frequency f _i ), the reference signal, and the frequency of the reference signal. a frequency conversion circuit 10 for generating a clock signal and a local oscillation signal based on the control signal C corresponding to f _i, in synchronization with a clock signal, generates a frequency signal (frequency f _d) in response to the frequency control data Direct digital synthesizer (DDS) 2, filter 3 (first filter) for suppressing unnecessary wave components included in the frequency signal from direct digital synthesizer 2, local oscillation signal (frequency n · f _x ), and voltage controlled oscillator 7 of the output signal (frequency f _o) and the mixer 8 for mixing frequency (first mixer), filter 9 for suppressing unnecessary wave components contained in the mixed signal from the mixer 8 (second A phase comparator 5 for detecting the phase difference between the frequency signal via the filter 3 and the mixed signal via the filter 9; a loop filter 6 for filtering the phase difference signal from the phase comparator 5; And a voltage-controlled oscillator 7 that generates an output signal (frequency f _o ) in accordance with the phase difference signal that has passed through the filter 6.

Further, frequency dividers 4 and 11 (FIG. 1, FIG. 3, FIG. 3) are provided between at least one of the filter 3 and the phase comparator 5 and between the filter 9 and the phase comparator 5. 4) is inserted. Furthermore, the reference signal source 1, the frequency f _i a changeable variable signal source of the reference signal may be constituted by (frequency synthesizer).
Thus, without requiring significant hardware changes, it is possible to realize the possible reference frequency signal source corresponding to the frequency f _i of the different reference signals.

Embodiment 2. FIG.
Although not specifically mentioned in the first embodiment (FIGS. 1 to 4), the frequency conversion circuit 10 may be configured as shown in FIG.
FIG. 5 is a block diagram showing the configuration of the frequency conversion circuit 10 of the reference frequency signal source according to Embodiment 2 of the present invention.

In FIG. 5, the frequency conversion circuit 10 includes a variable frequency divider 21 that frequency-divides a reference signal (frequency f _i ) according to a control signal C, and a frequency-divided signal (frequency f _i / A) A mixer 22 for frequency-mixing the reference signal (frequency f _i ), and a mixed wave included in the mixed signal from the mixer 22 other than the desired wave (frequency m · f _x ) corresponding to the clock signal is suppressed. And a filter 24 that suppresses other than the desired wave (frequency n · f _x ) corresponding to the local oscillation signal among the mixed waves included in the mixed signal from the mixer 22.

Next, the operation of the frequency conversion circuit 10 according to the second embodiment of the present invention shown in FIG. 5 will be described.
First, the variable frequency divider 21 performs frequency division of the reference signal (frequency f _i ) from the reference signal source 1 to generate a divided signal (f _i / A). At this time, the frequency division number A of the variable frequency divider 21 can be changed by the control signal C, a value corresponding to the frequency f _i.
Subsequently, the mixer 22 performs frequency mixing of the reference signal (frequency f _i ) and the frequency-divided signal (frequency f _i / A) from the variable frequency divider 21.

Next, one filter 23, by suppressing unnecessary wave components contained in the mixed wave from the mixer 22 (other than the frequency m · f _x), and generates a clock signal for DDS22. That is, the mixed wave component as a frequency m · f _x the desired wave.
The other filter 24, by suppressing unnecessary wave components contained in the mixed wave from the mixer 22 (other than the frequency n · f _x), and generates a local oscillation signal for the mixer 8. That is, the mixed wave component becomes n · f _x the desired wave.

At this time, the frequency f _m of the mixed wave from the mixer 22 is given by the following equation (1).

f _m = | p · f _i ± q · (f _i / A) |
= F _i · | p ± (q / A) | (1)

However, in Formula (1), p and q are orders (integer).
From the equation (1), the mixed wave from the mixer 22 has a plurality of frequency components at a frequency interval f _i / A as shown in FIG. Therefore, other than one wave of the frequency components in FIG. 6 by suppressing in each filter 23 and 24, it is possible to obtain each desired frequency of the frequency m · f _x or frequency n · f _x.

When changing the frequency f _i of the reference signal, the frequency m · f _x, so that _n · f _x is obtained, may be changing the division number A of the variable frequency divider 21.
For example, the frequency _{f i} is 10MHz reference signal, when changing to the 10.23 MHz, and the first desired frequency _{m · f x (= 19.8MHz)} , second desired frequency n · _f x (= (9.9 MHz) can be obtained by setting the frequency division number A as follows.

First, when the frequency _{f i} of the reference signal is 10MHz, by setting the frequency division number A to "100", the desired frequency m _· f x, as n · _{f x,} the following equation (2), wherein As shown by (3), desired values of 19.8 MHz and 9.9 MHz are obtained.

m · f _x = f _i · | 2- (2 / A) |
= 10MHz ・ | 2- (2/100) |
= 19.8MHz (2)
n · f _x = f _i · | 1- (1 / A) |
= 10MHz ・ | 1- (1/100) |
= 9.9 MHz (3)

On the other hand, when the frequency f _{i of the} reference signal is 10.23 MHz, by setting the frequency dividing number A to “31”, the desired frequency m · f _x and n · f _{x are set} as the following formula (4) As shown in Equation (5), desired values of 19.8 MHz and 9.9 MHz are obtained.

m · f _x = f _i · | 2- (2 / A) |
= 10.23MHz ・ | 2- (2/31) |
= 19.8MHz (4)
n · f _x = f _i · | 1- (1 / A) |
= 10.23MHz ・ | 1- (1/31) |
= 9.9 MHz (5)

In the example of the above formula (2) to (5), changing the frequency f _i of the reference signal, a desired frequency _{m · f x, n · f} x did not change, the reference signal Frequency depending on the value of f _i may change the desired frequency. However, even in such a case, by setting the value of the frequency dividing number A to be large, the arrangement of the mixed wave components from the mixer 22 can be made dense, and the desired frequency can be set to a substantially constant value.

Therefore, with the configuration of the frequency conversion circuit 10 shown in FIG. 5, the desired frequencies m · f _x and n · f _x can be made substantially constant regardless of the frequency f _i of the reference signal. The same effect can be achieved.

In the circuit configuration of FIG. 5, the external (reference signal input terminal) and one input terminal of the mixer 22 are directly connected. For example, a frequency divider inserted on one input terminal side of the mixer 22. (Not shown) shows a bypassed state.
FIG. 7 is a block diagram showing another configuration example of the frequency conversion circuit 10 according to the second embodiment of the present invention, in which a variable frequency divider 25 having a frequency division number B is additionally inserted between the outside and the mixer 22. Indicates the state.

In FIG. 7, the difference from the above (see FIG. 5) is only that the variable frequency divider 25 is additionally inserted. Detailed description is omitted.
For Figure 7, the frequency f _m of the mixed wave from the mixer 22 is given by the following equation (6).

f _m = | p · (f _i / B) ± q · (f _i / A) |
= F _i · | (p / B) ± (q / A) | (6)

According to the equation (6), the frequency interval of the mixed wave from the mixer 22 is f _i / (A · B), which is different from f _i / A in FIG. .
As a result, by setting the frequency division number A, B to appropriate values, regardless of the frequency f _i of the reference signal, it can be made substantially constant desired frequency m · f _x, the _n · f _x.

In the above description, a desired frequency m _· f x, it is assumed that the n · _{f x} is a different frequency from one another, be the same frequency _{(m · f x = n ·} f x) equivalent Needless to say, there are effects.

When the desired frequencies m · f _x and n · f _x are the same frequency, the frequency conversion circuit 10 corresponding to FIGS. 5 and 7 can be reduced to the circuit configurations shown in FIGS. 8 and 9, respectively.
That is, it is only necessary to delete one of the two filters 23 and 24 in FIGS. 5 and 7 and use only one filter 23.
8 and 9, the overall size of the reference frequency signal source can be reduced and the cost can be reduced.

As described above, the frequency conversion circuit 10 according to the second embodiment (FIG. 5) of the present invention has the variable frequency divider 21 (first variable) that frequency-divides the reference signal (f _i ) according to the control signal C. Frequency divider), a mixer 22 (second mixer) for frequency-mixing the frequency-divided signal (f _i / A) from the variable frequency divider 21 and the reference signal (f _i ), and a mixed signal from the mixer 22 Of the mixed wave included in the mixed signal from the mixer 22 and the filter 23 (third filter) that suppresses other than the first desired wave (m · f _x ) corresponding to the clock signal. Among these, a filter 24 (fourth filter) that suppresses components other than the second desired wave (m · f _x ) corresponding to the local oscillation signal is provided.

  Further, the frequency conversion circuit 10 according to the second embodiment (FIG. 8) of the present invention includes a variable frequency divider 21 that frequency-divides the reference signal according to the control signal C, and a frequency-divided signal from the variable frequency divider 21. A mixer 22 for frequency-mixing the reference signal and the reference signal, and a filter 23 (third filter) for suppressing a mixed wave included in the mixed signal from the mixer 22 other than the desired wave corresponding to the clock signal and the local oscillation signal. It has.

Further, the frequency conversion circuit 10 according to the second embodiment (FIGS. 7 and 9) of the present invention is inserted between the reference signal input terminal and the mixer 22 in addition to the configurations of FIGS. A variable frequency divider 25 (second variable frequency divider) that frequency-divides the reference signal in accordance with the signal C is provided, and the mixer 22 receives the frequency-divided signal from the variable frequency divider 21 and the variable frequency divider. The frequency-divided signal from 22 is frequency mixed.
Thereby, according to Embodiment 2 of this invention, there can exist an effect similar to Embodiment 1 mentioned above.

  1 reference signal source, 2 direct digital synthesizer (DDS), 3 filter (first filter), 4 frequency divider, 5 phase comparator, 6 loop filter, 7 voltage controlled oscillator, 8 mixer (first mixer), 9 filter (second filter), 10 frequency conversion circuit, 11 frequency divider, 19 desired value, 21 variable frequency divider (first variable frequency divider), 22 mixer (second mixer), 23 filter ( (Third filter), 24 filter (fourth filter), 25 variable frequency divider (second variable frequency divider), C control signal.

Claims (6)

A reference signal source for generating a reference signal;
A frequency conversion circuit that generates a clock signal and a local oscillation signal based on the reference signal and a control signal corresponding to the frequency of the reference signal;
A direct digital synthesizer that generates a frequency signal according to frequency control data in synchronization with the clock signal;
A first filter for suppressing unwanted wave components included in the frequency signal from the direct digital synthesizer;
A first mixer for frequency-mixing the local oscillation signal and an output signal of a voltage controlled oscillator described later;
A second filter for suppressing unwanted wave components included in the mixed signal from the first mixer;
A phase comparator for detecting a phase difference between the frequency signal passed through the first filter and the mixed signal passed through the second filter;
A loop filter for filtering the phase difference signal from the phase comparator;
A reference frequency signal source comprising: a voltage controlled oscillator that generates the output signal in response to a phase difference signal that has passed through the loop filter.   The frequency divider is inserted between at least one of the first filter and the phase comparator and between the second filter and the phase comparator. Item 5. The reference frequency signal source according to Item 1. The frequency conversion circuit includes:
A first variable frequency divider for frequency dividing the reference signal in response to the control signal;
A second mixer for frequency-mixing the frequency-divided signal from the first variable frequency divider and the reference signal;
A third filter that suppresses other than the first desired wave corresponding to the clock signal out of the mixed wave included in the mixed signal from the second mixer;
A fourth filter that suppresses a mixed wave included in a mixed signal from the second mixer other than a second desired wave corresponding to the local oscillation signal. The reference frequency signal source according to claim 2. The frequency conversion circuit includes:
A first variable frequency divider for frequency dividing the reference signal in response to the control signal;
A second mixer for frequency-mixing the frequency-divided signal from the first variable frequency divider and the reference signal;
2. A third filter that suppresses a mixed wave included in a mixed signal from the second mixer other than a desired wave corresponding to the clock signal and the local oscillation signal. Alternatively, the reference frequency signal source according to claim 2. The frequency conversion circuit includes:
A second variable frequency divider inserted between the reference signal input terminal and the second mixer and frequency-dividing the reference signal in accordance with the control signal;
4. The second mixer according to claim 3, wherein the second mixer frequency-mixes the frequency-divided signal from the first variable frequency divider and the frequency-divided signal from the second variable frequency divider. 4. The reference frequency signal source according to 4.   6. The reference frequency signal source according to claim 1, wherein the reference signal source is a variable signal source capable of changing a frequency of the reference signal.

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